Power semiconductor module, power electronic system and method for manufacturing power semiconductor module

Abstract

A power electronic system comprising: a power semiconductor module comprising: an encapsulation comprising a first side, an opposite second side, and a lateral side connecting the first and second sides; first and second power leads exposed from a first one of the lateral sides, the first / second power leads configured to provide a first DC + / DC-connection; a plurality of power semiconductor dies encapsulated by the encapsulation and connected to the first and second power leads; and first and second pins exposed from the encapsulation and arranged perpendicular to the first and second power leads, the first pin configured to provide a second DC + connection, and the second pin configured to provide a second DC-connection. The power electronic system further includes a driver board disposed over the first side of the encapsulation and including a driver circuit configured to drive the power semiconductor die in the power semiconductor module, the driver board further including a first capacitor connected to the first and second pins to provide a first commutation loop.

Description

Technical Field

[0001] The present disclosure generally relates to a power semiconductor module, in particular to a power semiconductor module including power leads and pins, a power electronic system including the power semiconductor module, and a method for manufacturing the power semiconductor module. Background Art

[0002] Semiconductor modules, in particular power semiconductor modules, can be configured to operate at high voltages, for example 100 V or higher, or 500 V or higher, or 1.2 kV or higher, or 2 kV or higher, and / or to operate at high currents, for example 1 A or higher, or 10 A or higher, or 100 A or higher. Furthermore, semiconductor modules, in particular power semiconductor modules, can be configured for fast switching. Modules comprising (power) semiconductor dies based on, for example, SiC or GaN can achieve such fast switching speeds. However, parasitic inductances can cause problems during fast switching. For example, due to the rapid commutation of the associated current, parasitic inductances in the commutation loop can cause, for example, a strong voltage overshoot in the drain-source current of the associated transistor. This overshoot can exceed the maximum breakdown voltage of the transistor device, causing damage. Summary of the Invention

[0003] Various aspects relate to a power electronics system, comprising: a power semiconductor module comprising: an enclosure comprising a first side, an opposite second side, and a lateral side connecting the first side and the second side; a first power lead and a second power lead exposed from a first of the lateral sides, the first power lead configured to provide a first DC+ connection structure, the second power lead configured to provide a first DC- connection structure; a plurality of power semiconductor dies enclosed by the enclosure and connected to the first power lead and the second power lead; a first pin and a second pin exposed from the enclosure and arranged perpendicular to the first power lead and the second power lead, the first pin configured to provide a second DC+ connection structure, the second pin configured to provide a second DC- connection structure. The power electronics system further comprises: a driver board disposed on the first side of the enclosure and comprising a driver circuit configured to drive the power semiconductor dies in the power semiconductor module, wherein the driver board further comprises a first capacitor connected to the first pin and the second pin to provide a first commutation loop.

[0004] Various aspects relate to a power semiconductor module, comprising: an enclosure comprising a first side, an opposite second side, and a lateral side connecting the first side and the second side; a first power lead and a second power lead exposed from a first of the lateral sides, the first power lead being configured to provide a first DC+ connection structure, the second power lead being configured to provide a first DC- connection structure; a plurality of power semiconductor dies encapsulated by the enclosure and connected to the first power lead and the second power lead; a first pin and a second pin exposed from the enclosure and arranged perpendicular to the first power lead and the second power lead, the first pin being configured to provide a second DC+ connection structure, the second pin being configured to provide a second DC- connection structure.

[0005] Various aspects relate to a method for manufacturing a power semiconductor module, the method comprising: connecting a plurality of power semiconductor dies to a first power lead and a second power lead, the first power lead being configured to provide a first DC+ connection structure, and the second power lead being configured to provide a first DC- connection structure; encapsulating the plurality of power semiconductor dies with an encapsulation body, the encapsulation body comprising a first side, an opposite second side, and lateral sides connecting the first side and the second side, such that the first power lead and the second power lead are exposed from a first lateral side of the lateral sides; and providing a first pin and a second pin exposed from the encapsulation body and arranged perpendicular to the first power lead and the second power lead, the first pin being configured to provide a second DC+ connection structure, and the second pin being configured to provide a second DC- connection structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The accompanying drawings illustrate examples and, together with the description, serve to explain the principles of the present disclosure. Other examples and many expected advantages of the present disclosure will be readily apparent from the detailed description below. The elements in the accompanying drawings are not necessarily drawn to scale relative to each other. The same or similar reference numerals represent the same or similar parts.

[0007] Figure 1A and Figure 1B Shows a top view of a power semiconductor module ( Figure 1A ) and side view ( Figure 1B ), the power semiconductor module includes power leads and the power semiconductor module also includes pins, and the power leads and the pins both provide a DC+ connection structure and a DC- connection structure respectively.

[0008] Figure 2A and Figure 2B A perspective view of the power electronics system is shown ( Figure 2A) and a top view of a power semiconductor module included in the power electronic system ( Figure 2B ).

[0009] Figure 3A and Figure 3B A top view of another power semiconductor module is shown ( Figure 3A ) and side view ( Figure 3B ).

[0010] Figure 4 According to a specific example Figure 1A and Figure 1B Cross-sectional view of a power semiconductor module.

[0011] Figure 5 is a flow chart of an exemplary method for manufacturing a power semiconductor module. DETAILED DESCRIPTION

[0012] In the following detailed description, known structures and components are shown in schematic form to facilitate describing one or more aspects of the present disclosure. In this regard, directional terms such as "top," "bottom," "left," "right," "upper," and "lower" are used with reference to the orientation of the accompanying drawings being described. Because components of the present disclosure can be positioned in many different orientations, the directional terms are used for illustrative purposes only. It should be understood that other examples can be utilized and that structural or logical changes can be made.

[0013] In addition, although a particular feature or aspect of an example may be disclosed only with respect to one of several embodiments, such a feature or aspect may be combined with one or more other features or aspects of other embodiments, as long as it may be desirable and advantageous for any given or specific application, unless otherwise specifically noted or unless technically limited. In addition, with respect to the terms "comprising," "having," "with," or other variations thereof used in the specific embodiments or claims, these terms are intended to be open-ended inclusions in a manner similar to the term "comprising." The terms "coupled" and "connected" and their derivatives may be used. It should be understood that these terms can be used to indicate that two elements cooperate or interact with each other, whether they are in direct physical or electrical contact, or they are not in direct contact with each other; an intermediate element or layer can be provided between the elements that are "engaged," "attached," or "connected." However, the elements that are "engaged," "attached," or "connected" may also be in direct contact with each other. In addition, the term "exemplary" is meant only as an example, not the best or optimal.

[0014] The semiconductor die of a power semiconductor module can be covered with an electrically insulating encapsulating material for embedding within an enclosure. The encapsulating material can, for example, include or consist of any suitable plastic or polymer material and can, for example, contain an inorganic filler material configured to reduce the thermal resistance of the enclosure. The semiconductor die can be encapsulated with the encapsulating material using various techniques, such as compression molding, injection molding, transfer molding, or lamination.

[0015] Efficient power semiconductor modules, efficient power electronics systems, and efficient methods for producing power semiconductor modules can, for example, reduce material consumption, ohmic losses, chemical waste, etc., and thus achieve energy and / or resource savings. Thus, as specified in this specification, improved power semiconductor modules, improved power electronics systems, and improved methods for producing power semiconductor modules can, at least indirectly, contribute to green technology solutions, i.e., provide climate-friendly solutions that reduce energy and / or resource usage.

[0016] Figure 1A and Figure 1B A power semiconductor module 100 is shown, comprising an encapsulation 110 , a first power lead 120 , a second power lead 130 , a plurality of power semiconductor dies 140 , a first pin 150 and a second pin 160 . Figure 1A shows a top view of a power semiconductor module 100 , Figure 1B FIG shows a side view of the power semiconductor module 100. Since the encapsulation 110 blocks the view of the power semiconductor die 140, Figure 1A The power semiconductor die 140 is omitted and Figure 1B Indicated by dotted line.

[0017] The power semiconductor module 100 may include any suitable circuit, such as a converter circuit, an inverter circuit, a half-bridge circuit, a full-bridge circuit, etc. The power semiconductor module 100 may be configured to operate at high voltage and / or high current, such as a voltage of 100 V or higher, or 500 V or higher, or 1 kV or higher, and / or a current of 1 A or higher, or 10 A or higher. The power semiconductor module 100 may be configured, for example, for automotive applications.

[0018] The encapsulation body 110 includes a first side 111, an opposite second side 112, and a lateral side 113 connecting the first side 111 and the second side 112. The lateral side 113 may, for example, have a surface area smaller than the surface areas of the first side 111 and the second side 112. The first side 111 and the second side 112 may, for example, have approximately the same surface area or exactly the same surface area.

[0019] The power semiconductor module 100 can have any suitable shape and any suitable size. For example, the power semiconductor module 100 can have a substantially rectangular or square shape when viewed from above the first side 111. The first side 111 can, for example, have an edge length of 1 cm or more, or 5 cm or more, or 10 cm or more, or 15 cm or more.

[0020] According to one example, the encapsulation body 110 includes or consists of a molded body. Such a molded body can be manufactured using techniques such as compression molding, injection molding, or transfer molding. According to another example, the encapsulation body 110 includes a plastic frame defining an interior space, wherein the power semiconductor die 140 is arranged within the interior space. A potting material can be deposited on the power semiconductor die 140 and can at least partially fill the interior space.

[0021] The power semiconductor module 100 can, for example, be configured for single-sided cooling, meaning that a single side of the enclosure 110 is configured to couple to a heat sink. For example, the second side 112 of the enclosure 110 can be configured to couple to a heat sink. The first side 111 can, for example, be configured to face a driver board. According to another example, the power semiconductor module 100 can be configured for dual-sided cooling, wherein both the first side 111 and the second side 112 are configured to couple to a heat sink. In this case, the driver board can, for example, be positioned above such a heat sink.

[0022] The first power lead 120 and the second power lead 130 are exposed from a first lateral side of the lateral sides 113 of the encapsulation 110. The first power lead 120 and the second power lead 130 can be arranged side by side. The first power lead 120 and the second power lead 130 can be arranged in the same plane. However, the first power lead 120 and the second power lead 130 can also be arranged in different planes relative to each other.

[0023] The first power lead 120 and the second power lead 130 can include or consist of any suitable metal or metal alloy. The first power lead 120 and the second power lead 130 can include or consist of, for example, Al or Cu. According to one example, the first power lead 120 and the second power lead 130 are coated with a suitable plating, such as Ni plating. According to one example, the first power lead 120 and the second power lead 130 are lead frame components.

[0024] The first power lead 120 is configured to provide a first DC+ connection structure (i.e., a DC connection structure with a positive voltage) for the power semiconductor module 100 (in particular, for the power semiconductor die 140), and the second power lead 130 is configured to provide a first DC- connection structure (i.e., a DC connection structure with a negative voltage) for the power semiconductor module 100.

[0025] According to one example, the power semiconductor module 100 may include another power lead 170, which may be configured to provide a phase connection structure for the power semiconductor module 100. The other power lead 170 may include or consist of the same material as the first power lead 120 and the second power lead 130, and may also be a leadframe component. The other power lead 170 may, for example, be exposed from a second of the lateral sides 113 of the package 110. The second lateral side 113 may, for example, be opposite to the first lateral side 113 including the first power lead 120 and the second power lead 130.

[0026] According to one example, the power semiconductor module 100 may include even more power leads. For example, the power semiconductor module 100 may include one or more additional power leads configured as part of the first DC+ connection structure, and / or one or more additional power leads configured as part of the first DC- connection structure, and / or one or more additional power leads configured as part of the phase connection structure.

[0027] The power semiconductor die 140 is encapsulated by the encapsulation body 110 and is electrically connected to the first power lead 120 and the second power lead 130. Although the power semiconductor module 100 has been described so far as to have at least two power semiconductor dies 140, the power semiconductor module 100 may of course also include, for example, two power transistor circuits provided in a monolithically integrated manner.

[0028] The power semiconductor die 140 can be arranged on one or more carriers (not shown). For example, the power semiconductor die 140 can be soldered or sintered or glued to the carrier using a conductive adhesive. Power leads 120, 130, 170 and possibly a first pin 150, a second pin 160, and possibly an additional pin 180 (see below) can also be arranged on the carrier. The power semiconductor die 140 and the power leads 120, 130, 170 can be electrically connected, for example, via the carrier.

[0029] The carrier may be, for example, a power electronic substrate, such as a substrate of the type of direct copper bonding (DCB), direct aluminum bonding (DAB), active metal brazing (AMB), insulated metal substrate (IMS), etc. The carrier may be exposed, for example, from the second side 112 of the encapsulation 110. In the case where the power semiconductor module 100 is configured for double-sided cooling, another carrier may be exposed from the first side 111.

[0030] According to one example, the power semiconductor module 100 is configured for particularly fast switching of load currents. To this end, the power semiconductor module 100 may, for example, include a power semiconductor die 140 that includes or consists of SiC or GaN. Due to this fast switching, it may be beneficial to address parasitic inductances in the power semiconductor module 100, as further described below.

[0031] The first lead 150 and the second lead 160 are exposed from the package 110. Figure 1A and Figure 1B In the example shown, the first pins 150 and the second pins 160 are exposed from the first side 111 of the encapsulation 110. However, the first pins 150 and the second pins 160 may also be exposed from one or more lateral sides 113, for example.

[0032] The first pin 150 and the second pin 160 are arranged perpendicular to the first power lead 120 and the second power lead 130. This may mean that the entire first pin 150 and the second pin 160, or at least the upper ends of the first pin 150 and the second pin 160, point in a direction perpendicular to the first power lead 120 and the second power lead 130. The first pin 150 and the second pin 160 may be configured to be connectable to an external device (e.g., a driver board), wherein the external device may be arranged, for example, above the first side 111 of the encapsulation 110 (this may be the reason why the first pin 150 and the second pin 160 are arranged perpendicular to the first power lead 120 and the second power lead 130).

[0033] According to one example, the first pin 150 and the second pin 160 are press-fit pins configured to provide a press-fit connection with an external device. The first pin 150 and the second pin 160 may include or consist of any suitable metal or metal alloy, such as Al or Cu. The first pin 150 and the second pin 160 may include a suitable plating, such as Ni plating.

[0034] The first pin 150 is configured to provide a second DC+ connection structure of the power semiconductor module 100, and the second pin 160 is configured to provide a second DC- connection structure of the power semiconductor module 100. This may particularly mean that the first pin 150 is electrically connected to the first power lead 120 and is at the same electrical potential as the first power lead 120, and the second pin 160 is electrically connected to the second power lead 130 and is at the same electrical potential as the second power lead 130.

[0035] According to one example, an external device, such as a driver board, can be arranged above the first side 111 of the enclosure 110, wherein the external device includes a first capacitor (e.g., a fast ceramic capacitor) connected to the first pin 150 and the second pin 160 to provide a first commutation loop. Providing such a commutation loop, in which the DC+ and DC- potentials of the power leads 120, 130 are connected to the first capacitor, can, for example, help reduce current overshoot. Compared to the connection between the power leads 120, 130 and an external DC link capacitor, the commutation loop has a lower inductance, so the current can commutate faster, and the overshoot between the drain-source voltage in the power semiconductor module 100 is reduced.

[0036] Since the first pin 150 and the second pin 160 can be configured only to provide the commutation loop, the first pin 150 and the second pin 160 do not necessarily need to be configured to carry the load current. Therefore, the first pin 150 and the second pin 160 can, for example, have a smaller cross-section than the first power lead 120 and the second power lead 130. For example, the cross-section of the first pin 150 and the second pin 160 can be less than half or one-quarter of the cross-section of the first power lead 120 and the second power lead 130.

[0037] According to an example, the power semiconductor module 100 may include one or more additional pins 180 exposed from the encapsulation 110. The one or more additional pins 180 may, for example, be configured to transmit a control signal for driving the power semiconductor die 140. Additionally or alternatively, the one or more additional pins 180 may be configured to transmit a sensing signal, such as a drain voltage sensing signal or a source voltage sensing signal.

[0038] Figure 2A A perspective view of a power electronics system 200 is shown, which includes a driver board 210 and a power semiconductor module 220 . Figure 2B A top view of a power semiconductor module 220 is shown. The power semiconductor module 220 may be similar or identical to the power semiconductor module 100, except for the differences described below.

[0039] The power semiconductor module 220 includes a first power lead 120 and a second power lead 130. The power semiconductor module 220 also includes a third power lead 222. The third power lead 222 can be configured as part of a first DC+ connection structure, which is connected in parallel with the first power lead 120 (this example is shown in FIG. Figure 2A According to another example, the situation is reversed, ie the first power lead 120 and the third power lead 222 provide a first DC-connection structure of the power semiconductor module 220 , while the second power lead 130 provides a first DC+connection structure of the power semiconductor module 220 .

[0040] The power semiconductor module 220 further includes a first pin 150 and a second pin 160, and the power semiconductor module 220 further includes a third pin 224 and a fourth pin 226. The first pin 150 can be connected in parallel with the first power lead 120, the second pin 160 and the fourth pin 226 can be connected in parallel with the second power lead 130, and the third pin 224 can be connected in parallel with the third power lead 222. The first pin 150 and the third pin 224 can be configured to provide a second DC+ connection structure, and the second pin 160 and the fourth pin 226 can be configured to provide a second DC- connection structure (this example is shown in FIG. 1 ). Figure 2A According to another example, the opposite is true.

[0041] The driver board 210 may include, for example, a printed circuit board (PCB). The driver board 210 includes a driver circuit 212 configured to drive a power semiconductor die in the power semiconductor module 220. The driver circuit 212 may be connected to a gate electrode of a power semiconductor die of the power semiconductor module 220. The driver circuit 212 may be connected to the power semiconductor module 220 via one or more additional pins 180.

[0042] The driver board 210 further includes a first capacitor 214 connected to the first pin 150 and the second pin 160 to provide a first commutation loop, and a second capacitor 216 connected to the third pin 224 and the fourth pin 226 to provide a second commutation loop. Figure 2A, the first commutation loop and the second commutation loop are represented by dashed lines. Capacitors 214 and 216 may be, for example, fast-acting ceramic capacitors. First power lead 120, second power lead 130, and third power lead 222 may be configured to be connected to an external DC link capacitor, for example, via welding, brazing, or threading. Such a DC link capacitor may be, for example, a foil-wound capacitor and may be relatively large. Furthermore, such a DC link capacitor may have a relatively high capacitance. First capacitor 214 and second capacitor 216 may have a smaller capacitance than the DC link capacitor and / or may be faster than the DC link capacitor.

[0043] According to one example, first capacitor 214 and second capacitor 216 each have a capacitance in the range of approximately 100 nF to approximately 1 μF. The lower limit of the range may also be approximately 200 nF or approximately 400 nF, and the upper limit may also be approximately 800 nF or approximately 600 nF. On the other hand, the DC link capacitor may, for example, have a capacitance in the range of 100 μF to 1 mF. In other words, the capacitance of first capacitor 214 and second capacitor 216 may be 100 times or more smaller, or 1000 times or more smaller, than the capacitance of a dedicated DC link capacitor.

[0044] Figure 3A and Figure 3B Another power semiconductor module 300 is shown, which may be similar or identical to the power semiconductor modules 100 and 220 except for the differences described below. Figure 3A shows a top view of a power semiconductor module 300, Figure 3B Shown along Figure 3A Side view of arrow B.

[0045] In the power semiconductor module 300, the first pin 150 and the second pin 160 are exposed from one or more lateral sides 113 of the encapsulation body 110. In particular, the first pin 150 and the second pin 160 may be exposed from opposite lateral sides 113 (compare Figure 3A ). In addition, each of the first pin 150 and the second pin 160 may include a first portion arranged in a first plane and a second portion arranged in a different second plane, wherein the first plane and the second plane are arranged at a non-zero angle relative to each other. The non-zero angle may be, for example, approximately 90°. The first power lead 120 and the second power lead 130 may be arranged, for example, in the first plane. In other words, the first pin 150 and the second pin 160 may be bent upward so that the second portion of the first pin and the second portion of the second pin are arranged perpendicular to the first power lead 120 and the second power lead 130.

[0046] The power semiconductor module 300 may further include one or more additional pins 180. The one or more additional pins 180 may also be exposed from one or more lateral sides 113 of the encapsulation 110 (for example, the one or more additional pins 180 may be exposed from the same lateral side 113 as the first pin 120 and the second pin 130). Figure 3A ).

[0047] The power semiconductor module 300 can be configured, for example, for double-sided cooling. This can particularly mean that the first carrier (e.g., DCB) is exposed from the first side 111 of the encapsulation 110 and the second carrier (e.g., DCB) is exposed from the second side 112 of the encapsulation 110. This can be the reason why the pins 150, 160, 180 are exposed from the lateral side 113 of the encapsulation 110.

[0048] Figure 4 A cross-sectional view of a power semiconductor module 100 according to a specific example is shown.

[0049] like Figure 4 As shown, the first pin 150 can be in direct contact with the first power lead 120. In a similar manner, the second pin 160 can be in direct contact with the second power lead 130. This can, for example, mean that the lower end of the first pin 150 and the lower end of the second pin 160 are inserted into corresponding recesses 190 of the first power lead 120 and the second power lead 130, respectively.

[0050] According to one example, the first power lead 120 and the second power lead 130 are metal clips. The recess 190 can be made in the metal clip using any suitable process (e.g., a stamping process or a drilling process). The first pin 150 and the second pin 160 can form a press-fit connection with the recess 190, for example.

[0051] like Figure 4 As shown, the lower ends of the first and second pins 150, 160 may be narrowed to make it easier to insert the pins 150, 160 into the recess 190. The upper ends of the pins 150, 160 may also be narrowed to make it easier to insert the pins 150, 160 into the through holes of a driver board such as the driver board 210.

[0052] According to one example, the first power lead 120 and the second power lead 130 (and possibly another power lead 170) and the power semiconductor die 140 are arranged on a carrier 192. The power leads 120, 130 (and 170) and the power semiconductor die 140 can be, for example, soldered or sintered or glued with a conductive glue to the carrier 192. The carrier 192 can, for example, be a power electronic substrate, such as one of the types mentioned above.

[0053] Figure 5 is a flow chart of a method 500 for manufacturing a power semiconductor module. The method 500 can be used to manufacture the power semiconductor module 100 , 220 , or 300 , for example.

[0054] Method 500 includes: a process of connecting a plurality of power semiconductor dies to a first power lead and a second power lead at 501, wherein the first power lead is configured to provide a first DC+ connection structure and the second power lead is configured to provide a first DC- connection structure; a process of encapsulating the plurality of power semiconductor dies with an encapsulation body at 502, wherein the encapsulation body includes a first side, an opposite second side, and a lateral side connecting the first side and the second side, so that the first power lead and the second power lead are exposed from a first lateral side of the lateral sides; and a process of setting a first pin and a second pin exposed from the encapsulation body and arranged perpendicular to the first power lead and the second power lead at 503, wherein the first pin is configured to provide a second DC+ connection structure and the second pin is configured to provide a second DC- connection structure.

[0055] According to one example of method 500, the first pin 150 and the second pin 160 are provided after the power semiconductor die 140 is encapsulated. This may require manufacturing the encapsulation body 110 (e.g., by molding) to provide openings for the pins. Alternatively, such openings may be created by removing a portion of the encapsulation body 110 after fabrication, such as by drilling, cutting, grinding, etc.

[0056] Example

[0057] Hereinafter, a power semiconductor module, a power electronic system, and a method for manufacturing a power electronic system are explained using specific examples.

[0058] Example 1 is a power electronics system comprising: a power semiconductor module comprising: an enclosure comprising a first side, an opposite second side, and a lateral side connecting the first side and the second side; a first power lead and a second power lead exposed from a first of the lateral sides, the first power lead configured to provide a first DC+ connection structure, the second power lead configured to provide a first DC- connection structure; a plurality of power semiconductor dies encapsulated by the enclosure and connected to the first power lead and the second power lead; a first pin and a second pin exposed from the enclosure and arranged perpendicular to the first power lead and the second power lead, the first pin configured to provide a second DC+ connection structure, the second pin configured to provide a second DC- connection structure. The power electronics system further comprises: a driver board arranged on the first side of the enclosure and comprising a driver circuit configured to drive the power semiconductor dies in the power semiconductor module, wherein the driver board further comprises a first capacitor connected to the first pin and the second pin to provide a first commutation loop.

[0059] Example 2 is the power electronic system of Example 1, wherein the first pin and the second pin are press-fit pins.

[0060] Example 3 is the power electronics system of Example 1 or 2, wherein the first power lead and the second power lead are connected to the DC link capacitor via a welded joint, a soldered joint, or a joint including threads.

[0061] Example 4 is the power electronics system of any of the preceding examples, wherein a capacitance of the first capacitor is in a range of 50 nF to 2000 nF.

[0062] Example 5 is the power electronics system of any of the preceding examples, wherein the first power lead and the second power lead are metal clips, and wherein the lower end of the first pin and the lower end of the second pin are in direct contact with the metal clips.

[0063] Example 6 is the power electronic system of Example 5, wherein the lower end portion of the first pin and the lower end portion of the second pin are inserted into the recess of the metal clip.

[0064] Example 7 is the power electronic system of any of the preceding examples, wherein the first pin and the second pin are exposed from the first side of the enclosure.

[0065] Example 8 is the power electronic system of any one of Examples 1 to 6, wherein the first pin and the second pin are exposed from one or more lateral sides of the enclosure, and wherein the first pin and the second pin are bent upward to be perpendicular to the first power lead and the second power lead.

[0066] Example 9 is the power electronic system of any of the preceding examples, wherein the encapsulation is a molded body.

[0067] Example 10 is the power electronic system of any one of Examples 1 to 8, wherein the encapsulation includes a plastic frame, wherein the power semiconductor die is arranged within an interior space defined by the plastic frame.

[0068] Example 11 is the power electronics system of any of the preceding examples, wherein the load current flows through the first power lead and the second power lead but not through the first pin and the second pin.

[0069] Example 12 is a power semiconductor module comprising: an encapsulation body comprising a first side, an opposite second side, and a lateral side connecting the first side and the second side; a first power lead and a second power lead exposed from a first of the lateral sides, the first power lead being configured to provide a first DC+ connection structure, the second power lead being configured to provide a first DC- connection structure; a plurality of power semiconductor dies encapsulated by the encapsulation body and connected to the first power lead and the second power lead; a first pin and a second pin exposed from the encapsulation body and arranged perpendicular to the first power lead and the second power lead, the first pin being configured to provide a second DC+ connection structure, the second pin being configured to provide a second DC- connection structure.

[0070] Example 13 is the power semiconductor module of Example 12, wherein the first pin and the second pin are press-fit pins.

[0071] Example 14 is the power semiconductor module of Example 12 or 13, wherein the first power lead and the second power lead are configured to be connectable to an external device via a weld joint, a solder joint, or a joint including threads.

[0072] Example 15 is the power semiconductor module of any one of Examples 12 to 14, wherein the power semiconductor dies are connected to form a half-bridge circuit.

[0073] Example 16 is a method for manufacturing a power semiconductor module, the method comprising: connecting a plurality of power semiconductor dies to a first power lead and a second power lead, the first power lead being configured to provide a first DC+ connection structure, and the second power lead being configured to provide a first DC- connection structure; encapsulating the plurality of power semiconductor dies with an encapsulation body, the encapsulation body comprising a first side, an opposite second side, and a lateral side connecting the first side and the second side, such that the first power lead and the second power lead are exposed from a first lateral side of the lateral sides; and providing a first pin and a second pin exposed from the encapsulation body and arranged perpendicular to the first power lead and the second power lead, the first pin being configured to provide a second DC+ connection structure, and the second pin being configured to provide a second DC- connection structure.

[0074] Example 17 is the method of Example 16, wherein the first pin and the second pin are provided after the power semiconductor die is encapsulated.

[0075] Example 18 is the method of Example 16 or 17, wherein providing the first pin and the second pin includes inserting a lower end portion of the first pin and a lower end portion of the second pin into a recess of the first power lead and a recess of the second power lead.

[0076] Example 19 is an apparatus comprising means for performing the method according to any one of Examples 16 to 18.

[0077] Although the present disclosure has been shown and described with respect to one or more embodiments, changes and / or modifications may be made to the illustrated examples without departing from the spirit and scope of the appended claims. In particular, with respect to the various functions performed by the aforementioned components or structures (assemblies, devices, circuits, systems, etc.), unless otherwise indicated, terms used to describe these components (including references to "means") are intended to correspond to any component or structure that performs the specified function of the component (e.g., functionally equivalent), even if not structurally equivalent to the disclosed structure that performs the function in the exemplary embodiments shown herein.

Claims

1. A power electronic system (200), comprising: A power semiconductor module (100, 220, 300) comprising: An enclosure (110) comprising a first side (111), an opposite second side (112), and a lateral side (113) connecting the first side (111) and the second side (112); a first power lead (120) and a second power lead (130) exposed from a first one of the lateral sides (113), the first power lead (120) being configured to provide a first DC+ connection structure, and the second power lead (130) being configured to provide a first DC- connection structure; a plurality of power semiconductor dies (140) encapsulated by the encapsulation body (110) and connected to a first power lead (120) and a second power lead (130); A first pin (150) and a second pin (160) exposed from the package (110) and arranged perpendicular to the first power lead (120) and the second power lead (130), the first pin (150) being configured to provide a second DC+ connection structure, and the second pin (160) being configured to provide a second DC- connection structure; and a driver board (210) arranged on the first side (111) of the package (110) and comprising a driver circuit (212) configured to drive a power semiconductor die (140) in a power semiconductor module (220), The driver board (210) further includes a first capacitor (214) connected to the first pin (150) and the second pin (160) to provide a first commutation loop.

2. The power electronic system (200) according to claim 1, wherein: The first pin (150) and the second pin (160) are press-fit pins.

3. The power electronic system (200) according to claim 1 or 2, wherein: The first power lead (120) and the second power lead (130) are connected to the DC link capacitor via a welded joint, a soldered joint, or a joint comprising threads.

4. The power electronic system (200) according to any one of the preceding claims, wherein: The capacitance of the first capacitor (214) is in the range of 50nF to 2000nF.

5. The power electronic system (200) according to any one of the preceding claims, wherein: The first power lead (120) and the second power lead (130) are metal clips, and the lower end of the first pin (150) and the lower end of the second pin (160) are in direct contact with the metal clips.

6. The power electronic system (200) according to claim 5, wherein: The lower end of the first pin (150) and the lower end of the second pin (160) are inserted into the recess (190) of the metal clip.

7. The power electronic system (200) according to any one of the preceding claims, wherein: The first lead (150) and the second lead (160) are exposed from the first side (111) of the encapsulation body (110).

8. The power electronic system (200) according to any one of claims 1 to 6, wherein: The first pin (150) and the second pin (160) are exposed from one or more lateral sides (113) of the package (110), and the first pin (150) and the second pin (160) are bent upward to be perpendicular to the first power lead (120) and the second power lead (130).

9. The power electronic system (200) according to any one of the preceding claims, wherein: The encapsulating body (110) is a molded body.

10. The power electronic system (200) according to any one of claims 1 to 8, wherein: The package (110) includes a plastic frame, and the power semiconductor die (140) is arranged in an inner space defined by the plastic frame.

11. The power electronic system (200) according to any one of the preceding claims, wherein: The load current flows through the first power lead (120) and the second power lead (130), but does not flow through the first pin and the second pin.

12. A power semiconductor module (100, 220, 300), comprising: An enclosure (110) comprising a first side (111), an opposite second side (112), and a lateral side (113) connecting the first side (111) and the second side (112); a first power lead (120) and a second power lead (130) exposed from a first one of the lateral sides (113), the first power lead (120) being configured to provide a first DC+ connection structure, and the second power lead (130) being configured to provide a first DC- connection structure; a plurality of power semiconductor dies (140) encapsulated by the encapsulation body (110) and connected to a first power lead (120) and a second power lead (130); as well as A first pin (150) and a second pin (160) are exposed from the package (110) and arranged perpendicular to the first power lead (120) and the second power lead (130), the first pin (150) being configured to provide a second DC+ connection structure, and the second pin (160) being configured to provide a second DC- connection structure.

13. The power semiconductor module (100, 220, 300) according to claim 12, wherein: The first pin (150) and the second pin (160) are press-fit pins.

14. The power semiconductor module (100, 220, 300) according to claim 12 or 13, wherein: The first power lead (120) and the second power lead (130) are configured to be connectable to an external device via a welded joint, a soldered joint, or a joint including threads.

15. The power semiconductor module (100, 220, 300) according to any one of claims 12 to 14, wherein: The power semiconductor dies (140) are connected to form a half-bridge circuit.

16. A method (500) for manufacturing a power semiconductor module, the method (500) comprising: Connecting (501) a plurality of power semiconductor dies to a first power lead and a second power lead, the first power lead being configured to provide a first DC+ connection structure and the second power lead being configured to provide a first DC- connection structure; encapsulating (502) the plurality of power semiconductor dies with an encapsulation, the encapsulation comprising a first side, an opposite second side, and lateral sides connecting the first side and the second side such that the first power lead and the second power lead are exposed from a first one of the lateral sides; and A first pin and a second pin are provided (503) exposed from the enclosure and arranged perpendicular to the first power lead and the second power lead, the first pin being configured to provide a second DC+ connection structure, and the second pin being configured to provide a second DC- connection structure.

17. The method (500) of claim 16, wherein: The first pin and the second pin are provided after the power semiconductor die is encapsulated.

18. The method (500) according to claim 16 or 17, wherein: Providing (503) the first pin and the second pin includes inserting a lower end portion of the first pin and a lower end portion of the second pin into a recess of the first power lead and a recess of the second power lead.

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