Circuit board and test interface board for chip electrical failure analysis
By setting slide rails and slot structures on the circuit board, flexible electrical connection between the board and the chip is achieved, which solves the problems of low testing efficiency, poor accuracy and high cost of existing test interface boards, and realizes efficient and accurate chip electrical failure analysis.
Patent Information
- Application Number
- CN202511130926.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-13
- Publication Date
- 2025-12-09
- Estimated Expiration
- 2045-08-13
AI Technical Summary
In existing chip electrical failure analysis processes, test interface boards suffer from low testing efficiency, poor accuracy, and high cost.
A circuit board and a test interface board were designed. By setting slide rails and slot structures on the surface of the circuit board, the movable slots and fixed slots of the plug-in board can be flexibly matched. Combined with conductive through holes and pin connections of the plug-in board, the soldering process is avoided, and the flexibility and stability of the connection points are increased.
It improves the testing efficiency and accuracy of chip electrical failure analysis, reduces testing costs, expands the range of applicable chips, reduces the risk of chip damage, and simplifies the operation process.
Smart Images

Figure CN120629904B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of semiconductor testing, in particular to a circuit board and a test interface board for electrical failure analysis of a chip. BACKGROUND
[0002] In the process of electrical failure analysis (EFA) of a chip, a test interface board is needed to electrically connect the chip and a source monitor unit (SMU) so as to test the chip by the source monitor unit. At present, different types of test interface boards are selected according to different shapes of the chip, and the chip is electrically connected with the selected test interface board by wire bonding. Then, a corresponding wiring mode is determined according to the selected test interface board to realize the connection between the test interface board and the source monitor unit. However, the existing test interface board has limitations, resulting in low testing efficiency, poor testing accuracy and high testing cost. SUMMARY
[0003] In view of the above problems, the present application aims to provide a circuit board and a test interface board for electrical failure analysis of a chip, which can improve testing efficiency and testing accuracy and reduce testing cost through improvement of the structure on the board.
[0004] According to a first aspect of the present application, a circuit board for electrical failure analysis of a chip is provided, comprising:
[0005] A slide rail is arranged on the surface of the circuit board, and a movable slot is arranged on the slide rail and slides thereon;
[0006] A fixed slot is arranged on the surface of the circuit board, and the fixed slot is opposite to the movable slot. The fixed slot and the movable slot are respectively used for inserting one of a group of opposite edges of a plug-in board to electrically connect the inserted edge. The group of opposite edges of the plug-in board is also used for electrically connecting a chip on which the plug-in board is placed.
[0007] A conductive via is arranged on the circuit board and is electrically connected with one of the movable slot and the fixed slot.
[0008] Optionally, a group of opposite slot walls in the slot opening of the fixed slot and the movable slot are respectively provided with contact pins. The contact pins arranged on the group of opposite slot walls are insulated from each other. The fixed slot and the movable slot are respectively electrically connected with the inserted edge of the plug-in board through the contact pins.
[0009] Optionally, the plurality of contact pins are electrically connected to the plurality of conductive through holes one by one, and the circuit board further comprises identifier symbols arranged on the surface of the circuit board, and different conductive through holes are identified by different identifier symbols.
[0010] Optionally, the contact pins and the conductive through holes are electrically connected by connecting lines, and the connecting lines are hidden inside the circuit board.
[0011] Optionally, the circuit board further comprises a supporting component arranged on the surface of the circuit board, and the supporting component is located between the movable slot and the fixed slot and used for supporting a chip inserted into the fixed slot from one of the opposite edges.
[0012] Optionally, the circuit board further comprises pin holes arranged on the circuit board, and the pin holes are used for fixing the circuit board on a stage of a test machine by vacuumizing.
[0013] According to a second aspect of the present application, a test interface board for chip electrical failure analysis is provided, comprising:
[0014] any one of the circuit boards according to the first aspect;
[0015] a plug-in board comprising a group of opposite edges and an opening region for placing a chip arranged in the region between the group of opposite edges, and each of the group of opposite edges is electrically connected to the fixed slot or the movable slot by arranging a pin, and the pin is also used for electrically connecting the chip.
[0016] Optionally, the plug-in board further comprises a plurality of mutually insulated metal sheets arranged around the opening region, and the metal sheets are used for electrically connecting the chip to the pin by connecting one end of the metal sheets to the pin and connecting the other end of the metal sheets to the chip, and the size of the opening region is limited by the area of the central remaining region of the plug-in board after arranging the pins and the metal sheets.
[0017] Optionally, the chip is packaged on the bottom surface of the plug-in board at the opening region of the plug-in board by a COB packaging method, and the connection line between the pin and the metal sheet, the metal sheet, the connection line between the metal sheet and the chip, and the chip are all packaged in the insulating glue used by the COB packaging method.
[0018] Optionally, a first reference line is arranged on the surface of the plug-in board around the opening region, and the first reference line is used for assisting in determining the placement position of the chip when the chip is placed on the plug-in board.
[0019] And / or, a second reference line is arranged on the plate surface of the plug-in plate in the vicinity of the pin, and the second reference line is used to assist in determining the insertion depth of each of the set of opposite edges when the set of opposite edges is inserted into the fixed slot and the movable slot respectively.
[0020] The unexpected technical effects of the present application are:
[0021] The circuit board for chip electrical failure analysis provided by the present application comprises: a sliding rail arranged on the surface of the circuit board, and a movable slot arranged on the sliding rail; a fixed slot arranged on the surface of the circuit board, the fixed slot being opposite to the movable slot, and the fixed slot and the movable slot being respectively used for inserting one of a set of opposite edges of a plug-in plate to electrically connect the inserted edge, the set of opposite edges of the plug-in plate being further used for electrically connecting a chip placed on the plug-in plate; and a conductive via hole arranged on the circuit board, the conductive via hole being electrically connected with one of the movable slot and the fixed slot. Thus, the circuit board stably supports plug-in plates of different sizes adaptively through the fixed slot and the movable slot with variable spacing, has a larger space to set the connection points between the plug-in plates, and realizes fast and accurate connection with wires through the conductive column of the wire end inserted into the conductive via hole, thereby facilitating improvement of test efficiency and test accuracy and reduction of test cost.
[0022] Further, the circuit board provided by the present application further comprises a support component arranged on the surface of the circuit board, the support component being located between the movable slot and the fixed slot and being used for supporting the chip inserted into the fixed slot from the set of opposite edges, so that the chip can be ensured not to fall off under the support of the fixed slot and the support component when the movable slot is slid in a direction away from the fixed slot to take out the chip.
[0023] The test interface board for chip electrical failure analysis provided by the present application comprises: a plug-in plate and any one of the circuit boards of the first aspect, the plug-in plate comprising a set of opposite edges and an opening region for placing a chip arranged in the region between the set of opposite edges, each of the set of opposite edges being electrically connected with the fixed slot or the movable slot into which the plug-in plate is inserted through the arranged pin, so that more pins are allowed to be arranged on the plug-in plate, and the pins are further used for electrically connecting the chip, so that the chip is allowed to have a number of pins satisfying the test requirements between the test interface board, so that optimization of the test process can be supported, thereby facilitating improvement of test efficiency and test accuracy and reduction of test cost.
[0024] Further, the test interface board provided by the application further comprises a plurality of mutually insulated metal sheets arranged around the opening area, the metal sheets are used to connect the pins at one end and the chips at the other end, so that the chips are electrically connected to the pins, the size of the opening area on the plug-in board is limited by the area of the central remaining area after the pins and the metal sheets are arranged, thus the opening area can be relatively large, which not only meets the placement requirements of chips of different sizes and shapes, but also meets the wire outlet requirements of different chips, thereby expanding the range of usable chips. In addition, in the case of a relatively large opening area, various chips are packaged on the bottom surface of the plug-in board at the opening area of the plug-in board, and the test lens can accurately observe the chips from the front of the plug-in board, thereby avoiding many adverse factors caused by the replacement of chips, disassembly of the test machine and adjustment of parameters, and instability of the test machine. BRIEF DESCRIPTION OF DRAWINGS
[0025] The above and other objects, features and advantages of the application will become more apparent from the following description of the embodiments of the application, taken in conjunction with the accompanying drawings, in which:
[0026] Figure 1 Fig. 1 shows a schematic diagram of a test interface board with 12 pins for chip testing;
[0027] Figure 2 Fig. 2 shows a schematic diagram of a test interface board with 256 pins for chip testing;
[0028] Figure 3 Fig. 3 shows a top view of a circuit board provided by the embodiments of the application;
[0029] Figure 4 Fig. 4 shows a cross-sectional view of a set of opposite edges of a plug-in board inserted into a plug-in board according to an exemplary movable slot and fixed slot of the embodiments of the application;
[0030] Figure 5 Fig. 5 shows a top view of a plug-in board provided by the embodiments of the application.
[0031] Explanation of reference signs: 10 - first test interface board; 11 - chip on the first test interface board 10; 12 - pin on the first test interface board 10; 20 - simple self-made board; 21 - wire; 30 - second test interface board; 31 - chip on the second test interface board 30; 32 - metal strip; 33 - pin on the second test interface board 30; 100 - circuit board; 110 - slide rail; 120 - movable slot; 121 - first contact pin; 122 - second contact pin; 130 - fixed slot; 131 - third contact pin; 132 - fourth contact pin; 140 - conductive via hole; 141 - input via hole; 142 - output via hole; 150 - support part; 160 - foot hole; 200 - plug-in board; 210 - open area; 220 - pin on the plug-in board 200; 230 - metal sheet; 240 - first reference line; 241 - first sub-reference line; 242 - second sub-reference line; 243 - third sub-reference line; 244 - fourth sub-reference line; 250 - second reference line; 260 - reference point. DETAILED DESCRIPTION
[0032] The present application will be described in more detail with reference to the drawings. In the various drawings, like elements are denoted by like reference signs. For the sake of clarity, various parts of the drawings are not drawn to scale. In addition, certain known parts can not be shown.
[0033] The present application can be presented in various forms, some examples of which will be described below.
[0034] In the process of electrical failure analysis of a chip, the chip and a source measurement unit need to be electrically connected through a test interface board, so that the chip is tested by the source measurement unit. At present, different types of test interface boards are selected according to the different shapes of the chip, for example, a 12-pin test interface board is selected for a long strip-shaped chip, and a 256-pin test interface board is selected for a square-shaped chip; then the chip is electrically connected with the selected test interface board by wire bonding, and then the corresponding wiring mode is determined according to the selected test interface board to realize the connection between the test interface board and the source measurement unit.
[0035] Figure 1 A schematic diagram of a test interface board with 12 pins for chip testing is shown. As shown in (a) of FIG. Figure 1 The first test interface board 10 is provided with an open area with a size of 3mm x 2.7mm, and a custom long strip-shaped glass sheet placed on the surface is pasted at the open area, and then the chip 11 is pasted, and the chip 11 is electrically connected with the pins 12 provided on the first test interface board 10 by wire bonding. Although the surface of the first test interface board 10 is provided with a plurality of pins 12 at the edges AB and CD, only one edge of the first test interface board 10 can be used to electrically connect the chip 11 with the pins 12, and the other edge cannot be used to electrically connect the chip 11 with the pins 12. Figure 1The simple self-made board 20 is inserted into the test interface board 10 as shown in the (b) figure of FIG. 1 for the power-on test. Figure 1 The chip 11 is connected with the pins of the edge AB through wire bonding as shown in the (a) figure of FIG. 1. Figure 1 The surface of the simple self-made board 20 is provided with conductive columns as shown in the (b) figure of FIG. 1, and thus the electric connection between the simple self-made board 20 and the source measurement unit is realized through the conductive wire 21 with a jack.
[0036] Figure 2 FIG. 2 shows a schematic diagram of a test interface board with 256 pins for chip testing. Figure 2 As shown in the (b) figure of FIG. 2, the second test interface board 30 is provided with an opening region with a size of 10 mm x 10 mm, and the square glass sheet placed on the bottom is pasted to the opening region after pasting the chip 31, and the chip 31 is electrically connected with the metal strip 32 provided on the surface of the second test interface board 30 through wire bonding, and the metal strip 32 is also electrically connected with the pins 33 provided on the surface of the second test interface board 30, and then the conductive wire is connected to the pins 33 through welding to realize the connection between the second test interface board 30 and the source measurement unit.
[0037] The above two test interface boards have limitations in the process of chip testing. Figure 1 The first test interface board 10 has fewer pins as shown in FIG. 1, and if there are multiple groups of test conditions, the complex test conditions cannot be completed at one time, and thus the wire needs to be broken and re-bonded multiple times during the test process, which has a high risk of rework and also directly causes the chip 11 to be damaged, thereby increasing the test cost; in addition, the first test interface board 10 is inserted into the simple self-made board 20 at one end, and thus the simple self-made board 20 needs to be pressed by a heavy object to maintain balance, and the first test interface board 10 is placed in the air, which causes the placement position of the first test interface board 10 to have errors and be unstable, and when the lens of the test machine or the external environment is messy, the chip 11 will be displaced, thereby causing the positioning signal diagram actually measured to be displaced, which affects the accuracy of positioning the failure point on the chip 11. Figure 2 The second test interface board 30 has more pins as shown in FIG. 2, but is only suitable for testing square chips; in addition, Figure 2The second test interface board 30 shown is connected with wires on the pins 33 by welding, which causes many problems. For example, the temperature required for welding wires on the pins 33 is above 200℃, which easily causes damage to the sample board and injuries to personnel; for another example, welding on the pins 33 with small gaps between each other easily causes welding short circuit even if the welding speed is reduced, which causes damage to the chip 31 during power-on testing; for yet another example, in the case of connecting wires through soldering wires after welding the soldering wires on the pins 33, the factors that the soldering wires make the wires unable to be placed horizontally and the sizes of the soldering points are different make the second test interface board 30 unable to be placed horizontally on the stage of the testing machine in the case that the surface of the second test interface board 30 is relative to the surface of the stage, and thus the chip 31 cannot be focused in all areas, and the areas of the chip 31 that are not clearly focused cause deviation between the failed positioning points in the positioning signal diagram and the actual failed positioning points.
[0038] In view of this, an embodiment of the present application provides a circuit board for chip electrical failure analysis. Figure 3 As shown in a top view of a circuit board provided by an embodiment of the present application, Figure 3 As shown, the circuit board 100 includes slide rails 110, a movable slot 120, a fixed slot 130, and conductive vias 140, wherein the slide rails 110 are arranged on the surface of the circuit board 100, and the number thereof can be two as shown in the figure and the two slide rails 110 are arranged in parallel with each other; the movable slot 120 is arranged to slide on the slide rails 110, and the fixed slot 130 is fixed on the surface of the circuit board 100 and arranged opposite to the movable slot 120, so that the movable slot 120 and the fixed slot 130 can stably carry the board after being inserted into one of a pair of opposite edges of the board, and at the same time, the movable slot 120 and the fixed slot 130 are respectively electrically connected to the inserted edges, thereby increasing the space for arranging the connection points between the circuit board 100 and the board, and in addition, the movable slot 120 can change the distance between the movable slot 120 and the fixed slot 130 by sliding on the slide rails 110, which makes the boards of different sizes electrically connected between the movable slot 120 and the fixed slot 130; the conductive vias 140 are arranged on the circuit board 100, and the conductive vias 140 are electrically connected to one of the movable slot 120 and the fixed slot 130, so that the movable slot 120 and the fixed slot 130 can be connected to the source measurement unit through the conductive vias 140.
[0039] Specifically, the fixed slot 130 can be directly fixed on the surface of the circuit board 100; the fixed slot 130 can also be fixed at both ends of the circuit board 100; the fixed slot 130 can also be fixed on the surface of the circuit board 100 through a support. Figure 3On the two slide rails 110 shown, since the slide rails 110 are fixed to the surface of the circuit board 100, the fixed slot 130 is indirectly fixed to the surface of the circuit board 100 in this case. The movable slot 120 and the fixed slot 130 together stably support the insert board, so that the position of the insert board can be stabilized without the need for a heavy object, thus making it less likely for the chip on the insert board to shift. It is also easy to place the chip parallel to the stage of the test machine, so that the chip as a whole can be accurately focused, thereby improving the accuracy of the failure location point on the chip. The chips on the insert board include the elongated chip 11 on the first test interface board 10 and the square chip 31 on the second test interface board 30. The spacing between the movable slot 120 and the fixed slot 130 is variable, which maximizes the adaptation to insert boards of different sizes. The range of applicable chips is correspondingly expanded to a certain extent. The width between a set of opposite sides of the insert board inserted into the movable slot 120 and the fixed slot 130 can be set according to the physical limits of the wire bonding machine.
[0040] The opposite sides of the aforementioned insert board, which are respectively inserted into the movable slot 120 and the fixed slot 130, are also used for electrically connecting the chip placed on the insert board. The increased space between the circuit board 100 and the insert board allows the insert board to have more pins that are connected to the chip and the circuit board 100 at both ends respectively. In this way, even if there are multiple test conditions, it is not necessary to reuse the same pin of the insert board, which helps to avoid damage to the insert board caused by repeated wire breakage and can reduce test costs.
[0041] The aforementioned conductive via 140 can be divided into Figure 3 The circuit board 100 shows an input via 141 for receiving input signals and an output via 142 for output signals. In this case, the circuit board 100 can perform tests on the chip that require analysis of the chip's output signals. The output via 142 can be used as follows: Figure 3 As shown, in the area between the two slide rails 110 on the circuit board 100, the input through hole 141 can be used as follows: Figure 3 As shown, the circuit board 100 has a right-side region on the right side of one of the two slide rails 110. Multiple connection points are provided between the circuit board 100 and the insertion board, and the number of conductive vias 140 is correspondingly multiple. There can be multiple input vias 141 and multiple output vias 142. Some of the multiple input vias 141 can be connected in series as needed during some tests, passing through two external source measurement units. The multiple output vias 142 must be ensured to be insulated from each other. The conductive vias 140 are connected to the wires by inserting conductive posts at the ends of the wires, thus eliminating the need for soldering and saving the labor and material costs required for soldering. For testing chips in the same batch, the efficiency of wiring when switching between different chips can be significantly improved, and the circuit board 100 does not suffer from the numerous problems caused by soldering.
[0042] Figure 3In the embodiment, the circuit board 100 has an opening area between the movable slot 120 and the fixed slot 130, which is adjacent to the fixed slot 130. When the board is supported between the movable slot 120 and the fixed slot 130, the chips on the board can be observed through the opening area, which is important for meeting the requirement of observing different surfaces of the chips. In addition, since there is no conductive via 140 in the opening area, the upper lens and the lower lens for observing the chips above and below the opening area can avoid being scratched by the wires. Furthermore, the height of the board can be accurately controlled when the board is supported between the movable slot 120 and the fixed slot 130, so that the board can be higher than the lower lens and lower than the upper lens, and the upper lens and the lower lens can also avoid being scratched by the board surface.
[0043] Figure 4 Fig. 6 shows a cross-sectional view of the relative edges of the movable slot and the fixed slot when the board is inserted, and the cross-section is parallel to the direction of the sliding rails 110. Figure 3 As shown in Fig. 6, the movable slot has a through hole parallel to the sliding rails 110, which penetrates the movable slot. As shown in Fig. 7, the movable slot 120 has a first contact 121 and a second contact 122 on the upper wall and the lower wall of the slot, respectively, and the first contact 121 and the second contact 122 are insulated from each other. The movable slot 120 is electrically connected to the edge of the board 200 inserted into the slot of the movable slot 120 through the first contact 121 and the second contact 122. The fixed slot 130 has a third contact 131 and a fourth contact 132 on the upper wall and the lower wall of the slot, respectively, and the third contact 131 and the fourth contact 132 are insulated from each other. The fixed slot 130 is electrically connected to the edge of the board 200 inserted into the slot of the fixed slot 130 through the third contact 131 and the fourth contact 132. The slot of the movable slot 120 is a part of the through hole, which is located near the fixed slot 130. Figure 4
[0044] Further, the contacts in the slots of the movable slot 120 and the fixed slot 130 are electrically connected to the conductive vias 140 one by one. The circuit board 100 further includes identifier symbols on the surface of the circuit board 100. Different conductive vias 140 are identified by different identifier symbols. Thus, the wires connected to the conductive vias 140 can be distinguished by the identifier symbols on the surface of the circuit board 100 without the process of labeling, which is beneficial to improving the efficiency of chip testing.
[0045] Further, the movable slot 120 and the fixed slot 130 are electrically connected by connecting lines between the pins arranged in the slot and the conductive through holes 140, the connecting lines are hidden in the interior of the circuit board 100, thus facilitating avoiding chip damage caused by short circuit between the connecting lines and short circuit between the connecting lines and the metal interface of the testing machine, and facilitating avoiding test data error caused by connection error between the pins and the conductive through holes 140 during testing.
[0046] In an optional embodiment, the circuit board 100 further includes support components 150 arranged on the surface of the circuit board 100, the support components 150 are arranged between the movable slot 120 and the fixed slot 130, and are used for supporting the chip inserted into the fixed slot 130 from one of the opposite sides. Figure 3
[0047] The number of the support components 150 is not limited in the embodiments of the present application, the support components 150 can be two as shown in FIG. 1B, or one as shown in FIG. 1C, or more than two, or less than two. Figure 3 Figure 3 In the embodiment shown in FIG. 1C, one support component 150 is arranged near one of the sliding rails 110 to support the chip inserted into the fixed slot 130 from one of the opposite sides. In addition, the specific structure of the support component 150 is not limited in the embodiments of the present application, as long as the support component 150 can support the chip inserted into the fixed slot 130 from one of the opposite sides, for example, the support component 150 can be arranged to include a support rod and a flat plate fixed on the top of the support rod, or the support component 150 can be arranged to include a support rod and an open slot fixed on the top of the support rod, and the opening direction of the open slot is toward the chip inserted into the fixed slot 130.
[0048] For the circuit board 100 including the support member 150, during use: At the start of testing, first insert one of the opposite sides of the insert plate 200 into the through hole from the side of the movable slot 120 away from the fixed slot 130. Then move the opposite side of the insert plate 200 through the through hole of the movable slot 120, reaching a certain distance between the movable slot 120 and the fixed slot 130. Then, with the support of the support member 150, insert the opposite side into the slot of the fixed slot 130. Afterwards, move the movable slot 120 so that the other of the opposite sides of the insert plate 200 reaches the slot. The insert plate 200 is installed in the slot of the movable slot 120; or one opposite edge of the movable insert plate 200 passes through the through hole of the movable slot 120, so that the other opposite edge of the set of opposite edges of the insert plate 200 reaches the slot of the movable slot 120. Then, with the support of the support member 150, the opposite edge that first passed through the movable slot 120 is fixed into the slot of the fixed slot 130. When the test is completed, the movable slot 120 is slid so that the edge of the insert plate inserted into the movable slot 120 is pulled out of the movable slot 120. At this time, the insert plate will not fall off due to the presence of the support member 150. Then the insert plate is pulled out from the fixed slot 130. This method of installing the insert plate 200 can improve the length applicability of the insert plate 200, so that the insert plate 200 can be fixed even when the distance between a set of opposite edges of the insert plate 200 is equal to the maximum distance between the movable slot 120 and the fixed slot 130. For a plug plate 200 where the distance between a set of opposite sides is less than the maximum distance between the movable slot 120 and the fixed slot 130, during installation, the movable slot 120 can be moved to the furthest point from the fixed slot 130 first, and then one of the opposite sides of the plug plate 200 can be inserted into the fixed slot 130 with the support of the support member 150. Then, the movable slot 120 can be slid close to the plug plate 200 and the other of the opposite sides of the plug plate 200 can be inserted into the movable slot 120.
[0049] In another alternative embodiment, the circuit board 100 as Figure 3 The diagram also includes pin holes 160 on the circuit board 100. Pin holes 160 are used to fix the circuit board 100 to the test bench platform by vacuuming, thereby avoiding test data errors caused by movement of the circuit board 100. Vacuuming of pin holes 160 can be achieved by connecting them to the air supply line of the test bench via an air tube. To ensure a secure fixation of the circuit board 100, it is typically necessary to... Figure 3 As shown, a pin hole 160 is provided at each corner of the circuit board 100. Considering that the movable slot 120 sliding on the slide rail 110 will indirectly contact the circuit board 100 due to touching the slide rail 110, the two ends of each slide rail 110 can be as follows: Figure 3 Each of the shown figures has one 160mm foot hole. In addition, Figure 3Conductive vias 140 are centrally located on the right side of the rightmost of the two slide rails 110. Inserting or removing wires into these conductive vias 140 will cause them to indirectly contact the moving circuit board 100. Figure 3 A pin hole 160 is also provided on the right edge of the circuit board 100.
[0050] Corresponding to the circuit board 100 provided in the above embodiments, another embodiment of this application provides a test interface board for chip electrical failure analysis, the test interface board including a plug-in board and any of the circuit boards 100 provided in the above embodiments. Figure 5 The diagram shown is a top view of the insert plate provided in an embodiment of this application. Figure 5 As shown, the insert board 200 includes a set of opposing edges EF and GH and an opening area 210 for placing a chip in the area between the set of opposing edges. Edges EF and GH are each electrically connected to the inserted movable slot 120 or fixed slot 130 via pins 220. Pins 220 are also used to electrically connect the chip, so that the chip is connected to the circuit board 100 via pins 220.
[0051] Specifically, when only one wall of the movable slot 120 and the fixed slot 130 has a contact, the plug-in board 200 can correspondingly only have pins 220 on its surface, so that both the top and bottom edges of the plug-in board 200 can be directly plugged in for power-on testing; when both the movable slot 120 and the fixed slot 130 have contacts on a set of opposite walls in their respective slots, the plug-in board 200 can correspondingly... Figure 4 As shown, pins 220 are provided on both the top and bottom surfaces of the plug-in board 200, allowing power-on testing after plugging in power from both the top and bottom. The plug-in board 200 and the circuit board 100 work together to enable chip testing via the test interface board, meeting the testing requirements of complex testing conditions, improving testing efficiency and accuracy, and reducing testing costs.
[0052] Furthermore, the plug-in 200 can be as follows: Figure 5The plurality of mutually insulated metal sheets 230 are arranged around the opening area 210, and are used to connect the pins 220 at one end and the chip at the other end, so that the chip is electrically connected to the pins 220. The size of the opening area 210 is limited by the area of the central remaining area of the board 200 after the pins 220 and the metal sheets 230 are arranged, so that the opening area 210 is not limited to the area of a certain chip, and thus the opening area 210 can be relatively large, and can not only meet the placement requirements of chips of different sizes and shapes, but also meet the wire-out requirements of different chips, thereby expanding the range of usable chips. Long strip chips, square chips, and even trapezoidal chips formed by artificial splitting can be placed on the board 200 for testing. In addition, when various chips are packaged on the bottom surface of the board at the opening area of the board, the test lens can accurately observe the chip from the front of the board 200, thereby avoiding many adverse factors caused by the instability of the test machine due to the need to disassemble the test machine and debug parameters when replacing the chip.
[0053] In some examples, the chip can be packaged on the bottom surface of the board 200 at the opening area 210 of the board 200 by a COB (chip on board) packaging method. The connection between the pins 220 and the metal sheets 230, the metal sheets 230, the connection between the metal sheets 230 and the chip, and the chip are all packaged in the insulating glue used in the COB packaging method. Thus, after the board 200 is inserted into the circuit board 100, the surface of the board 200 is insulated, thereby avoiding chip damage caused by short circuiting between the board 200 and the metal interface of the test machine.
[0054] Further, at least one of the first reference line 240 and the second reference line 250 is arranged on the surface of the board 200. The first reference line 240 is arranged around the opening area 210, and is used to assist in determining the placement position of the chip when the chip is placed on the board 200. The second reference line 250 is arranged in the vicinity of the pins 220, and is used to assist in determining the insertion depth of each of the pair of opposite edges of the board 200 when the pair of opposite edges is respectively inserted into the movable slot 120 and the fixed slot 130. The first reference line 240 and the second reference line 250 assist in the operation during testing, and are insulating lines. In addition, the surface of the board 200 can also be provided with insulating reference points 260 according to actual needs.
[0055] Figure 5The first reference line 240 includes a first sub-reference line 241, a second sub-reference line 242, a third sub-reference line 243, and a fourth sub-reference line 244. The third sub-reference line 243 is an extension of the opening region 210 along its horizontal axis, and the fourth sub-reference line 244 is an extension of the opening region 210 along its vertical axis. The first and second sub-reference lines 241 and 242 are symmetrical with respect to the fourth sub-reference line 244 and are located on the upper and lower sides of the opening region 210, respectively. Since the horizontal dimension of the opening region 210 is larger than its vertical dimension, therefore... Figure 5 Three sub-datum lines are set on the surface of the middle insert plate 200 in the horizontal direction, and only one sub-datum line is set in the vertical direction. In practice, the number of sub-datum lines arranged in a certain direction is determined according to the size of the opening area 210 in a certain direction.
[0056] for Figure 5 The first reference line 240 shown is used to determine the vertical placement position of the chip when placing it on the insert board 200 based on the third sub-reference line 243. For the horizontal placement position of the chip: the horizontal placement area of the chip can be determined first, and then a sub-reference line located within the determined placement area can be selected from the first sub-reference line 241, the second sub-reference line 242 and the fourth sub-reference line 244, and the horizontal placement position of the chip can be determined based on the selected sub-reference line.
[0057] Figure 5 Three sub-reference lines in the horizontal direction are located in the left, middle, and right regions of the opening region 210, respectively, from left to right. The placement area is determined from the left, middle, and right regions of the opening region 210. After dividing the opening region 210, the placement area can be determined from the three regions according to the chip's test wiring requirements for chips of different sizes. For example, for a chip whose horizontal dimension is less than half the horizontal dimension of the opening region 210, if the chip only has wiring requirements on the left side, then the left region of the opening region 210 is determined as the placement area.
[0058] Figure 5 The second reference line 250 is set parallel to the sides EF and GH. A second reference line 250 is set on the side EF, intersecting with the pin 220 on the side EF. The depth to which the side EF is inserted into the movable slot 120 or the fixed slot 130 is the distance between the side EF and the second reference line 250 set on the side EF. Similarly, a second reference line 250 is set on the side GH, intersecting with the pin 220 on the side GH. The depth to which the side GH is inserted into the movable slot 120 or the fixed slot 130 is the distance between the side GH and the second reference line 250 set on the side GH.
[0059] The plug-in board 200 described above includes pins 220 and metal sheets 230 which are simple and universal, so that the components can be replaced and the replacement is inexpensive, and the range of applicable chips is wide.
[0060] Finally, it should be noted that the terms "first", "second", and "third" are used herein for descriptive purposes only and should not be construed as indicating or implying relative importance. The embodiments described above are not intended to be exhaustive or to limit the application to the precise form disclosed. Many modifications and variations are possible in light of the above description. The embodiments were chosen and described in order to best explain the principles of the application and its practical application to thereby enable others skilled in the art to best utilize the application and various implementations with various modifications as are suited to the particular use contemplated. It is intended that the scope of the application be defined by the claims and their equivalents.
Claims
1. A circuit board for chip electrical failure analysis, comprising: a slide rail disposed on a surface of the circuit board, the slide rail slidingly disposed with a movable socket; a fixed socket disposed on the surface of the circuit board, the fixed socket opposite to the movable socket, the fixed socket and the movable socket respectively for inserting one of a set of opposite edges of a plug-in board to electrically connect the inserted edge, the set of opposite edges of the plug-in board further for electrically connecting a chip placed on the plug-in board; a conductive via disposed on the circuit board, the conductive via electrically connected to one of the fixed socket and the movable socket.
2. The circuit board of claim 1, wherein, a set of opposite walls in a slot of each of the fixed socket and the movable socket are disposed with contact pins, the contact pins disposed on the set of opposite walls are insulated from each other, each of the fixed socket and the movable socket electrically connected to the inserted edge of the plug-in board through the contact pins.
3. The circuit board of claim 2, wherein, a plurality of the contact pins, a plurality of the conductive vias, the contact pins and the conductive vias electrically connected in one-to-one correspondence, the circuit board further comprising an identifier disposed on a surface of the circuit board, different conductive vias identified by different identifiers.
4. The circuit board of claim 3, wherein, the contact pins and the conductive vias electrically connected through a connecting line, the connecting line hidden inside the circuit board.
5. The circuit board of claim 1, further comprising: a support component disposed on the surface of the circuit board, the support component located between the movable socket and the fixed socket, for supporting the chip with one of the set of opposite edges inserted into the fixed socket.
6. The circuit board of claim 1, further comprising: a foot hole disposed on the circuit board, the foot hole for fixing the circuit board on a stage of a test machine through vacuum extraction. 7.A test interface board for chip electrical failure analysis, comprising: the circuit board of any one of claims 1-6; a plug-in board comprising a set of opposite edges and an open area disposed between the set of opposite edges for placing a chip, each of the set of opposite edges electrically connected to the fixed socket or the movable socket through a lead pin disposed thereon, the lead pin further for electrically connecting the chip.
8. The test interface board of claim 7, wherein, the plug-in board further comprising a plurality of mutually insulated metal sheets disposed around the open area, the metal sheets for electrically connecting the chip to the lead pin through one end connected to the lead pin and the other end connected to the chip, the size of the open area limited by the area of a central remaining area of the plug-in board after the lead pin and the metal sheets are disposed.
9. The test interface board of claim 8, wherein, the chip packaged on the bottom surface of the plug-in board at the open area of the plug-in board through COB packaging, the connection between the lead pin and the metal sheet, the metal sheet, the connection between the metal sheet and the chip, and the chip all encapsulated in an insulating glue used in COB packaging. 10.The test interface board of claim 7, wherein a first reference line is disposed on the surface of the plug-in board around the open area, the first reference line for assisting in determining the placement position of the chip when the chip is placed on the plug-in board. And / or, a second reference line is arranged on the plate surface of the plug-in board in the vicinity of the pin, and the second reference line is used to assist in determining the insertion depth of each of the opposite edges of the plug-in board when the opposite edges are inserted into the fixed slot and the movable slot, respectively.
Citation Information
Patent Citations
Support plate for failure analysis, test equipment, and method for chip electrical failure analysis
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Connector slot pin conduction detecting system and method for circuit board
CN109901045A