A method for checking MCU storage area with reduced maximum exposure

Abstract

The application relates to the field of automobile electronic safety technology and discloses an MCU storage area checking method for reducing the maximum exposed surface, which logically divides a region starting from a storage area starting address A into N continuous partitions with a size of P, dynamically calculates the sampling region size L of each partition according to the checking speed V, the time T and the partition number N, ensures that L<=P, then indirectly generates a partition sampling address random offset K with a value range of [0, P-L] by using a true random number generator, calculates the sampling starting address and the sampling ending address of each partition, splices the random offset sampling data of all the partitions, and generates a total check code C; finally, the random offset K and the check code C are stored in a safety area as a reference, the check code C' is recalculated by reusing K during checking, and the C' is compared with the C stored in the safety area; the method considers the efficiency and the safety, and is suitable for resource-restricted embedded scenes.

Description

Technical Field

[0001] This invention relates to the field of automotive electronic safety technology, and in particular to a method for verifying the MCU storage area by minimizing the maximum exposed surface. Background Technology

[0002] To ensure the information security of the storage area of ​​the vehicle MCU (Micro Controller Unit), it is necessary to verify the storage area to prevent intentional tampering.

[0003] A common memory area verification scenario is called secure boot. However, due to the limitations of the MCU's computing performance, verifying the entire memory area during MCU startup takes a long time, which usually does not meet the stringent requirements of automotive vehicles for MCU startup time.

[0004] Existing technologies have proposed some verification schemes to address the above problems and balance the contradiction between security and performance by narrowing the verification scope: one is fixed area verification, that is, only a fixed-size area is verified; the other is partitioned random verification, that is, the storage area is divided into several partitions, and individual partitions are randomly selected for verification.

[0005] It should be noted that: the storage area refers to the area inside the MCU that is divided for persistent storage of programs or data, including P-Flash (program Flash) and / or D-Flash (data Flash); the exposed surface refers to information data that can be directly attacked by humans in information security, and in this invention, it specifically refers to all areas in the MCU storage area where the address space is continuous and not protected by a verification mechanism; the maximum exposed surface refers to one or more exposed surfaces with the largest address space range among all exposed surfaces in the MCU storage area.

[0006] However, existing technologies still have some shortcomings, specifically in the following aspects:

[0007] First, existing methods for verifying the storage area of ​​automotive MCUs have security shortcomings. It's important to understand that any attack code has a certain size and requires contiguous storage space. Smaller exposed areas will be abandoned by attackers because the space is insufficient to accommodate the attack code; conversely, larger exposed areas are more easily selected by attackers for implanting attack code. Therefore, the maximum exposed area should be minimized as much as possible. Figure 4As shown, in the existing technology, for fixed area verification, in the worst case, the fixed verification area is located at the head or tail of the storage area, and the remaining unverified area will form a maximum exposure surface. Attackers can easily inject malicious code into the maximum exposure surface without being detected, which is the least secure. For random partition verification, the security is improved by random distribution, but there is still a probability that the worst case will occur, that is, all the remaining unverified partitions are concentrated at the head or tail of the storage area. Attackers can try to create the above worst case by repeatedly restarting the MCU to make the malicious code run, which is also not secure.

[0008] Secondly, existing verification methods for the storage area of ​​automotive MCUs require a large amount of storage space. In existing technologies, random partition verification requires increasing the number of partitions to reduce the probability of the worst-case scenario in order to further improve security. However, since the verification partitions are randomly selected, it is impossible to predict which partition will be selected for the verification before verification. Therefore, the verification codes of all partitions need to be pre-set in the MCU storage space. The more partitions there are, the more verification codes need to be stored, which is difficult for MCUs with limited storage space to handle. Reducing the number of partitions can reduce the storage space burden, but it will cause algorithm degradation and weaken security.

[0009] In summary, it is necessary to improve the existing technology and propose a MCU memory area verification method that reduces the maximum exposed surface to solve the above-mentioned problems and shortcomings. Summary of the Invention

[0010] The purpose of this invention is to solve the above problems by designing a method for verifying the MCU memory area with a reduced maximum exposed surface.

[0011] The technical solution of the present invention to achieve the above objectives is a method for verifying the MCU memory area with reduced maximum exposed surface, the method comprising the following steps:

[0012] S1: Divide the MCU memory area into N partitions of size P that are logically equal and whose addresses are consecutive but do not overlap, starting from the starting address A of the memory area;

[0013] S2: Calculate the size L of the partitioned sampling verification area. The formula for calculating L is:

[0014] ;

[0015] Where V is the MCU data verification speed, in KB / s, which is determined by the MCU's computing performance and can be obtained by consulting the MCU manual or through actual testing; T is the given verification time, which is the maximum time that can be used for data verification in the MCU memory area under the premise of meeting the MCU startup time requirements, in seconds; floor is the floor operation to ensure that L is an integer in KB; min is the minimum value operation to constrain L to not exceed P.

[0016] S3: Calculate the random offset K of the partition sampling address. The formula for calculating K is:

[0017] ;

[0018] Here, r is a random number generated by the true random number generator inside the MCU; mod is the modulo operation, which converts the random number r into a range of values. A random integer;

[0019] S4: Calculate the total checksum C of the sampled data. The formula for calculating C is:

[0020] ;

[0021] in, The first part represents the sampled data segment of each partition; the second part represents the concatenation of the first and last sampled data segments of each partition; the third part represents the algorithm used to calculate the total checksum of the sampled data, which can be a message verification code algorithm or a hash algorithm, such as CMAC, HMAC, SHA, etc., and this invention does not make any specific limitation.

[0022] S5: Establish a verification standard and store the random offset K of the partition sampling address and the total check code C of the sampling data in the MCU secure storage area;

[0023] S6: MCU memory area verification, using the random offset K of the partition sampling address in the MCU secure memory area and the method of S4 to calculate the total check code of the sampled data. and use The sampled data is compared with the total checksum C in the MCU's secure storage area to confirm whether the storage area sampling verification was successful.

[0024] In S1, the starting address A of the storage area is the starting address of the MCU storage area in Flash. P is an integer not less than 1KB, in KB. The region within the MCU storage area with continuous addresses and not covered by the verification mechanism is the exposed surface. The maximum exposed surface is the continuous region with the largest address range among all exposed surfaces, and the size of the maximum exposed surface is constant. The maximum value of L cannot exceed P under the constraint of the minimum value operation min.

[0025] In S4, algorithm S is at least one of a message verification code algorithm or a hash algorithm, and the sampled data fragments of each partition are those from each partition. Starting address, with The end address is a data set of length L, where i is the partition number.

[0026] The MCU secure storage area in S5 is a separate storage area from the MCU storage area. It has access control and anti-tampering mechanisms to ensure that the random offset K of the sampling address and the total checksum C of the sampling data will not be illegally read or tampered with. For example, it is a secure storage area inside an HSM (Hardware Security Module, which provides hardware for secure cryptographic operations and secure storage of sensitive data). This invention does not make any specific limitations.

[0027] After the MCU storage area is updated, steps S1 to S5 are executed again to overwrite and update the random offset K of the partition sampling address and the total check code C of the sampling data in the MCU secure storage area.

[0028] Compared with the prior art, the present invention has the following beneficial effects:

[0029] 1. The sampling position of the present invention is unpredictable, which avoids the drawback of the prior art (fixed area verification) where attackers can locate and exploit unverified areas by observing fixed sampling positions;

[0030] 2. The maximum exposed surface size in this invention is stable and controllable (determined to be...). This avoids the drawback of the random and uncontrollable maximum exposure area size of existing technologies (partition random verification);

[0031] 3. This invention samples and verifies all partitions, making the unverified areas more finely segmented by the sampled and verified areas, thus avoiding the risk of unverified partitions clustering together in the prior art (random partition verification).

[0032] 4. In this invention, the sampling position of each MCU is different. Even if an attacker manages to create malicious firmware that can attack a certain MCU, it cannot be directly used to attack other individual MCUs of the same model, thus eliminating the possibility of large-scale attacks.

[0033] 5. This invention only stores the random offset K of the partition sampling address and the total check code C of the sampled data, which is independent of the number of partitions N, thus avoiding the problem of large MCU storage space occupation in the prior art (partition random check);

[0034] 6. This invention can further reduce the maximum exposure surface under the limited MCU performance and startup time requirements by increasing the number of partitions N and decreasing the partition size P, thereby enhancing security without increasing the MCU storage space burden.

[0035] 7. This invention provides a solution for updating the MCU memory area. Overwriting the random offset K of the updated partition sampling address and the total checksum C of the sampled data can support subsequent MCU memory area verification. Attached Figure Description

[0036] Figure 1 This is a flowchart of a method for verifying the MCU storage area by reducing the maximum exposed surface, as described in this invention.

[0037] Figure 2 This is a diagram showing the MCU storage area partitioning sampling and exposure surface distribution structure in Embodiment 1 of the present invention;

[0038] Figure 3 This is a table of the start and end addresses of the sampled data address segments in each partition in Embodiment 1 of the present invention;

[0039] Figure 4 This is a schematic diagram of the maximum exposure surface distribution in existing technologies. Detailed Implementation

[0040] The present invention will now be described in detail with reference to the accompanying drawings.

[0041] Example 1

[0042] A method for verifying MCU memory areas by reducing the maximum exposed surface, such as Figure 1 As shown, it includes the following steps:

[0043] S1: Logically divide the MCU memory area, starting from memory address A, into N partitions of size P that are contiguous but do not overlap. Memory address A is the starting address of the MCU memory area in Flash memory, and P is an integer not less than 1KB in KB.

[0044] In this embodiment, it is assumed that the total size of the MCU memory area is 256KB, and its starting address is A=0x00040000. It is divided into 8 partitions, each of which is 32KB, that is, the partition size is P=32KB and the number of partitions is N=8.

[0045] S2: Through formula The size L of the partitioned sampling verification area is calculated. Here, V is the MCU data verification speed in KB / s, determined by the MCU's computing performance and obtainable through the MCU manual or actual testing; T is the given verification time, i.e., the maximum time available for data verification in the MCU memory area while meeting the MCU startup time requirements, in seconds; floor is the floor operation to ensure L is an integer in KB; min is the minimum value operation, constraining L to not exceed P.

[0046] In this embodiment, the MCU data verification speed V = 3072KB / s is obtained from the MCU manual, and the actual engineering requirement is that the MCU completes the memory area verification within 20ms. Therefore, a given verification time T = 0.02s is taken, and the result is calculated by substituting into the formula. .

[0047] S3: Through formula The random offset K of the partition sampling address is calculated. Here, r is a random number generated by the true random number generator inside the MCU; mod is the modulo operation, which converts the random number r into a range of values. A random integer.

[0048] In this embodiment, the random number r = 1472580292 generated by the true random number generator inside the MCU is substituted into the formula to obtain... .

[0049] S4: Through formula The total checksum C of the sampled data is calculated.

[0050] in The first part represents the sampled data segment of each partition; the second part represents the concatenation of the first and last sampled data segments of each partition; the third part represents the algorithm used to calculate the total checksum of the sampled data, which can be a message verification code algorithm or a hash algorithm, such as CMAC, HMAC, SHA, etc., and this invention does not make a specific limitation. The sampled data segment of each partition is the data segment of each partition that is... Starting address, with The end address is a data set of length L, where i is the partition number.

[0051] like Figure 2 As shown in Embodiment 1 of the present invention, the MCU memory partitioning sampling and exposure surface distribution structure is as follows:

[0052] In this embodiment, the first partition sampling data segment The starting address is The end address is ; Sampling data fragment of partition 2 The starting address is The end address is Similarly, the start and end addresses of the sampled data segments for a total of 8 partitions are calculated, such as... Figure 3 As shown.

[0053] Then, using AES-CMAC-128 as the algorithm S for calculating the total checksum of the sampled data, the formula is used. The total checksum C of the sampled data is calculated.

[0054] It is understood that the maximum exposure surface formed in this embodiment is located between two adjacent partition sampled data segments. It is formed by the exposure surfaces of two adjacent partitions spanning partitions due to address continuation. One exposure surface is located at the end of the previous partition, and the other exposure surface is located at the beginning of the next partition.

[0055] It can be proven that the maximum exposure surface size formed by the technical solution of this invention is only related to P and L, and is independent of K. That is, regardless of the location of the partitioned sampled data segment within the partition, the size of the maximum exposure surface remains constant. The proof is as follows:

[0056] Let i be the partition number of the next partition, x be the end address of the partition sampling data segment of the previous partition, and y be the start address of the partition sampling data segment of the next partition.

[0057] ;

[0058] ;

[0059] The maximum exposed surface size is Q.E.D.

[0060] Therefore, in this embodiment, the maximum exposed surface size is This means that it can detect and defend against attack codes larger than 25KB.

[0061] S5: Store the random offset K of the partition sampling address and the total checksum C of the sampling data in the MCU secure storage area. The MCU secure storage area is a separate storage area from the MCU storage area, equipped with access control and anti-tampering mechanisms to ensure that the random offset K of the sampling address and the total checksum C of the sampling data cannot be illegally read or tampered with. For example, it could be the secure storage area inside an HSM (Hardware Security Module, which provides secure cryptographic operations and secure storage of sensitive data). This invention does not specifically limit this area.

[0062] It is understood that the technical solution provided by the present invention consumes a constant amount of storage space, requiring only the random offset K of the partition sampling address and the total checksum C of the sampled data, which will not increase with the increase of the number of partitions.

[0063] In this embodiment, the MCU secure storage area is the secure storage area inside the MCU on-chip HSM hardware security module.

[0064] S6: When the MCU needs to verify the memory area, the total checksum of the sampled data is calculated using the same method as in step S4, with the random offset K of the partition sampling address in the MCU's secure memory area as in step S4. and use The sampled data is compared with the total checksum C in the MCU's secure storage area to confirm whether the storage area sampling verification was successful.

[0065] It should be noted that the principle of calculating C' using step S4 is as follows: First, calculate N sampled data segments. Further, four input parameters A, P, K, and L are required. The specific values ​​of A, P, and L are determined by steps S1 and S2, and will not change once determined. Only K is not determined (it is determined by a random number r). Therefore, the actual value of K needs to be stored in the MCU secure storage area when establishing the verification standard (step S5). When performing the subsequent MCU storage area verification (step S6), the actual value of K is read from the MCU secure storage area so that step S4 has all four input parameters required to calculate N sampled data segments, and finally C' is calculated.

[0066] In this embodiment, the random offset K=10772 of the partition sampling address in the MCU secure storage area is used as the basis. Based on the value of K, the sampling data segments of each of the eight partitions are calculated according to the method in step S4. Then, the total checksum of the sampling data is calculated using the AES-CMAC-128 algorithm. And compare it with the total checksum C of the sampled data in the MCU's secure storage area. If the sampled data segments in all 8 partitions have not been tampered with, then If the result equals C, the storage area sampling verification is confirmed to be successful; otherwise, the storage area sampling verification is confirmed to be unsuccessful, meaning that at least one of the eight partitions' sampled data segments has been tampered with.

[0067] After updating the MCU memory area, steps S1 to S5 are executed again to overwrite and update the random offset K of the partition sampling address and the total checksum of the sampling data C in the MCU secure storage area.

[0068] It should be noted that each execution of step S3 will result in a different random offset K for the partition sampling address, which will cause the total checksum C of the sampled data calculated in step S4 to be different.

[0069] Example 2

[0070] In this embodiment, the value of parameter P is changed to 8KB, and the value of N is changed to 32.

[0071] Based on the above parameter changes, L is recalculated:

[0072] ;

[0073] Based on the proof process and conclusion of the maximum exposed surface size in Example 1, in this example, the maximum exposed surface size is... This means that attack codes larger than 7KB can be detected and defended against. By increasing the number of partitions from 8 to 32, the maximum exposure surface size (7KB) in this embodiment is reduced by 72% compared to the maximum exposure surface size (25KB) in Embodiment 1, while the storage space required for the random offset K of the storage partition sampling address and the total checksum of the sampled data C remains unchanged.

[0074] Similar to Example 1, Example 2 demonstrates the impact of different numbers of partitions on the maximum exposure surface.

[0075] The above technical solutions only embody the preferred technical solutions of the present invention. Any modifications that may be made by those skilled in the art to certain parts thereof embody the principles of the present invention and fall within the protection scope of the present invention.

Claims

1. A method for verifying MCU memory areas by reducing the maximum exposed surface, characterized in that, The method includes the following steps: S1: Divide the MCU memory area into N partitions of size P that are logically equal and whose addresses are consecutive but do not overlap, starting from the starting address A of the memory area; S2: Calculate the size L of the partitioned sampling verification area. The formula for calculating L is: ; Where V is the MCU data verification speed, T is the given verification time, floor is the floor operation, and min is the minimum value operation; S3: Calculate the random offset K of the partition sampling address. The formula for calculating K is: ; Where r is a random number generated by the true random number generator inside the MCU, and mod is the modulo operation; S4: Calculate the total checksum C of the sampled data. The formula for calculating C is: ; in, represents the sampled data segment of each partition, || represents concatenating the first and last parts of the sampled data segment of each partition, and S represents the algorithm used to calculate the total check code of the sampled data. S5: Establish a verification standard and store the random offset K of the partition sampling address and the total check code C of the sampling data in the MCU secure storage area; S6: MCU memory area verification, using the random offset K of the partition sampling address in the MCU secure memory area and the method of S4 to calculate the total check code of the sampled data. and use The sampled data is compared with the total checksum C in the MCU's secure storage area to confirm whether the storage area sampling verification was successful.

2. The MCU memory area verification method for reducing the maximum exposed surface according to claim 1, characterized in that, In S1, the starting address A of the MCU storage area is the starting address of the MCU storage area in Flash, and P is an integer not less than 1KB.

3. The MCU memory area verification method for reducing the maximum exposed surface according to claim 2, characterized in that, The regions within the MCU memory area that are contiguous in address and not covered by the verification mechanism are called exposed surfaces. The largest exposed surface is the contiguous region with the largest address range among all exposed surfaces.

4. The MCU memory area verification method for reducing the maximum exposed surface according to claim 3, characterized in that, The size of the maximum exposed surface is constant. .

5. The MCU memory area verification method for reducing the maximum exposed surface according to claim 4, characterized in that, Under the constraint of the minimum value operation min, the maximum value of L cannot exceed P.

6. The MCU memory area verification method for reducing the maximum exposed surface according to claim 1, characterized in that, In step S4, algorithm S is at least one of a message verification code algorithm or a hash algorithm.

7. The MCU memory area verification method for reducing the maximum exposed surface according to claim 6, characterized in that, The sampled data segments in S4 are from each partition. Starting address, with This is data with an ending address and a length of L, where i is the partition number.

8. The MCU memory area verification method for reducing the maximum exposed surface according to claim 1, characterized in that, The MCU secure storage area in S5 is an independent storage area with access control and anti-tampering mechanisms.

9. A method for verifying MCU memory areas by reducing the maximum exposed surface according to claim 8, characterized in that, The MCU secure storage area is the secure storage area inside the HSM hardware security module.

10. A method for verifying MCU memory areas by reducing the maximum exposed surface according to claim 8, characterized in that, After the MCU storage area is updated, steps S1 to S5 are re-executed, and the random offset K of the partition sampling address and the total check code C of the sampling data in the MCU secure storage area are overwritten and updated.

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