Epitaxial growth method and epitaxial structure
By alternately growing buffer layers with different carbon-to-silicon ratios and annealing treatment, the problem of basal plane dislocation propagation in SiC semiconductor devices is solved, and the quality of the epitaxial layer and device performance are improved.
Patent Information
- Application Number
- CN202510643443.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-19
- Publication Date
- 2025-09-12
AI Technical Summary
In the prior art, during the epitaxial growth process of SiC semiconductor devices, morphological defects caused by the propagation of basal plane dislocations (BPDs) affect device performance, and the suppression effect of a single buffer layer is limited.
The first buffer layer and the second buffer layer with different carbon-silicon ratios are alternately grown. The carbon-silicon ratio of the first buffer layer is greater than that of the second buffer layer. The BPD conversion efficiency is improved by filling and blocking defect propagation and combining annealing treatment.
Effectively reduce the defect density of the epitaxial layer, improve electrical properties, reduce surface roughness and contact resistance, enhance device performance and reduce manufacturing costs.
Smart Images
Figure CN120637203A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to an epitaxial growth method and an epitaxial structure. Background Art
[0002] Silicon carbide (SiC) material has become the mainstream material for manufacturing high-temperature, high-voltage, high-frequency, high-power and low-loss semiconductor devices due to its wide bandgap, high critical breakdown field strength, high thermal conductivity and high carrier saturation rate.
[0003] The structural realization of SiC semiconductor devices is inseparable from epitaxial growth. During the epitaxial growth process, semiconductor devices with varying electrical properties can be manufactured by controlling the doping concentration and growth thickness. Epitaxial growth is primarily achieved through chemical vapor deposition (CVD). However, during the CVD epitaxial growth process, basal plane dislocations (BPDs) in the SiC substrate can propagate into the epitaxial layer, causing morphological defects in the growing epitaxial layer. This can lead to increased leakage current and decreased breakdown voltage in SiC semiconductor devices.
[0004] Prior to epitaxial growth, a single buffer layer can be formed to reduce the likelihood of morphological defects in the epitaxial layer. However, since defects nucleated from screw dislocations or substrate surface processing damage are typically large, a single buffer layer has limited effectiveness in suppressing these defects, resulting in low BPD conversion efficiency and hindering semiconductor device performance. Summary of the Invention
[0005] In view of the above problems, the purpose of this application is to provide an epitaxial growth method and epitaxial structure, which can improve the BPD conversion efficiency.
[0006] According to one aspect of the present application, a method for epitaxial growth is provided, which includes: providing a substrate; growing a composite buffer layer on the substrate, the composite buffer layer including a first buffer layer and a second buffer layer grown alternately; and growing an epitaxial layer on the composite buffer layer, wherein the carbon-silicon ratio of the first buffer layer is greater than the carbon-silicon ratio of the second buffer layer.
[0007] Optionally, the carbon-to-silicon ratio of the first buffer layer and the second buffer layer are both less than 1.
[0008] Optionally, the carbon-silicon ratio of the first buffer layer is 0.8-0.9, and the carbon-silicon ratio of the second buffer layer is 0.3-0.5.
[0009] Optionally, the growth of the composite buffer layer includes: alternately growing the first buffer layer and the second buffer layer until the composite buffer layer has a first thickness, wherein the first buffer layer and the second buffer layer are cyclically grown 15 to 25 times, and the first thickness is 1 μm to 2 μm.
[0010] Optionally, the single-layer growth thickness of the first buffer layer is 30 nm to 50 nm, and the single-layer growth thickness of the second buffer layer is 10 nm to 30 nm; and / or the growth thickness ratio of the first buffer layer to the second buffer layer is 1.2 to 2.5.
[0011] Optionally, the epitaxial growth method further comprises: after alternately growing the first buffer layer and the second buffer layer 3-5 times, annealing the composite buffer layer at an annealing temperature of 1500° C. to 1550° C.
[0012] According to another aspect of the present application, an epitaxial structure is provided, which includes: a substrate; a composite buffer layer located on the substrate, the composite buffer layer including alternating first buffer layers and second buffer layers; and an epitaxial layer located on the composite buffer layer, wherein the carbon-silicon ratio of the first buffer layer is greater than the carbon-silicon ratio of the second buffer layer.
[0013] Optionally, the carbon-to-silicon ratio of the first buffer layer and the second buffer layer are both less than 1.
[0014] Optionally, the carbon-silicon ratio of the first buffer layer is 0.8-0.9, and the carbon-silicon ratio of the second buffer layer is 0.3-0.5.
[0015] Optionally, the thickness of the composite buffer layer is 1 μm to 2 μm, and the number of cycles of the first buffer layer and the second buffer layer is 15 to 25 times.
[0016] Optionally, the single layer thickness of the first buffer layer is 30 nm to 50 nm, and the single layer thickness of the second buffer layer is 10 nm to 30 nm; and / or the thickness ratio of the first buffer layer to the second buffer layer is 1.2 to 2.5.
[0017] In the epitaxial growth method provided in the embodiment of the present application, the composite buffer layer includes a first buffer layer and a second buffer layer grown alternately, wherein the carbon-silicon ratio of the first buffer layer is greater than that of the second buffer layer. The first buffer layer generated in a silicon-rich environment with a high carbon-silicon ratio has no step-bunching morphology and can fill the morphological defects caused by the nucleation of screw dislocations; the second buffer layer generated in an environment with a low carbon-silicon ratio has a step-bunching morphology, which is beneficial to blocking the continued propagation of morphological defects. By alternating the growth of the first buffer layer and the second buffer layer, the conversion rate of basal plane dislocations can be increased, and the basal plane dislocations in the substrate can be effectively prevented from propagating to the epitaxial layer, thereby reducing the defect density in the epitaxial layer. In the case of a large defect density, the warping of the epitaxial layer caused by the imbalance of stress inside the epitaxial layer is avoided. At the same time, because the second buffer layer has a step-bunching morphology, the surface roughness of the epitaxial layer can be reduced, thereby reducing the contact resistance on the surface of the epitaxial layer, which is beneficial to improving the electrical performance of the epitaxial layer and the epitaxial structure and semiconductor device containing the epitaxial layer.
[0018] Furthermore, the carbon-silicon ratio in both the first and second buffer layers is less than 1, that is, the carbon-silicon ratio in both the first and second environments is less than 1. Preferably, the carbon-silicon ratio in the first buffer layer, or the first environment, is 0.8-0.9, and the carbon-silicon ratio in the second buffer layer, or the second environment, is 0.3-0.5. By maintaining the carbon-silicon ratio less than 1 throughout the entire process, the surface migration ability of silicon atoms can be enhanced, further improving the conversion rate of basal plane dislocations.
[0019] Furthermore, periodic annealing can promptly eliminate morphological defects during the growth of the composite buffer layer, preventing their further propagation. Annealing is performed in cycles of 3-5 alternating growths of the first and second buffer layers. During each annealing, the thickness of the newly grown composite buffer layer is limited. Annealing temperatures of 1500°C to 1550°C promote atomic rearrangement within the composite buffer layer, eliminating morphological defects and further reducing manufacturing costs. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
[0021] Figure 1 A schematic flow chart showing an epitaxial growth method according to an embodiment of the present application is shown;
[0022] Figure 2 A schematic flow chart showing the growth of a composite buffer layer;
[0023] Figure 3 A schematic structural diagram of a composite buffer layer is shown. DETAILED DESCRIPTION
[0024] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, identical elements are represented by identical or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.
[0025] Certain terms are used in this specification and claims to refer to specific components. A person skilled in the art will appreciate that manufacturers may use different terms to refer to the same component. This specification and claims do not distinguish components by their names.
[0026] In addition, it should be noted that, in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element.
[0027] It should also be noted that, in the various methods and processes of the present application, the size of the step numbers does not mean the order of execution, nor does it constitute any limitation on the implementation process of the embodiments of the present application.
[0028] Figure 1 A schematic flow chart of the epitaxial growth method according to an embodiment of the present application is shown. Figure 1 The epitaxial growth method disclosed in the present application comprises the following steps:
[0029] Step S11, providing a substrate;
[0030] Step S12, growing a composite buffer layer on the substrate; and
[0031] Step S13: growing an epitaxial layer on the composite buffer layer.
[0032] In the epitaxial growth method provided in an embodiment of the present application, the composite buffer layer includes a first buffer layer and a second buffer layer grown alternately, wherein the carbon-to-silicon ratio of the first buffer layer is greater than the carbon-to-silicon ratio of the second buffer layer. In a preferred embodiment, the carbon-to-silicon ratio of each of the first and second buffer layers is less than 1. In particular, the carbon-to-silicon ratio of the first buffer layer can be 0.8-0.9, and the carbon-to-silicon ratio of the second buffer layer can be 0.3-0.5.
[0033] In the epitaxial growth method provided in the embodiment of the present application, the composite buffer layer includes a first buffer layer and a second buffer layer grown alternately, wherein the carbon-silicon ratio of the first buffer layer is greater than that of the second buffer layer. The first buffer layer generated in a silicon-rich environment with a high carbon-silicon ratio has no step-bunching morphology and can fill the morphological defects caused by the nucleation of screw dislocations; the second buffer layer generated in an environment with a low carbon-silicon ratio has a step-bunching morphology, which is beneficial to blocking the continued propagation of morphological defects. By alternating the growth of the first buffer layer and the second buffer layer, the conversion rate of basal plane dislocations can be increased, and the basal plane dislocations in the substrate can be effectively prevented from propagating to the epitaxial layer, thereby reducing the defect density in the epitaxial layer. In the case of a large defect density, the warping of the epitaxial layer caused by the imbalance of stress inside the epitaxial layer is avoided. At the same time, because the second buffer layer has a step-bunching morphology, the surface roughness of the epitaxial layer can be reduced, thereby reducing the contact resistance on the surface of the epitaxial layer, which is beneficial to improving the electrical performance of the epitaxial layer and the epitaxial structure and semiconductor device containing the epitaxial layer.
[0034] Epitaxial growth occurs in a reaction chamber. Specifically, the silicon carbide substrate provided in step S11 is placed on a base of a silicon carbide epitaxial growth reaction chamber.
[0035] The susceptor is preferably a graphite susceptor to provide a stable epitaxial growth environment. In some embodiments, the crystal quality and growth rate of epitaxial growth are balanced by selecting the crystal orientation of the silicon carbide substrate. For example, a silicon carbide substrate with a silicon surface tilted 4° or 8° toward the <11-20> direction can be selected.
[0036] After the silicon carbide substrate is placed in the reaction chamber, it is etched in situ. Specifically, argon (Ar) gas is first introduced to replace the gas in the reaction chamber, creating an inert gas environment to prevent growth contamination or safety accidents caused by impurity gases in the reaction chamber participating in the reaction during the subsequent growth process. After the gas replacement is completed, hydrogen (H2) is introduced into the reaction chamber, and the hydrogen flow rate is gradually increased. After the hydrogen flow rate reaches, for example, 60-120 L / min, the temperature and pressure in the reaction chamber are maintained at the temperature and pressure required for etching, and the substrate is etched in situ for, for example, 5-15 minutes. In situ etching can remove impurities, oxide layers, or defects left after chemical mechanical polishing (CMP) on the substrate surface. After in situ etching, a fresh and complete crystal surface is exposed, which is more conducive to atomic-level bonding during epitaxial growth and reduces dislocation generation.
[0037] The growth process of the composite buffer layer can be specifically as follows Figure 2 As shown, the first buffer layer and the second buffer layer are alternately grown until a composite buffer layer of a first thickness is formed. Specifically, the growth of the composite buffer layer begins with the growth of the first buffer layer and ends with the growth of the first buffer layer or the second buffer layer. The carbon-silicon ratio of the first buffer layer is greater than that of the second buffer layer.
[0038] In some embodiments, the carbon-to-silicon ratio in both the first buffer layer and the second buffer layer is controlled to be less than 1. That is, in both the first environment for growing the first buffer layer and the second environment for growing the second buffer layer, the carbon-to-silicon ratio is less than 1. By controlling the carbon-to-silicon ratio to be less than 1 throughout the growth of the composite buffer layer, the surface mobility of silicon atoms can be enhanced, further improving the conversion efficiency of basal plane dislocations.
[0039] Preferably, the carbon-silicon ratio of the first buffer layer may be 0.8-0.9, and the carbon-silicon ratio of the second buffer layer may be 0.3-0.5. In the following, the growth of the composite buffer layer is further described using this preferred carbon-silicon ratio as an example.
[0040] Figure 3 The schematic structure diagram of the composite buffer layer in the embodiment of the present application is shown. Figure 2 and Figure 3 :
[0041] The growth of the first buffer layer may include: adjusting the flow ratio of the silicon source and the carbon source to form a first environment with a carbon-silicon ratio of 0.8-0.9 in step S21; and introducing a doping source into the first environment to grow the first buffer layer in step S22.
[0042] The silicon source may be a chlorosilane source, preferably a chlorosilane source, such as trichlorosilane (SiHCl3). The carbon source may be a hydrocarbon gas, such as methane, propane, ethylene, acetylene, etc.
[0043] The doping type is selected from either N-type or P-type. For N-type doping, the doping source is, for example, ammonia (NH3); for P-type doping, the doping source is, for example, trimethylaluminum (TMAI). The doping type can be determined based on the type of semiconductor being manufactured. For example, when an epitaxial structure with the composite buffer layer is used to manufacture a MOSFET, the buffer layer typically has the same doping type as the substrate.
[0044] The growth temperature of the first buffer layer is preferably 1600° C. The thickness of a single layer of the first buffer layer is preferably 30 nm to 50 nm. The thickness of a single layer of the first buffer layer can be adjusted by controlling the growth time.
[0045] The growth of the second buffer layer may include: adjusting the flow ratio of the silicon source and the carbon source to form a second environment with a carbon-to-silicon ratio of 0.3 to 0.5 in step S23; and introducing a dopant source into the second environment to grow the second buffer layer in step S24. The silicon source, carbon source, and dopant source introduced into the second environment may be the same as those in the first environment.
[0046] In some embodiments, the doping concentration in the first environment is the same as the doping concentration in the second environment. In still other embodiments, the doping concentration in the second environment is lower than the doping concentration in the first environment. Since doping has already been performed in the first environment, i.e., the first buffer layer, manufacturing costs can be saved by reducing the doping concentration in the second environment.
[0047] The growth temperature of the second buffer layer is preferably 1550° C. The thickness of a single layer of the second buffer layer is preferably 10 nm to 30 nm. The thickness of a single layer of the second buffer layer can also be adjusted by controlling the growth time.
[0048] Thereafter, the first buffer layer and the second buffer layer are generated cyclically until it is determined in step S25 that the overall thickness of the composite buffer layer reaches the first thickness.
[0049] In a preferred embodiment, the first thickness is 1 μm to 2 μm. Furthermore, for a case where the thickness of a single-layer growth of the first buffer layer is 30 nm to 50 nm and the thickness of a single-layer growth of the second buffer layer is 10 nm to 30 nm, the first and second buffer layers may be cyclically grown 15 to 25 times to achieve the composite buffer layer reaching the first thickness. Accordingly, in step S25, the number of cyclic growths of the first and second buffer layers may be determined to determine whether the overall thickness of the composite buffer layer has reached the first thickness.
[0050] Furthermore, in some embodiments, the total growth time of the composite buffer layer can be controlled by controlling the total thickness ratio of the first buffer layer to the second buffer layer to be 1.2-2.5, thereby improving production efficiency.
[0051] refer to Figure 3 The schematic structure diagram of the composite buffer layer 120 is shown. For example, the first buffer layer 121a is the first buffer layer grown as the first layer, that is, the first buffer layer in contact with the substrate 110. The second buffer layer 122a is the second buffer layer grown as the first layer, and thereafter the first buffer layer 121b, the second buffer layer 122b, the first buffer layer 121c, the second buffer layer 122c... are alternately grown until the second buffer layer 122n is generated, the total growth thickness of the composite buffer layer 120 reaches the first thickness, and the growth of the composite buffer layer 120 is ended. Thereafter, step S13 is performed to grow an epitaxial layer 130 on the composite buffer layer 120, that is, the second buffer layer 122n. In some other embodiments, the composite buffer layer 120 reaches the first thickness after growing a first buffer layer, and then the growth of the composite buffer layer 120 may be ended after growing the first buffer layer. That is to say, the epitaxial layer 130 formed in step S13 may also be in contact with the first buffer layer.
[0052] In the epitaxial growth method provided in the embodiment of the present application, the composite buffer layer includes a first buffer layer and a second buffer layer grown alternately, wherein the carbon-silicon ratio of the first buffer layer is greater than that of the second buffer layer. The first buffer layer generated in a silicon-rich environment with a high carbon-silicon ratio has no step-bunching morphology and can fill the morphological defects caused by the nucleation of screw dislocations; the second buffer layer generated in an environment with a low carbon-silicon ratio has a step-bunching morphology, which is beneficial to blocking the continued propagation of morphological defects. By alternating the growth of the first buffer layer and the second buffer layer, the conversion rate of basal plane dislocations can be increased, and the basal plane dislocations in the substrate can be effectively prevented from propagating to the epitaxial layer, thereby reducing the defect density in the epitaxial layer. In the case of a large defect density, the warping of the epitaxial layer caused by the imbalance of stress inside the epitaxial layer is avoided. At the same time, because the second buffer layer has a step-bunching morphology, the surface roughness of the epitaxial layer can be reduced, thereby reducing the contact resistance on the surface of the epitaxial layer, which is beneficial to improving the electrical performance of the epitaxial layer and the epitaxial structure and semiconductor device containing the epitaxial layer.
[0053] Furthermore, in some embodiments, in the second environment for growing the second buffer layer, the chlorine-silicon ratio may be increased in cycles of 3-5 alternating growths of the first buffer layer and the second buffer layer.
[0054] Combine Figure 3 , taking the example that each cycle includes three alternating growths of the first buffer layer and the second buffer layer, and the incremental step size of the chlorine-silicon ratio in the second buffer layer is 0.1. It can be that when growing the second buffer layer 122a, the chlorine-silicon ratio in the second environment is controlled to be 0.1. Thereafter, the first buffer layer and the second buffer layer continue to be grown alternately. In the three alternating growth cycles, that is, when growing the second buffer layers 122b and 122c, the chlorine-silicon ratio in the second environment is also 0.1. When growing the second buffer layer 122d, the chlorine-silicon ratio in the second environment is adjusted to 0.2. Thereafter, the growth of two layers of the second buffer layer is continued in the second environment with a chlorine-silicon ratio of 0.2, and then the chlorine-silicon ratio in the second environment is increased to 0.3. And so on, until the total thickness of the composite buffer layer 120 reaches the first thickness.
[0055] In the early stages of composite buffer layer growth, a low chlorine-to-silicon ratio is used to increase the composite buffer layer's growth rate. Periodically increasing the chlorine atomic ratio gradually improves the suppression of morphological defects during the composite buffer layer's growth. By gradually adjusting the chlorine-to-silicon ratio in the second environment, the composite buffer layer's growth rate and suppression of morphological defects can be further balanced, thereby improving the stability of the manufacturing process.
[0056] In some embodiments, the growth process of the composite buffer layer 120 further includes annealing. Annealing can further improve the atomic structure of the buffer layer, and in particular, effectively improve the morphological defects in the previously grown second buffer layer with a low chlorine-silicon ratio.
[0057] In a preferred embodiment, the composite buffer layer is periodically annealed with 3-5 alternating growths of the first buffer layer and the second buffer layer as a cycle. Figure 3 , taking three cycles of alternating growth as an example. That is, after the alternating growth of the first buffer layer 121a, the second buffer layer 122a, ..., and finally the second buffer layer 122c, the first annealing is performed. Thereafter, annealing is performed after every three cycles of growing the first and second buffer layers. The final annealing is performed after the composite buffer layer is grown.
[0058] The annealing process may specifically include: lowering the temperature of the reaction chamber to 1500°C~1550°C, and introducing argon (Ar) into the reaction chamber during the cooling process to improve the safety of the annealing process. When the temperature drops to 1550°C, the argon gas introduced into the reaction chamber is switched to hydrogen, and the temperature is kept constant. The insulation time can be determined based on the growth of the first buffer layer and the second buffer layer, for example, it can be 30s~50s. After the insulation is completed, the hydrogen gas introduced into the reaction chamber is switched to argon gas and the temperature is raised again. After the temperature reaches the growth temperature of the first buffer layer, that is, after 1600°C, a carbon source, a silicon source and a doping source are introduced into the reaction chamber to continue the growth of the first buffer layer.
[0059] For the above example, the first buffer layer is 30~50nm and the second buffer layer is 10~30nm. After every 3~5 alternating growths of the first buffer layer and the second buffer layer, the thickness of the composite buffer layer increases by about 120~200nm. When annealing is performed at this thickness, the annealing temperature is lower than the growth temperature of the first buffer layer and the second buffer layer, for example, 1500~1550℃, which can promote atomic rearrangement inside the composite buffer layer and release residual stress, thereby eliminating morphological defects. Therefore, by periodically annealing, it is beneficial to reduce the temperature required for annealing, thereby reducing the manufacturing cost of the composite buffer layer. In addition, by periodic annealing, morphological defects can be eliminated in time during the growth process of the composite buffer layer, blocking the continued propagation of morphological defects.
[0060] It should be pointed out that, in actual working conditions, the above-mentioned annealing period may also be adjusted according to the single-layer growth thickness of the first buffer layer and the second buffer layer.
[0061] Furthermore, if the above-described epitaxial growth method is applied to the manufacture of semiconductor devices, after growing the epitaxial layer 130, the semiconductor device manufacturing process may further include generating multiple doped regions in the epitaxial layer, for example, by ion implantation, and generating a gate structure. Taking MOSFET as an example, these doped regions may include generating body and source regions in the epitaxial layer. The gate structure may be a trench gate structure located in the epitaxial layer or a planar gate structure located on the surface of the epitaxial layer.
[0062] Because epitaxial layer 130 and substrate 110 are isolated by composite buffer layer 120, even when doped regions are formed in the epitaxial layer, dopant ions do not penetrate into the substrate. Therefore, there is no need to pre-process the substrate before growing epitaxial layer 130, which improves manufacturing efficiency and reduces manufacturing costs.
[0063] The present application also provides an epitaxial structure. The epitaxial structure may include Figure 3 The composite buffer layer 120 is shown. Figure 3 As shown, the epitaxial structure further includes: a substrate 110 and an epitaxial layer 130. A composite buffer layer 120 is grown on the substrate 110, and the epitaxial layer 130 is grown on the composite buffer layer 120. The composite buffer layer 120 includes alternating first and second buffer layers, and the carbon-to-silicon ratio of the first buffer layer is greater than that of the second buffer layer.
[0064] Specifically, in the composite buffer layer 120 , the first buffer layer may be in contact with the substrate 110 , and the first buffer layer or the second buffer layer may be in contact with the epitaxial layer 130 .
[0065] In some embodiments, the carbon-to-silicon ratio of the first buffer layer and the second buffer layer is less than 1. Preferably, the carbon-to-silicon ratio of the first buffer layer is 0.8-0.9, and the carbon-to-silicon ratio of the second buffer layer is 0.3-0.5.
[0066] In some embodiments, the thickness of the first buffer layer is 30 nm to 50 nm, and the thickness of the second buffer layer is 10 nm to 30 nm. Furthermore, the thickness ratio of the first buffer layer to the second buffer layer can be 1.2 to 2.5.
[0067] In some embodiments, the composite buffer layer 120 preferably has a thickness of 1 μm to 2 μm. Corresponding to the aforementioned single-layer thickness of the first buffer layer being 30 nm to 50 nm and the single-layer thickness of the second buffer layer being 10 nm to 30 nm, the first and second buffer layers may be cycled 15-25 times to achieve the composite buffer layer's preferred thickness.
[0068] In some embodiments, the carbon in the first and second buffer layers is derived from a carbon source in the growth environment, and the silicon is derived from a silicon source in the growth environment. The carbon source can be a hydrocarbon gas, such as methane, propane, ethylene, or acetylene. The silicon source can be a chlorine-based silicon source, preferably a chlorine-based silane source, such as trichlorosilane. Therefore, the first and second buffer layers may also contain chlorine.
[0069] In some embodiments, the chlorine-silicon ratio in the second buffer layer is increased periodically with the first cycle number. Preferably, the chlorine-silicon ratio is as low as 0.1, the increment step is 0.1, and the first cycle number includes 3 to 5 alternations of the first buffer layer and the second buffer layer. Taking the first cycle number as 3 as an example, then Figure 3 In the composite buffer layer 120 shown, the chlorine-silicon ratios in the second buffer layers 122a, 122b, and 122c are all 0.1, and the chlorine-silicon ratio in the second buffer layer 122d increases to 0.2.
[0070] Furthermore, the epitaxial structure provided herein can be obtained based on the epitaxial growth method provided herein. This epitaxial structure can be used to prepare semiconductor devices such as MSOFETs. Therefore, this epitaxial structure, and the semiconductor device including this epitaxial structure, also possesses any of the beneficial effects of the aforementioned epitaxial growth method.
[0071] The embodiments of the present application are as described above, and these embodiments do not describe all details in detail, nor do they limit the present application to specific embodiments. Obviously, based on the above description, many modifications and variations can be made. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that those skilled in the art can make good use of the present application and the modifications based on the present application. The scope of protection of the present application shall be based on the scope defined by the claims of the present application.
Claims
1. An epitaxial growth method, wherein: include: providing a substrate; growing a composite buffer layer on the substrate, wherein the composite buffer layer includes a first buffer layer and a second buffer layer that are alternately grown; as well as growing an epitaxial layer on the composite buffer layer, The carbon-to-silicon ratio of the first buffer layer is greater than the carbon-to-silicon ratio of the second buffer layer.
2. The epitaxial growth method according to claim 1, wherein: The carbon-to-silicon ratio of the first buffer layer and the second buffer layer are both less than 1.
3. The epitaxial growth method according to claim 2, wherein: The carbon-silicon ratio of the first buffer layer is 0.8-0.9, and the carbon-silicon ratio of the second buffer layer is 0.3-0.
5.
4. The epitaxial growth method according to claim 1, wherein: The growth of the composite buffer layer comprises: Alternatingly growing the first buffer layer and the second buffer layer until the composite buffer layer has a first thickness, The first buffer layer and the second buffer layer are cyclically grown 15 to 25 times, and the first thickness is 1 μm to 2 μm.
5. The epitaxial growth method according to claim 4, wherein: The thickness of a single layer of the first buffer layer is 30 nm to 50 nm, and the thickness of a single layer of the second buffer layer is 10 nm to 30 nm; and / or The growth thickness ratio of the first buffer layer to the second buffer layer is 1.2-2.
5.
6. The epitaxial growth method according to any one of claims 1 to 5, wherein: The epitaxial growth method further comprises: After the first buffer layer and the second buffer layer are alternately grown 3-5 times, the composite buffer layer is annealed at a temperature of 1500° C. to 1550° C.
7. An epitaxial structure, wherein include: substrate; a composite buffer layer located on the substrate, the composite buffer layer comprising alternating first buffer layers and second buffer layers; as well as an epitaxial layer located on the composite buffer layer, The carbon-to-silicon ratio of the first buffer layer is greater than the carbon-to-silicon ratio of the second buffer layer.
8. The epitaxial structure according to claim 7, wherein: The carbon-to-silicon ratio of the first buffer layer and the second buffer layer are both less than 1.
9. The epitaxial structure according to claim 8, wherein: The carbon-silicon ratio of the first buffer layer is 0.8-0.9, and the carbon-silicon ratio of the second buffer layer is 0.3-0.
5.
10. The epitaxial structure according to claim 7, wherein: The thickness of the composite buffer layer is 1 μm to 2 μm, and the number of cycles of the first buffer layer and the second buffer layer is 15 to 25 times.
11. The epitaxial structure according to claim 8, wherein: The single layer thickness of the first buffer layer is 30 nm to 50 nm, and the single layer thickness of the second buffer layer is 10 nm to 30 nm; and / or The thickness ratio of the first buffer layer to the second buffer layer is 1.2-2.5.