Semiconductor circuit

Abstract

The invention provides a semiconductor circuit using a wide bandgap semiconductor, which can suppress ringing generated at a gate of a switching element. This semiconductor circuit is provided with: a switching circuit (10) having at least one switching element (Q); a ground wiring (50); and a current detection circuit (30) connected between the switching circuit (10) and the ground wiring (50), characterized in that a noise removal circuit (40) is connected in parallel with the current detection circuit (30) between the switching circuit (10) and the ground wiring (50).

Description

Technical Field

[0001] The present invention relates to semiconductor circuits. Background Art

[0002] Semiconductor circuits using wide-bandgap semiconductors are known (for example, see Patent Document 1). Wide-bandgap semiconductors are devices capable of achieving high voltage resistance, high power, and high frequency. Therefore, semiconductor circuits using wide-bandgap semiconductors are high-voltage, high-power, and high-frequency circuits and are used in a variety of applications.

[0003]

Prior Technology Document

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2022-115706

[0005] However, semiconductor circuits using wide-bandgap semiconductors are prone to losses and ringing due to parasitic inductance because of the high-speed switching action. Ringing occurs not only at the drain (collector) of the switching element, but also at the source (emitter). The ringing generated at the source (emitter) is also generated at the gate through the capacitance of the switching element, which may cause the switching element to be mis-turned on, resulting in damage to the switching element. Gate ringing is particularly prone to occur in circuits where the impedance between the switching element and the ground wiring increases (for example, a circuit in which a current detection element is connected to the source (emitter) for current detection). Therefore, reducing the ringing generated in the switching element has become a problem.

[0006] Therefore, an object of the present invention is to provide a semiconductor circuit capable of suppressing ringing generated at a gate of a switching element. Summary of the Invention

[0007] [1] The semiconductor circuit of the present invention includes: a switching circuit having at least one switching element; a ground wiring; and a current detection circuit connected between the switching circuit and the ground wiring, characterized in that a noise removal circuit is connected between the switching circuit and the ground wiring in a relationship equivalent to being connected in parallel with the current detection circuit.

[0008] [2] In the semiconductor circuit of the present invention, the noise removal circuit is preferably an RC series circuit in which a resistor and a capacitor are connected in series.

[0009] [3] In the semiconductor circuit of the present invention, the switching circuit preferably includes a half-bridge circuit having a high-side switching element and a low-side switching element, and the noise removal circuit is connected between the low-side switching element and the ground wiring.

[0010] [4] In the semiconductor circuit of the present invention, the switching circuit is preferably a full-bridge circuit formed by connecting two half-bridge circuits in parallel.

[0011] [5] In the semiconductor circuit of the present invention, it is preferred that both the high-side switching element and the low-side switching element are formed of transistors.

[0012] [6] In the semiconductor circuit of the present invention, it is preferred that the high-side switching element is formed of a diode, and the low-side switching element is formed of a transistor.

[0013] [7] In the semiconductor circuit of the present invention, the switching circuit is preferably a circuit in which three or more half-bridge circuits are connected in parallel.

[0014] [8] In the semiconductor circuit of the present invention, it is preferred that the switch circuit is housed inside a package, and the current detection circuit and the noise removal circuit are both arranged outside the package.

[0015] [9] In the semiconductor circuit of the present invention, it is preferred that the switching circuit and one of the resistor and the capacitor constituting the RC series circuit are housed inside the package, and the current detection circuit and the other of the resistor and the capacitor constituting the RC series circuit are arranged outside the package.

[0016]

[10] In the semiconductor circuit of the present invention, it is preferred that the switch circuit and the noise removal circuit are both housed inside a package, and the current detection circuit is arranged outside the package.

[0017]

[11] In the semiconductor circuit of the present invention, it is preferred that the switching circuit, the noise removal circuit, and the current detection circuit are all housed in one package.

[0018] Effects of the Invention

[0019] According to the semiconductor circuit of the present invention, since a noise removal circuit is connected between the switching circuit and the ground wiring in parallel with the current detection circuit, ringing generated in the switching circuit (for example, between the source (emitter) of the switching circuit and the ground wiring) can be suppressed. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a diagram of the semiconductor circuit 1 of the first embodiment.

[0021] Figure 2 This is a diagram of a semiconductor circuit 1A according to a first modification of the first embodiment.

[0022] Figure 3 This is a diagram of a semiconductor circuit 1B according to a second modification of the first embodiment.

[0023] Figure 4 This is a diagram of a semiconductor circuit 1C according to a third modification of the first embodiment.

[0024] Figure 5 This is a diagram of a semiconductor circuit 2 according to a second embodiment.

[0025] Figure 6 This is a diagram of a semiconductor circuit 2A according to a first modification of the second embodiment.

[0026] Figure 7 This is a diagram of a semiconductor circuit 2B according to a second modification of the second embodiment.

[0027] Figure 8 This is a diagram of a semiconductor circuit 2C according to a third modification of the second embodiment.

[0028] Figure 9 This is a diagram of a semiconductor circuit 3 according to a third embodiment.

[0029] Figure 10 This is a diagram of a semiconductor circuit 3A according to a first modification of the third embodiment.

[0030] Figure 11 This is a diagram of a semiconductor circuit 3B according to a second modification of the third embodiment.

[0031] Figure 12 This is a diagram of a semiconductor circuit 3C according to a third variation of the third embodiment.

[0032] Figure 13 This is a diagram of a semiconductor circuit 3D according to a fourth variation of the third embodiment.

[0033] Figure 14 This is a diagram of a semiconductor circuit 3E according to a fifth modification of the third embodiment.

[0034] Figure 15 This is a diagram of a semiconductor circuit 3F according to a sixth modification of the third embodiment.

[0035] Figure 16 This is a diagram of a semiconductor circuit 4 according to a fourth embodiment.

[0036] Figure 17 This is a diagram of a semiconductor circuit 5 according to a fifth embodiment.

[0037] Figure 18 It is a planar layout diagram of a semiconductor circuit 3E according to a fifth modification of the third embodiment.

[0038] Figure 19 It is a planar layout diagram of a semiconductor circuit 3G according to a seventh modification of the third embodiment.

[0039] Figure 20It is a planar layout diagram of a semiconductor circuit 3H according to Modification 8 of Embodiment 3.

[0040] Figure 21 It is a diagram showing a planar layout of the semiconductor circuit 6 of Test Example 2 (comparative example).

[0041] Figure 22 It is a diagram for explaining a simulation model in a test example.

[0042] Figure 23 This is a diagram showing simulation results in a test example. Specific embodiments

[0043] The semiconductor circuit of the present invention is described below based on the various embodiments shown in the accompanying drawings. In the following description of the embodiments, structural elements having substantially the same function, even if their shapes, etc., differ slightly, will be referenced using the same reference numerals across the embodiments, and their repeated description will be omitted. The embodiments described below do not limit the invention as claimed. Furthermore, not all elements and combinations described in the embodiments are essential to the solutions provided by the present invention.

[0044] [Example 1]

[0045] Figure 1 FIG. 1 is a diagram of a semiconductor circuit 1 according to Embodiment 1. Figure 1 As shown, the semiconductor circuit 1 according to the first embodiment is a semiconductor circuit including a switch circuit 10 having a transistor Q as a switching element, a ground wiring 50, and a current detection circuit 30 connected between the switch circuit 10 and the ground wiring 50. Furthermore, a noise removal circuit 40 is connected between the switch circuit 10 and the ground wiring 50 in parallel with the current detection circuit 30.

[0046] In the semiconductor circuit 1 of the first embodiment, the switching circuit 10 uses a transistor Q including a MOSFET as a switching element. The transistor Q is made of a wide-bandgap semiconductor (eg, SiC, GaN, diamond, etc.).

[0047] In the semiconductor circuit 1 of the first embodiment, an RC series circuit in which a resistor R and a capacitor C are connected in series is used as the noise removal circuit 40 .

[0048] In the semiconductor circuit 1 of the first embodiment, reference numeral 12 denotes a gate terminal, reference numeral 14 denotes a power supply terminal, reference numeral 16 denotes a ground terminal, reference numeral 20 denotes a noise removal circuit terminal, and reference numeral 24 denotes a source sense terminal. The noise removal circuit terminal 20 and the source sense terminal 24 may be shared as a single terminal. Reference numeral 60 denotes a package formed of a molded resin.

[0049] In the semiconductor circuit 1 of the first embodiment, the current detection circuit 30 is connected between the ground terminal 30 and the ground wiring 50 in the region outside the package 60. The noise removal circuit 40 is also connected between the noise removal circuit terminal 20 and the ground wiring 50 in the region outside the package 60.

[0050] [Effects of Example 1]

[0051] According to the semiconductor circuit 1 involved in Example 1, since the noise removal circuit 40 is connected in parallel with the current detection circuit 30 between the switching circuit 10 and the ground wiring 50, the ringing generated in the switching circuit 10 (in this case, between the source S of the transistor Q and the ground wiring 50) can be suppressed, and the ringing generated in the gate G of the switching element can be suppressed.

[0052] According to the semiconductor circuit 1 involved in Example 1, since the noise removal circuit 40 is an RC series circuit composed of a resistor R and a capacitor C connected in series, it is possible to suppress the ringing generated between the switching circuit 10 and the ground wiring 50 and the ringing generated at the gate G of the switching element with a relatively simple structure.

[0053] According to the semiconductor circuit 1 of the first embodiment, since the current detection circuit 30 and the noise removal circuit 40 are arranged outside the package 60, it is easy to optimize the characteristics of the noise removal circuit 40 and more effectively suppress ringing generated in the switching element.

[0054] [Variations 1 to 3 of Example 1]

[0055] Figure 2 This is a diagram of a semiconductor circuit 1A according to a first modification of the first embodiment. Figure 3 This is a diagram showing a semiconductor circuit 1B according to a second modification of the first embodiment. Figure 4 This is a diagram of a semiconductor circuit 1C according to a third variation of the first embodiment.

[0056] [Variation 1 of Example 1]

[0057] In the semiconductor circuit 1A of the modification 1 of the embodiment 1, as Figure 2As shown, the switch circuit 10 and one of the resistor R and capacitor C (in this case, the resistor R) forming the RC series circuit of the noise removal circuit 40 are housed inside the package 60, while the current detection circuit 30 and the other of the resistor R and capacitor C (in this case, the capacitor C) forming the RC series circuit of the noise removal circuit 40 are arranged outside the package 60. In the semiconductor circuit 1A of the first modification of the first embodiment, reference numeral 21 denotes a terminal located between the resistor R and capacitor C of the noise removal circuit 40.

[0058] According to the semiconductor circuit 1A involved in the first variant of the first embodiment, as described above, since any one of the resistor R and the capacitor C of the RC series circuit constituting the noise removal circuit 40 is housed inside the package 60, the number of components external to the package 60 is reduced, and thus the wiring of the noise removal circuit 40 is shortened, the impedance is reduced, and the ringing generated at the gate G of the switching element can be more effectively suppressed.

[0059] [Variation 2 of Example 1]

[0060] like Figure 3 As shown, a semiconductor circuit 1B according to a second variation of the first embodiment has a structure in which the switch circuit 10 and the noise removal circuit 40 are both housed inside a package 60, and the current detection circuit 30 is arranged outside the package 60. In the semiconductor circuit 1B according to the second variation of the first embodiment, reference numeral 22 denotes a terminal located between the noise removal circuit 40 and the ground wiring 50.

[0061] According to the semiconductor circuit 1B involved in the second variant of the first embodiment, as described above, by housing the noise removal circuit 40 inside the package 60, there are no components constituting the noise removal circuit 40 that are external to the package 60. Therefore, the wiring of the noise removal circuit 40 is further shortened, the impedance is reduced, and the ringing generated at the gate G of the switching element can be more effectively suppressed.

[0062] [Variation 3 of Example 1]

[0063] like Figure 4 As shown, in a semiconductor circuit 1C according to a third variation of the first embodiment, the switch circuit 10, the noise removal circuit 40, and the current detection circuit 30 are all housed within a single package 60. In the semiconductor circuit 1C according to the third variation of the first embodiment, reference numeral 22 denotes a terminal located between the noise removal circuit 40 and the ground wiring 50.

[0064] According to the semiconductor circuit 1C of the third modification of the first embodiment, the mounting area is reduced, and an effect is achieved in that a more compact semiconductor circuit can be constructed.

[0065] [Example 2]

[0066] Figure 5 FIG2 is a diagram of a semiconductor circuit 2 of Example 2. The semiconductor circuit 2 of Example 2 basically has the same structure as the semiconductor circuit 1 of Example 1, but the structure of the switch circuit 10 is different from that of the semiconductor circuit 1 of Example 1. That is, the semiconductor circuit 2 of Example 2 is as follows: Figure 5 As shown, the switching circuit 10 is composed of a half-bridge circuit having a high-side switching element (transistor QH) and a low-side switching element (transistor QL). The noise removal circuit 40 is connected between the low-side switching element (transistor QL) and the ground wiring 50.

[0067] In the semiconductor circuit 2 of Example 2, reference numerals 12H and 12L denote gate terminals, reference numeral 18 denotes a midpoint terminal, and reference numerals 24H and 24L denote source sense terminals. The noise removal circuit terminal 20 and the low-side source sense terminal 24L may be a single shared terminal. In this specification, reference numeral H denotes the high side, and reference numeral L denotes the low side.

[0068] According to the semiconductor circuit 2 involved in Example 2, although the structure of the switching circuit 10 is different from that of the semiconductor circuit 1 involved in Example 1, as in the case of the semiconductor circuit 1 involved in Example 1, since the noise removal circuit 40 is connected between the switching circuit 10 and the ground wiring 50 in parallel with the current detection circuit 30, the effect is the same as that of the semiconductor circuit 1 involved in Example 1, and the ringing generated in the switching circuit 10 (in this case, between the source S of the transistor QL and the ground wiring 50) can be suppressed, thereby suppressing the ringing generated at the gate G of the switching element.

[0069] Furthermore, according to the semiconductor circuit 2 of the second embodiment, since the noise removal circuit 40 is an RC series circuit formed by connecting a resistor R and a capacitor C in series, the effect is similar to that of the semiconductor circuit 1 of the first embodiment, and the ringing generated between the switching circuit 10 and the ground wiring 50 can be suppressed through a relatively simple structure.

[0070] Furthermore, the semiconductor circuit 2 according to the second embodiment has a structure in which the current detection circuit 30 and the noise removal circuit 40 are arranged outside the package 60. Therefore, similar to the effect of the semiconductor circuit 1 according to the first embodiment, it is easy to optimize the characteristics of the noise removal circuit 40 and it is possible to suppress the ringing generated in the switching element.

[0071] [Variations 1 to 3 of Example 2]

[0072] Figure 6 This is a diagram showing a semiconductor circuit 2A according to a first modification of the second embodiment. Figure 7 This is a diagram showing a semiconductor circuit 2B according to a second modification of the second embodiment. Figure 8 This is a diagram showing a semiconductor circuit 2C according to a third modification of the second embodiment.

[0073] [Variation 1 of Example 2]

[0074] The semiconductor circuit 2A of the modification 1 of the embodiment 2 has basically the same structure as the semiconductor circuit 2 of the embodiment 2, but the arrangement position of the noise removal circuit 40 is different from that of the semiconductor circuit 2 of the embodiment 2. That is, in the semiconductor circuit 2A of the modification 1 of the embodiment 2, as shown in FIG. Figure 6 As shown, one of the resistor R and capacitor C (in this case, the resistor R) constituting the RC series circuit of the switch circuit 10 and the noise removal circuit 40 is housed inside the package 60, while the current detection circuit 30 and the other of the resistor R and capacitor C (in this case, the capacitor C) constituting the RC series circuit of the noise removal circuit 40 are arranged outside the package 60. In the semiconductor circuit 2A of the first modification of the second embodiment, reference numeral 21 denotes a terminal located between the resistor R and capacitor C of the noise removal circuit 40.

[0075] According to the semiconductor circuit 2A involved in the first variant of the second embodiment, as described above, by accommodating any one of the resistor R and the capacitor C of the RC series circuit constituting the noise removal circuit 40 inside the package 60, the number of components external to the package 60 is reduced, and thus the wiring of the noise removal circuit 40 is shortened, the impedance is reduced, and the ringing generated at the gate G of the switching element can be more effectively suppressed.

[0076] [Variation 2 of Example 2]

[0077] like Figure 7 As shown, a semiconductor circuit 2B according to a second variation of the second embodiment has a structure in which the switch circuit 10 and the noise removal circuit 40 are both housed inside a package 60, and the current detection circuit 30 is arranged outside the package 60. In the semiconductor circuit 2B according to the second variation of the second embodiment, reference numeral 22 denotes a terminal located between the capacitor C of the noise removal circuit 40 and the ground wiring 50.

[0078] According to the semiconductor circuit 2B involved in the second variant of the second embodiment, as described above, by accommodating the noise removal circuit 40 inside the package 60, there are no components outside the package 60 among the components constituting the noise removal circuit 40, the wiring of the noise removal circuit 60 is further shortened, the impedance is reduced, and the effect of more effectively suppressing the ringing generated at the gate G of the switching element can be achieved.

[0079] [Variation 3 of Example 2]

[0080] like Figure 8 As shown, a semiconductor circuit 2C according to a third modification of the second embodiment has a structure in which the switch circuit 10, the noise removal circuit 40, and the current detection circuit 30 are all housed within a single package 60. In the semiconductor circuit 2C according to the third modification of the second embodiment, reference numeral 22 denotes a terminal located between the capacitor C of the noise removal circuit 40 and the ground wiring 50.

[0081] According to the semiconductor circuit 2C of the third modification of the second embodiment, since the mounting area is reduced, an effect of being able to constitute a more compact semiconductor circuit can be achieved.

[0082] [Example 3]

[0083] Figure 9 3 is a diagram of a semiconductor circuit 3 according to Embodiment 3. The semiconductor circuit 3 according to Embodiment 3 basically has the same configuration as the semiconductor circuit 2 according to Embodiment 2, but the configuration of the switch circuit 10 is different from that of the semiconductor circuit 2 according to Embodiment 2. That is, Figure 9 As shown, the semiconductor circuit 3 of the third embodiment uses a full-bridge circuit composed of two half-bridge circuits 10-1 and 10-2 connected in parallel as the switching circuit 10. The noise removal circuit 40 is connected between the low-side switching elements (transistors QL1 and QL2) and the ground line 50.

[0084] In the semiconductor circuit 3 of the third embodiment, reference numerals 12H-1, 12H-2, 12L-1, and 12L-2 denote gate terminals, reference numerals 18-1 and 18-2 denote midpoint terminals, reference numerals 24H-1, 24H-2, 24L-1, and 24L-2 denote source sense terminals, and reference numerals QH1, QH2, QL1, and QL2 denote transistors (MOSFETs). The noise removal circuit terminal 20 and the low-side source sense terminal 24L-1 may share a common terminal, and the noise removal circuit terminal 20 and the low-side source sense terminal 24L-2 may share a common terminal.

[0085] According to the semiconductor circuit 3 of Example 3, although the configuration of the switch circuit 10 differs from that of the semiconductor circuit 2 of Example 2, the configuration other than the configuration of the switch circuit 10 is the same as that of the semiconductor circuit 2 of Example 2. Therefore, as in the case of the semiconductor circuit 2 of Example 2, the noise removal circuit 40 is connected in parallel with the current detection circuit 30 between the switch circuit 10 and the ground wiring 50. Therefore, similar to the effect of the semiconductor circuit 2 of Example 2, ringing occurring in the switch circuit 10 (in this case, between the sources S of the transistors QL1 and QL2 and the ground wiring 50) can be suppressed, and ringing occurring at the gate G of the switching element can be suppressed.

[0086] Furthermore, according to the semiconductor circuit 3 of the third embodiment, since the noise removal circuit 40 is an RC series circuit in which a resistor R and a capacitor C are connected in series, the effect is the same as that of the semiconductor circuit 1 of the first embodiment. With a relatively simple structure, the ringing generated between the switching circuit 10 and the ground wiring 50 can be suppressed, and the ringing generated at the gate G of the switching element can be suppressed.

[0087] Furthermore, the semiconductor circuit 3 of the third embodiment has a structure in which the current detection circuit 30 and the noise removal circuit 40 are arranged outside the package 60. Therefore, similar to the effect of the semiconductor circuit 1 of the first embodiment, it is easy to optimize the characteristics of the noise removal circuit 40, and it is possible to more effectively suppress ringing in the switching element.

[0088] [Variations 1 to 6 of Example 3]

[0089] Figure 10 This is a diagram of a semiconductor circuit 3A according to a first modification of the third embodiment. Figure 11 This is a diagram showing a semiconductor circuit 3B according to a second modification of the third embodiment. Figure 12 This is a diagram of a semiconductor circuit 3C according to a third variation of the third embodiment. Figure 13 This is a diagram showing a semiconductor circuit 3D according to a fourth modification of the third embodiment. Figure 14 This is a diagram showing a semiconductor circuit 3E according to a fifth modification of the third embodiment. Figure 15 This is a diagram showing a semiconductor circuit 3F according to a sixth modification of the third embodiment.

[0090] [Variation 1 of Example 3]

[0091] Although the semiconductor circuit 3A of the first modification of the third embodiment has basically the same structure as the semiconductor circuit 3 of the third embodiment, the arrangement position of the noise removal circuit 40 is different from that of the semiconductor circuit 3 of the third embodiment. That is, in the semiconductor circuit 3A of the first modification of the third embodiment, Figure 10 As shown, one of the resistor R and capacitor C (in this case, the resistor R) forming the RC series circuit of the switch circuit 10 and the noise removal circuit 40 is housed inside the package 60, while the current detection circuit 30 and the other of the resistor R and capacitor C (in this case, the capacitor C) forming the RC series circuit of the noise removal circuit 40 are arranged outside the package 60. In the semiconductor circuit 3A of the first modification of the third embodiment, reference numeral 21 denotes a terminal located between the resistor R and capacitor C of the noise removal circuit 40.

[0092] According to the semiconductor circuit 3A involved in the first variant of the third embodiment, as described above, since any one of the resistor R and the capacitor C of the RC series circuit constituting the noise removal circuit 40 is housed inside the package 60, the number of components external to the package 60 is reduced. Therefore, the wiring of the noise removal circuit 40 is shortened, the impedance is reduced, and the characteristics of the noise removal circuit 40 are easily adjusted and optimized, and the ringing generated on the gate G of the switching element can be more effectively suppressed.

[0093] [Variation 2 of Example 3]

[0094] like Figure 11 As shown, the semiconductor circuit 3B of the second modification of the third embodiment has a structure in which the switch circuit 10 and the noise removal circuit 40 are both housed inside a package 60, and the current detection circuit 30 is arranged outside the package 60. In the semiconductor circuit 3B of the second modification of the third embodiment, reference numeral 22 denotes a terminal located between the noise removal circuit 40 and the ground wiring 50.

[0095] According to the semiconductor circuit 3B involved in the second variant of the third embodiment, as described above, since the noise removal circuit 40 is housed inside the package 60, there are no components outside the package 60 among the components constituting the noise removal circuit 40, and the wiring of the noise removal circuit 40 is further shortened, the impedance is reduced, and the effect of more effectively suppressing the ringing generated at the gate G of the switching element can be achieved.

[0096] [Variation 3 of Example 3]

[0097] like Figure 12 As shown, a semiconductor circuit 3C according to a third modification of the third embodiment has a structure in which the switch circuit 10, the noise removal circuit 40, and the current detection circuit 30 are all housed inside a single package 60. In the semiconductor circuit 3C according to the third modification of the third embodiment, reference numeral 22 denotes a terminal located between the noise removal circuit 40 and the ground wiring 50.

[0098] According to the semiconductor circuit 3C of the third modification of the third embodiment, the mounting area can be reduced, thereby achieving an effect of forming a more compact semiconductor circuit.

[0099] [Variation 4 of Example 3]

[0100] The semiconductor circuit 3D of the modification 4 of the embodiment 3 basically has the same configuration as the semiconductor circuit 3 of the embodiment 3, but the configuration of the current detection circuit and the configuration of the noise removal circuit are different from those of the semiconductor circuit 3 of the embodiment 3. Figure 13As shown, a semiconductor circuit 3D according to a fourth variation of the third embodiment includes two current detection circuits (a first current detection circuit 30-1 and a second current detection circuit 30-2) provided corresponding to each half-bridge circuit as a current detection circuit. Furthermore, two noise removal circuits (a first noise removal circuit 40-1 and a second noise removal circuit 40-2) provided corresponding to each half-bridge circuit as noise removal circuits are provided.

[0101] In the semiconductor circuit 3D of the fourth variation of the third embodiment, the noise removal circuit terminal 20 - 1 and the low-side source sense terminal 24L- 1 may share one terminal, and the noise removal circuit terminal 20 - 2 and the low-side source sense terminal 24L- 2 may also share one terminal.

[0102] As described above, in the semiconductor circuit 3D involved in the variant example 4 of the embodiment 3, although the structure of the current detection circuit and the structure of the noise removal circuit are different from those of the semiconductor circuit 3 involved in the embodiment 3, since each noise removal circuit 40-1 is arranged between each low-side switching element (transistor QL1, QL2) and the ground wiring 50, since 40-2 is arranged, as in the case of the semiconductor circuit 3 of the embodiment 3, the ringing generated in the switching circuit 10 (in this case, between the source S of the transistors QL1, QL2 and the ground wiring 50) can be suppressed, and the ringing generated at the gate G of the switching element can be suppressed.

[0103] [Variation 5 of Example 3]

[0104] The semiconductor circuit 3E of the modified example 5 of the embodiment 3 basically has the same structure as the semiconductor circuit 3 of the embodiment 3, but the structure of the noise removal circuit is different from that of the semiconductor circuit 3 of the embodiment 3. Figure 14 As shown, a semiconductor circuit 3E according to a fifth variation of the third embodiment includes two noise removal circuits (first noise removal circuits 40-1 and 40-2) provided corresponding to the respective half-bridge circuits as noise removal circuits. In the semiconductor circuit 3E according to the fifth variation of the third embodiment, the noise removal circuit terminal 20-1 and the low-side source sense terminal 24L-1 can share a common terminal, and the noise removal circuit terminal 20-2 and the low-side source sense terminal 24L-2 can also share a common terminal.

[0105] As described above, in the semiconductor circuit 3E involved in the fifth variant of the third embodiment, although the structure of the noise removal circuit is different from that of the semiconductor circuit 3 involved in the third embodiment, the noise removal circuits 40-1 and 40-2 are arranged between the low-side switching elements (transistors QL1 and QL2) and the ground wiring 50. Therefore, as in the case of the semiconductor circuit 3 of the third embodiment, the ringing generated in the switching circuit 10 (in this case, between the source S of the transistors QL1 and QL2 and the ground wiring 50) can be suppressed, and the ringing generated at the gate G of the switching element can be suppressed.

[0106] [Variation 6 of Example 3]

[0107] The semiconductor circuit 3F of the modification 6 of the embodiment 3 basically has the same structure as the semiconductor circuit 3 of the embodiment 3, but the structure of the current detection circuit is different from that of the semiconductor circuit 3 of the embodiment 3. Figure 15 As shown, a semiconductor circuit 3F according to the sixth modification of the third embodiment includes two current detection circuits (a first current detection circuit 30 - 1 and a second current detection circuit 30 - 2 ) provided corresponding to each half-bridge circuit as a current detection circuit.

[0108] As described above, in the semiconductor circuit 3F involved in the sixth variant of the third embodiment, although the structure of the current detection circuit is different from that of the semiconductor circuit 3 involved in the third embodiment, since the noise removal circuit 40 is connected between each low-side switching element (transistor QL1, QL2) and the ground wiring 50 in parallel with 30-2, the ringing generated in the switching circuit 10 (in this case, between the source S of the transistors QL1, QL2 and the ground wiring 50) can be suppressed, as in the case of the semiconductor circuit 3 involved in the third embodiment, and the ringing generated at the gate G of the switching element can be suppressed.

[0109] [Example 4]

[0110] Figure 16 FIG is a diagram of a semiconductor circuit 4 of the fourth embodiment. The semiconductor circuit 4 of the fourth embodiment basically has the same structure as the semiconductor circuit 3D of the fourth modification of the third embodiment, but the structure of the high-side switch element is different from that of the semiconductor circuit 3D of the fourth modification of the third embodiment. In other words, Figure 16 As shown, the semiconductor circuit 4 according to the fourth embodiment uses two diodes (diodes DiH1 and DiH2 ) instead of two transistors (transistors QH1 and QH2 ) on the high side.

[0111] As described above, in the semiconductor circuit 4 according to the fourth embodiment, the structure of the high-side switching element is different from that of the semiconductor circuit 3D according to the fourth variant of the third embodiment, but between each low-side switching element (transistor QL1, QL2) and the ground wiring 50, a noise removal circuit 40-1 is connected in parallel with the current detection circuit 30-1, and a noise removal circuit 40-2 is connected in parallel with the current detection circuit 30-2. Therefore, as in the case of the semiconductor circuit 3D according to the fourth variant of the third embodiment, the ringing generated in the switching circuit 10 (in this case, between the source S of the transistors QL1, QL2 and the ground wiring 50) can be suppressed, and the ringing generated in the gate G of the switching element can be suppressed.

[0112] [Example 5]

[0113] Figure 17 FIG. 5 is a diagram of a semiconductor circuit 5 of Example 5. The semiconductor circuit 5 of Example 5 basically has the same structure as the semiconductor circuit 3 of Example 3, but the structure of the switch circuit 10 is different from that of the semiconductor circuit 3 of Example 3. In other words, Figure 17 As shown, the semiconductor circuit 5 according to the fifth embodiment uses an inverter circuit in which three half-bridge circuits are connected in parallel as the switching circuit 10 .

[0114] As described above, in the semiconductor circuit 5 of Example 5, although the structure of the switch circuit 10 is different from that of the semiconductor circuit 3 of Example 3, a noise removal circuit (first noise removal circuit 40-1) is connected in parallel with the current detection circuit (first current detection circuit 30-1), a noise removal circuit (second noise removal circuit 40-2) is connected in parallel with the current detection circuit (second current detection circuit 30-2), and a noise removal circuit (third noise removal circuit 40-3) is connected in parallel with the current detection circuit (third current detection circuit 30-3) between each low-side switch element (transistor QL1, QL2, QL3) and the ground wiring 50. Therefore, as in the case of the semiconductor circuit 3 according to Example 3, ringing occurring in the switch circuit 10 (in this case, between the source S of the transistors QL1, QL2, QL3 and the ground wiring 50) can be suppressed, thereby suppressing ringing occurring at the gate G of the switch element.

[0115] [Planar Layout of Modification 5 of Example 3]

[0116] Figure 18 This is a semiconductor circuit 3E of a fifth modification of the third embodiment (see Figure 14 However, the ground wiring is not shown in the figure. Figure 18 and the following Figures 19 to 21 In the figure, reference numeral 100 denotes an insulating substrate, reference numerals 110 , 120 , 130 , and 140 denote wiring patterns, and reference numerals 400 , 400A, 400B, and 400C denote circuit patterns.

[0117] In the semiconductor circuit 3E of the fifth variation of the third embodiment, the first noise removal circuit 40-1 is connected to the noise removal circuit terminal 20-1 shared with the source sense terminal 24L-1 of the transistor QL1, and the second noise removal circuit 40-2 is connected to the noise removal circuit terminal 20-2 shared with the source sense terminal 24L-2 of the transistor QL2. The current detection circuit 30 is connected to the ground terminal 16.

[0118] The semiconductor circuit 3E according to the fifth modification of the third embodiment has Figure 18 The planar layout shown in the figure, however, since noise removal circuits 40-1, 40-2 are connected between each low-side switching element (transistor QL1, QL2) and the ground wiring 50 (not shown) in parallel with the current detection circuit 30), as in the case of the semiconductor circuit 3 of Example 3, the ringing generated in the switching circuit 10 (in this case, between the source S of the transistors QL1, QL2 and the ground wiring 50) can be suppressed, thereby suppressing the ringing generated at the gate G of the switching element.

[0119] [Variation 7 of Example 3]

[0120] Figure 19 FIG. 1 is a planar layout diagram showing a semiconductor circuit 3G according to a seventh modification of the third embodiment.

[0121] The semiconductor circuit 3G of the modification 7 of the embodiment 3 basically has the same structure as the semiconductor circuit 3E of the modification 5 of the embodiment 3, but the arrangement position of the noise removal circuit is different from that of the semiconductor circuit 3E of the modification 5 of the embodiment 3. That is, in the semiconductor circuit 3G of the modification 7 of the embodiment 3, as shown in FIG. Figure 19 As shown, the noise removal circuits 40 - 1 and 40 - 2 are arranged inside a package 60 .

[0122] As described above, in the semiconductor circuit 3G involved in the seventh variant of the third embodiment, although the noise removal circuits 40-1 and 40-1 are arranged inside the package 60, since the noise removal circuits 40-1 and 40-2 are connected in parallel with the current detection circuit 30 between each low-side switching element (transistor QL1 and QL2) and the ground wiring 50 (not shown), as in the case of the semiconductor circuit 3E of the fifth variant of the third embodiment, the ringing generated in the switching circuit 10 (in this case, between the source S of the transistors QL1 and QL2 and the ground wiring 50) can be suppressed, thereby suppressing the ringing generated at the gate G of the switching element.

[0123] Furthermore, according to the semiconductor circuit 3G of the seventh variant of the third embodiment, since the noise removal circuits 40-1 and 40-2 are arranged inside the package 60, the wiring of the noise removal circuits 40-1 and 40-2 is further shortened, the impedance is reduced, and the ringing generated on the gate of the switching element can be more effectively suppressed.

[0124] [Variation 8 of Example 3]

[0125] Figure 20 FIG. 1 is a planar layout diagram of a semiconductor circuit 3H according to an eighth variation of the third embodiment. In the semiconductor circuit 3H according to the eighth variation of the third embodiment, the noise removal circuits 40-1 and 40-2 are all arranged inside the package 60, but the present invention is not limited thereto. Figure 20 As shown, only a portion (in this case, the resistor R) of the noise removal circuits 40 - 1 and 40 - 2 may be disposed inside the package 60 .

[0126] [Test Example]

[0127] In order to confirm the effects of the present invention, the following test examples were carried out.

[0128] 1. Semiconductor Circuits Used in the Test Examples

[0129] In the test example, the semiconductor circuit 3E of the modified example 5 of the embodiment 3 was used as the test example 1 (embodiment) (refer to Figure 14 and Figure 18 ). In addition, a circuit obtained by removing the noise removal circuits 40-1 and 40-2 from the test example 1 (embodiment) was used as the test example 2 (comparative example) (refer to Figure 21 ). Figure 21 It is a planar layout diagram of the semiconductor circuit 6 of Test Example 2 (comparative example).

[0130] 2. Test methods in test examples

[0131] Regarding the experiments, in the above-mentioned Test Example 1 (Example) and Test Example 2 (Comparative Example), when a DC voltage of 400 V was applied between the ground wiring 50 (not shown) and the power supply terminals 14-1 and 14-2, a gate voltage for enabling full-bridge operation was applied to the gate terminals 12H-1, 12H-2, 12L-1, and 12L-2 of the four transistors QH1, QH2, QL1, and QL2 at appropriate timing, the drain-source voltage VDS, the gate-source voltage VGS, and the drain-source current ID were simulated by a circuit simulator.

[0132] 3. Test results in the test case

[0133] Figure 22 This figure is used to illustrate the simulation model used in the experimental example. In the figure, the symbol Ls1 represents the inductance of the wiring of the current detection circuit, the symbol Rsnt represents the current detection resistor of the current detection circuit, the symbol Ls2 represents the wiring of the noise removal circuit, the symbol Vgs represents the gate-source voltage of the transistor QL2, the symbol Vds represents the drain-source voltage of the transistor QL2, the symbol Vs represents the source voltage of the transistor QL2, and the symbol Id represents the drain current of the transistor QL2. Figure 23 It is a diagram showing the simulation results of the test example. Figure 23 (A) is a diagram showing the simulation results of Test Example 1 (Example), Figure 23 (B) is a diagram showing the simulation results of Test Example 2 (Comparative Example).

[0134] In Test Example 2 (Comparative Example), Figure 23 As can be seen in (B), the noise frequency is approximately 125 MHz, and harmonic components are superimposed on the switching waveform. Because the RC series circuit used to eliminate noise forms a so-called first-order low-pass filter, the cutoff frequency fc is expressed by the following formula (1).

[0135] fc=1 / (2πRC)···Formula (1)

[0136] Therefore, if the cutoff frequency is determined to be lower than the frequency of noise, the resistance value R1 can be determined, and the capacitor capacitance C1 can be determined by the following formula (2).

[0137] C=1 / (2πRfc)···Formula (2)

[0138] from Figure 23As can also be seen in (B), since the noise frequency is approximately 125MHz, for example, if the cutoff frequency is set to 100MHz and the resistance value R1 is 1 ohm, then according to the above formula (2), the capacitor capacitance C1 is 1.59nF. If the resistance value R1 is 2 ohms, then according to the above formula (2), the capacitor capacitance C1 is 0.79nF. If the cutoff frequency is set to 50MHz and the resistance value R1 is set to 1 ohm, then according to the above formula (2), the capacitor capacitance C1 is 3.18nF. If the resistance value R1 is set to 2 ohms, then according to the above formula (2), the capacitor capacitance C1 is 1.59nF.

[0139] The cutoff frequency should be less than or equal to the noise frequency and greater than or equal to the switching frequency of the bridge circuit. Since the closer the cutoff frequency is to the switching frequency, the slower the rise of the switching waveform, it is best to set it above the switching frequency. The cutoff frequency will be set between the noise frequency and the switching frequency, so these factors should be considered when determining the cutoff frequency.

[0140] Figure 23 (A) shows the simulation results when the cutoff frequency is 100 MHz. Figure 23 (A) The upper graph shows the drain-source voltage Vds, Figure 23 (A) The lower graph shows the gate-source voltage Vgs and the drain-source current Id. Figure 23 (B) is the simulation result when the cutoff frequency is set to 100 MHz and the resistance value R1 and the capacitor capacitance C1 are determined (optimized).

[0141] Compare Figure 23 (A) and Figure 23 (B) It can be seen that, as in Test Example 1 (Example), when a noise removal circuit is connected in parallel with the current detection circuit between the switching circuit and the ground wiring, it can be seen that compared with the case of Test Example 2 (Comparative Example), the ringing generated in the switching circuit can be suppressed, and the ringing generated at the gate of the switching element can be suppressed.

[0142] The present invention is not limited to the above-described embodiments, and various modifications are possible without departing from the spirit of the present invention. For example, the following modifications are possible.

[0143] (1) The shape, number, size, position, etc. of the components in the semiconductor circuit of the present invention are not limited to those shown in the drawings, and can be appropriately changed without impairing the characteristics of the present invention.

[0144] (2) In the first exemplary embodiment, MOSFET is used as the transistor, but the present invention is not limited thereto. As the transistor, an IGBT may be used.

[0145] (3) In each of the first modifications, the resistor R and the capacitor C of the RC series circuit constituting the noise removal circuit 40 are housed inside the package 60, and the capacitor C is disposed outside the package 60. However, the present invention is not limited to this. Alternatively, the resistor R and the capacitor C of the RC series circuit constituting the noise removal circuit 40 may be housed inside the package 60, and the resistor R may be disposed outside the package 60.

[0146] Explanation of symbols

[0147] 1, 1A, 1B, 1C, 2, 2A, 2B, 2C, 3, 3A, 3B, 3C, 3D, 3E, 3F, 3G, 3H, 4, 5…semiconductor circuit; 6…semiconductor circuit (comparative example); 10, 10-1, 10-2, 10-3…switching circuit; 12, 12H, 12L, 12H-1, 12H-2, 12H-3, 12L-1, 12L-2, 12L-3…gate terminal; 14, 14-1, 14-2…power supply terminal; 16, 16-1, 16-2…ground terminal; 18, 18-1, 18-2, 18 -3…midpoint terminal; 20, 20-1, 20-2…terminals for noise removal circuit; 21…RC connection terminal; 22, 22-1, 22-2…RC terminal-ground wiring connection terminal; 24H-1, 24H-2, 24L-1, 24L-2…source sense terminal; 30, 30-1, 30-2, 30-3…current detection circuit; 40, 40-1, 40-2, 400B…noise removal circuit; R…resistor; C…capacitor; 50…ground wiring; 60…package; 400, 400A, 400B…circuit pattern.

Claims

1. A semiconductor circuit comprising: a switching circuit having at least one switching element; Ground wiring; and a current detection circuit connected between the switch circuit and the ground wiring, characterized in that: A noise removal circuit is connected between the switch circuit and the ground wiring in a parallel relationship equivalent to that of the current detection circuit.

2. The semiconductor circuit according to claim 1, wherein: The noise removal circuit is an RC series circuit in which a resistor and a capacitor are connected in series.

3. The semiconductor circuit according to claim 1, wherein: The switching circuit includes a half-bridge circuit having a high-side switching element and a low-side switching element. The noise removal circuit is connected between the low-side switching element and the ground wiring.

4. The semiconductor circuit according to claim 3, wherein: The switching circuit is a full-bridge circuit formed by connecting two half-bridge circuits in parallel.

5. The semiconductor circuit according to claim 3 or 4, wherein: The high-side switching element and the low-side switching element are both formed of transistors.

6. The semiconductor circuit according to claim 3 or 4, characterized in that: The high-side switching element is formed of a diode, and the low-side switching element is formed of a transistor.

7. The semiconductor circuit according to claim 3, wherein: The switching circuit is a circuit in which three or more half-bridge circuits are connected in parallel.

8. The semiconductor circuit according to claim 1, wherein: The switch circuit is housed inside the package. The current detection circuit and the noise removal circuit are both arranged outside the package.

9. The semiconductor circuit according to claim 2, wherein: The switch circuit and one of the resistor and the capacitor constituting the RC series circuit are housed inside a package. The current detection circuit and the other of the resistor and the capacitor constituting the RC series circuit are arranged outside the package.

10. The semiconductor circuit according to claim 1, wherein: The switch circuit and the noise removal circuit are both housed inside a package, and the current detection circuit is arranged outside the package.

11. The semiconductor circuit according to claim 1, wherein: The switching circuit, the noise removal circuit, and the current detection circuit are all housed in one package.

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