Manufacturing method of copper block-embedded IC carrier plate
By embedding copper blocks on the IC substrate and using low-current filling plating technology, the problems of mechanical stress and thermal expansion coefficient differences in traditional copper block processing are solved, achieving higher heat dissipation effect and device stability.
Patent Information
- Application Number
- CN202510852579.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-24
- Publication Date
- 2025-09-12
AI Technical Summary
During the copper block embedding process, traditional IC substrates have difficulty withstanding mechanical stress, inaccurate positioning, and differences in thermal expansion coefficients that lead to interface stress and cracks, making it difficult to meet the heat dissipation requirements of high heat flux density scenarios.
The embedded copper block is fixed with low current filling plating technology. By processing grooves on the substrate and embedding the copper block, using sticky carrier materials and dry film protection, combined with low current filling plating process, it replaces the traditional hot pressing process to improve the bonding strength and heat dissipation effect of the embedded copper block and the substrate.
It improves the bonding strength between the embedded copper block and the substrate, eliminates interface stress, improves the heat dissipation effect of the IC substrate, extends the device life and ensures stability.
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Figure CN120640534A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of circuit board processing, and in particular relates to a method for manufacturing an IC carrier board embedded with copper blocks. Background Art
[0002] IC substrates perform core functions in electronic devices, such as voltage conversion and power distribution. These circuits generate significant heat loads during operation. With advancements in chip manufacturing processes and increased integration, power density per unit area continues to rise, making heat dissipation a key factor limiting device performance and reliability. Traditional PCBs have low thermal conductivity, making them difficult to meet the demands of high-heat-flux scenarios.
[0003] To overcome this limitation, IC substrates can improve their heat dissipation capabilities by optimizing materials and structural designs. Among them, copper embedding technology has become one of the mainstream solutions: embedding copper blocks in the contact surface between the IC core area and the substrate, using the high thermal conductivity of copper to form a "thermal bridge" to quickly transfer the chip heat to the external heat dissipation structure of the substrate, such as a heat sink or heat sink. This design can reduce the chip junction temperature by 15%-30%, significantly extending the device life and ensuring stability. Figure 1 As shown, the traditional "substrate window lamination" process requires cutting grooves in the carrier board, inserting copper blocks, and curing. However, overly thin carrier boards cannot withstand the mechanical stress of the window lamination process, which can easily lead to delamination or deformation. The traditional lamination process has a large tolerance range of ±10-20μm, making it difficult to ensure the precise positioning and surface flatness of the tiny copper blocks, which may cause short circuits or increased thermal resistance. The thermal expansion coefficient (CTE) of copper and the substrate resin differ significantly, copper is approximately 17ppm / °C, and epoxy resin is approximately 15-20ppm / °C. Interfacial stress is easily generated during curing or thermal cycling, leading to cracks. Summary of the Invention
[0004] In order to solve the above-mentioned deficiencies in the prior art, the present invention provides a method for manufacturing an IC carrier board with embedded copper blocks, which saves processing technology and improves heat dissipation.
[0005] In order to achieve the purpose of the present invention, the following scheme is proposed: A method for manufacturing an IC carrier board embedded with copper blocks, comprising the following steps: S01: Processing of inlaid copper blocks; S02: Processing the substrate through cutting, drilling, and grooving processes, and opening a grooving groove in the substrate for accommodating the embedded copper block, and then performing copper deposition treatment; S03: Manual copper embedding, using an adhesive carrier material as a carrier board, embedding the copper block into the gong groove, and pre-fixing the copper block; S04: Film pasting: Paste dry film on one side of the substrate and the outer side of the carrier material respectively; S05: embedded copper block fixed filling plating, using small current filling plating method, the current density is: 1asd±0.5; S06: Film stripping: stripping the dry film, tearing off the carrier material, and grinding; S07: Secondary drilling, copper plating, whole board electroplating, circuit, AOI, solder mask, palladium pinching, molding, electrical testing, FQA.
[0006] Furthermore, in step S01 , the length dimension of the embedded copper block is: 3.327×3.327 mm, and the tolerance of the embedded copper block is: ±0.1 mm.
[0007] Furthermore, in step S02, the drilling includes a positioning hole with a diameter of 0.2 mm and a gong groove positioning hole with a diameter of 1.2 mm.
[0008] Furthermore, the gong groove in step S02 has a length × width dimension of 3.5 mm × 3.5 mm.
[0009] Furthermore, in step S03, after the embedded copper block is embedded in the gong groove, a distance of 50-150 μm is maintained between each side of the embedded copper block and the inner wall corresponding to the gong groove.
[0010] Furthermore, in step S04 , the thickness of the dry film is 40 μm, the film lamination speed is 1.5 m / min, and the pressure is 1.5 kg / cm 2 .
[0011] The beneficial effects of the present invention are: A groove is processed on the substrate, and then copper is deposited. A sticky carrier material is attached to one side of the substrate as a carrier board. The embedded copper block is then embedded in the groove, and dry film is attached to the side of the embedded copper block embedded in the substrate and the outer side of the carrier material to protect the carrier material. Copper is filled with a small current to fix the embedded copper block, so that the traditional hot-pressed PP material is replaced by copper filling, thereby improving the heat dissipation effect of the IC carrier board. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] The drawings described herein are for illustrative purposes only of selected embodiments and not all possible implementations, and are not intended to limit the scope of the present invention.
[0013] Figure 1 A top view of a conventional IC structure is shown.
[0014] Figure 2 A schematic diagram of a longitudinal cross-section of the embedded copper block of the present application is shown.
[0015] Figure 3 A schematic diagram of the substrate structure with gong grooves processed in this application is shown.
[0016] Figure 4Shows this application Figure 3 Schematic diagram of the structure after electroplating.
[0017] Figure 5 Shows this application Figure 4 Schematic diagram of the structure after the carrier material is pasted on one side.
[0018] Figure 6 This application shows Figure 4 Schematic diagram of the structure of the copper block embedded in the gong groove.
[0019] Figure 7 This application shows Figure 6 Schematic diagram of the structure with dry films attached on both sides of the structure shown.
[0020] Figure 8 This application shows Figure 7 Schematic diagram of the structure after filling and plating.
[0021] Figure 9 The schematic diagram shows the structure after the dry film and carrier material are torn off after filling and plating in this application.
[0022] Figure 10 Shown is a process flow chart for the production of this application.
[0023] Markings in the figure: embedded copper block-1, substrate-2, gong groove-21, carrier material-3, dry film-4. DETAILED DESCRIPTION
[0024] To make the objectives, technical solutions and advantages of the embodiments of the present invention more clear, the embodiments of the present invention are described in detail below with reference to the accompanying drawings. However, the embodiments described in the present invention are only part of the embodiments of the present invention, rather than all the embodiments.
[0025] like Figure 2-Figure 10 As shown, this embodiment provides a method for manufacturing an IC carrier board embedded with copper blocks, comprising the following steps: S01: The longitudinal section is obtained by cutting and milling. Figure 2 The copper embedded block 1 shown in the figure has four corners with curved surfaces to reduce stress concentration. S02: Figure 3-Figure 4 As shown, the substrate 2 is processed through the process of cutting, drilling, and grooving, and a grooving groove 21 for accommodating the embedded copper block 1 is opened in the substrate 2, and then copper is deposited; S03: Manual copper embedding, such as Figure 5 As shown, a carrier material 3 having an adhesive property is used as a carrier plate and is pasted on one side of the substrate 2. The embedded copper block 1 is embedded in the groove 21 and the embedded copper block 1 is pre-fixed. Figure 6 As shown; S04: Figure 7 As shown, a dry film 4 is applied to the side of the substrate 2 where the copper block 1 is embedded and the non-sticky side of the carrier material. The dry film 4 applied to one side of the substrate 2 is provided with an avoidance hole corresponding to the gong groove 21, and the gong groove 21 and the avoidance hole are in a similar and proportional structure. The side of the embedded copper block 1 away from the carrier material is 25 μm larger than the single side of the gong groove, that is, the window of the embedded copper block 1 is 25 μm larger than the single side of the gong groove 21. S05: If Figure 8 As shown, the embedded copper block 1 is fixedly filled and plated, 0.5asd×60min, and the copper is filled with a small current, and the current density is: 1asd±0.5; S06: Figure 9 As shown, film stripping: removing the dry film 4 and tearing off the carrier material 3, and then grinding; S07: Secondary drilling, copper plating, whole board electroplating, circuit, AOI, solder mask, palladium pinching, molding, electrical testing, FQA.
[0026] Specifically, in step S01 , the length dimension of the embedded copper block 1 is: 3.327×3.327 mm, and the tolerance of the embedded copper block 1 is: ±0.1 mm.
[0027] Specifically, the drilling in step S02 includes drilling a positioning hole with a diameter of 0.2 mm and a gong groove positioning hole with a diameter of 1.2 mm.
[0028] Specifically, the length and width dimensions of the gong groove 21 in step S02 are: 3.5mm×3.5mm, which is used to provide an accommodating space for the embedded copper block 1, and is processed by a CCD gong machine with an overall tolerance of ±0.05㎜.
[0029] Specifically, in step S03, after the embedded copper block 1 is embedded in the groove 21, the distance between each side of the embedded copper block 1 and the inner wall of the groove 21 is 50-150 μm, so that the plated copper is within the capability range of the electroplating filling process.
[0030] Specifically, the thickness of the dry film 4 in step S04 is 40μm. Since copper plating is performed, no circuit pre-processing is performed and the film is applied directly. The main function is to protect the carrier material from being attacked by the liquid. The film application speed is 1.5m / min and the pressure is 1.5kg / cm. 2 To make the bonding more stable, a 0.2mm hole is used for exposure and development to form the structure shown in the figure.
[0031] The copper-embedded IC carrier produced by this method can fill the junction of the copper-embedded block 1 and the substrate 2 with copper through a small current, thereby replacing PP and eliminating the interface stress easily generated during curing or thermal cycling, thereby improving the heat dissipation effect.
[0032] The above description is only a preferred embodiment of the present invention and is not intended to be the only one or to limit the present invention. It should be understood by those skilled in the art that various changes or equivalent replacements made to the present invention without departing from the scope of the present invention are within the scope of protection of the present invention.
Claims
1. A method for manufacturing an IC carrier board embedded with copper blocks, characterized in that: The steps include: S01: Processing of embedded copper block (1); S02: processing the substrate (2) through the processes of cutting, drilling, and grooving, and forming a grooving groove (21) in the substrate (2) for accommodating the embedded copper block (1), and then performing copper deposition treatment; S03: Manual copper embedding, using a sticky carrier material (3) as a carrier board, embedding the embedded copper block (1) into the gong groove (21), and pre-fixing the embedded copper block (1); S04: Laminating the film, laminating the dry film (4) on one side of the substrate (2) and the outer side of the carrier material; S05: Fixed plating of embedded copper block (1) using low current plating method with current density of 1asd±0.5; S06: Film stripping: remove the dry film, tear off the carrier material (3), and grind; S07: Secondary drilling, copper plating, whole board electroplating, circuit, AOI, solder mask, palladium pinching, molding, electrical testing, FQA.
2. The method for manufacturing an IC carrier board with embedded copper blocks according to claim 1, characterized in that: In step S01, the length dimension of the embedded copper block (1) is: 3.327×3.327 mm, and the tolerance of the embedded copper block (1) is: ±0.1 mm.
3. The method for manufacturing an IC carrier board with embedded copper blocks according to claim 1, characterized in that: The drilling in step S02 includes drilling a positioning hole with a diameter of 0.2 mm and a gong groove positioning hole with a diameter of 1.2 mm.
4. The method for manufacturing an IC carrier board with embedded copper blocks according to claim 1, characterized in that: The gong groove in step S02, the length × width size of the gong groove (21) is: 3.5mm × 3.5mm.
5. The method for manufacturing an IC carrier board with embedded copper blocks according to claim 1, characterized in that: In step S03, after the embedded copper block (1) is embedded in the gong groove (21), a distance of 50-150 μm is maintained between each side of the embedded copper block (1) and the inner wall corresponding to the gong groove (21).
6. The method for manufacturing an IC carrier board with embedded copper blocks according to claim 1, characterized in that: In step S04, the thickness of the dry film (4) is 40 μm, the laminating speed is 1.5 m / min, and the pressure is 1.5 kg / cm. 2 .
Citation Information
Patent Citations
Embedded copper block embedding type manufacturing method
CN117641774A
Circuit board manufacturing method and circuit board
CN118984537A