Cylindrical decomposition for efficiently mitigating substrate deformation with thin film deposition and ion implantation

Abstract

The disclosed systems and techniques relate to correcting out-of-plane deformation (OPD) of a substrate. The technique includes the following operations: obtaining an OPD profile of the substrate using optical inspection data; and obtaining a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients characterizing respective elemental deformation shapes of the substrate. The technique further includes the operations of: identifying one or more cylinder decomposition (cylinder decomposition) of a quadratic part (quadratic part) of the OPD profile, and identifying one or more cylinder decomposition (cylinder decomposition) of a quadratic part (quadratic part) of the OPD profile, the one or more cylinder decomposition (cylinder decomposition) of the quadratic part (quadratic part) of the OPD profile, the one or more cylinder decomposition (cylinder decomposition) of the OPD profile, and calculating one or more characteristics of a stress compensation layer (SCL) for the substrate using a selected one of the one or more cylinder decomposition. The technique further includes the operations of depositing the SCL on the substrate and exposing the SCL to a stress mitigation beam.

Description

Technical Field

[0001] This disclosure relates to semiconductor fabrication, including the fabrication of wafers. Background Art

[0002] Modern semiconductor components (such as processing circuits, memory components, photodetectors, solar cells, light-emitting semiconductor components and the like) are typically manufactured on silicon wafers (or other suitable substrates). The wafer may undergo many processing operations, such as physical vapor deposition, chemical vapor deposition, etching, photomasking, polishing and / or various other operations. In order to continuously reduce the cost of semiconductor components, multilayer stacks of bare crystals, insulating films, patterned and / or doped semiconductor films and / or other features are typically deposited on a single wafer to produce high aspect ratio components, such as those used in three-dimensional flash memory components and other applications. The processes of depositing, patterning, etching, polishing, etc. of the multilayer structure stack typically result in significant stress being applied to the underlying wafer. Such stress can cause both out-of-plane and in-plane distortions of the features supported by the wafer. These distortions can cause misalignment of the deposited features and can significantly reduce the quality of the manufactured component. Summary of the Invention

[0003] In one embodiment, disclosed is a method for correcting out-of-plane deformation of a substrate, the method comprising: obtaining an OPD profile of the substrate using optical inspection data. The method further comprises: performing a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding one of a plurality of elemental deformation shapes of the substrate. The method further comprises: identifying one or more cylindrical decompositions of a quadratic portion of the OPD profile based on at least a subset of the plurality of polynomial coefficients, wherein each of the plurality of cylindrical decompositions comprises decomposing the OPD profile into at least a parabolic deformation of the substrate and a cylindrical deformation of the substrate. The method further comprises: calculating one or more properties of a stress compensating layer (SCL) for the substrate using a selected cylindrical decomposition of the one or more cylindrical decompositions. The method further comprises: depositing the SCL on the substrate; and exposing the SCL to a stress mitigation beam.

[0004] In another embodiment, disclosed is a system comprising a memory and a processing device communicatively coupled to the memory for performing the following operations: obtaining an out-of-plane deformation profile (OPD profile) of a substrate using optical inspection data. The processing device is further configured to perform a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding one of a plurality of elemental deformation shapes of the substrate. The processing device is further configured to identify one or more cylindrical decompositions of a quadratic portion of the OPD profile based on at least a subset of the plurality of polynomial coefficients, wherein each of the one or more cylindrical decompositions includes decomposing the OPD profile into at least a parabolic deformation of the substrate and a cylindrical deformation of the substrate. The processing device is further configured to calculate one or more properties of a stress-compensating layer (SCL) for the substrate using a selected cylindrical decomposition of the one or more cylindrical decompositions. The processing device is further configured to deposit the SCL on the substrate and expose the SCL to a stress mitigation beam.

[0005] In another embodiment, disclosed is a semiconductor manufacturing system comprising one or more processing chambers for processing a substrate and a computing device. The computing device is configured to: obtain an optical particle deformation (OPD) profile of the substrate using optical inspection data; and obtain a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding one of a plurality of elemental deformation shapes of the substrate. The computing device is configured to: identify one or more cylindrical decompositions of a quadratic portion of the OPD profile based on at least a subset of the plurality of polynomial coefficients, wherein each of the one or more cylindrical decompositions comprises decomposing the OPD profile into at least a parabolic deformation of the substrate and a cylindrical deformation of the substrate. The computing device is configured to: calculate one or more properties of a stress compensating layer (SCL) for the substrate using a selected cylindrical decomposition of the one or more cylindrical decompositions; deposit the SCL on the substrate; and expose the SCL to a stress mitigation beam.

[0006] In yet another embodiment, disclosed is a non-transitory computer-readable memory having instructions stored thereon that, when executed by a processing device, cause the processing device to perform operations comprising: obtaining an out-of-plane deformation profile (OPD profile) of a substrate using optical inspection data. The operations further comprise: performing a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding one of a plurality of elemental deformation shapes of the substrate. The operations further comprise: identifying one or more cylindrical decompositions of a quadratic portion of the OPD profile based on at least a subset of the plurality of polynomial coefficients, wherein each of the one or more cylindrical decompositions comprises decomposing the OPD profile into at least a parabolic deformation of the substrate and a cylindrical deformation of the substrate. The operations further comprise: calculating one or more properties of a stress-compensating layer (SCL) for the substrate using a selected cylindrical decomposition of the one or more cylindrical decompositions. The operations further comprise: depositing the SCL on the substrate; and exposing the SCL to a stress mitigation beam. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The present disclosure can be more fully understood from the following detailed description and accompanying drawings of various embodiments of the present disclosure.

[0008] Figure 1A-1E A process for stress correction of a backside deposited film using additional ion implantation is schematically illustrated in accordance with at least one embodiment.

[0009] Figure 2 An example Zernike polynomial decomposition of an actual deformation of a wafer (upper left) in arbitrary units is shown to decompose it into parabolic bow deformation (upper right), saddle deformation (lower left), and residual deformation (lower right), in accordance with at least one embodiment.

[0010] Figure 3 An example wafer is shown for use in accordance with at least one embodiment. Figure 1A-1E Disclosed process for stress and deformation relief.

[0011] Figure 4 An example profile of a Gaussian ion beam that may be used for stress and deformation mitigation in a wafer is shown in accordance with at least one embodiment.

[0012] Figure 5 An example silicon wafer having a silicon nitride film deposited thereon and having a saddle-shaped deformation is shown in accordance with at least one embodiment.

[0013] Figure 6A An example right cylindrical decomposition of the quadratic portion of wafer deformation is shown, in accordance with at least one embodiment.

[0014] Figure 6B An example negative cylindrical decomposition of the quadratic portion of wafer deformation is shown in accordance with at least one embodiment.

[0015] Figure 7 is a flow chart illustrating an example process for mitigating wafer deformation using cylindrical decomposition, in accordance with at least one embodiment.

[0016] Figure 8A An ion implantation system capable of performing ion implantation into a stress-compensating layer in accordance with at least one embodiment is schematically illustrated.

[0017] Figure 8B According to at least one embodiment, Figure 8A The ion implantation system delivers ions to the wafer at any incident angle.

[0018] Figure 9 A block diagram of an example computer system capable of supporting operations of the present disclosure in accordance with at least one embodiment is depicted. DETAILED DESCRIPTION

[0019] The prior art includes a variety of approaches to addressing wafer deformation. For example, a deformed (warped) wafer, which has various films and features deposited on one side (herein referred to as the front, top, or primary side), can be coated on the other side (herein referred to as the backside or bottom side) with a film that applies compressive or tensile stress to the wafer. Such backside-deposited deformation-correcting films (herein also referred to as stress-compensating layers or stress-compensating films) typically apply a uniform (or global) stress across the entire wafer and are unable to compensate for localized stress modulation and / or anisotropic stress. Additional correction can be achieved by implanting ions into the stress-compensating layer (e.g., bombarding the stress-compensating layer with an ion beam) to adjust the stress in the stress-compensating layer, thereby further mitigating deformation in the underlying wafer.

[0020] As used herein, "wafer" refers to any substrate or material surface formed on a substrate on which thin film processing is performed during the manufacturing process. For example, depending on the application, wafer surfaces on which processing may be performed include materials such as silicon, silicon oxide, silicon nitride, strained silicon, silicon-on-insulator structures, carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other material (e.g., metals, metal nitrides, metal alloys, and other conductive materials). Wafers include, but are not limited to, semiconductor wafers. In some cases, wafers may include plastic substrates. Wafers may be exposed to pretreatment processes to polish, etch, reduce, oxidize, hydroxylate, anneal, UV cure, electron beam cure, and / or bake the substrate surface. In addition to performing thin film processing directly on the surface of the wafer itself, any of the disclosed thin film processing steps may also be performed on an underlying layer formed on the wafer, as disclosed in more detail below, and the term "wafer surface" is intended to include such underlying layers as indicated by the context. Thus, for example, if a thin film / layer or portion of a thin film / layer has already been deposited on the wafer surface, the exposed surface of the newly deposited thin film / layer becomes the wafer surface. In some embodiments, the thickness of the wafer is in the range of 0.25 mm to 1.5 mm, or in the range of 0.5 mm to 1.25 mm, or in the range of 0.75 mm to 1.0 mm, or thicker. In some embodiments, the diameter of the wafer is about 10 cm, 20 cm, 30 cm or more.

[0021] Combined with ion implantation to deposit stress compensation layer in the correction of uniform and isotropic stress (σ xx ≈σ yy ) can be quite efficient. On the other hand, the stress (σ) that varies with position x, y on the wafer can be mitigated. jk (x, y)), anisotropic stress (σ xx ≠σ yy ) or both is a more challenging problem. Certain patterns may result in compressive stress along one direction (e.g. σ xx <0), and tensile stress (σ yy >0), resulting in saddle-shaped wafers, such as Figure 5 Such saddle-shaped features may appear, for example, in material stacks with directional patterning (e.g., the patterning of word lines in flash memory devices). Correcting such anisotropic saddle-shaped deformations in wafers remains a difficult task.

[0022] Aspects and embodiments of the present disclosure address these and other challenges of modern semiconductor manufacturing technology by providing systems and techniques that can efficiently mitigate non-uniform and / or anisotropic stress and deformation of a wafer. The wafer can be deformed by h(r,φ)=h quad(r,φ)+h res (r,φ) represents (decomposed into) the quadratic contribution h quad (r,φ) and the residual (non-quadratic) contribution h res (r,φ) combination. The secondary deformation can include a parabolic (paraboloid) part h par (r) and saddle h saddle (r, φ), the parabola (paraboloid) part has complete axial symmetry, and the saddle part has discrete symmetries, including 180 degree rotation and mirror symmetry with respect to reflection in two perpendicular planes. par (r)=Ar 2 With a uniform (position-independent) axisymmetric strain tensor

[0023]

[0024] where z is the vertical coordinate of the location of the specified stress inside the wafer. For the unpatterned back side of the wafer, the vertical coordinate is z = -D / 2, where D is the thickness of the wafer. According to Hooke's law, the corresponding strain tensor for the parabolic deformation is also the same,

[0025]

[0026] Where E and v are the Young's modulus and Poisson's ratio of the wafer material, respectively. The uniform strain associated with the parabolic deformation can be compensated by depositing a stress-compensating film of uniform thickness d, which applies a stress equal to and opposite to the parabolic stress of the wafer on the back side of the film. The thickness d of the film can be calculated (or determined empirically) so that the film applies the desired target stress to the back side of the wafer. For example, if A>0, then the parabolic bow of the wafer bends upward, causing the top side of the wafer to compress and the back side of the wafer to stretch. Correspondingly, a film that applies a compressive stress on the wafer can be deposited on the back side of the wafer to reduce (or eliminate) the stretching of the back side of the wafer. Conversely, if A<0, then the back side of the wafer is compressed, and a film that applies a tensile stress on the back side of the wafer can be used to reduce (or eliminate) the stretching of the back side.

[0027] The saddle deformation and stress are non-uniform and vary in sign four times around the periphery of the wafer, e.g., σ jk∝cos(2φ), and therefore cannot be eliminated by simply depositing a stress compensating film. In some embodiments, the thickness and material of the stress compensating film can not only eliminate the parabolic bow, but also convert the saddle-shaped deformation into a cylindrical deformation with a definite sign over the entire area of ​​the wafer. The cylindrical deformation of uniform sign (as well as residual higher-order non-quadratic deformations) can then be mitigated by implanting ions into the film. As described in the present disclosure, by decomposing the quadratic deformation into a parabolic component and a cylindrical component, a suitable stress compensating film can be identified. As disclosed in more detail below, this decomposition is not unique, as the resulting cylindrical deformation can be selected to be positive (upward) or negative (downward). Identifying two such decompositions allows for the selection of a more effective decomposition for subsequent film deposition and ion implantation.

[0028] In one embodiment, the vertical profile z=h(r,φ) of the wafer deformation can be measured using optical metrology techniques. For example, optical interferometry can be used to obtain an interference pattern of the profile h(r,φ). The wafer profile h(r,φ) can then be represented by a plurality of parameters that qualitatively and quantitatively characterize the geometry of the wafer deformation. In some embodiments, the wafer profile can be represented using a set of Zernike (or a similar set of) polynomials,

[0029]

[0030] where r is the radial coordinate and φ is the polar coordinate in the (average) plane of the wafer. The successive coefficients A1, A2, A3, A4, ... represent the weights of specific geometrical features (element deformations) of the wafer as described by the corresponding Zernike polynomials Z1(r, φ), Z2(r, φ), Z3(r, φ), Z4(r, φ), ... . The first three coefficients are less important, since they describe the uniform movement of the wafer (coefficient A1, associated with the polynomial Z1(r, φ) = 1), the deformation-free x-tilt equivalent to a rotation about the y-axis (coefficient A2, associated with the polynomial Z2(r, φ) = 2r cosφ), and the deformation-free x-tilt equivalent to a rotation about the x-axis (coefficient A3, associated with the polynomial Z3(r, φ) = 2r sinφ), which can be eliminated by realigning the coordinate axes. (The Noll indexing scheme for the Zernike polynomials is used in this paper.) The fourth coefficient A4 is associated with The fifth coefficient A5 and the sixth coefficient A6 are related to and The polynomials are associated and characterize saddle-type deformations. The A5 coefficient characterizes saddle shapes that bend upward (A5>0) or downward (A5<0) along the diagonal y=x and downward (A5>0) or upward (A5<0) along the diagonal y=-x. The A6 coefficient characterizes saddle shapes that bend upward (A6>0) or downward (A6<0) along the x-axis and downward (A6>0) or upward (A6<0) along the y-axis. Higher coefficients A7, A8, etc. characterize that the wafer deformation h(r,φ) changes increasingly rapidly along the radial direction, along the azimuthal direction, or both, and together represent the residual deformation Figure 2 An example Zernike polynomial decomposition 200 of an actual deformation h(r, φ) of a wafer (upper left) in arbitrary units is shown to decompose the deformation into a parabolic bow deformation A4Z4(r, φ) (upper right), a saddle deformation A5Z5(r, φ)+A6Z6(r, φ) (lower left), and a residual deformation h res (r, φ) (lower right).

[0031] In some embodiments, the thickness d of the stress-compensating film may be selected based on the value of the parabola bow coefficient A4. Figure 1A-1E A process for stress correction of a backside deposited film using additional ion implantation is schematically illustrated in accordance with at least one embodiment. Figure 1A The wafer 102 is depicted with deformations, which may include parabolic bow deformation (with negative coefficient A4 < 0) and other deformations, such as saddle deformation and residual deformation (both are shown in Figure 1 for simplicity and ease of review). Figure 1A-1E (not shown in the figures). Wafer 102 has a front side 104 and a back side 106. Any number of features (e.g., deposited and / or etched patterns), bare die, photomasks, and / or any other structures may be deposited on or etched in front side 104. In some embodiments, back side 106 may be free of deposited / etched features / structures. In some embodiments, back side 106 may also have one or more deposited / etched features / structures. Figure 1B The schematic diagram shows the deposition of a stress-compensating layer on the backside of wafer 102. In some embodiments, stress-compensating layer 108 can include one or more thin films of different materials. The thickness of individual films can be in the range of 10 to 200 nanometers, or in the range of 20 to 180 nanometers, or in the range of 30 to 160 nanometers, or in the range of 40 to 140 nanometers, or greater. The total thickness of the stress-compensating layer can be up to several micrometers or even thicker. In some embodiments, stress-compensating layer 108 is deposited at a temperature in the range of 100°C to 500°C or higher.

[0032] The material (type) of the stress compensating layer 108 may be selected based on the sign of the coefficient A4. For example, for negative bow, A4 < 0, and the stress compensating layer 108 may be selected to have a tensile stress (e.g., Figure 1A-1E As shown). For silicon wafers, such a film can be a silicon nitride (Si3N4) film. Conversely, for positive bow, A4>4, and the stress compensation layer 108 can be selected to have a tensile stress ( Figure 1A-1E (not shown). The stress-compensating layer 108 can be deposited using any suitable deposition technique, including physical vapor deposition (e.g., sputtering), chemical vapor deposition (e.g., plasma-assisted deposition), epitaxy, lift-off, and / or the like. Deposition can be performed at room temperature or at a temperature different from room temperature (e.g., elevated temperature). In some embodiments, the thickness d of the stress-compensating layer 108 can be selected to overcorrect deformation to a certain extent, e.g., Figure 1C As shown, the negative parabolic bow becomes a positive parabolic bow. Thickness-dependent parabolic bow correction A corr (d) Change the wafer deformation from h(r, φ) to h corr (r, φ):

[0033] h corr (r, φ) = h(r, φ) + A corr (d)·Z4(r,φ).

[0034] The overcorrection is selected in conjunction with the implant species, energy, and dose to ensure maximum benefit from stress compensation. The overcorrection allows the combined structure of the wafer 102 and the stress compensating layer 108 to be susceptible to further control of stress (and thus to wafer deformation). corr (further control of r, φ). Figure 1D As shown, an ion beam implanter 110 can generate an ion beam 112 that strikes the stress-compensating layer 108 and deposits ions therein. The ion beam 112 can carry silicon ions, phosphorus ions, argon ions, neon ions, xenon ions, krypton ions, and / or the like. In some embodiments, the energy and type of ions in the ion beam 112 can be selected to confine the implanted ions to the volume of the stress-compensating layer 108 and prevent the ions from reaching the wafer 102. Ions retained in the stress-compensating layer 108 can generate substitutional defects therein. Furthermore, the ions can also leave traces of vacancy defects along their propagation paths in the stress-compensating layer 108. The substitutional defects and / or vacancies modify (e.g., reduce) the stress in the stress-compensating layer 108 and can reduce the degree of stress overcorrection caused by thin film deposition. This results in a flattening of the combination of the wafer 102 and the stress-compensating layer 108.

[0035] While the stress mitigating beam used to modify stress in the stress-compensating layer 108 is referred to as an ion beam (e.g., ion beam 112) for purposes of detail, throughout this disclosure, the stress mitigating beam may include other species (e.g., electrons), electromagnetic waves (e.g., ultraviolet light, visible light, infrared light, etc.), and / or suitable combinations thereof. The stress mitigating beam impacts the stress-compensating layer 108 and modifies the bonding network of the stress-compensating layer 108. For example, a low-energy stress mitigating beam may interact with surface atoms of the stress-compensating layer 108, for example, removing some of the surface atoms, thereby effectively etching the surface region of the stress-compensating layer 108. The effectiveness of this etching can be controlled by selecting the ion species / radicals / ambient gas. In another example, a high-energy stress mitigating beam may deposit ions within the stress-compensating layer 108. The ions and / or photons may disrupt bonds in the bonding network (or lattice) of the stress-compensating layer 108, thereby forming vacancies therein, which may further induce annealing due to localized heating, UV curing, and / or other effects.

[0036] In some embodiments, simulations (performed in more detail below) can be used to estimate the deformation h based on the correction. corr The local value of (r, φ) determines the number of ions deposited per small area of ​​the wafer ΔA = ΔxΔy ΔN i The corrected deformation may include saddle deformation, residual deformation, and a parabolic bow-shaped deformation portion A that has been overcorrected by the deposition of the stress compensation layer 108. corr (d) + A4. The desired local density of ions ΔN can be delivered by controlling the scanning speed v of the ion beam 112. i / ΔxΔy. In some embodiments, the profile of the ion beam 112 can be approximated by a Gaussian function, for example, ion flux j(ρ)=j0exp(-x 2 / a 2 -y 2 / b 2 ), where x and y are Cartesian coordinates, j0 is the maximum ion flux at the beam center, and a and b are the characteristic spread of the beam along the x and y axes, respectively. Correspondingly, a point at a distance y relative to the beam center path receives an ion dose comprising the following number of ions:

[0037]

[0038] Correspondingly, by reducing the scanning speed v, the number of ions received by various regions of the stress compensation layer 108 can be increased, and vice versa. In addition, the ion beam 112 can be scanned multiple times with different offsets y, so that various points of the stress compensation layer 108 are scanned with different coefficients. For example, after n passes through the ion beam implanter 110 (each at a different distance y from the center of the ion beam 112), the coefficients can be averaged to a target dose. k At the corresponding speed v k For area ΔxΔy), the total ion dose received by this area will be

[0039]

[0040] like Figure 1E As shown, the implanted layer 114 formed as part of the stress compensating layer 108 significantly reduces deformation of the wafer 102, particularly the saddle and residual portions thereof.

[0041] Figure 3 An example wafer is shown for use in accordance with at least one embodiment. Figure 1A-1E The disclosed process reduces stress and deformation by 300. Figure 3 As shown, a 30 cm silicon wafer 102 having a maximum negative strain of -75.0 μm is first overcorrected to a maximum strain of +83.5 μm using a silicon nitride tensile stress compensating layer 108. The stress in the stress compensating layer 108 is then reduced by forming an implanted layer 114 using an ion beam, resulting in a final maximum strain of +15.4 μm. Figure 4 An example profile 400 of a Gaussian ion beam 112 that may be used for stress and deformation mitigation in a wafer is shown in accordance with at least one embodiment.

[0042] Figure 1- Figure 3 The techniques shown for strain and deformation mitigation can also be applied to wafers with complex deformations, where the stress tensor components σ xx and σ yy have different signs, resulting in a saddle-shaped deformation of the wafer. Figure 5 An example wafer 500 (e.g., a silicon wafer with a silicon nitride film deposited thereon) having saddle-shaped deformation is shown in accordance with at least one embodiment. As seen in the cross-sectional xz view 502, the stress component σ in the wafer (top layer) xx may be lower than the stress component σ in the thin film (bottom layer) deposited on the back side of the wafer xx In contrast, as shown in the cross-sectional yz view 504, the stress component σ in the wafer yy may be higher than the stress component σ in the film yy In some embodiments, the stress state in the wafer can be represented by a position-dependent stress tensor that can be approximated as:

[0043]

[0044] This structure of the stress tensor is usually a good approximation because the wafer is generally in pure bending and is independent of the shear stresses represented by the off-diagonal terms in the stress tensor. Correcting for the saddle shape requires special care in the dose map calculation and optimization to ensure that no additional residual terms are introduced into the wafer.

[0045] Figure 6A An example right cylindrical decomposition 600 of the quadratic portion of the wafer deformation is shown in accordance with at least one embodiment. As described above, the wafer deformation can be decomposed by Zernike polynomials, for example as (omitting the constant shift term in Z4):

[0046]

[0047] where Z7 and higher order terms are included in the residual contribution h res (r, φ), for the sake of simplicity, this residual contribution is omitted hereafter. The deformation of the wafer can be expressed in an equivalent form as:

[0048]

[0049] where 2φ0=tan -1 (A5 / A6). The value φ0 is the azimuth angle of the direction of the steepest rise or fall of the saddle portion of h(r, φ), which rise or fall includes the combination of the Z5 saddle and the Z6 saddle. The angle φ0 can be between -π / 4 and π / 4.

[0050] The deformed shape of the cylinder is characterized by the following deformations:

[0051] h cyl (r,φ)=β·r 2 cos 2 (φ-φ0)

[0052] The sign of the parameter β determines whether the cylinder points upward (β>0) or downward (β<0), and the magnitude of β determines the radius of curvature of the cylinder. curv =(2|β|) -1 and φ0 (which vary in the range [0,π]) determine the direction (in the xy plane) along which the wafer is bent; this direction is perpendicular to the axis of the cylinder (angles φ and φ0 are measured from the x-axis). Correspondingly, any quadratic wafer deformation h quad (r, φ) can be decomposed into a parabolic bow h par (r) = α·r 2 and a right cylinder (β + >0) deformation h cyl Combination of (r,φ):

[0053] h quad (r,φ)=α + ·r2 +β + ·r 2 cos 2 (φ-φ + )

[0054] Coefficient α + and β + It is from h quad The Zernike decomposition of (r,φ) is matched to obtain:

[0055]

[0056] Depending on the sign and magnitude of coefficient A4, the coefficient α + Can be positive or negative.

[0057] Figure 6A Example 600 shows a deformation 602 of a wafer that, for simplicity and ease of viewing, has a saddle component with φ0=0 and no parabolic bow component (A4=0). Figure 6A Also shown in FIG. 6 is a three-dimensional (3D) graph 612 of deformation 602. As disclosed above, deformation 602 can be decomposed into negative parabolic deformation 604 (3D graph 614) and positive cylindrical deformation 606 (3D graph 616). Positive cylindrical deformation 606 has a minimum along the y-axis.

[0058] Alternatively, the same variant h quad (r, φ) can be decomposed into a parabolic arcuate deformation h par (r) = α - ·r 2 and a combination of negative cylindrical deformation:

[0059] h(r,φ)=α - ·r 2 -β - ·r 2 cos 2 (φ-φ - ).

[0060] Then, the coefficient α is obtained - and β - for:

[0061]

[0062] Depends on the coefficient A 4· The sign and magnitude of the coefficient α - Can be positive or negative.

[0063] Figure 6B An example negative cylindrical decomposition 601 of the quadratic portion of wafer deformation is shown in accordance with at least one embodiment. Figure 6BThe decomposition 601 represents the decomposition 602 as the sum of a positive parabolic deformation 605 (3D diagram 615) and a negative cylindrical deformation 607 (3D diagram 617). The absolute value of the negative cylindrical deformation 607 has a maximum value along the x-axis.

[0064] In the case of wafers with arbitrary parabolic bows and arbitrary saddle orientations, the right cylindrical decomposition (with the parameter α identified above) can be evaluated. + , β + and φ + Description) and negative cylindrical decomposition (parameter α - , β - and φ - ) both. Then, the better decomposition can be selected. Since for both decompositions, β + =β - , so the selection can include identifying a decomposition with a smaller value of |α|. For example, once a decomposition with a smaller |α| is selected, the sign of α can be evaluated. If α>0 (indicating positive bow), a tensile stress compensating film can be selected to compress the back surface of the wafer. Conversely, if α<0 (indicating negative bow), a compressive stress compensating film can be selected to stretch the back surface of the wafer. In some embodiments, a certain type of film can be preferred, for example, a tensile film can be preferred over a compressive film (or vice versa). In such an instance, a decomposition of α with a corresponding sign can be selected, if α of such a sign is available. (If α + and α - If both have the same sign, the decomposition with the smaller value can be preferred.)

[0065] In some embodiments, the strength of the stress compensating film can be selected based on both α and β. For the reasons mentioned above, it may be advantageous to ensure that the signs of the deformations of the wafers corrected by the film are the same. For example, if a film of a particular type and thickness d causes the deformation of the wafer to be γ(type, d)·r 2 Modification, then the total corrected deformation of the wafer after film deposition can be:

[0066] h corr (r, φ) = α + ·r 2 +β + ·r 2 cos 2 φ+γ(type, d)·r 2 .

[0067] In one example, if the wafer has a negative parabolic bow deformation α + <0, and it has been determined that the film is to have a type that stretches the back surface of the wafer (γ(type, d)>0), then the thickness of the film can be selected so that:

[0068] γ(type, d)≥|α + |

[0069] To ensure that the deformation h corrected by the film over the entire area of ​​the back surface of the wafer corr (r, φ). In detail, if the film is selected so that γ(type, d) = |α + |, then the wafer deformation will be corrected to zero along the y-axis (φ = ±π / 2) and overcorrected by β along other lines + ·r 2 cos 2 φ, where the maximum overcorrection occurs along the x-axis (φ = 0, π). The overcorrection can then be addressed by targeted ion implantation that relaxes the strain in the stress-compensating film, for example, where the maximum ion implantation occurs near the point (x, y) = (±R, 0) and the minimum ion implantation occurs near the point (0, ±R), where R is the radius of the wafer.

[0070] In some embodiments, the secondary deformation of the wafer can be quantitatively characterized by the degree to which parabolic and cylindrical deformations coexist. In one non-limiting embodiment, a "cylindrical" polynomial (which has the same regularization as the Zernike polynomial) can be introduced:

[0071]

[0072] So that the secondary deformation can be expressed as:

[0073]

[0074] Correspondingly, the value

[0075]

[0076] It can be called the parabolic property of the chip, and the value

[0077]

[0078] This can be referred to as the cylindricity of the wafer. In some embodiments, the type and thickness of the stress-compensating film can be directly determined based on the paraboloidality P, the cylindricity C, and / or based on the ratio P:C.

[0079] Figure 77 is a flow chart illustrating an example process 700 for mitigating wafer deformation using cylindrical decomposition, in accordance with at least one embodiment. Process 700 can be performed using a semiconductor manufacturing system comprising one or more processing chambers, such as deposition chambers, plasma chambers, etch chambers, polishing chambers, thin film removal chambers, beam irradiation chambers, optical inspection chambers, and / or the like. The processing chambers can be coupled to one or more transfer chambers, which can be equipped with robots for transferring wafers, such as moving wafers into and out of the processing chambers. The transfer chambers can further be coupled to load-lock chambers (front-end interfaces), which can be coupled to one or more front-opening unified pod (FOUP) carriers for holding bare wafers, processed wafers, partially processed wafers, and / or the like. The operations performed by the semiconductor manufacturing system, including any, some, or all of the operations of process 700, can be executed in response to instructions issued by a suitable computing device having processing logic and memory for storing instructions.

[0080] At block 710, process 700 includes measuring a shape of a wafer, such as a displacement of a surface (e.g., a top surface or a back surface) of the wafer as a function of any suitable in-plane coordinates (e.g., polar coordinates h(r, φ), Cartesian coordinates h(x, y), or some other coordinates). At block 720, process 700 includes representing the determined shape by a set of suitable polynomials (e.g., Zernike polynomials) and obtaining a set of polynomial expansion coefficients, {A j} = (A1, A2, A3), A4, A5, A6, A7, ..., each coefficient in the set of coefficients characterizes the degree of presence of a specific element geometry in the wafer deformation.

[0081] At block 730, the coefficients {A j} to obtain a decomposition of the wafer deformation as the sum of at least a parabolic deformation and a cylindrical deformation, for example, as disclosed in more detail above. The obtained cylindrical decomposition may include a positive cylindrical decomposition and a negative cylindrical decomposition. At block 740, the obtained cylindrical decomposition may be evaluated, and a preferred cylindrical decomposition may be selected for implementation by thin film deposition. The preferred cylindrical decomposition may be selected based on various metrics. For example, a cylindrical decomposition may be selected that requires the least corrective parabolic bow (which still causes the stress to have the same sign over the entire area of ​​the wafer); a cylindrical decomposition may be selected that requires a particular type of film (e.g., a tensile film or a compressive film); a cylindrical decomposition may be selected that is most aligned (or misaligned) with a particular feature patterned on the top side of the wafer; and / or the like.

[0082] At block 750, process 700 can continue by identifying the properties (e.g., material type, thickness, etc.) of the target stress-compensating layer (film) to be deposited on the wafer. At block 760, process 700 can include depositing a film made of the selected material and having the selected thickness on the wafer. The deposited film can cause the stress tensor in the new wafer plus film structure to have a specific sign (positive or negative). This is advantageous because subsequent ion implantation can reduce the amount of stress in the film, whereas reversing the sign of stress in the film (e.g., converting a tensile film to a compressive film) using ion implantation can be difficult.

[0083] At block 780, process 700 may continue with determining an appropriate dose for ion (electron, photon, etc.) implantation. In some embodiments, the appropriate dose may be determined based on the saddle component (and / or remaining parabolic component) of the wafer deformation that has not been eliminated by the film deposition (e.g., a suitable combination of the coefficients β of the cylindrical decomposition, the Zernike coefficients (e.g., ) and / or similar coefficients given by the saddle component) to determine the ion implantation dose. In some embodiments, the ion implantation dose can be further selected to eliminate (or reduce) higher order residual deformation.

[0084] In some embodiments, the operations of block 780 may be performed based on wafer deformation data acquired at block 710 prior to film deposition. In some embodiments, the operations of block 780 may be performed based on new data obtained by re-measuring (block 770) the corrected (corrected by the film) deformation of the wafer after film deposition. At block 790, ion implantation is performed, for example, by exposing the film to a stress-relief beam (e.g., an ion beam), as described below in conjunction with Figure 8A-8B As disclosed by Figure 7 As indicated by the dashed arrows in FIG, blocks 770 - 790 of process 700 may be iteratively repeated until the stress or deformation of the wafer is reduced to below a target tolerance.

[0085] Figure 8AAn ion implantation system 800 is schematically illustrated, according to at least one embodiment, that can perform ion implantation into a stress-compensating layer. The ion implantation system 800 can be or include the ion beam implanter 110 of FIG. 1 . While for purposes of illustration, the stress mitigating beam used to modify stress in the stress-compensating layer 108 is referred to as an ion beam (e.g., ion beam 112), in some embodiments, the stress mitigating beam can include particles of other substances (e.g., electrons), electromagnetic waves (e.g., ultraviolet light, visible light, infrared light, etc.), and / or suitable combinations thereof. The ion implantation system 800 can include an ion source 802 for generating an ion beam 804. The ion source 802 can include a chamber (e.g., a plasma chamber) for generating ions. The ion source 802 can be powered by a power supply 806 and can include an extraction electrode assembly (not shown). The ion implantation system 800 can include a mass spectrometer 808 and a collimating and focusing column 810. The collimating and focusing column 810 can direct the ion beam 112 toward the wafer 102. The wafer 102 can be supported by a support table 812. In some embodiments, while the ion beam 112 is scanning across the wafer 102, the support stage 812 and wafer 102 can remain stationary while components of the ion implantation system 800 can be repositioned relative to the wafer 102. In some embodiments, the ion implantation system 800 can remain stationary while the support stage 812 can reposition the wafer 102. The ion beam 112 can be scanned in multiple directions, such as along the x-axis and along the y-axis according to any suitable predetermined pattern, such as back and forth along the x-axis, in a spiral pattern, etc. In various embodiments, the ion beam 112 can be scanned at a frequency of a few hertz, tens of hertz, hundreds of hertz, a few kilohertz, or higher.

[0086] The operation of the ion implantation system 800 can be controlled by a controller 814, which can include any suitable computing device, microcontroller, or any other processing device having a processor (e.g., a central processing unit (CPU), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), and / or the like) and a memory element (e.g., a random access memory (RAM), a read-only memory (ROM), flash memory, and / or the like), or any combination thereof. The controller 814 can control the operation of the power supply 806, the support table 812, and / or various other components and modules of the ion implantation system 800. The controller 814 can include an ion beam simulation module 816 that is capable of performing simulations to determine a target intensity of the ion beam 112 to be used to mitigate various wafer deformations. In some embodiments, the support table 812 can apply a tilt to the wafer 102 (e.g., in one or two spatial directions) to change the angle of incidence of the ion beam 112 relative to the wafer 102. In some embodiments, the controller 814 can tilt the ion implantation system 800 relative to the wafer 102 instead of tilting the wafer 102. In some embodiments, for example, as Figure 8B As shown, support stage 812 can apply a tilt to wafer 102 (e.g., in one or two spatial directions) to change the angle of incidence of ion beam 112 relative to wafer 102. In some embodiments, controller 814 can tilt ion implantation system 800 relative to wafer 102 rather than tilting wafer 102.

[0087] Figure 9 Described according to at least one embodiment, the block diagram of the example computer system 900 that can support the operation of the present disclosure.In various illustrative examples, the example computer system 900 can be or include the controller 814 of Figure 8. The example computer system 900 can be connected to other computer systems in a LAN, an intranet, an extranet and / or the Internet. The computer system 900 can operate as a server in a client-server network environment. The computer system 900 can be a personal computer (PC), a set-top box (STB), a server, a network router, a switch or a bridge, or any device that can execute a set of instructions (performed sequentially or otherwise) that specify the actions to be taken by the device. Further, although only a single example computer system is described, the term "computer" should also be considered to include the collection of any computers that individually or collectively execute a set (or multiple sets) of instructions to perform any one or more methods discussed herein.

[0088] The example computer system 900 may include a processing device 902 (also referred to as a processor or CPU) (which may include processing logic 926), a main memory 904 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous dynamic random access memory (SDRAM), etc.), a static memory 906 (e.g., flash memory, static random access memory (SRAM), etc.), and a secondary memory (e.g., a data storage device 918), which may communicate with each other via a bus 930.

[0089] Processing device 902 represents one or more general-purpose processing devices, such as a microprocessor, a central processing unit, or the like. More specifically, processing device 902 can be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing another instruction set, or a processor implementing a combination of instruction sets. Processing device 902 can also be one or more special-purpose processing devices, such as an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a digital signal processor (DSP), a network processor, or the like. According to one or more aspects of the present disclosure, processing device 902 can be configured to execute instructions implementing the example process 700 for mitigating wafer deformation using cylindrical decomposition.

[0090] The example computer system 900 may further include a network interface device 908, which may be communicatively coupled to a network 920. The example computer system 900 may further include a video display 910 (e.g., a liquid crystal display (LCD), a touch screen, or a cathode ray tube (CRT)), an alphanumeric input device 912 (e.g., a keyboard), a cursor control device 914 (e.g., a mouse), and an acoustic signal generating device 916 (e.g., a speaker).

[0091] The data storage device 918 may include a computer-readable storage medium (or more specifically, a non-transitory computer-readable storage medium) 924 on which is stored one or more sets of executable instructions 922. The executable instructions 922 may include executable instructions for performing the example process 700 for mitigating wafer deformation using cylindrical decomposition, in accordance with one or more aspects of the present disclosure.

[0092] The executable instructions 922 may also reside, completely or at least partially, within the main memory 904 and / or within the processing device 902 during execution of such instructions by the example computer system 900, the main memory 904 and the processing device 902 also constituting computer-readable storage media. The executable instructions 922 may further be transmitted or received over a network via the network interface device 908.

[0093] Although Figure 9While computer-readable storage medium 924 is shown as a single medium, the term "computer-readable storage medium" should also be considered to include a single medium or multiple media (e.g., a centralized or distributed database and / or associated caches and servers) that store one or more sets of operating instructions. The term "computer-readable storage medium" should also be considered to include any medium that can store or encode a set of instructions for execution by a machine, causing the machine to perform any one or more of the methods described herein. Thus, the term "computer-readable storage medium" should be considered to include (but not be limited to) solid-state memory and optical and magnetic media.

[0094] Some portions of the foregoing detailed description are presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. An algorithm is herein, and generally, considered to be a self-consistent sequence of steps leading to a desired result. These steps are those requiring physical manipulation of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It proves convenient at times, primarily for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like.

[0095] It should be remembered, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise, it will be understood from the following discussion that discussions throughout the description utilizing terms such as "identify," "determine," "store," "adjust," "result in," "return," "compare," "create," "stop," "load," "copy," "throwing," "replace," "execute," or similar terms refer to actions and processes of a computer system or similar electronic computing device that manipulate and transform data represented as physical (electronic) quantities within the computer system's caches and memory into other data similarly represented as physical quantities within the computer system's memory or caches or other such information storage, transmission, or display devices.

[0096] Examples of the present disclosure also relate to an apparatus for performing the methods described herein. This apparatus may be specially constructed for the desired purpose, or it may be a general-purpose computer system selectively programmed by a computer program stored in the computer system. This computer program may be stored in a computer-readable storage medium, such as, but not limited to, any type of disk (including optical disks, CD-ROMs, and magneto-optical disks), read-only memory (ROM), random access memory (RAM), EPROM, EEPROM, magnetic disk storage media, optical storage media, flash memory elements, other types of machine-accessible storage media, or any type of medium suitable for storing electronic instructions, each of which is coupled to a computer system bus.

[0097] The methods and displays presented herein are not inherently related to any particular computer or other device. Various general-purpose systems may be used with the programs taught herein, or it may prove convenient to construct a more specialized device to perform the required method steps. The structures required for various such systems will appear in the following description. Furthermore, the scope of this disclosure is not limited to any particular programming language. It will be understood that various programming languages ​​may be used to implement the teachings of this disclosure.

[0098] It is to be understood that the above description is intended to be illustrative and not restrictive. Many other examples of implementations will be apparent to those skilled in the art upon reading and understanding the above description. Although this disclosure describes specific examples, it will be appreciated that the systems and methods of the present disclosure are not limited to the examples described herein, but may be practiced with modification within the scope of the appended claims. Accordingly, the specification and drawings should be viewed in an illustrative and not a restrictive sense. The scope of the present disclosure should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

Claims

1. A method for correcting out-of-plane deformation (OPD) of a substrate, the method comprising: obtaining an OPD profile of the substrate using optical inspection data; obtaining a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding one of a plurality of elemental deformed shapes of the substrate; identifying one or more cylindrical decompositions of a quadratic portion of the OPD profile based on at least a subset of the plurality of polynomial coefficients, wherein each of the one or more cylindrical decompositions comprises decomposing the OPD profile into at least a parabolic deformation of the substrate and a cylindrical deformation of the substrate; calculating one or more properties of a stress compensating layer (SCL) for the substrate using a selected cylindrical decomposition of the one or more cylindrical decompositions; depositing the SCL on the substrate; as well as The SCL is exposed to a stress-relief beam.

2. The method of claim 1, wherein the polynomial representation of the OPD profile comprises an expansion of the OPD profile by Zernike polynomials.

3. The method of claim 1 , wherein the one or more cylindrical decompositions comprise: a first cylindrical decomposition comprising an upward cylindrical contribution to the OPD of the substrate; as well as A second cylindrical decomposition includes a downward cylindrical contribution to the OPD of the substrate.

4. The method of claim 3, wherein the selected cylindrical decomposition comprises a parabolic contribution to the OPD of the substrate, the parabolic contribution having a lower magnitude among the parabolic contributions to the OPD of the one or more cylindrical decompositions. The method of claim 3 , wherein the selected cylindrical decomposition is associated with a patterning direction of the substrate. 6 . The method of claim 1 , wherein the one or more characteristics of the SCL are calculated so that stress in the substrate has the same sign throughout the entire area of ​​the substrate.

7. The method of claim 1 , wherein the one or more characteristics of the SCL include one or more of the following: the material of the SCL; or The thickness of the SCL.

8. The method of claim 1 , wherein the setting of the stress mitigation beam comprises one or more of: the particle type of the stress mitigation beam; the energy of the particles of the stress mitigation beam; or An angle of incidence of the particles of the stress mitigation beam on the SCL.

9. The method of claim 1, further comprising: obtaining an updated OPD profile of the substrate in response to exposing the SCL to the stress mitigating beam; mapping residual stress in the substrate based on the updated OPD profile; identifying a setting of additional stress mitigating beams based on the mapped residual stresses; as well as One or more regions of the SCL are exposed to the additional stress mitigating beam.

10. The method of claim 1, wherein the substrate comprises a front side and a back side, wherein the front side comprises one or more fabricated features, and wherein the SCL is deposited on the back side of the substrate.

11. A system, comprising: Memory; as well as a processing device, the processing device being communicatively coupled to the memory, the processing device being configured to: Obtaining an OPD profile of the substrate using optical inspection data; obtaining a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding one of a plurality of elemental deformed shapes of the substrate; identifying one or more cylindrical decompositions of a quadratic portion of the OPD profile based on at least a subset of the plurality of polynomial coefficients, wherein each of the one or more cylindrical decompositions comprises decomposing the OPD profile into at least a parabolic deformation of the substrate and a cylindrical deformation of the substrate; calculating one or more properties of a stress compensating layer (SCL) for the substrate using a selected cylindrical decomposition of the one or more cylindrical decompositions; depositing the SCL on the substrate; as well as The SCL is exposed to a stress mitigating beam.

12. The system of claim 11, wherein the polynomial representation of the OPD profile comprises an expansion of the OPD profile by Zernike polynomials.

13. The system of claim 11, wherein the one or more cylindrical decompositions comprise: a first cylindrical decomposition comprising an upward cylindrical contribution to the OPD of the substrate; as well as A second cylindrical decomposition includes a downward cylindrical contribution to the OPD of the substrate.

14. The system of claim 13, wherein the selected cylindrical decomposition includes a parabolic contribution to the OPD of the substrate, the parabolic contribution having a lower magnitude among the parabolic contributions to the OPD of the one or more cylindrical decompositions.

15. The system of claim 13, wherein the selected cylindrical decomposition is associated with a patterning direction of the substrate.

16. The system of claim 11, wherein the one or more characteristics of the SCL are calculated so that stress in the substrate has the same sign throughout the entire area of ​​the substrate.

17. The system of claim 11, wherein the one or more characteristics of the SCL include one or more of the following: the material of the SCL; or the thickness of the SCL; and The stress relief beam settings include one or more of the following: the particle type of the stress mitigation beam; the energy of the particles of the stress mitigation beam; or An angle of incidence of the particles of the stress mitigation beam on the SCL.

18. The system of claim 11, wherein the processing device is further configured to: obtaining an updated OPD profile of the substrate in response to exposing the SCL to the stress mitigating beam; mapping residual stress in the substrate based on the updated OPD profile; identifying a setting of additional stress mitigating beams based on the mapped residual stresses; as well as One or more regions of the SCL are exposed to the additional stress mitigating beam.

19. The system of claim 11, wherein the substrate comprises a front side and a back side, wherein the front side comprises one or more fabricated features, and wherein the SCL is deposited on the back side of the substrate.

20. A semiconductor manufacturing system, comprising: one or more processing chambers for processing a substrate; as well as A computing device configured to: obtaining an OPD profile of the substrate using optical inspection data; obtaining a polynomial representation of the OPD profile to determine a plurality of polynomial coefficients, each of the plurality of polynomial coefficients characterizing a corresponding one of a plurality of elemental deformed shapes of the substrate; identifying one or more cylindrical decompositions of a quadratic portion of the OPD profile based on at least a subset of the plurality of polynomial coefficients, wherein each of the one or more cylindrical decompositions comprises decomposing the OPD profile into at least a parabolic deformation of the substrate and a cylindrical deformation of the substrate; calculating one or more properties of a stress compensating layer (SCL) for the substrate using a selected cylindrical decomposition of the one or more cylindrical decompositions; depositing the SCL on the substrate; as well as The SCL is exposed to a stress mitigating beam.

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