A method of fabricating a probe tip of a probe card

Abstract

The application belongs to the field of semiconductor, and discloses a manufacturing method of a probe tip of a probe card, which improves the adhesion of a rhodium layer on the probe tip and prolongs the service life of the probe. The method comprises the following steps: step 10, forming a seed layer on the surface of a wafer with a deposited oxide film by using a sputtering process; the wafer has a probe tip area; step 20, spin-coating photoresist on the seed layer to form a photoresist layer; step 30, performing selective exposure on the probe tip area by using a mask on the photoresist layer to form a to-be-plated area on the probe tip area; step 40, performing pre-plating treatment on the wafer after step 30; step 50, plating a rhodium layer on the to-be-plated area of the wafer after step 40; step 60, depositing a nickel layer on the rhodium layer by using a plating process; and step 70, performing plating on the nickel layer by using a plating process to form a probe tip in the to-be-plated area.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor, in particular to a manufacturing method of probe tip of probe card. BACKGROUND

[0002] In the field of probe card manufacturing, the existing technology generally uses a post-plated rhodium layer process to manufacture the probe tip of the probe card. The method specifically includes: Step 1, wafer etching: forming a fine structure of the probe tip of the probe card through a photolithography and etching process; Step 2, main body area processing: completing the processing of the main body structure of the probe, that is, filling the required elements (nickel, copper or other alloys) in the etching area; Step 3, separately plating a rhodium layer: after the processing of the main body of the probe is completed, the probe is taken out; and a rhodium layer is plated on the probe tip by using an electroplating process. The method places the step of plating the rhodium layer after the step of processing the main body, relies on multiple equipment switching, and realizes the plating of the rhodium layer on the probe tip. The method has the following disadvantages:

[0003] (1) Poor adhesion of the rhodium layer, resulting in poor durability of the probe: in the traditional process, after the tip area of the probe card is formed, the rhodium layer is plated separately. At this time, the surface of the probe may be oxidized or contaminated due to exposure to subsequent processing or the environment, resulting in a decrease in the bonding force of the rhodium layer, easy separation or delamination, and thus a decrease in the wear resistance and service life of the probe.

[0004] (2) Complex process flow and high cost: the existing technology needs to disassemble the probe card for electroplating treatment, which increases the links of equipment switching, manual operation and secondary fixing, resulting in a prolonged production cycle, waste of resources, and inability to directly repair or reuse the installed probe card, thus resulting in a high maintenance cost.

[0005] (3) Post-plating leading to uneven thickness of the probe: since the rhodium layer is plated after the other areas of the probe have been formed, the plating of the rhodium layer will result in the tip area of the probe being thicker than other areas. This will cause the plating layer to shift or even be damaged due to continuous contact with the measured part during use of the probe.

[0006] The existing post-plating process can achieve basic functions, but it has significant defects in plating layer quality, process flow efficiency and long-term reliability. SUMMARY

[0007] The technical problem to be solved by the present application is to provide a manufacturing method of probe tip of probe card, improve the adhesion of the rhodium layer on the probe tip, simplify the process, and prolong the service life of the probe.

[0008] To solve the above technical problems, the present application adopts the following technical solutions:

[0009] A manufacturing method of probe tip of probe card, comprising:

[0010] Step 10, forming a seed layer on the wafer surface on which the oxide film has been deposited by using a sputtering process; the wafer has a probe tip area; the seed layer comprises a titanium layer and a first copper layer;

[0011] Step 20, spin-coating photoresist on the seed layer to form a photoresist layer; the photoresist layer covers the entire seed layer;

[0012] Step 30, performing selective exposure on the probe tip area by using a mask on the photoresist layer to form a to-be-plated area on the probe tip area;

[0013] Step 40, performing pre-plating treatment on the wafer processed in Step 30;

[0014] Step 50, plating rhodium on the to-be-plated area of the wafer processed in Step 40;

[0015] Step 60, depositing a nickel layer on the rhodium layer by using a plating process;

[0016] Step 70, performing plating on the nickel layer by using a plating process to form a probe tip in the to-be-plated area.

[0017] As a preferred example, Step 10 specifically comprises: forming a titanium layer on the wafer surface on which the oxide film has been deposited by using a sputtering process in a vacuum environment; forming a first copper layer on the titanium layer by using a sputtering process in a vacuum environment; the probe tip area is in the form of a bump.

[0018] As a preferred example, in Step 20, the photoresist is spin-coated at a speed of 3000 rpm.

[0019] As a preferred example, in Step 30, performing selective exposure on the probe tip area by using a mask on the photoresist layer comprises:

[0020] selecting a positive photoresist, exposing the probe tip area, dissolving the exposed area in a developing solution, and retaining the unexposed area; or,

[0021] selecting a negative photoresist, exposing an area other than the probe tip area, dissolving the unexposed area in a developing solution, and retaining the exposed area.

[0022] As a preferred example, Step 40 specifically comprises:

[0023] Step 401, immersing the wafer processed in Step 30 in a dilute sulfuric acid solution to dissolve impurities and trace oxides on the wafer surface and expose the surface of the first copper layer;

[0024] Step 402, performing immersion cleaning on the wafer processed in Step 401 by using a rapid drainage rinsing method.

[0025] As a preferred example, the step 50 specifically comprises: placing the wafer processed in the step 40 into an electroplating tank to electroplate a rhodium layer on the surface of the first copper layer outside the photoresist layer region on the wafer upper surface.

[0026] As a preferred example, in the step 50, the thickness of the rhodium layer is 10±1 μm.

[0027] As a preferred example, in the step 60, the thickness of the nickel layer is 0.1-0.2 μm.

[0028] As a preferred example, the step 70 comprises:

[0029] Step 701: placing the wafer processed in the step 60 into an electroplating tank to electroplate a second copper layer above the nickel layer;

[0030] Step 702: placing the wafer processed in the step 701 into an electroplating tank to electroplate a nickel-cobalt alloy layer above the second copper layer.

[0031] As a preferred example, in the step 701, the electroplating solution in the electroplating tank is a copper-containing electroplating solution, and the temperature of the electroplating solution is maintained at 40±2 ℃; in the step 702, the electroplating solution in the electroplating tank is a nickel-cobalt-containing electroplating solution, and the temperature of the electroplating solution is maintained at 40±2 ℃; and the total thickness of the second copper layer and the nickel-cobalt alloy layer is 50-100 μm.

[0032] Compared with the prior art, the probe tip manufacturing method of the probe card improves the adhesion of the rhodium layer on the probe tip, simplifies the process, and prolongs the service life of the probe. The probe tip manufacturing method of the probe card comprises the following steps: step 10, forming a seed layer on the upper surface of a wafer on which an oxide film has been deposited by using a sputtering process; the wafer has a probe tip region; the seed layer comprises a titanium layer and a first copper layer; step 20, spin-coating photoresist on the seed layer to form a photoresist layer; the photoresist layer covers the entire seed layer; step 30, selectively exposing the probe tip region by a mask on the photoresist layer to form a to-be-electroplated region in the probe tip region; step 40, performing pre-electroplating treatment on the wafer processed in the step 30; step 50, electroplating a rhodium layer on the to-be-electroplated region of the wafer processed in the step 40; step 60, depositing a nickel layer on the rhodium layer by using an electroplating process; and step 70, electroplating on the nickel layer by using an electroplating process to form a probe tip in the to-be-electroplated region. The manufacturing method moves the electroplating of the rhodium layer from the traditional post-process (after the main body of the probe is formed) to the first step after etching, realizes a new process chain of etching-rhodium plating-main body forming, avoids surface contamination and oxidation of the probe tip during handling and processing, improves the adhesion of the rhodium layer on the probe tip, simplifies the process, and prolongs the service life of the probe. BRIEF DESCRIPTION OF DRAWINGS

[0033] Figure 1 1 is a schematic diagram of the wafer structure corresponding to step 10 in an embodiment of the present invention;

[0034] Figure 2 20 is a schematic diagram of the wafer structure corresponding to step 20 in an embodiment of the present invention;

[0035] Figure 3 3 is a schematic diagram of the wafer structure corresponding to step 30 in an embodiment of the present invention;

[0036] Figure 4 40 is a schematic diagram of the wafer structure corresponding to step 40 in an embodiment of the present invention;

[0037] Figure 5 2 is a schematic diagram of the wafer structure corresponding to step 50 in an embodiment of the present invention;

[0038] Figure 6 60 is a schematic diagram of the wafer structure corresponding to step 60 in an embodiment of the present invention;

[0039] Figure 7 701 is a schematic diagram of the wafer structure corresponding to step 701 in an embodiment of the present invention;

[0040] Figure 8 702 is a schematic diagram of the wafer structure corresponding to step 702 in an embodiment of the present invention.

[0041] The figure shows: wafer 1, probe tip area 102, oxide film 101, titanium layer 2, first copper layer 3, photoresist layer 4, rhodium layer 5, nickel layer 6, probe tip 7, second copper layer 8, and nickel-cobalt alloy layer 9. DETAILED DESCRIPTION

[0042] The technical solution of the present invention is described in detail below with reference to the accompanying drawings.

[0043] A method for manufacturing a probe tip of a probe card according to an embodiment of the present invention includes:

[0044] Step 10: Figure 1 As shown, a sputtering process is used to form a seed layer on the upper surface of a wafer 1 on which an oxide film 101 (silicon oxide) has been deposited; the wafer 1 has a probe tip area 102; and the seed layer includes a titanium layer 2 and a first copper layer 3.

[0045] Step 10 specifically includes: forming a titanium layer 2 on the upper surface of the wafer 1 on which the oxide film 101 has been deposited by using a sputtering process in a vacuum environment; and forming a first copper layer 3 on the titanium layer 2 by using a sputtering process in a vacuum environment.

[0046] In the above process, the wafer 1 surface is pre-deposited with an oxide film 101, such as a silicon oxide layer. Pre-deposition of the oxide film protects the silicon surface from damage and provides a flat starting surface for subsequent processing. Prior to step 10, for the wafer 1 with the pre-deposited oxide film 101, a dry etching process is used to etch the probe tip region 102 on the wafer 1. The probe tip region 102 is in a stepped shape, which facilitates the final production of the probe tip. The wafer 1 has the probe tip region 102. The method of the present application fills the probe tip region 102 with a material to produce the probe tip 7 of the probe. The probe tip region 102 is in a bump shape. After the probe tip 7 is produced using the method of the present embodiment, the probe tip 7 protrudes outward relative to the probe body. In operation, the probe tip 7 contacts the device under test.

[0047] A sputtering process is used to form a titanium layer 2 on the surface of the wafer 1 with the pre-deposited oxide film 101. The titanium layer 2 is used to enhance the adhesion of the material and improve the bonding strength between the two layers adjacent to the titanium layer 2 to prevent the film from falling off. For example, after a titanium layer is deposited at the interface between the copper layer and the silicon oxide layer, the adhesion performance of the copper layer and the silicon oxide layer can be significantly improved. A sputtering process is used to form a first copper layer 3 above the titanium layer 2.

[0048] In step 10, a seed layer, i.e., the titanium layer 2 and the first copper layer 3, is formed on the surface of the wafer 1 with the pre-deposited oxide film 101. The seed layer forms a layer of conductive material on the surface of the substrate by physical methods, so that the copper ions can be uniformly deposited when electroplating copper, avoiding local poor conductivity caused by the roughness or impurities of the substrate surface.

[0049] Step 20, as shown in Figure 2 , a photoresist layer 4 is spin-coated above the seed layer; the photoresist layer 4 covers the entire seed layer.

[0050] Preferably, in step 20, the photoresist is spin-coated at a speed of 3000 rpm. Of course, a person skilled in the art can also choose other spin speeds to spin-coat the photoresist. The photoresist layer 4 covers the entire seed layer. This lays the foundation for selecting the area exposure and forming the to-be-plated area in the probe tip region in subsequent steps.

[0051] Step 30, as shown in Figure 3 , the probe tip region 102 is selectively exposed above the photoresist layer 4 through a mask to form a to-be-plated area in the probe tip region.

[0052] In step 30, the probe tip region 102 is selectively exposed through a mask above the photoresist layer 4. Depending on the type of photoresist, the probe tip region 102 is exposed or the region other than the probe tip region 102 is exposed. Two different methods can be used. One method is to select a positive photoresist, expose the probe tip region 102, and dissolve the exposed region in a developer to retain the unexposed region. After exposure, molecular chain breakage occurs, the exposed region is more easily dissolved in the developer, and the unexposed region is finally retained. Another method is to select a negative photoresist: expose the region other than the probe tip region 102, and the exposed region is not dissolved in the developer, and the unexposed region is dissolved in the developer. After exposure, cross-linking reaction occurs, the exposed region is not dissolved in the developer, and the unexposed region is removed during development.

[0053] In step 30, the to-be-plated region not only includes the probe tip region, but also includes the adjacent outer region. These adjacent outer regions can be made into a probe body. The probe body is integrated with the probe tip.

[0054] Step 40, as shown in Figure 4 , the wafer treated in step 30 is subjected to pre-plating treatment. Preferably, step 40 specifically includes:

[0055] Step 401, the wafer 1 treated in step 30 is immersed in a dilute sulfuric acid solution to dissolve impurities and trace oxides on the wafer surface, and expose the surface of the first copper layer. Preferably, the mass concentration of the dilute sulfuric acid solution is 5%. The wafer is immersed in the dilute sulfuric acid solution for 2 minutes. By dissolving the impurities and trace oxides on the wafer surface with the dilute sulfuric acid solution, the surface of the first copper layer 3 is exposed, and the density of the active sites for plating is improved. Removing copper oxide and impurities on the wafer surface reduces adverse factors affecting the plating effect. Step 401 realizes wafer surface activation.

[0056] Step 402, the wafer treated in step 401 is subjected to immersion cleaning by using a quick drainage rinsing method. The residual dilute sulfuric acid solution is removed by using a quick drainage rinsing (QDR) method to avoid contamination of the plating solution.

[0057] Through the treatment of step 40, the wafer surface is kept clean and free of impurities. If there are impurities on the wafer surface, impurities will be present between the plating layer and the wafer in subsequent step 50, reducing the adhesion between the two.

[0058] Step 50, as shown in Figure 5 , the wafer treated in step 40 is plated with a rhodium layer 5 in the to-be-plated region.

[0059] Preferably, the step 50 specifically includes: placing the wafer 1 processed in step 40 in an electroplating tank, and electroplating a rhodium layer 5 on the surface of the first copper layer 3 outside the photoresist layer 4 area on the upper surface of the wafer 1. In the electroplating tank, the electroplating solution is an electroplating solution containing rhodium. The temperature of the electroplating solution is 40±2°C to avoid high temperature causing decomposition of additives or low temperature causing brittleness of the coating. As an example, the mass concentration of rhodium in the electroplating solution is 5g / L. Pulsed current is used to effectively suppress concentration polarization and improve the uniformity of the rhodium layer. The pulse current parameter is 1Asd. The electroplating time is 30 minutes. The electroplating solution temperature is 40°C.

[0060] In step 50, the rhodium layer 5 is electroplated in the area to be electroplated to a thickness of 10 ± 1 μm. This thickness range can improve the surface strength and durability of the probe. The rhodium layer 5 is electroplated on the surface of the first copper layer 3. Metals can only electroplating react with metals.

[0061] Step 60: Figure 6 As shown, a nickel layer 6 is deposited on the rhodium layer 5 by using an electroplating process.

[0062] The wafer processed in step 50 is placed in an electroplating tank, and the current density and electroplating time are controlled to deposit a nickel layer 6 on top of the rhodium layer 5. In the electroplating tank, the electroplating solution is a nickel-containing electroplating solution. The electroplating solution temperature is 40±2°C. As an example, the mass concentration of nickel in the electroplating solution is 100g / L. The electroplating time is 1 to 2 minutes. The electroplating solution temperature is 40°C. In step 60, the thickness of the nickel layer 6 is 0.1 to 0.2μm. The thickness of the nickel layer 6 is less than that of the rhodium layer 5. The nickel layer 6 is used to fill the microscopic hole defects on the surface of the rhodium layer 5. Filling the microscopic hole defects on the surface of the rhodium layer 5 with the nickel layer 6 can firstly improve reliability: reduce structural instability and signal transmission loss caused by holes; secondly, enhance conductivity: nickel has high conductivity, which can ensure good electrical connection between the filled area and the surrounding metal layer; thirdly, ensure process accuracy: the filling thickness and uniformity can be precisely controlled to avoid local stress concentration or structural deformation caused by residual holes.

[0063] The nickel layer 6 also serves as a transition layer for subsequent electroplated layers (such as gold or copper), alleviating the problem of weak adhesion when plating other metals on the rhodium layer. In other words, the nickel layer 6, acting as an intermediate layer between the rhodium layer 5 and other electroplated layers, strengthens the adhesion between the rhodium layer and other electroplated layers, preventing other layers from being directly electroplated on the surface of the rhodium layer 5, which could easily cause the two layers to fall off.

[0064] After the electroplating in step 60 , the nickel layer 6 enhances the interlayer bonding strength, significantly reducing the risk of delamination during the operation of the probe.

[0065] Step 70 : Electroplating is performed on the nickel layer 6 using an electroplating process to form a probe tip 7 in the area to be electroplated.

[0066] Preferably, the step 70 comprises:

[0067] Step 701, as shown in the figure, the wafer 1 processed in step 60 is placed in an electroplating tank to form a second copper layer 8 on the nickel layer 6 by electroplating. Figure 7

[0068] The wafer processed in step 60 is placed in an electroplating tank to deposit copper on the nickel layer 6, forming a second copper layer 8, by controlling the current density and the electroplating time. In the electroplating tank, the electroplating solution is a copper-containing electroplating solution. The temperature of the electroplating solution is 40±2℃. As an example, the mass concentration of copper in the electroplating solution is 80g / L. The electroplating time is 5 hours. The temperature of the electroplating solution is 38℃. In step 701, the thickness of the second copper layer 8 is 50um. The purity of the second copper layer 8 is ≥99.99%, which is high-conductivity copper.

[0069] Step 702, as shown in the figure, the wafer 1 processed in step 701 is placed in an electroplating tank to form a nickel-cobalt alloy layer 9 on the second copper layer 8 by electroplating. Figure 8

[0070] The wafer 1 processed in step 701 is placed in an electroplating tank to deposit nickel and cobalt on the second copper layer 8, forming a nickel-cobalt alloy layer 9, by controlling the current density and the electroplating time. In the electroplating tank, the electroplating solution is a nickel-cobalt-containing electroplating solution. The temperature of the electroplating solution is 40±2℃. As an example, the mass concentration of nickel in the electroplating solution is 100g / L. The mass concentration of cobalt is 25g / L. The electroplating time is 5 hours. The temperature of the electroplating solution is 42℃. In step 702, the total thickness of the second copper layer 8 and the nickel-cobalt alloy layer 9 is 50-100um. In the nickel-cobalt alloy layer 9, the mass percentage of nickel is 80%, and the mass percentage of cobalt is 20%. The second copper layer 8 and the nickel-cobalt alloy layer 9 fill the area to be electroplated, and have both electrical conductivity and mechanical strength. The second copper layer 8 and the nickel-cobalt alloy layer 9 form an outwardly convex structure as a whole, realizing a structure of dense high-conductivity copper at the bottom and high-strength nickel-cobalt alloy at the top, and improving the anti-fatigue performance of the probe tip.

[0071] The manufacturing method of the embodiment builds a gradient structure of "Ti / Cu seed layer-rhodium layer-nickel layer-main functional layer (second copper layer and nickel-cobalt alloy layer)", which fully utilizes the complementary characteristics of each layer of materials to improve the service life of the probe. Among them, the titanium layer 2 has high adhesion, providing a good foundation for subsequent metal deposition. The first copper layer 3 has a low-resistance conductive path, optimizing current distribution. The rhodium layer 5 has a super-high hardness (1000HV), a wear-resistant and anti-oxidation core functional layer. The nickel layer 6 is a nanocrystalline transition layer, which optimizes the poor bonding of the rhodium layer 5 and other metal layers. The second copper layer 8 and the nickel-cobalt alloy layer 9 are the main structure layer, which takes into account both electrical conductivity and mechanical strength.

[0072] ​​In the traditional process, the rhodium layer is electroplated after the probe body is formed, which can cause the rhodium layer to easily fall off from the probe tip, and increase the device switching, manual operation and secondary fixation, etc., resulting in the extension of the production cycle, the waste of resources, the inability to directly repair or reuse the installed probe card, and the high maintenance cost.

[0073] The manufacturing method of the embodiment advances the rhodium layer electroplating from the traditional post-process (after the probe body is formed) to the first step after etching, realizes a new process chain of etching-rhodium plating-probe body forming, and avoids the surface pollution and oxidation of the probe tip during the handling and processing.

[0074] The manufacturing method of the embodiment preferentially plates the rhodium layer after etching, and then manufactures the probe tip body. Through the process chain reconstruction, the process cycle is shortened, the probe structure is optimized, and the problems of weak adhesion of the probe plating layer and short service life are systematically solved.

[0075] The above shows and describes the basic principles, main features and advantages of the present application. Those skilled in the art should understand that the present application is not limited by the above specific embodiments. The above specific embodiments and the description in the specification are only to further illustrate the principles of the present application. Without departing from the spirit and scope of the present application, various changes and improvements can be made to the present application. These changes and improvements all fall within the scope of the claimed present application.

Claims

1. A method for manufacturing a probe tip of a probe card, characterized in that: The method comprises: Step 10: forming a seed layer on the upper surface of a wafer (1) on which an oxide film (101) has been deposited by a sputtering process; the wafer has a probe tip region (102); the seed layer includes a titanium layer (2) and a first copper layer (3); Step 20: Spin-coating a photoresist on the seed layer to form a photoresist layer (4); the photoresist layer (4) covers the entire seed layer; Step 30: selectively exposing the probe tip region (102) above the photoresist layer (4) through a mask to form a region to be electroplated in the probe tip region; Step 40, performing pre-plating treatment on the wafer processed in step 30; Step 50, electroplating a rhodium layer (5) on the wafer processed in step 40 in the area to be electroplated; Step 60: depositing a nickel layer (6) on the rhodium layer (5) using an electroplating process; Step 70: Using an electroplating process, electroplating is performed on the nickel layer (6) to form a probe tip (7) in the area to be electroplated.

2. The method for manufacturing a probe tip of a probe card according to claim 1, wherein: The step 10 specifically includes: In a vacuum environment, a titanium layer (2) is formed on the upper surface of a wafer (1) on which an oxide film (101) has been deposited, using a sputtering process; In a vacuum environment, a sputtering process is used to form a first copper layer (3) on the titanium layer (2); The probe tip area (102) is in the shape of a convex point.

3. The method for manufacturing a probe tip of a probe card according to claim 1, wherein: In the step 20, the photoresist is spin-coated at a rotation speed of 3000 rpm.

4. The method for manufacturing a probe tip of a probe card according to claim 1, wherein: In the step 30, selectively exposing the probe tip region (102) above the photoresist layer (4) through a mask comprises: Selecting a positive photoresist, exposing the probe tip area (102), dissolving the exposed area in a developer, and retaining the unexposed area; or, A negative photoresist is selected to expose the area outside the probe tip area (102), wherein the exposed area is insoluble in the developer and the unexposed area is soluble in the developer.

5. The method for manufacturing a probe tip of a probe card according to claim 1, wherein: The step 40 specifically includes: Step 401: Immerse the wafer (1) processed in step 30 in a dilute sulfuric acid solution to dissolve impurities and trace oxides on the surface of the wafer, exposing the surface of the first copper layer (3); Step 402: Use a rapid drainage rinse method to soak and clean the wafer (1) processed in step 401.

6. The method for manufacturing a probe tip of a probe card according to claim 1, wherein: The step 50 specifically includes: The wafer (1) processed in step 40 is placed in an electroplating tank, and a rhodium layer (5) is formed by electroplating on the surface of the first copper layer (3) outside the photoresist layer (4) area on the upper surface of the wafer (1).

7. The method for manufacturing a probe tip of a probe card according to claim 6, wherein: In the step 50, the thickness of the rhodium layer (5) is 10±1 μm.

8. The method for manufacturing a probe tip of a probe card according to claim 1, wherein: In step 60, the nickel layer (6) has a thickness of 0.1 to 0.2 μm.

9. The method for manufacturing a probe tip of a probe card according to claim 1, wherein: The step 70 includes: Step 701: placing the wafer (1) processed in step 60 in an electroplating tank, and electroplating a second copper layer (8) on the nickel layer (6); Step 702: Place the wafer processed in step 701 in an electroplating tank, and electroplate a nickel-cobalt alloy layer (9) on top of the second copper layer (8).

10. The method for manufacturing a probe tip of a probe card according to claim 9, wherein: In step 701, the electroplating solution in the electroplating tank is a copper-containing electroplating solution, and the temperature of the electroplating solution is maintained at 40±2° C.; In step 702, the electroplating solution in the electroplating tank contains nickel and cobalt; the temperature of the electroplating solution is 40±2°C; The total thickness of the second copper layer (8) and the nickel-cobalt alloy layer (9) is 50-100 μm.

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