Printed circuit board and preparation method thereof
By filling the through holes of the printed circuit board with filler and performing drilling and metallization treatment, interconnected blind vias are formed, which solves the preparation difficulty problem caused by the increase in the number of PCB layers, improves signal integrity and processing efficiency, and meets the needs of high-frequency and high-speed products.
Patent Information
- Application Number
- CN202510804611.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-16
- Publication Date
- 2025-09-16
AI Technical Summary
The increase in the number of printed circuit board (PCB) layers makes it difficult to prepare interconnect blind vias, especially the backdrilling stub control, which affects signal integrity.
In the preparation process of printed circuit boards, after filling the through-hole with filler, drilling is performed from one side to form a stage hole, and metallization treatment is performed. After removing the filler, interconnection blind holes are formed, avoiding back drilling processing and using front drilling to prepare interconnection blind holes.
It improves the impact of poor backdrill stub control on signal integrity, improves the accuracy, reliability and stability of interconnected blind vias, meets the needs of high-frequency and high-speed products, reduces processing difficulty, and improves the processing efficiency of printed circuit boards.
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Figure CN120659237A_ABST
Abstract
Description
Technical Field
[0001] The present invention is applied to the technical field of printed circuit boards, in particular to a printed circuit board and a preparation method thereof. Background Art
[0002] In the rapid development of contemporary electronic manufacturing, as data transmission rates increase, the number of layers in printed circuit boards (PCBs) continues to increase to meet the needs of complex circuit design and high-speed signal transmission.
[0003] However, the increasing number of PCB layers also presents significant challenges for backdrilling interconnect blind vias. Backdrilling technology aims to eliminate unwanted signal reflection paths during signal transmission. However, as the number of PCB layers increases, board thickness fluctuations also increase, making backdrill depth control more difficult. For example, on a 40-layer board with L1-5 interconnects, backdrilling from L40 to L5 is required. Controlling backdrill stubs (copper pillars remaining in the vias after backdrilling) becomes increasingly difficult.
[0004] An excessively long stub can cause signal reflection and interference, severely impacting the integrity of high-speed signals. Summary of the Invention
[0005] The present invention provides a printed circuit board and a preparation method thereof, so as to solve the problem of difficulty in preparing interconnection blind vias caused by an increase in the number of layers of the printed circuit board.
[0006] In order to solve the above technical problems, the present invention provides a method for preparing a printed circuit board, comprising: obtaining a processing board, on which at least one first through hole is formed, and the first through hole is filled with a filler; drilling from one side of the first through hole to prepare a stage hole in the first through hole, and removing the filler corresponding to the stage hole; metallizing the first through hole to form a conductive layer on the inner wall of the stage hole; removing the remaining filler in the first through hole, and forming the stage hole into an interconnected blind hole to obtain a printed circuit board.
[0007] Wherein, drilling is performed from one side of the first through hole to prepare a stage hole in the first through hole, which includes: drilling the filler in each first through hole respectively to prepare a second through hole corresponding to the filler; wherein the second through hole is concentrically arranged with the first through hole, and the aperture of the second through hole is smaller than the aperture of the first through hole.
[0008] The first through hole is metallized to form a conductive layer on the inner wall of the stage hole, including: electroplating the first through hole with electroplating solution, and forming a circulation path of the electroplating solution through the second through hole to form a conductive layer on the inner wall of the exposed stage hole.
[0009] The diameter difference between the second through hole and the first through hole is in the range of 1-2 mil.
[0010] Among them, obtaining the processed plate includes: obtaining the processed plate, preparing at least one first through hole on the processed plate; plugging each first through hole until it is filled with filler; wherein the filler includes ink, peelable glue, hot melt glue or paraffin.
[0011] Wherein, drilling is performed from one side of the first through hole to prepare a stage hole in the first through hole, and the filler corresponding to the stage hole is removed, including: based on the number of connection layers required for the interconnected blind hole, drilling is performed from one side of the first through hole to prepare a stage hole in the first through hole, and the filler corresponding to the stage hole is removed; wherein the aperture of the stage hole matches the aperture of the interconnected blind hole.
[0012] Among them, removing the remaining filler in the first through hole and forming the stage hole into an interconnected blind hole includes: removing the remaining filler, electroplating and thickening the conductive layer on the inner wall of the stage hole until a preset thickness is met; plugging the first through hole with resin and filling the first through hole to obtain an interconnected blind hole.
[0013] Among them, the remaining filler in the first through hole is removed, and the stage holes are formed into interconnected blind holes to obtain a printed circuit board, which also includes: preparing outer conductive circuits on opposite sides of the processed board; and performing solder mask treatment on the outer conductive circuit to obtain a printed circuit board.
[0014] The aperture of the first through hole is smaller than the aperture of the interconnected blind hole, and the aperture difference is at least 3 mil.
[0015] To solve the above technical problems, the present invention provides a printed circuit board, which is prepared by any of the above-mentioned printed circuit board preparation methods, and has at least one conductive hole formed on the printed circuit board; the conductive hole includes a first-stage hole and a second-stage hole, a conductive layer is formed on the inside of the first-stage hole, and the aperture of the first-stage hole is larger than the aperture of the second-stage hole.
[0016] To solve the above technical problems, the method for preparing a printed circuit board of the present invention comprises the following steps: obtaining a processing board, on which at least one first through hole is formed, and the first through hole is filled with a filler; drilling is performed from one side of the first through hole to prepare a stage hole in the first through hole, and the filler corresponding to the stage hole is removed; metallizing is performed on the first through hole to form a conductive layer on the inner wall of the stage hole; the remaining filler in the first through hole is removed, and the stage hole is formed into an interconnection blind via to obtain a printed circuit board, thereby preparing the interconnection blind via by pre-setting the filler and then performing front drilling, without the need for back drilling processing, avoiding the control of a high-depth back drilling stub, thereby improving the impact of poor back drilling stub control on signal integrity, improving the accuracy, reliability and stability of the interconnection blind via, so that the product meets the requirements of high-frequency and high-speed products, reducing the processing difficulty of the interconnection blind via, and improving the processing efficiency of the printed circuit board. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 This is a schematic flow chart of an embodiment of a method for preparing a printed circuit board provided by the present invention;
[0018] Figure 2 This is a schematic flow chart of another embodiment of the method for preparing a printed circuit board provided by the present invention;
[0019] Figure 3 yes Figure 2 Schematic diagram of the first half of the preparation process in the embodiment;
[0020] Figure 4 yes Figure 2 Schematic diagram of the second half of the preparation process in the embodiment;
[0021] Figure 5 It is a structural schematic diagram of an embodiment of a printed circuit board provided by the present invention. DETAILED DESCRIPTION
[0022] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.
[0023] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.
[0024] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features specified as "first" and "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but this must be based on the fact that ordinary technicians in this field can implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.
[0025] See also Figure 1 , Figure 1 The figure is a flow chart of an embodiment of a method for preparing a printed circuit board provided by the present invention.
[0026] Step S11: obtaining a processed plate, wherein at least one first through hole is formed on the processed plate, and the first through hole is filled with a filler.
[0027] The processed board is a multi-layer board, and the number of layers is the same as the number of layers of the final finished circuit board, which can be 30 layers, 35 layers, 40 layers, 46 layers, 50 layers or 80 layers, etc., without limitation here.
[0028] At least one first through hole is formed on the processing plate. The number of the first through holes can be one or any number of first through holes, which is set based on actual needs and is not limited here.
[0029] The first through hole passes through the processed plate, and its position corresponds to the same position as that of the subsequent interconnected blind holes.
[0030] The first through hole is filled with a filler for protecting the hole wall of the first through hole. The filler includes but is not limited to an insulating and subsequently removable material such as ink, peelable adhesive, hot melt adhesive, or paraffin.
[0031] Step S12: drilling is performed from one side of the first through hole to prepare a stage hole in the first through hole, and the filler corresponding to the stage hole is removed.
[0032] The first through hole is drilled from one side of the first through hole to prepare a stage hole in the first through hole. The depth of the stage hole is the same as the depth of the subsequent interconnection blind via.
[0033] During the drilling process, the filler corresponding to the stage hole will be removed as the drilling process proceeds, while the remaining undrilled portion of the first through hole is still filled with the corresponding filler.
[0034] The drilling in this step can be performed by mechanical drilling, mechanical punching or laser drilling, and the specific method is not limited here.
[0035] Step S13: performing metallization processing on the first through hole to form a conductive layer on the inner wall of the stage hole.
[0036] The first through hole is metallized by electroplating, physical vapor deposition, physical sputtering deposition, etc., so as to form a conductive layer on the inner wall of the stage hole, and the conductive layer is used to achieve interlayer interconnection.
[0037] Because the aforementioned drilling removes the filler corresponding to the staged hole, the metallization process can form a conductive layer on the inner wall of the staged hole. The remaining undrilled portion of the first through-hole is still filled with the corresponding filler, and its inner wall is not affected by the metallization process, thus avoiding the generation of backdrilled stubs at the source.
[0038] Step S14: removing the remaining filler in the first through hole and forming interconnected blind vias in the stage holes to obtain a printed circuit board.
[0039] Finally, the remaining filler in the first through hole is removed, and at this time, the stage holes form interconnected blind holes to obtain a printed circuit board.
[0040] The above-mentioned process of preparing interconnection blind vias does not require backdrilling, circumventing the control of backdrill stubs. By pre-setting fillers and then drilling the holes from the front, the interconnection blind vias are prepared, thereby improving the impact of poor backdrill stub control on signal integrity, improving the accuracy, reliability and stability of the interconnection blind vias, and enabling the product to meet the requirements of high-frequency and high-speed products.
[0041] Through the above steps, the method for preparing a printed circuit board of this embodiment obtains a processing board, on which at least one first through hole is formed, and the first through hole is filled with a filler; drilling is performed from one side of the first through hole to prepare a stage hole in the first through hole, and the filler corresponding to the stage hole is removed; the first through hole is metallized to form a conductive layer on the inner wall of the stage hole; the remaining filler in the first through hole is removed, and the stage hole is formed into an interconnection blind via to obtain a printed circuit board, thereby preparing the interconnection blind via by pre-setting the filler and then performing front drilling, without the need for back drilling processing, avoiding the control of a high-depth back drilling stub, thereby improving the impact of poor back drilling stub control on signal integrity, improving the accuracy, reliability and stability of the interconnection blind via, so that the product meets the requirements of high-frequency and high-speed products, reducing the processing difficulty of the interconnection blind via, and improving the processing efficiency of the printed circuit board.
[0042] See also Figure 2-4 , Figure 2 The figure is a flow chart of another embodiment of the method for preparing a printed circuit board provided by the present invention. Figure 3 yes Figure 2 Schematic diagram of the first half of the preparation process in the embodiment. Figure 4 yes Figure 2 Schematic diagram of the second half of the preparation process in the embodiment.
[0043] Step S21: obtaining a processed plate, preparing at least one first through hole on the processed plate, and plugging each first through hole until it is filled with filler.
[0044] See also Figure 3 In step 3a, a processing board 10 is obtained, at least one first through hole 11 is prepared on the processing board 10, and each first through hole 11 is plugged until it is filled with a filler 12. The number of layers of the processing board 10 is the same as the number of layers of the final finished circuit board.
[0045] The first through hole 11 can be prepared by mechanical drilling or laser drilling. The number of first through holes 11 can be one or any number, specifically set based on the actual needs of interconnected blind vias, and is not limited here. The first through hole 11 passes through the processing plate 10, and its position corresponds to the position of the subsequent interconnected blind vias. The processing plate 10 may also have other through holes, such as conductive holes, which are not limited here.
[0046] The filler 12 includes, but is not limited to, ink, peelable adhesive, hot melt adhesive, paraffin wax, and other fillable and subsequently removable materials, preferably anti-plating ink.
[0047] The diameter of the first through hole 11 is smaller than that of the interconnecting blind via, and the diameter difference is at least 3 mils, and can be 3 mils, 4 mils, 5 mils, 6 mils, or 7 mils. By pre-setting a smaller first through hole 11, a drilling margin is reserved for subsequent front-side drilling, allowing the preparation of the interconnecting blind via diameter to meet specifications while removing the filler.
[0048] Step S22: drilling the fillers in the first through holes respectively to prepare corresponding second through holes on the fillers.
[0049] Please see further Figure 3 In step 3b, based on step 3a, the fillers 12 in the first through holes 11 are drilled to form corresponding second through holes 13 on the fillers 12. The preparation can be performed by mechanical drilling or laser drilling.
[0050] The second through hole 13 and the first through hole 11 can be arranged concentrically, and the aperture of the second through hole 13 is smaller than the aperture of the first through hole 11. In other embodiments, the second through hole 13 can also be arranged non-concentrically with the corresponding first through hole 11, but the second through hole 13 needs to not contact the interior of the corresponding first through hole 11 to prevent affecting the anti-plating effect of the filler 12.
[0051] The diameter difference between the second through hole 13 and the first through hole 11 is in the range of 1-2 mils. Specifically, it can be 1.0 mil, 1.2 mil, 1.5 mil, 1.7 mil, 1.9 mil, or 2.0 mil, etc. This diameter difference ensures that the second through hole 13 does not contact the interior of the corresponding first through hole 11, thereby preventing the anti-plating effect of the filler 12 from being affected.
[0052] A second through-hole 13 is formed in the first through-hole 11, penetrating the filler 12. This facilitates the formation of a circulation path for the plating solution during subsequent electroplating, allowing the bottom of the stage hole to be plated, reducing the occurrence of plating voids and improving the comprehensiveness and reliability of the electroplating. A second through-hole 13 is formed in each first through-hole 11 that needs to be formed into an interconnected blind via.
[0053] Step S23: Based on the connection layer number requirement of the interconnected blind vias, drilling is performed from one side of the first through hole to prepare a stage hole in the first through hole, and the filler corresponding to the stage hole is removed.
[0054] Please see further Figure 3 3c in 3c is based on 3b. Based on the number of connection layers required for interconnected blind holes, drilling is performed from one side of the first through hole 11 to prepare a stage hole 14 in the first through hole 11, and the filler 12 corresponding to the stage hole 14 is removed.
[0055] For example, if interconnected blind vias need to connect layers 1-5, then the stage hole 14 is also drilled from layer 1 to layer 5. This step can be prepared by mechanical drilling.
[0056] The aperture of the stage hole 14 matches the aperture of the interconnected blind hole, that is, the aperture of the stage hole 14 is larger than the aperture of the first through hole 11, so that it is convenient to remove the filler 12 corresponding to the stage hole 14 by milling and drilling, and obtain the stage hole 14 that matches the aperture of the interconnected blind hole.
[0057] If there are multiple first through holes 11 on the processing plate 10, the number of connection layers of the interconnected blind holes corresponding to the first through holes 11 may be different, and corresponding holes are drilled respectively to meet the respective connection requirements.
[0058] The drilling in this step is front drilling. When used in scenarios with high back drilling depth, only shallow front drilling is required to complete the drilling process, and the drilling depth is greatly reduced. Therefore, the thickness fluctuation is small, and the stub control is better than that of deeper back drilling, thereby improving the impact of poor back drilling stub control on signal integrity and enabling the product to meet the requirements of high-frequency and high-speed products.
[0059] Step S24: electroplating the first through hole with electroplating solution, and forming a circulation path of the electroplating solution through the second through hole to form a conductive layer on the inner wall of the exposed stage hole.
[0060] Please see further Figure 3 In Figures 3d and 3d, based on Figure 3c, electroplating is performed on the first through-hole 11 using a plating solution. A circulation path for the plating solution is formed through the second through-hole 13, thereby forming a conductive layer 15 on the inner wall of the exposed stage hole 14. At this point, only the inner wall of the stage hole 14 is exposed, and thus, only the inner wall of the stage hole 14 forms the conductive layer 15. The remaining inner wall of the first through-hole 11, where the filler 12 has not been removed, is not affected by the electroplating. A conductive layer 15 may also form on the surface of the filler 12, but this portion of the conductive layer 15 will be removed as the filler 12 is removed.
[0061] This electroplating may be performed by chemical copper deposition to form a thin chemical copper layer on the inner wall of the stage hole 14 to serve as a base layer for subsequent electroplating thickening.
[0062] Step S25: removing the remaining filler and performing electroplating to thicken the conductive layer on the inner wall of the stage hole until a preset thickness is met.
[0063] Please see further Figure 4 In step 4a, the remaining filler 12 is removed based on step 3d. In a specific application scenario, the remaining filler can be removed using an alkaline solution without affecting the pore structure. Even if metal was previously plated on filler 12 during electroless copper deposition, this metal will be removed along with the filler. The conductive layer 15 on the inner wall of pore 14 remains unaffected.
[0064] The conductive layer 15 on the inner wall of the stage hole 14 is then electroplated to a predetermined thickness. The predetermined thickness can be 5-20 microns, for example, 5 microns, 7 microns, 9 microns, 10 microns, 14 microns, 15 microns, 18 microns, or 20 microns, etc., and is specifically set based on the connection requirements of the interconnected blind vias and is not limited here.
[0065] Since the inner wall of the remaining first through hole 11 whose depth is not controlled does not have any primer layer, metal will not be plated therein during electroplating.
[0066] Step S26: plugging the first through hole with resin and filling the first through hole completely to obtain an interconnected blind via.
[0067] Please see further Figure 4 In step 4b, based on step 4a, the first through hole 11 is plugged with resin 17 and the first through hole 11 is completely filled to prevent the hole from deforming and improve the stability of the hole structure, thereby obtaining an interconnected blind hole 16.
[0068] The interconnection blind vias 16 are used to realize the interconnection between layers inside the board.
[0069] Step S27: preparing outer conductive circuits on opposite sides of the processed board; performing solder resist treatment on the outer conductive circuits to obtain a printed circuit board.
[0070] After the interconnection blind vias are prepared, outer conductive circuits can be prepared on opposite sides of the processed board by laminating, exposing, developing, and etching; and solder resist treatment is performed on the outer conductive circuits by coating solder resist ink to obtain a printed circuit board.
[0071] This embodiment relates to the technical field of strict backdrill stub processing on printed circuit boards, especially printed circuit boards with high-speed and high-frequency products. The embodiment uses lamination to drill holes, then inserts fillers, then drills small-diameter holes in the holes with fillers, then performs shallow drilling on the front side, undergoes chemical copper deposition, then removes the fillers, and then performs thick electroplating to obtain the required interconnection blind vias, thereby improving the impact of poor backdrill stub control on signal integrity.
[0072] Through the above steps, the method for preparing a printed circuit board of this embodiment obtains a processing board, prepares at least one first through hole on the processing board, plugs each first through hole until it is filled with filler, and then drills the filler in each first through hole to prepare a second through hole corresponding to the filler, so that during subsequent electroplating, the second through hole forms a circulation path for the electroplating solution, so that the bottom of the stage hole can also be electroplated, reducing the occurrence of electroplating voids; subsequently, based on the number of connection layers required for the interconnected blind vias, drilling is performed from one side of the first through hole to prepare a stage hole in the first through hole, and the filler corresponding to the stage hole is removed, the first through hole is electroplated with the electroplating solution, and a circulation path for the electroplating solution is formed through the second through hole to form a conductive layer on the inner wall of the exposed stage hole, and the remaining filler is removed. The conductive layer on the inner wall of the stage hole is electroplated to be thickened until it meets the preset thickness, the first through hole is plugged with resin and filled to obtain an interconnected blind via, and finally an outer conductive circuit is prepared on opposite sides of the processed board; the outer conductive circuit is subjected to solder mask treatment to obtain a printed circuit board, thereby preparing the interconnected blind via by pre-setting the filler and then drilling the hole on the front side, without the need for back drilling, avoiding the control of the back drilling stub, thereby improving the impact of poor back drilling stub control on signal integrity, and the front drilling thickness fluctuation is small, and the sutb control is better than the deep back drilling, thereby improving the impact of poor back drilling stub control on signal integrity, improving the accuracy, reliability and stability of the interconnected blind via, so that the product meets the needs of high-frequency and high-speed products, reducing the processing difficulty of the interconnected blind via, and improving the processing efficiency of the printed circuit board.
[0073] See also Figure 5 , Figure 5 It is a structural schematic diagram of an embodiment of a printed circuit board provided by the present invention.
[0074] At least one via 52 is formed on the printed circuit board 50 of this embodiment. Via 52 includes a first-stage hole 521 and a second-stage hole 522. A conductive layer 53 is formed inside the first-stage hole 521, and the diameter of the first-stage hole 521 is larger than that of the second-stage hole 522. The first-stage hole 521 is a blind interconnection via. Via 52 is filled with resin. The second-stage hole 522 does not serve as an interlayer interconnection function.
[0075] The printed circuit board 50 is manufactured by the method for manufacturing a printed circuit board according to any of the above embodiments.
[0076] The above solution eliminates the need for backdrilling and avoids the control of backdrill stubs, thereby improving the impact of poor backdrill stub control on signal integrity and improving the accuracy, reliability, and stability of interconnection blind vias, enabling the product to meet the requirements of high-frequency and high-speed products. It also reduces the processing difficulty of interconnection blind vias, improves the processing efficiency of printed circuit boards, and ensures the structural reliability of printed circuit boards.
[0077] In some embodiments, solder resist layers 54 are further provided on opposite sides of the printed circuit board 50 to at least partially resist soldering so as to protect the outer layer circuits.
[0078] In some embodiments, the opening of the first-stage hole 521 is further provided with a pad (not marked in the figure) for external connection.
[0079] The above description is only an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the description and drawings of the present invention, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.
Claims
1. A method for preparing a printed circuit board, characterized in that: The method for preparing the printed circuit board comprises: A processed plate is obtained, wherein at least one first through hole is formed on the processed plate, and the first through hole is filled with a filler; Drilling from one side of the first through hole to prepare a stage hole in the first through hole, and removing the filler corresponding to the stage hole; Performing a metallization process on the first through hole to form a conductive layer on the inner wall of the stage hole; The remaining filler in the first through hole is removed, and the stage holes are formed into interconnected blind holes to obtain a printed circuit board.
2. The method for preparing a printed circuit board according to claim 1, wherein: The step of drilling from one side of the first through hole to prepare a stage hole in the first through hole includes: Drilling the fillers in the first through holes respectively to prepare corresponding second through holes on the fillers; Wherein, the aperture of the second through hole is smaller than the aperture of the first through hole.
3. The method for preparing a printed circuit board according to claim 2, wherein: The metallization treatment is performed on the first through hole to form a conductive layer on the inner wall of the stage hole, comprising: The first through hole is electroplated with electroplating solution, and a circulation path of the electroplating solution is formed through the second through hole to form a conductive layer on the inner wall of the exposed stage hole.
4. The method for preparing a printed circuit board according to claim 2, wherein: The diameter difference between the second through hole and the first through hole is in the range of 1-2 mil.
5. The method for preparing a printed circuit board according to claim 1, wherein: The obtaining of the processed plate comprises: Obtaining a processed plate, and preparing at least one first through hole on the processed plate; Each of the first through holes is plugged until it is filled with a filler; wherein the filler includes ink, peelable glue, hot melt glue or paraffin.
6. The method for preparing a printed circuit board according to claim 1, wherein: The drilling from one side of the first through hole to prepare a stage hole in the first through hole, and removing the filler corresponding to the stage hole, includes: Based on the connection layer number requirement of the interconnected blind via, drilling is performed from one side of the first through hole to prepare a stage hole in the first through hole, and the filler corresponding to the stage hole is removed; The aperture of the stage hole matches the aperture of the interconnected blind hole.
7. The method for preparing a printed circuit board according to claim 1, wherein: The step of removing the remaining filler in the first through hole and forming the stage holes into interconnected blind holes comprises: Removing the remaining filler, and electroplating the conductive layer on the inner wall of the stage hole to thicken it until a preset thickness is met; The first through hole is plugged with resin to completely fill the first through hole to obtain the interconnected blind via.
8. The method for preparing a printed circuit board according to claim 1, wherein: The step of removing the remaining filler in the first through hole and forming the stage holes into interconnected blind vias to obtain a printed circuit board further includes: preparing outer conductive circuits on opposite sides of the processed plate; The outer conductive circuit is subjected to solder resist treatment to obtain the printed circuit board.
9. The method for preparing a printed circuit board according to claim 1, wherein: The aperture of the first through hole is smaller than the aperture of the interconnected blind hole, and the aperture difference is at least 3 mil.
10. A printed circuit board, characterized in that: The printed circuit board is prepared by the method for preparing a printed circuit board according to any one of claims 1 to 9, and at least one conducting hole is formed on the printed circuit board; The conductive holes include first-stage holes and second-stage holes. A conductive layer is formed inside the first-stage holes, and the aperture of the first-stage holes is larger than that of the second-stage holes.
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