Power module and power conversion device
By setting a blocking structure on the outer surface of the interconnect, the problem of discontinuous connection holes in the power module is solved, and the packaging effect is improved and the reliability is enhanced.
Patent Information
- Application Number
- CN202410310451.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-18
- Publication Date
- 2025-09-19
AI Technical Summary
In power modules, discontinuous voids form in the electrical connections between the chip and other devices, affecting the packaging effect, causing uneven stress on the chip surface and cracks, thereby reducing reliability.
A blocking structure is provided on the outer surface of the interconnection part to prevent disordered flow of the connection object and form a continuous channel. The package body can fill the channel to ensure the uniformity and stability of the packaging effect.
The packaging effect of the power module is improved, the possibility of cracks on the chip surface due to uneven stress is reduced, and reliability is enhanced.
Smart Images
Figure CN120674383A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor technology, and in particular to a power module and a power conversion device. Background Art
[0002] With the development of power electronics technology, power modules have attracted increasing attention. In power modules, electrical connections between chips and other devices, as well as between different chips, are achieved through interconnects. Chips are connected to interconnects through connectors formed through processes such as welding and sintering. However, these connectors may form discontinuous voids. When encapsulated, the package may not be able to fill these discontinuous voids, affecting the package's packaging effect on the chip, causing cracks on the chip surface due to uneven stress, and reducing the reliability of the power module. Summary of the Invention
[0003] The embodiments of the present application provide a power module and a power conversion device capable of improving reliability.
[0004] In a first aspect, embodiments of the present application provide a power module, comprising a first substrate, a first chip, an interconnect, a first blocking structure, a connector, and a package. The first substrate, the first chip, the connector, and the interconnect are stacked in sequence. The first blocking structure is disposed on the outer surface of the interconnect facing the first chip. The connector between the first chip and the interconnect, the first blocking structure, and the first chip collectively form a first channel, and the package is used to encapsulate the first chip and fill the first channel.
[0005] In the power module provided herein, a first blocking structure is provided on the outer surface of the interconnector, facing the outer surface of the first chip. During the formation of the interconnect, the first blocking structure can prevent the disordered flow of the interconnect during reflow, thereby allowing the first blocking structure, the first chip, and the interconnector to collectively form a continuous first channel. When the package encapsulates the first chip, the package can enter and fill the first channel. After solidification within the first channel, the package forms a continuous and uniform distribution without leaving any voids. This improves the packaging effect and stress distribution of the power module, reduces the possibility of cracks on the surface of the first chip due to uneven stress, and enhances the reliability of the power module.
[0006] According to the first aspect, in a possible implementation manner, the first blocking structure is a protruding structure protruding from the outer surface of the interconnecting member.
[0007] In this possible implementation, since the first blocking structure is convexly disposed on the outer surface of the interconnection member rather than concavely disposed on the outer surface of the interconnection member and does not change the original morphology of the interconnection member, the difficulty of preparing the power module is reduced.
[0008] According to the first aspect, in a possible implementation, the stacking direction of the first substrate and the first chip is assumed to be a first direction. In a third direction perpendicular to the first direction, the first blocking structure extends from one end face of the interconnection component to the end face of the interconnection component in the third direction, and the first channel extends from one end face of the first blocking structure to the other end face of the first blocking structure.
[0009] In this possible implementation, the first blocking structure extends from one end face of the interconnection component to the end face of the interconnection component in the third direction, and the first channel extends from one end face of the first blocking structure to the other end face of the first blocking structure. In this way, the first channel penetrates the connection between the first chip and the interconnection component in the third direction, making it convenient for the package body to enter the first channel.
[0010] According to the first aspect, in a possible implementation manner, the first barrier structure includes one of PI, green oil, and solder resist tape.
[0011] In this possible implementation, the first barrier structure may be formed on the outer surface of the interconnect by coating PI or green oil, or by applying solder resist tape.
[0012] According to the first aspect, in a possible implementation manner, the first blocking structure is a groove provided on an outer surface of the interconnection member.
[0013] In this possible implementation, the first blocking structure is a groove structure that can reduce the size of the power module in the direction of arrangement of the first chip and the interconnection member. The groove can be formed by machining, chemical etching, laser soldering, etc.
[0014] According to the first aspect, in a possible implementation, the first chip includes a chip body and a gate line provided on the chip body, and the gate line, the package body in the first channel, the first blocking structure and the interconnection member are stacked in sequence.
[0015] The outer surface of the gate trace is typically covered with a protective layer made of a material such as PI. Due to the poor wettability of the protective layer to solder or sintering materials, discontinuous voids may form on the side of the gate trace facing away from the chip body, making it impossible for the package to be filled when the first chip is packaged.
[0016] In this possible implementation, a first blocking structure is provided at a position of the interconnect corresponding to the gate line. The first blocking structure can prevent the connection object from climbing up the side of the gate line away from the chip body during the reflow process to form a discontinuous cavity. In this way, the first blocking structure, the connection object, and the gate line form a continuous first channel. After the package body enters the first channel, a structure extending along the first channel can be formed in the first channel, thereby improving the plastic sealing effect of the package body, reducing the possibility of cracks in the first chip due to uneven stress at the gate line, and improving the reliability of the power module.
[0017] According to the first aspect, in a possible implementation manner, an orthographic projection of the gate line on the chip body is located within an orthographic projection of the first blocking structure on the chip body.
[0018] According to the first aspect, in a possible implementation, the power module further includes a first support located within the connector, one end of the first support is connected to the interconnection member, and the other end of the first support is connected to the first chip.
[0019] In this possible implementation, the first support is used to support the interconnection element, thereby reducing the possibility of the interconnection element tilting relative to the first chip.
[0020] According to the first aspect, in a possible implementation manner, in a stacking direction of the first substrate and the first chip, a height of the first support is greater than or equal to a height of the first blocking structure.
[0021] In this possible implementation, the height of the first support in the first direction is greater than or equal to the height of the first blocking structure to avoid forming cavities in the connector or defects caused by insufficient raw materials (such as solder) in the connector.
[0022] According to the first aspect, in a possible implementation manner, the connection object includes one of solder and sintered material.
[0023] In this possible implementation, the first chip and the interconnect can be connected via welding or sintering. Welding is fast and reliable, helping to improve the efficiency and reliability of power module fabrication. Sintering is suitable for applications requiring high power, offering better electrical conductivity and heat dissipation than welding.
[0024] According to the first aspect, in a possible implementation, the power module further includes a second chip, which is disposed on the first substrate and spaced apart from the first chip, the interconnection is connected to the second chip through a connector, a second blocking structure is provided on the outer surface of the interconnection corresponding to the second chip, the connector between the second chip and the interconnection, the second blocking structure, and the second chip together form a second channel, and the package encapsulates the second chip and fills the second channel.
[0025] In this possible implementation, the interconnection element is connected between the first chip and the second chip.
[0026] According to the first aspect, in a possible implementation, the power module further includes a second substrate, the second substrate is disposed on a side of the interconnection member away from the first substrate, and the first substrate and the second substrate are disposed opposite to each other.
[0027] In this possible implementation, the power module adopts a dual-substrate structure, which is beneficial to improving the strength and reliability of the power module.
[0028] In a second aspect, an embodiment of the present application further provides a power conversion device, wherein the power device includes a circuit board and the power module described in the possible implementation method provided in the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] Figure 1 A schematic structural diagram of a vehicle provided in one embodiment of the present application;
[0030] Figure 2 A structural block diagram of a powertrain provided in one embodiment of the present application;
[0031] Figure 3 A schematic structural diagram of a photovoltaic system provided in one embodiment of the present application;
[0032] Figure 4 A schematic diagram of the stacked structure of a power module provided in one embodiment of the present application;
[0033] Figure 5 A three-dimensional schematic diagram of an interconnecting member, a first blocking structure, and a first support provided in one embodiment of the present application;
[0034] Figure 6 A schematic plan view of a first chip provided in one embodiment of the present application;
[0035] Figure 7A A schematic diagram of a first preform formed by a related technology;
[0036] Figure 7BA schematic diagram of a second preform provided in one embodiment of the present application;
[0037] Figure 8 A schematic diagram of the stacked structure of a power module provided in another embodiment of the present application.
[0038] Reference numerals:
[0039] 1000-vehicle; 300-vehicle body; 200-battery pack; 100-powertrain; 101-power conversion device; 103-drive motor; 30-power module; 301-input end; 303-output end; 2000-photovoltaic system; 31-first substrate; 311-insulating substrate; 312-circuit layer; 32-first chip; 321-chip body; 323-gate trace; 33-interconnection; 34-first blocking structure; 35-connector; 36-package; 400-first channel; 401-void; Z-first direction; X-second direction; Y-third direction; 37-second substrate; 38-first support; 39-second support; 41-second chip; 43-second blocking structure; 403-second channel. DETAILED DESCRIPTION
[0040] See also Figure 1 , Figure 1 This is a schematic diagram of the structure of a vehicle provided in one embodiment of the present application. Vehicle 1000 includes a vehicle body 300, a battery pack 200, and a powertrain 100. Both the battery pack 200 and the powertrain 100 are mounted on the vehicle body 300. The battery pack 200 is used to provide direct current to the powertrain 100. The powertrain 100 is used to provide power for the vehicle 1000. Vehicle 1000 also includes other necessary or non-essential structures, which are not detailed here.
[0041] See also Figure 2 , Figure 2 This is a structural block diagram of a powertrain provided in one embodiment of the present application. The powertrain 100 includes a power conversion device 101 and a drive motor 103. The power conversion device 101 includes a circuit board 10 and a power module 30 provided on the circuit board 10. The power module 30 includes an input terminal 301 and an output terminal 303. The input terminal 301 is a DC input terminal, and the output terminal 303 is an AC output terminal. The input terminal 301 of the power module 30 is electrically connected to the battery pack 200, and the output terminal 303 of the power module 30 is electrically connected to the drive motor 103. The power module 30 is used to convert the DC power output by the battery pack 200 into AC power, and transmit the AC power to the drive motor 103. Among them, the power module 30 is a semiconductor device that converts the voltage, current, frequency, etc. of the DC power output by the battery pack 200.
[0042] See also Figure 3 , Figure 3 This is a schematic diagram of the structure of a photovoltaic system provided in one embodiment of the present application. The power module 30 of the present application can also be used in a photovoltaic system 2000. The photovoltaic system 2000 includes a power conversion device 101 and a photovoltaic module 105. The photovoltaic module 105 is electrically connected to the power conversion device 101. The direct current generated by the photovoltaic module 105 is converted into alternating current by the power module 30. The alternating current output by the power module 30 is transmitted to power-consuming equipment, such as base stations and data centers. It is understood that the power module 30 can also be used to convert alternating current into direct current.
[0043] With the development of power electronics technology, power modules have attracted more and more attention. In the power module, the electrical connection between the chip and other devices, and between different chips is realized through the interconnection. The chip is connected to the interconnection by a connector formed by process technologies such as welding and sintering. The connector forms discontinuous voids in such areas. For example, the material included in certain areas of the outer surface of the first chip has poor wettability to the connector or other factors, causing the connector to form discontinuous voids in such areas. When the package is encapsulated, the package may not be able to fill the discontinuous voids, affecting the packaging effect of the package on the first chip, causing cracks on the surface of the first chip due to uneven stress, and reducing the reliability of the power module.
[0044] Based on this, see Figure 4 An embodiment of the present application provides a power module 30, including a first substrate 31, a first chip 32, an interconnection 33, a first blocking structure 34, a connector 35 and a package body 36, wherein the first substrate 31, the first chip 32, the connector 35 and the interconnection 33 are stacked in sequence. The first blocking structure 34 is provided on the outer surface of the interconnection 33 facing the first chip 32. The first blocking structure 34, the connector 35 and the first chip 32 together form a first channel 400, and the package body 36 is used to encapsulate the first chip 32 and fill the first channel 400. The first blocking structure 34 is used to block the disordered flow of the connector 35 during the reflow process. The package body 36 encapsulates the first chip 32, that is, the first chip 32 is wrapped in the package body 36 and is not exposed outside the power module 30.
[0045] A connector 35 is provided between the first chip 32 and the interconnection 33 , that is, the first chip 32 and the interconnection 33 are connected via the connector 35 , and the first blocking structure 34 is located in the connector 35 between the first chip 32 and the interconnection 33 .
[0046] In the power module 30 provided herein, during the formation of the connection 35, a first blocking structure 34 is provided on the outer surface of the interconnect 33. This first blocking structure 34 can prevent the disordered flow of the connection 35 during the reflow process, thereby allowing the first blocking structure 34, the first chip 32, and the interconnect 33 to collectively form a continuous first channel 400 extending along the first blocking structure 34. When the encapsulation body 36 encapsulates the first chip 32, the encapsulation body 36 can enter and fill the first channel 400. After curing, the encapsulation body 36 forms a continuous and uniform distribution without leaving any voids. This improves the packaging effect and stress distribution of the power module 30, reduces the possibility of cracks on the surface of the first chip 32 due to uneven stress, and improves the reliability of the power module 30.
[0047] In some embodiments of the present application, the first blocking structure 34 is a protruding structure provided on the outer surface of the interconnect 33. Since the first blocking structure 34 is provided on the outer surface of the interconnect 33 instead of being a groove structure provided on the outer surface of the interconnect 33, and does not change the original morphology of the interconnect 33, the difficulty of manufacturing the power module 30 is reduced.
[0048] Assuming that the stacking direction of the first substrate 31 and the first chip 32 is a first direction Z, in a second direction X, the width of the first channel 400 is greater than or equal to the width of the package body 36 within the first channel 400, so that the package body 36 can smoothly enter and pass through the first channel 400. The second direction X is perpendicular to the first direction Z.
[0049] The package 36 can encapsulate the surface of the first substrate 31, the first chip 32, and the interconnects 33. The package 36 is a housing for mounting a semiconductor integrated circuit chip, and can house, secure, seal, and protect the chip, as well as enhance thermal conductivity. For example, the package can be a plastic package formed by plastic-sealing the substrate surface, power chip, driver chip, conductive components, and the like. For example, the package can be an encapsulation layer.
[0050] In some embodiments of the present application, the power module 30 further includes a second substrate 37 and a second chip 41. The first substrate 31, the first chip 32, the interconnect 33, and the second substrate 37 are stacked sequentially along the first direction Z. The second chip 41 is disposed on the first substrate 31, spaced apart from the first chip 32. The second chip 41 may be a forward recovery diode (FRD). It is understood that the second chip 41 is not limited to an FRD.
[0051] The first substrate 31 and the second substrate 37 each include an insulating substrate 311 and circuit layers 312 covering opposite sides of the insulating substrate 311. The first chip 32 is connected to the circuit layer 312 of the first substrate 31 facing the second substrate 37. The interconnect 33 is connected to the circuit layer 312 of the second substrate 37 facing the first substrate 31. The first substrate 31 and the second substrate 37 may be direct bond copper substrates.
[0052] The first chip 32 may be an insulated gate bipolar transistor (IGBT). Figure 4 and Figure 5 The first chip 32 includes a chip body 321 and a gate bus 323 (Gate Bus) provided on the chip body 321. The gate bus, the connector 35, and the first blocking structure 34 form a first channel 400. The gate bus and the first blocking structure 34 are arranged relative to the gate bus 323. The package body 36, the first blocking structure 34, and the interconnection member 33 in the first channel 400 are stacked in sequence so that the position of the first blocking structure 34 corresponds to the position of the gate bus 323. The gate bus 323 is the total signal line after the gates of the first chip 32 are gathered together. In some embodiments of the present application, the orthographic projection of the gate bus 323 on the chip body 321 is located within the orthographic projection of the first blocking structure 34 on the chip body 321. It will be understood that the present application does not limit the orthographic projection of the gate bus 323 on the chip body 321 to being located within the orthographic projection of the first blocking structure 34 on the chip body 321.
[0053] The outer surface of the gate trace is usually covered with a protective layer made of materials such as PI. Due to the poor wettability of the protective layer to solder or sintering materials, discontinuous voids may form on the gate trace due to the connection, making it impossible to fill the package.
[0054] The power module 30 provided in the present application is provided with a first blocking structure 34 at the position of the interconnect 33 corresponding to the gate wiring 323. The first blocking structure 34 can prevent the connection object 35 from climbing up the side of the gate wiring 323 away from the chip body 321 during the reflow process to form a discontinuous cavity 401. In this way, the first blocking structure 34, the connection object 35, and the gate wiring 323 form a continuous first channel 400. After the package body 36 enters the first channel 400, it can form a structure extending along the first channel 400 in the first channel 400, thereby improving the plastic sealing effect of the package body 36, reducing the possibility of cracks in the first chip 32 at the gate wiring 323 due to uneven stress, and improving the reliability of the power module 30.
[0055] It is understood that the present application does not limit the position of the first blocking structure 34 on the interconnect 33 to correspond to the position of the gate trace 323. The first blocking structure 34 can be set in other areas of the interconnect 33 that need to avoid the connection object 35.
[0056] The present application does not limit the first chip 32 to be an IGBT. The first chip 32 can also be other types of chips, such as Metal-Oxide-Semi-conductor Field-Effect Transistor (MOSFET), SiC (silicon carbide), GaN and other chips.
[0057] The interconnect 33 is disposed on a side of the first chip 32 facing away from the first substrate 31 . Specifically, the interconnect 33 serves as a spacer for interconnecting the first chip 32 with the upper structure of the power module 30 in the first direction Z. The interconnect 33 can be made of pure metal or a conductive sheet of a composite material.
[0058] In some embodiments of the present application, connectors 35 are formed between the first chip 32 and the interconnection 33, and between the first chip 32 and the first substrate 31. The first chip 32 and the interconnection 33, and between the first chip 32 and the first substrate 31, can be connected to the interconnection 33 through a welding process. The welding process is used to connect the first chip 32 and the interconnection 33, and between the first chip 32 and the first substrate 31. The welding process is characterized by high speed and high reliability, which helps to improve the production efficiency and reliability of the power module 30.
[0059] Connector 35 includes solder, which can be selected from at least one of tin solder and lead solder. The tin solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi-reinforced, and SnSb10. The solder material can be selected based on specific needs. SnSb5 refers to a Sn solder containing 5% by weight of Sb, SnSb8 refers to a Sn solder containing 8% by weight of Sb, and SnSb10 refers to a Sn solder containing 10% by weight of Sb. The "SAC" in SAC306 stands for Sn, Ag, and Cu, indicating that the product is composed of Sn (tin), Ag (silver), and Cu (copper). "3" represents 3% Ag, and "05" represents 0.5% Cu. SAC multi-component strengthening includes other metal components in addition to the three metal components Sn (tin), Ag (silver), and Cu (copper) to enhance the reliability of the solder.
[0060] When the first chip 32 is connected to the interconnection 33 through a welding process, the first blocking structure 34 can be a solder mask structure, which is formed by coating a solder mask such as PI, green oil, etc. on the surface of the interconnection 33, or the first blocking structure 34 can be formed by affixing a solder mask tape on the surface of the interconnection 33, or the first blocking structure 34 can be formed by other physical or chemical solder mask methods.
[0061] In some embodiments of the present application, the first chip 32 and the interconnection 33, as well as the first chip 32 and the first substrate 31, can be connected by a sintering process. The sintering process is suitable for high-power applications and can provide better electrical conductivity and heat dissipation than welding.
[0062] The connector 35 is a sintered material. Exemplarily, the sintered material can be formed by silver paste, copper paste or silver film. In a specific embodiment, the silver paste can include at least one of micrometer silver paste and nanometer silver paste. Among them, micrometer silver paste refers to a silver paste made using micrometer silver particles and organic solvents, which is low in cost and safe. Generally, it is sintered under pressure, the sintered material SJ has high density, the interface bonding of the bonded body is firm, and the bonding reliability is high. Optionally, in order to improve the reliability of sintered bonding and reduce costs, the sintered material of the present application can be formed by micrometer silver paste. In order to improve the reliability of sintered bonding, the elastic modulus, thermal expansion coefficient (CTE) and the like of the sintered material can be adjusted by adding materials to the sintered material. Exemplarily, the sintering material includes a main material and a filler filled in the main material; the main material includes at least one of silver paste, copper paste, or silver film; the filler is formed from a material that has good bonding properties with the main material, and the filler's thermal expansion coefficient is smaller than that of the main material, thereby improving the bonding reliability during sintering. For example, when the main material is micron silver paste, the filler is added to the micron silver paste to reduce the thermal expansion coefficient of the micron silver paste, thereby reducing bonding stress and improving the bonding reliability of silver sintering. Exemplarily, the filler can include at least one of nickel (Ni), Ni alloy, copper (Cu), nickel-plated copper, titanium (Ti), Ti alloy, iron (Fe), Fe alloy, Kovar (iron-nickel-cobalt alloy 4J29), and SiC powder, etc., without limitation herein.
[0063] In the case where the first chip 32 is connected to the interconnection 33 through a welding process, the first barrier structure 34 may be a sintering resistance structure.
[0064] The power module 30 also includes a first support 38 and a second support 39. The first support 38 is located within the connector 35 between the first chip 32 and the interconnect 33, that is, the first support 38 is surrounded by the connector 35 between the first chip 32 and the interconnect 33. One end of the first support 38 is connected to the interconnect 33, and the other end of the first support 38 is connected to the first chip 32. The first support 38 is used to support the interconnect 33 and reduce the possibility of the interconnect 33 tilting relative to the first chip 32. The height of the first support 38 in the first direction Z must be greater than or equal to the height of the first blocking structure 34 to avoid defects caused by the excessive height of the first blocking structure 34, such as the formation of voids in the connector or insufficient raw materials (e.g., solder) in the connector. The number of first supports 38 can be two or more to improve the support stability of the first support 38 on the interconnect 33. It is understood that the number of first supports 38 can also be one.
[0065] The second support 39 is located within the connector 35 between the first chip 32 and the first substrate 31, that is, the second support 39 is surrounded by the connector 35 between the first chip 32 and the first substrate 31. One end of the second support 39 is connected to the first substrate 31, and the other end of the second support 39 is connected to the first chip 32. The second support 39 is used to support the first chip 32 and reduce the possibility of the first chip 32 tilting relative to the first substrate 31. The number of second supports 39 can be two or more to improve the support stability of the second support 39 on the first chip interconnect 33. It is understood that the number of second supports 39 can also be one. Both the first support 38 and the second support 39 can be bumps formed by welding. It is understood that this application does not limit the formation process of the first support 38 and the second support 39.
[0066] The stacking direction of the first substrate 31 and the first chip 32 is defined as the first direction Z. Figure 5 and Figure 6 Exemplarily, the interconnecting member 33 is substantially square, the first blocking structure 34 is substantially straight, the length of the first blocking structure 34 in the second direction X is less than the length of the first blocking structure 34 in the third direction Y, and the first blocking structure 34 extends along the second direction X. The first direction Z is perpendicular to the second direction X, the second direction X is perpendicular to the third direction Y, and the third direction Y is perpendicular to the first direction Z. Exemplarily, there are four first supports 38, each of which is disposed at a corresponding corner of the interconnecting member 33.
[0067] It is understood that the present application does not limit the structure and shape of the interconnection member 33. For example, the interconnection member 33 may be planar, grooved, arched, or the like.
[0068] It is understood that the present application does not limit the structure of the first blocking structure 34. The first blocking structure 34 may be a groove. The first blocking structure being a groove can reduce the size of the power module in the direction of arrangement of the first chip 32 and the interconnect 33. The groove can be formed by machining, chemical etching, laser solder resist, etc.
[0069] It is understood that the present application does not limit the shape of the first blocking structure 34 . For example, the first blocking structure 34 may be in a Z-shape, an arc-shape, or other regular or irregular shapes.
[0070] It is understood that the present application does not limit the structure and shape of the first support 38 . For example, the first blocking structure 34 may be in a Z-shape, an arc-shape, or other regular or irregular shapes.
[0071] In some embodiments, in the third direction Y, the first barrier structure 34 extends from one end surface of the interconnect 33 to the other end surface of the interconnect 33, and the first channel 400 extends from one end surface of the first barrier structure 34 to the other end surface of the first barrier structure 34. In this way, the first channel 400 penetrates the connection 35 between the first chip 32 and the interconnect 33 in the third direction Y, facilitating the entry of the package 36 into the first channel 400. The first channel 400 extends from one end surface of the first barrier structure 34 to the other end surface of the first barrier structure 34. Because the first channel 400 extends from one end surface of the first barrier structure 34 to the other end surface of the first barrier structure 34, the first channel 400 is a continuous first channel 400 extending along the length direction of the first barrier structure 34.
[0072] Figure 7A This is a schematic diagram of a first preform formed by a related technology. The first preform is a structural diagram of a power module under X-ray irradiation, in which no blocking structure is set for the interconnection part, the connection object is formed, and the power module is not plastic-encapsulated. Figure 7A As shown, it can be seen that discontinuous cavities 401 are formed on the first preform. Since the cavities 401 are discontinuous, the package body cannot enter some of the cavities 401 during packaging. Figure 7B This is a schematic diagram of a second preform provided in one embodiment of the present application. The second preform is a structural diagram of a power module 30 under X-ray irradiation, with the interconnect 33 provided with a first blocking structure 34, the connector 35 formed, and not yet encapsulated. It can be seen that a continuous first channel 400 is formed in the second preform. The continuous first channel 400 formed in the second preform facilitates the entry and filling of the encapsulation body 36 into the first channel 400.
[0073] The interconnection member 33 may also be a conductive sheet (cl ip) used for surface interconnection between chips, and the conductive sheet may be a metal sheet. Figure 8 The power module 30 can be a single-substrate power module and further includes a second chip 41. The second chip 41 is disposed on the first substrate 31 and spaced apart from the first chip 32. The interconnect 33 is connected between the first chip 32 and the second chip 41. A second blocking structure 43 is provided on the outer surface of the interconnect 33 corresponding to the second chip 41. The connection 35 between the second chip 41 and the interconnect 33, the second blocking structure 43, and the second chip 41 can collectively form a second channel 403. The package body 36 fills the second channel 403.
[0074] The barrier structure is suitable for the eutectic design of solder resist or sintering resist for all interconnections connected to the chip surface, such as gaskets and interconnection metal sheets. It is also suitable for the eutectic design of solder resist or sintering resist for the surfaces of planar, grooved, arched and other interconnections, which is related to improving packaging risks such as stress or solder creep.
[0075] It is understood that barrier structures may also be provided on other areas or surfaces of the interconnect 33 to improve eutectic design such as solder resist or sintering resist related to packaging risks such as stress or solder creep.
[0076] It should be understood that expressions such as "include" and "may include" used in this application indicate the existence of the disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In this application, terms such as "include" and / or "have" may be interpreted as indicating specific characteristics, numbers, operations, constituent elements, components, or combinations thereof, but may not be interpreted as excluding the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components, or combinations thereof.
[0077] In addition, in this application, the expression "and / or" includes any and all combinations of the associated listed words. For example, the expression "A and / or B" may include A, may include B, or may include both A and B.
[0078] In this application, expressions including ordinal numbers such as "first" and "second" may modify various elements. However, such elements are not limited by the above expressions. For example, the above expressions do not limit the order and / or importance of the elements. The above expressions are only used to distinguish one element from other elements. For example, a first user device and a second user device indicate different user devices, even though the first user device and the second user device are both user devices. Similarly, without departing from the scope of this application, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.
[0079] When a component is referred to as being "connected" or "accessed" to another component, it should be understood that the component is not only directly connected to or accessed to the other component, but also that another component may exist between the component and the other component. On the other hand, when a component is referred to as being "directly connected to" or "directly accessed" to another component, it should be understood that no component exists between them.
[0080] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.
Claims
1. A power module, characterized in that: The power module includes a first substrate, a first chip, an interconnection, a first blocking structure, a connector, and a package. The first substrate, the first chip, the connector, and the interconnection are stacked in sequence. The first blocking structure is provided on the outer surface of the interconnection facing the first chip. The connector between the first chip and the interconnection, the first blocking structure, and the first chip together form a first channel. The package is used to encapsulate the first chip and fill the first channel.
2. The power module according to claim 1, characterized in that: The first blocking structure is a protruding structure protruding from the outer surface of the interconnecting member.
3. The power module according to claim 2, characterized in that: The first barrier structure includes at least one of PI, green oil, and solder resist tape.
4. The power module according to claim 1, wherein: The first blocking structure includes a groove provided on an outer surface of the interconnector.
5. The power module according to any one of claims 1 to 4, characterized in that: The first chip includes a chip body and a gate line disposed on the chip body. The gate line, the connector and the first blocking structure form the first channel. The gate line and the first blocking structure are disposed opposite to each other.
6. The power module according to claim 5, characterized in that: The orthographic projection of the gate line on the chip body is located within the orthographic projection of the first blocking structure on the chip body.
7. The power module according to any one of claims 1 to 6, characterized in that: The power module further includes a first support located within the connector, one end of the first support being connected to the interconnection member, and the other end of the first support being connected to the first chip.
8. The power module according to claim 7, characterized in that: In the stacking direction of the first substrate and the first chip, the height of the first support is greater than or equal to the height of the first blocking structure.
9. The power module according to any one of claims 1 to 8, characterized in that: The connection object includes one of solder and sintered material.
10. The power module according to any one of claims 1 to 9, characterized in that: The power module also includes a second chip, which is arranged on the first substrate and separated from the first chip. A connector is provided between the interconnection member and the second chip. A second blocking structure is provided on the outer surface of the interconnection member corresponding to the second chip. The connector between the second chip and the interconnection member, the second blocking structure, and the second chip together form a second channel. The package body encapsulates the second chip and fills the second channel.
11. The power module according to any one of claims 1 to 10, characterized in that: The power module further includes a second substrate, which is arranged on a side of the interconnection member away from the first substrate, and the first substrate and the second substrate are arranged opposite to each other.
12. A power conversion device, characterized in that: The power device includes a circuit board and a power module according to any one of claims 1-11.