Apparatus and method for dimmable ionization detector (PID) circuit
By introducing voltage processing and power management circuits into the PID circuit, the efficiency and accuracy of the PID circuit are optimized, the problems of integration complexity and power consumption are solved, and high efficiency energy saving and extended service life are achieved.
Patent Information
- Application Number
- CN202410326471.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-21
- Publication Date
- 2025-09-23
AI Technical Summary
Existing PID gas detectors increase complexity and power consumption when integrated into a 4R analog PID sensor package, affecting the efficiency and life of the detector.
By introducing a voltage processing circuit and a power management circuit into the PID circuit, the DC portion of the input voltage is isolated using primary and secondary capacitors, charge is stored to generate a DC voltage, and the DC voltage supplied to the PID circuit is modified by the power management circuit to optimize circuit efficiency and accuracy.
The efficiency and accuracy of the PID circuit are improved, high energy efficiency is achieved and the service life of the detector is extended.
Smart Images

Figure CN120685764A_ABST
Abstract
Description
Technical Field
[0001] Example embodiments of the present disclosure relate generally to photoionization detectors (PIDs), and more particularly, to apparatus and methods for PID circuits. Background Art
[0002] The use of photoionization detector (PID) gas detectors is key to detecting trace compounds. PID gas detectors use short-wavelength ultraviolet (UV) lamps to photoionize trace compounds, resulting in the ejection of electrons and the generation of positively charged molecules. This process is orchestrated by circuitry designed to detect both the positively charged molecules and the ejected electrons. Additionally, lamp-based PID detectors are integrated into conventional 4R (reduced response and recovery rate) analog PID sensor packages to extend the life of the PID detector and regulate signal strength, which is critical for optimal performance of the PID detector over time. However, integrating the PID gas detector into a 4R analog PID sensor package increases complexity and results in additional power consumption by the PID detector.
[0003] The inventors have identified many areas for improvement in the prior art and technology, which are the subject of the embodiments described herein. Through applied effort, ingenuity, and innovation, many of these deficiencies, challenges, and problems have been addressed by developing solutions included in the embodiments of the present disclosure, some examples of which are described in detail herein. Summary of the Invention
[0004] The following is an overview of some example embodiments to provide a basic understanding of some aspects of the present disclosure. This overview is not an extensive review and is neither intended to identify key or important elements nor to delineate the scope of such elements. It will also be understood that the scope of the present disclosure encompasses many potential embodiments in addition to those summarized here, some of which will be further described in the detailed description presented later.
[0005] In an example embodiment, a method is disclosed. The method includes the steps of receiving an input voltage via a voltage processing circuit coupled to a photoionization detector (PID) circuit. Furthermore, the voltage processing circuit includes a primary capacitor and a secondary capacitor. The method also includes the steps of isolating a direct current (DC) portion of the received input voltage via the primary capacitor. Furthermore, storing charge via the secondary capacitor to generate a DC voltage. The method also includes the steps of determining whether the charge has reached a predefined threshold. The method also includes the steps of supplying the DC voltage generated by the secondary capacitor to the PID circuit via a power management circuit when the charge has reached the predefined threshold. Furthermore, the power management circuit modifies the supplied DC voltage.
[0006] In some embodiments, the input voltage corresponds to a pulse width modulated (PWM) voltage. Furthermore, the method includes discharging the charge stored by the secondary capacitor via at least one resistor. Furthermore, the method includes preventing reverse current from flowing back into the primary capacitor by a first diode connected between the primary capacitor and the secondary capacitor.
[0007] In some embodiments, the method further includes generating at least one signal based on the modified DC voltage via the PID circuit. Furthermore, processing the at least one signal via at least one signal processing circuit coupled to the PID circuit to provide data corresponding to the target gas intensity. Furthermore, determining whether the at least one signal is high via the at least one signal processing circuit. Furthermore, generating a low DC voltage via the power management circuit when the at least one signal is determined to be high.
[0008] In some embodiments, the method further includes determining, by the at least one signal processing circuit, whether the at least one signal is low. In addition, when the at least one signal is determined to be low, generating a high DC voltage via the power management circuit.
[0009] In some embodiments, the modified DC voltage supplied to the PID circuit is inversely proportional to the intensity of the target gas detected by the PID circuit.
[0010] In some embodiments, the method further includes controlling, via the power management circuit, the modified DC voltage received by the PID circuit based on at least one of degradation of accuracy of the PID circuit, drift of the at least one signal over time, and a duty cycle of the PID circuit.
[0011] In some embodiments, the method further includes filtering the input voltage via a tertiary capacitor and a second diode to eliminate noise in the input voltage and stabilize the input voltage. In addition, the stabilized input voltage is supplied to at least one signal processing circuit and a PID circuit.
[0012] In an exemplary embodiment, a device is disclosed. The device includes a photoionization detector (PID) circuit, a voltage processing circuit connected to the PID circuit and configured to receive an input voltage. Furthermore, the voltage processing circuit includes a primary capacitor configured to isolate a direct current (DC) portion of the received input voltage, and a secondary capacitor configured to store charge to generate a DC voltage. A power management circuit is connected to the voltage processing circuit. Furthermore, the power management circuit is configured to supply the DC voltage generated by the secondary capacitor to the PID circuit upon determining that the charge has reached a predefined threshold, and to modify the DC voltage supplied to the PID circuit.
[0013] The above summary is provided solely for the purpose of outlining some example embodiments to provide a basic understanding of some aspects of the present disclosure. It will be understood, therefore, that the above embodiments are merely examples and should not be construed as narrowing the scope or spirit of the present disclosure in any way. It will be understood that the scope of the present disclosure encompasses many potential embodiments beyond those outlined herein, some of which will be further described below. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] Having thus generally described certain example embodiments of the present disclosure, reference will now be made to the accompanying drawings, which are not necessarily drawn to scale, and in which:
[0015] Figure 1 shows a schematic diagram of a photoionization detector (PID) according to an example embodiment of the present disclosure;
[0016] Figure 2A shows a circuit of a PID according to an example embodiment of the present disclosure;
[0017] Figure 2B A schematic diagram illustrating input / output terminals of a PID according to an exemplary embodiment of the present disclosure;
[0018] Figure 3 shows a graphical representation of a simulation of deviations in the input voltage and DC voltage supplied to a circuit according to an example embodiment of the present disclosure;
[0019] Figure 4 A flowchart illustrating a method according to an example embodiment of the present disclosure is shown;
[0020] FIG5A shows a flow chart of a first operational scenario according to an example embodiment of the present disclosure;
[0021] FIG5B shows a flow chart of a second operational scenario according to an example embodiment of the present disclosure;
[0022] Figure 6 shows a flowchart of a third operational scenario according to an example embodiment of the present disclosure;
[0023] Figure 7 a flowchart representing a fourth operational scenario according to an example embodiment of the present disclosure; and
[0024] Figure 8 A block diagram of an external system operably coupled to a PID according to an example embodiment of the present disclosure is shown. DETAILED DESCRIPTION
[0025] Some embodiments will now be described more fully hereinafter with reference to the accompanying drawings, in which some, but not all, embodiments of the present disclosure are shown. Indeed, various embodiments may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will satisfy applicable legal requirements.
[0026] The components shown in the figures represent components that may or may not be present in the various embodiments of the present disclosure described herein, such that an embodiment may include fewer or more components than those shown in the figures without departing from the scope of the present disclosure. For visibility of underlying components, some components may be omitted from one or more figures or shown in dashed lines.
[0027] As used herein, the term "comprising" means including but not limited to, and should be interpreted in the manner in which it is commonly used in a patent context. The use of broader terms such as "comprises," "includes," and "having" should be understood to provide support for narrower terms such as "consisting of," "consisting essentially of," and "composed essentially of."
[0028] The phrases "in various embodiments," "in one embodiment," "according to one embodiment," "in some embodiments," etc. generally mean that the particular feature, structure, or characteristic following the phrase can be included in at least one embodiment of the present disclosure, and may be included in more than one embodiment of the present disclosure (importantly, these phrases are not necessarily referring to the same embodiment).
[0029] The word “example” or “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any implementation described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other implementations.
[0030] If the specification states that a component or feature "may," "could," "might," "should," "will," "preferably," "likely," "typically," "optionally," "for example," "often," or "might" (or other such language) be included or have a characteristic, that particular component or feature is not required to be included or have that characteristic. In some embodiments, such a component or feature may be optionally included, or may be excluded.
[0031] The present disclosure provides various embodiments of devices and methods for tunable photoionization detector (PID) circuits. Embodiments may provide a method for optimizing PID circuit efficiency. Embodiments may be configured to generate a DC voltage for supply to the PID circuit using a voltage processing circuit. Embodiments may be configured to modify the DC voltage supplied to the PID circuit to improve the efficiency and accuracy of the PID circuit. Embodiments may be configured to make the PID circuit energy efficient by switching the PID circuit under one or more operating conditions.
[0032] Figure 1 A schematic diagram of a photoionization detector (PID) 100 is shown according to an example embodiment of the present disclosure.
[0033] In some embodiments, the PID 100 can include at least one ultraviolet (UV) light source 102, at least one primary pole 104, and at least one secondary pole 106. In some embodiments, the PID 100 can be configured to detect the intensity of a target gas 108 near the PID 100. In some embodiments, the at least one UV light source 102 can be configured to emit UV light when powered. In some embodiments, the at least one UV light source 102 can be located near the at least one primary pole 104 and the at least one secondary pole 106.
[0034] In some embodiments, the at least one primary electrode 104 can be spaced apart from the at least one secondary electrode 106. In some embodiments, the at least one UV light source 102 can be fabricated with a salt crystal window 110. In some embodiments, the salt crystal window 110 can be configured to allow UV light to travel toward the at least one primary electrode 104 and the at least one secondary electrode 106. Furthermore, the at least one primary electrode 104 and the at least one secondary electrode 106 can correspond to an anode or a cathode. In some embodiments, the at least one primary electrode 104 and the at least one secondary electrode 106 can be supplied with a predefined threshold voltage to ionize one or more molecules 112 of the target gas 108 present near the at least one primary electrode 104 and the at least one secondary electrode 106.
[0035] In some embodiments, the at least one secondary electrode 106 can be exposed to UV light. In some embodiments, the at least one secondary electrode 106 can be configured to generate one or more light-induced electrons in the presence of one or more molecules 112 of the target gas 108. Furthermore, the one or more light-induced electrons can be configured to generate a current corresponding to a predefined threshold voltage supplied to the at least one primary electrode 104 and the at least one secondary electrode 106. In some embodiments, the amount of current generated can define the concentration of the target gas 108 present near the PID 100.
[0036] Figure 2AA diagram of a circuit 200 of a PID 100 is shown according to an example embodiment of the present disclosure. Figure 2B A schematic view illustrating input / output terminals of the PID 100 according to an example embodiment of the present disclosure is shown. Figure 3 A graphical representation 300 is shown simulating the input voltage and deviations in the DC voltage supplied to the circuit 200 , according to an example embodiment of the present disclosure.
[0037] In some embodiments, the circuit 200 of the PID 100 may include one or more input terminals 202, a voltage processing circuit 204 electrically coupled to a power management circuit 206, and a PID circuit 208. In some embodiments, the one or more input terminals 202 may be connected to a power source (not shown). In some embodiments, the power source may correspond to a direct current (DC) power source that can be manipulated to provide variable DC electrical power supplied to the circuit 200 via the one or more input terminals 202. In some embodiments, the one or more input terminals 202 may include a first input terminal 210 (e.g., pin 1) and a second input terminal 212 (e.g., pin 2). In an exemplary embodiment, the circuit 200 may also include at least one output terminal 214. Furthermore, the at least one output terminal 214 may correspond to pin 3.
[0038] In some embodiments, one or more input terminals 202 can be electrically coupled to a power supply. In some embodiments, one or more input terminals 202 can be configured to receive an input voltage from the power supply. In addition, the input voltage can correspond to a variable voltage. In some embodiments, one or more input terminals 202 can be configured to supply an input voltage to the voltage processing circuit 204. In some embodiments, the input voltage can correspond to a pulse width modulated (PWM) voltage.
[0039] In some embodiments, the voltage processing circuit 204 can be configured to receive an input voltage (e.g., a PWM voltage) via a first input terminal 210 of the one or more input terminals 202. Furthermore, the voltage processing circuit 204 can be electrically coupled to the power management circuit 206. In some embodiments, the voltage processing circuit 204 can be configured to supply a DC voltage to drive the power management circuit 206. In some embodiments, the power management circuit 206 can be coupled to the PID circuit 208. Furthermore, the voltage processing circuit 204 can be configured to drive the PID circuit 208.
[0040] In some embodiments, the PID 100 can be configured to operate in at least two modes. The at least two modes can include a basic mode and an adjustable mode. In an example embodiment, in the basic mode, the input voltage supplied to the voltage processing circuit 204 through the first input terminal 210 of the one or more input terminals 202 can be less than the PWM voltage. In addition, the input voltage can correspond to a variable voltage (V in In some embodiments, the primary capacitor 216 of the voltage processing circuit 204 can be configured to isolate the direct current (DC) portion of the received input voltage. Furthermore, due to the isolation of the input voltage, the voltage processing circuit 204 can be configured to supply a zero DC output voltage to the power management circuit 206.
[0041] In some embodiments, voltage processing circuit 204 may include a primary capacitor 216, a secondary capacitor 218, a first diode 220, and at least one resistor 222. In some embodiments, circuit 200 further includes a second diode 224 and a tertiary capacitor 226. Furthermore, second diode 224 may be coupled to first input terminal 210 and may be configured to receive an input voltage. In some embodiments, second diode 224 may be configured to supply the input voltage to power management circuit 206. Upon receiving the input voltage from second diode 224, power management circuit 206 may be configured to supply the input voltage to PID circuit 208. Furthermore, upon receiving the input voltage from power management circuit 206, PID circuit 208 may be configured to power PID 100 while consuming a constant input voltage to detect the intensity of the target gas.
[0042] In some embodiments, when operating in the fundamental mode, the PID 100 may require a constant input voltage to detect the intensity of the target gas 108. In some embodiments, the constant input voltage supply to the PID 100 may degrade the efficiency of the PID 100 over extended periods of use. In some embodiments, the PID 100 may consume more power when operating in the fundamental mode.
[0043] In another example embodiment, in the adjustable mode, the input voltage may correspond to a pulse width modulated (PWM) voltage, and the input voltage may be supplied to the voltage processing circuit 204 via one or more input terminals 202. In some embodiments, upon receiving the input voltage, the primary capacitor 216 may be configured to isolate the DC portion of the input voltage. In some embodiments, the primary capacitor 216 may be configured to store electrical variations to generate an isolated input voltage. Furthermore, the isolated input voltage may be supplied to the first diode 220.
[0044] In some embodiments, the first diode 220 can be configured to receive the isolated input voltage. Furthermore, the first diode 220 can be configured to prevent any reverse current from flowing back to the primary capacitor 216 during operation of the voltage processing circuit 204. In some embodiments, the first diode 220 can be configured to operate under forward bias to supply the isolated input voltage to the secondary capacitor 218.
[0045] In some embodiments, the secondary capacitor 218 can be configured to receive an isolated input voltage. Furthermore, the secondary capacitor 218 can be configured to store charge. In some embodiments, when the charge stored in the secondary capacitor 218 reaches a predefined threshold, the secondary capacitor 218 can be configured to generate a DC voltage (Ua). Furthermore, when the charge stored in the secondary capacitor 218 reaches a predefined threshold, the secondary capacitor 218 can be configured to supply the DC voltage (Ua) to the power management circuit 206.
[0046] In some embodiments, at least one resistor 222 can be coupled in parallel with the secondary capacitor 218. In some embodiments, the at least one resistor 222 can be configured to discharge stored charge from the secondary capacitor 218. Furthermore, the secondary capacitor 218 can be configured to perform multiple iterations of charging and discharging to supply a continuous DC voltage to the power management circuit 206.
[0047] In some embodiments, the power management circuit 206 can be connected to the voltage processing circuit 204. In some embodiments, the power management circuit 206 can be configured to receive the DC voltage generated by the secondary capacitor 218. In some embodiments, the power management circuit 206 can include a first processor 228 and a second processor 230. In some embodiments, the first processor 228 can be electrically coupled to the first input terminal 210 via the second diode 224. In some embodiments, the first processor 228 can be configured to receive an input voltage from the first input terminal 120.
[0048] In some embodiments, when an input voltage is received at the first input terminal 210, the second diode 224 may be configured to pass the received input voltage to the third-stage capacitor 226. In some embodiments, the second diode 224 may be configured to prevent reverse current from flowing when the input voltage is supplied to the first processor 228. In some embodiments, the first processor 228 may be configured to supply the received input voltage to the second processor 230. In some embodiments, the second processor 230 may be configured to receive the output voltage supplied by the voltage processing circuit 204 and the input voltage supplied by the second diode 224.
[0049] In some embodiments, the power management circuit 206 can be configured to supply a DC voltage to the PID circuit 208. In some embodiments, the PID circuit 208 can be configured to generate at least one signal based on the received voltage. In some embodiments, the PID circuit 208 can also be coupled to at least one signal processing circuit 232.
[0050] In some embodiments, the at least one signal may correspond to one or more electrical signals having a variable voltage. Furthermore, the PID circuit 208 may be configured to supply the at least one signal to the at least one signal processing circuit 232. In some embodiments, the at least one signal processing circuit 232 may be configured to process the received at least one signal by implementing one or more machine learning (ML) and artificial intelligence (AI) protocols. In some embodiments, the at least one signal processing circuit 232 may be configured to provide data corresponding to the intensity of the target gas 108.
[0051] In some embodiments, the at least one signal processing circuit 232 may be configured to receive an input voltage via the second diode 224 and the third-stage capacitor 226. In some embodiments, the second diode 224 and the third-stage capacitor 226 may be configured to filter the input voltage before supplying it to the at least one processing circuit 100. In some embodiments, the third-stage capacitor 226 and the second diode 224 may be configured to smooth out any fluctuations in the input voltage to stabilize the input voltage. Furthermore, the stabilized input voltage may be supplied to the at least one signal processing circuit 232 and the PID 100.
[0052] In some embodiments, the at least one signal processing circuit 232 can be configured to provide data at the output terminal 214. Furthermore, the at least one signal processing circuit 232 can be configured to determine whether the at least one signal is high or low. In some embodiments, the at least one signal processing circuit 232 can determine the at least one signal as high when a high intensity of the target gas 108 is detected. In some embodiments, the at least one signal processing circuit 232 can be configured to determine the at least one signal as low when a low intensity of the target gas 108 is detected.
[0053] In some embodiments, at least one signal processing circuit 232 can be coupled to the power management circuit 206. Furthermore, the power management circuit 206 can be configured to modify the DC voltage supplied to the PID 100. In some embodiments, the power management circuit 206 can be configured to generate a low DC voltage when determining that at least one signal is high. In some embodiments, the power management circuit 206 can be configured to generate a high DC voltage when determining that at least one signal is low.
[0054] In some embodiments, the modified DC voltage supplied to the PID 100 by the power management circuit 206 may be inversely proportional to the intensity of the target gas 108 detected by the PID 100. In some embodiments, the power management circuit 206 may be configured to control the modified DC voltage supplied to the PID 100 based on at least one of degradation of PID accuracy, drift of at least one signal over time, and a duty cycle of the PID 100. Furthermore, prolonged use of the PID 100 may result in degradation of the accuracy of the PID 100 and drift of at least one signal.
[0055] like Figure 2B As shown, circuit 200 may include a circular base. Furthermore, the circular base may be configured to provide a platform for manufacturing electronic and mechanical components associated with circuit 200. In some embodiments, the circular base may have a radius of curvature, such as a radius of 17 mm. Furthermore, output terminal 214 may be manufactured to be approximately 4.24 mm from the center of the circular base. Furthermore, the distance between first input terminal 210 and the output terminal may be 7.62 mm. In some embodiments, the distance between first input terminal 210 and second input terminal 212 may be 5.08 mm.
[0056] like Figure 3 As shown, in one example embodiment, the voltage processing circuit 204 can be supplied with a constant input voltage (Vin) 302 at one or more duty cycles via the first input terminal 210 of the one or more input terminals 202. Furthermore, the voltage processing circuit 204 can be configured to generate a DC voltage (Ua) 304. In some embodiments, the input voltage ranges from 3 to 5.5 volts. Furthermore, the DC voltage can be supplied to the power management circuit 206.
[0057] Figure 4 A flow chart of a method 400 according to an example embodiment of the present disclosure is shown.
[0058] At operation 402, voltage processing circuit 204 coupled to PID circuit 208 may be configured to receive an input voltage. Furthermore, voltage processing circuit 204 may include a primary capacitor 216 and a secondary capacitor 218. In some embodiments, voltage processing circuit 204 may be coupled to one or more input terminals 202. Furthermore, one or more input terminals 202 may be configured to supply an input voltage to voltage processing circuit 204. For example, circuit 200 may be coupled to a signal generator. Furthermore, the signal generator may be configured to supply a 5V input voltage to circuit 200 via one or more input terminals 202. Circuit 200 includes voltage processing circuit 204 having primary capacitor 216 and secondary capacitor 218.
[0059] At operation 404, the primary capacitor 216 may be configured to isolate the direct current (DC) portion of the received input voltage. In some embodiments, the input voltage may correspond to a pulse width modulated (PWM) voltage. Additionally, the primary capacitor 216 may be configured to store charge to generate an isolated DC voltage. For example, the primary capacitor 216 may be configured to isolate the DC portion of a 5V input voltage to store 5 coulombs of charge.
[0060] At operation 406, charge may be stored by the secondary capacitor 218 to generate a DC voltage. In some embodiments, the secondary capacitor 218 may be coupled to the primary capacitor 216 and supplied with an isolated DC voltage. Furthermore, the secondary capacitor 218 may be configured to store sufficient charge to generate the DC voltage. For example, the secondary capacitor 218 may be configured to store charge to generate a 10V DC voltage.
[0061] At operation 408, the voltage processing circuit 204 determines whether the charge has reached a predefined threshold to generate a DC voltage. In some embodiments, the secondary capacitor 218 may be configured to store charge up to the predefined threshold. In some embodiments, when the secondary capacitor 218 is fully charged, the secondary capacitor 218 may generate a DC voltage. For example, the secondary capacitor 218 may be configured to store charge up to a predefined threshold. Furthermore, the predefined threshold corresponds to 5 farads. After charging is complete, the secondary capacitor 218 generates a DC voltage of 10V.
[0062] At operation 410, upon determining that the charge has reached a predefined threshold, the power management circuit 206 may supply the generated DC voltage to the PID 100. In some embodiments, the power management circuit 206 may be configured to modify the supplied DC voltage upon determining that the charge has reached the predefined threshold. In some embodiments, the power management circuit 206 may include a first processor 228 and a second processor 230. In some embodiments, the second processor 230 may be configured to modify the DC voltage supplied to the PID 100. For example, the circuit 200 may further include a power management circuit 206 electrically coupled to the secondary capacitor 218. Furthermore, the power management circuit 206 may be configured to supply the generated 10V DC voltage to the PID 100.
[0063] At operation 412, PID 100 may generate at least one signal based on the modified DC voltage. In some embodiments, PID 100 may be configured to generate at least one signal upon receiving the DC voltage. In some embodiments, PID 100 includes at least one UV light source 102, at least one primary electrode 104, and at least one secondary electrode 106. Furthermore, upon receiving the modified DC voltage, at least one UV light source 102 may be configured to emit UV light. In some embodiments, at least one primary electrode 104 and at least one secondary electrode 106 may be configured to provide one or more electrical signals upon ionizing one or more molecules 112 of a substance present near PID 100.
[0064] Furthermore, one or more electrical signals can correspond to at least one signal. For example, PID 100 includes at least one ultraviolet (UV) light source 102, at least one primary electrode 104, and at least one secondary electrode 106. When receiving a modified DC voltage, at least one UV light source 102 emits UV light near PID 100. Furthermore, the emitted UV light is configured to ionize one or more molecules 112 of a substance present near PID 100. At least one primary electrode 104 and at least one secondary electrode 106 are configured to generate one or more electrical signals when subjected to a potential difference. PID 100 generates at least one signal corresponding to the generated one or more electrical signals.
[0065] At operation 414, the at least one signal may be processed by at least one signal processing circuit 232 coupled to the PID 100. Furthermore, the at least one signal may be configured to provide data corresponding to the intensity of the target gas 108. In some embodiments, the at least one signal processing circuit 232 may be configured to implement one or more machine learning (ML) and artificial intelligence (AI) protocols to provide data corresponding to the intensity of the target gas 108. For example, the circuit 200 further includes at least one signal processing circuit 232 that processes the at least one signal received from the PID 100. Furthermore, upon processing the at least one signal, the at least one signal processing circuit 232 generates data corresponding to the intensity of the target gas 108. Furthermore, the target gas 108 corresponds to carbon monoxide (CO) gas.
[0066] Figure 5A shows a flow chart 500 of a first operating scenario according to an example embodiment of the present disclosure. Figure 5B shows a flow chart 510 of a second operating scenario according to an example embodiment of the present disclosure.
[0067] In one example embodiment, at operation 502, at least one signal processing circuit 232 may be configured to provide at least one signal at output terminal 214. In some embodiments, the at least one signal may provide data corresponding to the intensity of the target gas 108. In some embodiments, one or more computing devices (not shown) may be connected to the output terminal 214. At operation 504, a determination is made as to whether the at least one signal is saturated. In some embodiments, saturation of the at least one signal corresponds to a higher intensity of the target gas 108.
[0068] At operation 506, the voltage processing circuit 204 may be configured to receive an input voltage having a reduced duty cycle when at least one signal is saturated. Furthermore, due to the reduced duty cycle of the input voltage, the second processor 230 of the power management circuit 206 may be configured to reduce the output voltage. In some embodiments, the output voltage may correspond to a modified DC voltage.
[0069] At operation 508, the voltage processing circuit 204 may be configured to receive an input voltage with a constant duty cycle if at least one signal is not saturated. Furthermore, since the duty cycle of the input voltage is constant, the second processor 230 of the power management circuit 206 may be configured to provide an output voltage. In some embodiments, the output voltage may correspond to a modified DC voltage.
[0070] In another example embodiment as shown in FIG5B , at operation 512, the at least one signal processing circuit 232 may be configured to provide at least one signal at the output terminal 214. In some embodiments, the at least one signal may provide data corresponding to the intensity of the target gas 108. In some embodiments, at operation 514, a determination is made as to whether the at least one signal is unsaturated. In some embodiments, the at least one signal being unsaturated corresponds to a low intensity of the target gas 108.
[0071] At operation 516, the voltage processing circuit 204 may be configured to receive an input voltage having an increased duty cycle when the at least one signal is not saturated. Furthermore, due to the increased duty cycle of the input voltage, the second processor 230 of the power management circuit 206 may be configured to increase the output voltage. In some embodiments, the output voltage may correspond to a modified DC voltage.
[0072] At operation 518, the voltage processing circuit 204 may be configured to receive an input voltage with a constant duty cycle if the at least one signal is not unsaturated. Furthermore, since the duty cycle of the input voltage is constant, the second processor 230 of the power management circuit 206 may be configured to provide an output voltage. In some embodiments, the output voltage may correspond to a modified DC voltage.
[0073] Figure 6A flowchart 600 is shown of a third operational scenario according to an example embodiment of the present disclosure. Figure 7 Flowchart 700 illustrates a fourth operational scenario according to an example embodiment of the present disclosure.
[0074] In some embodiments, after using circuit 200 for a period of time, circuit 200 may experience degradation in PID circuit accuracy and drift in at least one signal. At operation 602, circuit 200 may need to be calibrated to correct for the degradation in PID circuit accuracy and drift in at least one signal. In some embodiments, circuit 200 may be exposed to a predefined amount of a standard gas.
[0075] At operation 604, at least one signal processing circuit 232 may be configured to provide at least one signal at output terminal 214. In some embodiments, the at least one signal may provide data corresponding to a standard gas intensity. At operation 606, one or more computing devices may be configured to determine whether the at least one signal is the same as a signal value of a standard gas.
[0076] At operation 608, when at least one signal differs from the signal value of the standard gas, the voltage processing circuit 204 may be configured to adjust the duty cycle of the input voltage. Furthermore, due to the adjusted duty cycle of the input voltage, the second processor 230 of the power management circuit 206 may be configured to adjust the output voltage. In some embodiments, the output voltage may correspond to a modified DC voltage.
[0077] At operation 610, when at least one signal has the same value as the signal of the standard gas, the voltage processing circuit 204 may be configured to receive an input voltage with a constant duty cycle. Furthermore, since the duty cycle of the input voltage remains constant, the second processor 230 of the power management circuit 206 may be configured to provide an output voltage. At operation 612, the power management circuit 206 may be configured to complete calibration of the circuit 200 after providing the output voltage to the PID 100. In some embodiments, the output voltage may correspond to a modified DC voltage.
[0078] like Figure 7 As shown, at operation 702, the voltage processing circuit 204 may be configured to receive an input voltage. In some embodiments, the input voltage may be set at a suitable duty cycle to enable the second processor 230 to generate an output voltage for the PID 100 to operate.
[0079] At operation 704, the at least one signal processing circuit 232 may be configured to provide at least one signal at the output terminal 214. In some embodiments, the at least one signal may provide data corresponding to the intensity of the target gas 108. Additionally, the at least one signal may be read by one or more computing devices.
[0080] At operation 706, the voltage processing circuit 204 may be configured to receive an input voltage with a reduced duty cycle to cause the second processor 230 to output to operate the PID 100 in a non-sleep mode or to operate the PID 100 under a low load. At operation 708, the second processor 230 may be configured to initiate a sleep mode of the PID circuit 208 for a preset time period to improve the power efficiency of the circuit 200.
[0081] Figure 8 FIG. 8 is a block diagram of an external system 800 according to an example embodiment of the present disclosure. Figure 1-7 describe Figure 8 .
[0082] External system 800 may include PID 100, which includes circuitry 200 communicatively coupled to processor 802, and has memory 804, input / output circuitry 806, user equipment 808, communication circuitry 810, and network 812. In some embodiments, external system 800 may be operatively coupled to PID 100. PID 100 may also include circuitry 200 including voltage processing circuitry 204, power management circuitry 206, PID driver circuitry 208, and at least one signal processing circuit 232.
[0083] In some embodiments, the voltage processing circuit 204 can be configured to receive an input voltage from one or more input terminals 202. Furthermore, the voltage processing circuit 204 can be configured to generate a DC voltage and supply the DC voltage to the power management circuit 206. Furthermore, the power management circuit 206 can be configured to modify the received DC voltage. In some embodiments, the power management circuit 206 can be configured to supply the modified DC voltage to the PID driver circuit 208. Furthermore, the PID driver circuit 208 operates the PID 100 upon receiving the modified DC voltage.
[0084] In some embodiments, PID 100 can be configured to determine the intensity of a target gas. Furthermore, PID 100 can be configured to generate at least one signal having data corresponding to the intensity of the target gas. Furthermore, at least one signal processing circuit 232 can be configured to process the at least one signal and provide the processed at least one signal at at least one output terminal 214.
[0085] In an exemplary embodiment, the external system 800 can be connected to the PID 100 through at least one output terminal 214. In addition, the processor 802 can be configured to receive at least one signal from the at least one output terminal 214. In some embodiments, the processor 802 may include suitable logic, circuitry, and / or interfaces that are operable to execute one or more instructions stored in the memory 804 to perform predetermined operations. In one embodiment, the processor 802 can be configured to decode and execute any instructions received from one or more other electronic devices or servers. The processor 802 can be configured to execute one or more computer-readable program instructions, such as program instructions that perform any of the functions described in this description. In addition, the processor 802 can be implemented using one or more processor technologies known in the art. Examples of the processor 802 include, but are not limited to, one or more general-purpose processors (e.g., or Advanced Micro (AMD) microprocessors) and / or one or more special purpose processors (e.g., digital signal processors or System on a chip (SOC) Field Programmable Gate Array (FPGA) Processor).
[0086] In some embodiments, processor 802 may be configured to process at least one received signal. In an exemplary embodiment, external system 800 may be used for a specific application. Furthermore, the specific application may be detecting the intensity of a target gas within a refinery. In some embodiments, processor 802 may be configured to process at least one received signal from PID 100.
[0087] In addition, the memory 804 can be communicatively coupled to the processor 802. In addition, the memory 804 can be configured to store a set of instructions and data executed by the processor 802. In addition, the memory 804 can include one or more instructions that can be executed by the processor 802 to perform specific operations. It is obvious to those skilled in the art that the one or more instructions stored in the memory 804 enable the hardware of the external system 800 to perform predetermined operations. Some well-known memory 804 implementations include, but are not limited to, fixed (hard) drives, magnetic tapes, floppy disks, optical disks, compact disk read-only memories (CD-ROMs) and magneto-optical disks, semiconductor memories (e.g., ROMs, random access memories (RAMs), programmable read-only memories (PROMs), erasable PROMs (EPROMs), electrically erasable PROMs (EEPROMs), flash memories, magnetic cards or optical cards) or other types of media / machine-readable media suitable for storing electronic instructions.
[0088] In some embodiments, processor 802 can be configured to generate a signal in response to processing at least one signal. Additionally, in one embodiment, processor 802 can transmit a signal to user device 808 via input / output circuitry 806 or via communication circuitry 810 via network 812 when the intensity of the target gas does not match a predefined threshold limit.
[0089] External system 800 may include input / output circuitry 806, which enables a user to communicate or dock with external system 800 via user equipment 808. User equipment 808 may include N user devices. It may be noted that input / output circuitry 806 may serve as a medium for transmitting input from user equipment 808 to external system 800 and transmitting input from external system 800. In some embodiments, input / output circuitry 806 may refer to hardware and software components that facilitate the information exchange between a user and external system 800. In one example, user equipment 808 may include a graphical user interface (GUI) (not shown) as an input circuit to allow a user to input data. Input / output circuitry 806 may include various input devices (e.g., keyboards, barcode scanners, GUIs) for providing data to a user, and various output devices (e.g., displays, printers) for receiving data from a user.
[0090] In some embodiments, the external system 800 may include a communication circuit 810. The communication circuit 810 may allow the external system 800 and the user device 808 to exchange data or information with other external systems 800 or devices. In addition, the external system 800 may be coupled to a network interface for communication via one or more protocols and software modules for sending and receiving data or information. In some embodiments, the communication circuit 810 may include a network 812, an Ethernet port, a Wi-Fi adapter, or a communication protocol for connecting to other systems, such as HTTP or MQTT. The communication circuit 810 may allow the external system 800 to stay up to date. In some embodiments, the user device 808 may include at least one of one or more mobile phones, laptop computers, etc.
[0091] Embodiments may improve the accuracy of PID 100 when detecting the intensity of target gas 108. Embodiments may improve the operating range of PID 100 by using power management circuit 206. Embodiments may enhance the resolution of the output signal provided by PID 100. Embodiments may increase the stability of the PID circuit output signal. Embodiments may optimize the power consumption of PID 100. Embodiments may effectively conserve energy to extend the operating life of PID 100. Embodiments may provide one or more modes of operation for PID 100 to meet one or more operating conditions.
[0092] Benefiting from the teachings presented in the foregoing description and the associated drawings, those skilled in the art to which the present disclosure pertains will appreciate the many modifications and other embodiments of the present disclosure set forth herein. Therefore, it should be understood that the present disclosure is not limited to the specific embodiments disclosed, and modifications and other embodiments are intended to be included within the scope of the appended claims. In addition, although the foregoing description and the associated drawings have described example embodiments in the context of certain example combinations of elements and / or functions, it should be understood that alternative embodiments may provide different combinations of elements and / or functions without departing from the scope of the appended claims. In this regard, for example, combinations of elements and / or functions that are different from those explicitly described above are also contemplated, as may be set forth in some of the appended claims. Although specific terms are employed herein, they are used only in a general and descriptive sense, and not for the purpose of limitation.
Claims
1. A method comprising: receiving an input voltage via a voltage processing circuit coupled to a photoionization detector (PID) circuit, wherein the voltage processing circuit includes a primary capacitor and a secondary capacitor; isolating a direct current (DC) portion of the received input voltage via a primary capacitor; storing charge via a secondary capacitor to generate a DC voltage; determining that the charge reaches a predefined threshold; as well as Upon determining that the charge reaches a predefined threshold, a DC voltage generated by the secondary capacitor is supplied to the PID circuit via the power management circuit, wherein the power management circuit modifies the DC voltage supplied to the PID circuit.
2. The method of claim 1, wherein the input voltage corresponds to a pulse width modulated (PWM) voltage. 3 . The method of claim 1 , further comprising discharging the charge stored by the secondary capacitor through at least one resistor. 4 . The method of claim 1 , further comprising preventing reverse current from flowing back to the primary capacitor by a first diode connected between the primary capacitor and the secondary capacitor.
5. The method according to claim 1, further comprising: generating at least one signal based on the modified DC voltage via the PID circuit; as well as The at least one signal is processed via at least one signal processing circuit coupled to the PID circuit to provide data corresponding to the target gas intensity.
6. The method according to claim 5, further comprising: determining, via at least one signal processing circuit, whether at least one signal is high; as well as Upon determining that the at least one signal is high, a low DC voltage is generated via the power management circuit.
7. The method according to claim 5, further comprising: determining, via at least one signal processing circuit, whether at least one signal is low; as well as Upon determining that the at least one signal is low, a high DC voltage is generated via the power management circuit.
8. The method of claim 5, wherein the modified DC voltage supplied to the PID circuit is inversely proportional to the intensity of the target gas detected by the PID circuit.
9. The method according to claim 1, further comprising: The modified DC voltage received by the PID circuit is controlled via the power management circuit based on at least one of degradation of accuracy of the PID circuit, drift of the at least one signal over time, and a duty cycle of the PID circuit.
10. The method according to claim 1, further comprising: filtering the input voltage via the third-stage capacitor and the second diode to eliminate noise in the input voltage and stabilize the input voltage; as well as A stabilized input voltage is supplied to at least one of a signal processing circuit and a PID circuit.
11. A device comprising: Photoionization detector (PID) circuit; a voltage processing circuit connected to the PID circuit and configured to receive an input voltage, wherein the voltage processing circuit further comprises: a primary capacitor configured to isolate a direct current (DC) portion of the received input voltage; and a secondary capacitor configured to store charge to generate a DC voltage; and A power management circuit is connected to the voltage processing circuit, wherein the power management circuit is configured to: supplying a DC voltage generated by the secondary capacitor to the PID circuit upon determining that the charge reaches a predefined threshold; and Change the DC voltage supplied to the PID circuit.
12. The apparatus of claim 11, wherein the input voltage corresponds to a pulse width modulated (PWM) voltage.
13. The apparatus of claim 11, further comprising at least one resistor configured to discharge the charge stored by the secondary capacitor. 14 . The apparatus of claim 11 , wherein the first diode connected between the primary capacitor and the secondary capacitor is configured to prevent reverse current from flowing back to the primary capacitor.
15. The apparatus of claim 11, wherein the PID circuit is further configured to generate at least one signal based on the modified DC voltage.
16. The apparatus of claim 15, further comprising at least one signal processing circuit coupled to the PID circuit and configured to process the at least one signal to provide data corresponding to the target gas intensity. 17 . The apparatus of claim 15 , further comprising determining whether the at least one signal is high, wherein the power management circuit is configured to generate the low DC voltage when the at least one signal is determined to be high.
18. The apparatus of claim 15, further comprising determining whether the at least one signal is low, wherein the power management circuit is configured to generate the high DC voltage when the at least one signal is determined to be low.
19. The apparatus of claim 16, wherein the modified DC voltage supplied to the PID circuit is inversely proportional to the intensity of the target gas detected by the PID circuit.
20. The device of claim 11, wherein the power management circuit is configured to control the modified DC voltage received by the PID circuit based on at least one of degradation of accuracy of the PID circuit, drift of the at least one signal over time, and a duty cycle of the PID circuit.