Processing system, related integrated circuit, device and method

By introducing multiple safety monitoring circuits and fault collection and error management circuits into the processing system, and using sequential logic circuits and different voltage/clock signals, the problem of fault collection and error management circuits not being able to operate correctly is solved, thereby improving the safety and reliability of the system.

CN120724930APending Publication Date: 2025-09-30STMICROELECTRONICS INT NV
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Patent Information

Application Number
CN202510300346.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2025-03-03
Filing Date
2025-03-14
Publication Date
2025-09-30

AI Technical Summary

Technical Problem

In the prior art, fault collection and error management circuits in processing systems may not operate correctly, resulting in unreported errors that may pose safety risks, especially in automotive applications, and may cause dangerous scenarios.

Method used

By introducing multiple safety monitoring circuits and fault collection and error management circuits into the processing system, using sequential logic circuits and driven by different supply voltages and clock signals, monitoring the circuit operation of the processing system, and detecting error signals through pulse generators and monitoring circuits, the correct operation of the fault collection and error management circuits is ensured.

Benefits of technology

Effectively monitoring and managing errors in the processing system reduces the risk of failure of fault collection and error management circuits, ensures timely error processing, and improves system safety and reliability.

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Abstract

The invention relates to a processing system, a related integrated circuit, a device and a method. The processing system includes a plurality of safety monitoring circuits and a fault collection and error management circuit configured to generate one or more reaction signals based on an error signal provided by the safety monitoring circuits. The fault collection and error management circuit includes a sequential logic circuit powered by a first supply voltage and driven by a first clock signal, and a pulse generator circuit configured to generate a trigger signal in response to the first clock signal. The processing system also includes first and second monitoring circuitry and combinatorial logic circuitry. In response to determining that the first or second error signal is asserted by the first or second monitoring circuit, respectively, the combinatorial logic circuit asserts the third error signal.
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Citation Information

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