Digital-to-analog conversion circuit and analog-to-digital conversion circuit multiplexing device in storage and calculation integrated chip

Abstract

The invention provides a digital-to-analog conversion circuit and analog-to-digital conversion circuit multiplexing device in a storage and calculation integrated chip. Comprising a digital-to-analog conversion circuit (DAC) module, an analog vector-matrix multiplication circuit (AMAC) module, an analog-to-digital conversion circuit (ADC) module, a first many-to-one multiplexer (M1-MUX) module, a second many-to-one multiplexer module, a first one-to-many multiplexer (1M-MUX) module, a second one-to-many multiplexer module and a switch transistor module. At an AMAC input end, each DAC corresponds to a plurality of input ports, and sharing is carried out through a first M1-MUX module and a first 1M-MUX module in a time multiplexing mode; at an AMAC output end, each ADC corresponds to a plurality of output ports, and sharing is carried out through a second M1-MUX module and a second 1M-MUX module in a time multiplexing mode; the number of DACs and ADCs is reduced, and the chip area is reduced.

Description

Technical Field

[0001] The present invention relates to the field of microelectronic integrated circuits, and in particular to a device for multiplexing digital-to-analog conversion circuits and analog-to-digital conversion circuits in a storage-computing integrated chip. Background Art

[0002] The integrated storage and computing chip architecture is currently considered one of the most efficient hardware platforms for solving the real-time intelligent processing of big data, and analog vector-matrix multiplication is the core circuit of the integrated storage and computing chip, especially the integrated storage and computing chip based on flash memory. For a typical analog vector-matrix multiplication circuit, since the signal it processes is an analog signal, and its input and output signals are usually required to be digital signals, it is usually necessary to convert the digital signal into an analog signal through a digital-to-analog converter circuit (DAC) at the input end, and convert the processed analog signal into a digital signal through an analog-to-digital converter circuit (ADC) at the output end, such as Figure 1 shown.

[0003] However, the area of ​​high-precision DAC and ADC is usually very large. In a typical integrated memory and computing chip, each input of the analog vector-matrix multiplication circuit is required to be connected to a DAC, and each output is required to be connected to an ADC. Figure 2 As shown, this approach greatly causes area waste and cost overhead. Summary of the Invention

[0004] In view of this, the present invention provides a device for multiplexing digital-to-analog conversion circuits and analog-to-digital conversion circuits in a storage and computing integrated chip, which shares DAC and ADC through time-division multiplexing, thereby effectively reducing the number of components, reducing circuit area, lowering cost expenditure, and facilitating integration.

[0005] In order to achieve the above object, the present invention adopts the following technical solutions:

[0006] A device for multiplexing a digital-to-analog conversion circuit and an analog-to-digital conversion circuit in a storage-computing integrated chip, comprising a first many-to-one multiplexer (M1-MUX) module, a digital-to-analog conversion circuit (DAC) module, and a first one-to-many multiplexer (1M-MUX) module; wherein the input end of the DAC module is connected to the output end of the first M1-MUX module, and the output end of the DAC module is connected to the input end of the first 1M-MUX module;

[0007] The first M1-MUX module includes a plurality of first M1-MUX units, configured to select a signal from a plurality of input ports as an output;

[0008] The first 1M-MUX module includes a plurality of first 1M-MUX units, which are used to output an input signal to different output ports;

[0009] The DAC module includes multiple DAC units for converting digital signals into analog signals; the input end of each DAC unit is connected to the output end of the corresponding first M1-MUX unit, and the output end of the DAC unit is connected to the input end of the corresponding first 1M-MUX unit;

[0010] Each of the DAC units corresponds to a plurality of input ports, which are shared by the corresponding first M1-MUX unit and the corresponding first 1M-MUX unit in a time division multiplexing manner.

[0011] Furthermore, the multiplexing device further includes an analog vector-matrix multiplication circuit (AMAC) module and a switch transistor module; wherein the output end of the first 1M-MUX module is connected to the input end of the AMAC module through the switch transistor module;

[0012] The AMAC module is composed of programmable semiconductor devices, and the threshold voltage of each programmable semiconductor device can be dynamically programmed;

[0013] The switching transistor module includes a plurality of switching transistor units, which are used to switch on or off the signal connection between the first 1M-MUX unit and the input end of the AMAC module;

[0014] Each row of the AMAC module is connected to its corresponding switch transistor unit.

[0015] Furthermore, the multiplexing device also includes a second M1-MUX module, an analog-to-digital conversion circuit (ADC) module, and a second 1M-MUX module; wherein the input end of the ADC module is connected to the output end of the second M1-MUX, the output end of the ADC module is connected to the input end of the second 1M-MUX module, and the input end of the second M1-MUX module is connected to the output end of the AMAC module.

[0016] The second M1-MUX module includes a plurality of second M1-MUX units, which are used to select a signal from a plurality of input ports as an output;

[0017] The ADC module includes multiple ADC units;

[0018] The second 1M-MUX module includes a plurality of second 1M-MUX units, which are used to output an input signal to different output ports.

[0019] Furthermore, it also includes a controller, which is connected to the first M1-MUX module, the DAC module, the first 1M-MUX module, the AMAC module, the switching transistor module, the second M1-MUX module, the ADC module, and the second 1M-MUX module; is used to control the selection of a signal from multiple input signals as an output through the first and second M1-MUX units at each moment; is used to control the selection of an input signal to be output to different output ports through the first and second 1M-MUX units at each moment; and is used to control the opening and closing of the corresponding switching transistor unit at each moment.

[0020] The controller controls the switching transistor module and the first M1-MUX module and the first 1M-MUX module connected to the DAC module in a time-division multiplexing manner, and selects the corresponding input signal to be imported into the AMAC module; the controller controls the second M1-MUX module and the second 1M-MUX module connected to the ADC module in a time-division multiplexing manner, and selects the output signal corresponding to the output end of the AMAC module for output.

[0021] The device for multiplexing digital-to-analog conversion circuits and analog-to-digital conversion circuits in a storage-computing integrated chip provided by the present invention realizes sharing of DAC and ADC units in a time-division multiplexing manner by providing first and second M1-MUX modules, a switching transistor module, and first and second 1M-MUX modules, and adopting specific connection relationships and controls, thereby effectively reducing the number of components, reducing circuit area, lowering cost expenditure, and facilitating integration.

[0022] In order to make the above and other objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0024] Figure 1 This is a block diagram of the analog vector-matrix multiplication circuit, the corresponding digital-to-analog conversion circuit, and the analog-to-digital conversion circuit in a typical integrated memory and computing chip.

[0025] Figure 2 This is an implementation diagram of the analog vector-matrix multiplication circuit, the corresponding digital-to-analog conversion circuit, and the analog-to-digital conversion circuit in a typical integrated memory and computing chip;

[0026] Figure 3This is a block diagram of an embodiment of a device for multiplexing a digital-to-analog conversion circuit and an analog-to-digital conversion circuit in a storage-computing integrated chip according to the present invention;

[0027] Figure 4 This is a circuit diagram of an embodiment of a device for multiplexing a digital-to-analog conversion circuit and an analog-to-digital conversion circuit in a storage-computing integrated chip according to the present invention;

[0028] Figure 5 This is a flow chart of a method for multiplexing digital-to-analog conversion circuits in a storage-computing integrated chip according to the present invention;

[0029] Figure 6 This is a flow chart of a method for multiplexing analog-to-digital conversion circuits in a storage-computing integrated chip according to the present invention; DETAILED DESCRIPTION

[0030] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0031] The analog vector-matrix multiplication circuit (AMAC) is the core circuit of a memory-computing integrated chip. A typical AMAC processes analog signals, but its input and output signals are usually required to be digital signals. Therefore, it is usually necessary to convert the digital signal into an analog signal through a digital-to-analog converter (DAC) at the input end for input, and convert the processed analog signal into a digital signal through an analog-to-digital converter (ADC) at the output end for output. Figure 1 As shown in Figure 2, each input of the AMAC is required to be connected to a DAC, and each output is required to be connected to an ADC, as shown in Figure 2. Figure 2 As shown, this approach greatly causes area waste and cost overhead.

[0032] In order to solve the above technical problems in the prior art, an embodiment of the present invention provides a device for multiplexing digital-to-analog conversion circuits and analog-to-digital conversion circuits in a storage-computing integrated chip, such as Figure 3 As shown, it includes a first M1-MUX module, a DAC module, a first 1M-MUX module, an AMAC module, a switch transistor module, a second M1-MUX module, an ADC module, and a second 1M-MUX module.

[0033] The AMAC includes: a programmable semiconductor device array;

[0034] Among them, the principle of the AMAC to implement analog vector-matrix multiplication operation is as follows: For an array of programmable semiconductor devices with M rows × N columns, the sources of all programmable semiconductor devices in each column are connected to the same analog voltage input terminal. The N columns of programmable semiconductor devices are correspondingly connected to N analog voltage input terminals. The gates of all programmable semiconductor devices in each row are connected to the same bias voltage input terminal. The M rows of programmable semiconductor devices are correspondingly connected to M bias voltage input terminals. The drains of all programmable semiconductor devices in each column are connected to the same analog current output terminal. The N columns of programmable semiconductor devices are correspondingly connected to N analog current output terminals. Among them, the threshold voltage of each programmable semiconductor device can be adjusted. N is a positive integer greater than or equal to zero, and M is a positive integer greater than or equal to zero. M and N can be equal or unequal, thus forming a source-coupled and drain-summing topological structure.

[0035] Among them, by dynamically adjusting the threshold voltage V of each programmable semiconductor device according to certain rules in advance TH , each programmable semiconductor device can be regarded as a variable equivalent analog weight (denoted as W k,j , where 0 < k < M and 0 < j < N respectively represent the row number and column number), which is equivalent to storing an analog data, while the programmable semiconductor device array stores an analog data array

[0036] When the circuit works, a row of analog voltage signals V1 to V N are respectively applied to the N columns of programmable semiconductor devices. The sources of all programmable semiconductor devices in the Kth column all receive an analog voltage signal V k , the gates receive a bias voltage V b , and the drains respectively output current signals I k,1 to I k,N . Among them, according to the characteristics of the programmable semiconductor device, I = V × W. The drain output current of each programmable semiconductor device is equal to the source voltage multiplied by the weight of this programmable semiconductor device, that is, I k,1 = V k W k,1 , I k,N = V k W k,N . Because the drains of all programmable semiconductor devices in each column are connected to the same analog current output terminal, according to Kirchhoff's law, the current I j at this analog current output terminal is the sum of the drain currents of all programmable semiconductor devices in this column, that is Multiple analog current output terminals output multiple current sums to implement the matrix multiplication operation function.

[0037] Of course, the programmable semiconductor device array may also adopt a gate-coupled, source-summed topology or a gate-coupled, drain-summed topology, which is not limited in the embodiment of the present invention.

[0038] Next, the principle of the digital-to-analog conversion circuit and the analog-to-digital conversion circuit multiplexing device according to the embodiment of the present invention is described: Figure 3 and Figure 4 As shown, it includes a first M1-MUX module, a DAC module, a first 1M-MUX module, an AMAC module, a switching transistor module, a second M1-MUX module, an ADC module, and a second 1M-MUX module. The output end of the first M1-MUX module is connected to the input end of the DAC module, the output end of the DAC module is connected to the input end of the first 1M-MUX module, the output end of the first 1M-MUX module is connected to the input end of the AMAC module through the switching transistor module, the output end of the AMAC module is connected to the input end of the second M1-MUX module, the output end of the second M1-MUX module is connected to the input end of the ADC module, and the output end of the ADC module is connected to the input end of the second 1M-MUX module.

[0039] By time-division multiplexing each DAC with multiple (e.g., T) inputs of the AMAC, and similarly, by time-division multiplexing each ADC with multiple (e.g., P) outputs of the AMAC, the number of ADCs and DACs can be reduced, thereby reducing chip area. Here, T is typically a factor of 2 or M, for example, 2, 4, 6, 8, etc.; and P is typically a factor of N, for example, 2, 4, 6, 8, etc. The values ​​of T and P are determined by actual chip area and latency.

[0040] The multiplexing method for DAC is as follows: when M digital signals need to be input to the AMAC module, the controller controls the first M1-MUX module and the first 1M-MUX module connected to the DAC module, and controls the corresponding switch transistors at the same time to input the digital signals in a time-sharing manner. Figure 5As shown): At the first moment, the 1st, T+1, 2T+1, ..., (M / T-1)T+1 digital signal is selected, and the switch transistor unit of the corresponding row of the AMAC module is turned on (the switch transistor units of other rows are turned off), and the digital signal is converted into an analog signal through the DAC module and input into the 1st, T+1, 2T+1, ..., (M / T-1)T+1 row of the AMAC module; then the switch transistor unit of the 1st, T+1, 2T+1, ..., (M / T-1)T+1 row is turned off to clamp the input signal of the current row; at the second moment, the 2nd, T+2, 2T+1 are selected. T+2, ..., (M / T-1)T+2 digital signals are simultaneously turned on in the corresponding row of the AMAC module (the switching transistor units in other rows are turned off). The digital signals are converted into analog signals through the DAC module and input into the 2nd, T+2, 2T+2, ..., (M / T-1)T+2 rows of the AMAC module. Then, the switching transistor units in the 2nd, T+2, 2T+2, ..., (M-1) / T+2 rows are turned off to clamp the input signal of the current row. This process is repeated until all digital signals are input into the AMAC module. Finally, an analog vector-matrix multiplication operation is performed.

[0041] The multiplexing method for ADC is as follows (such as Figure 6 As shown): When the AMAC module needs to output N analog vector-matrix multiplication results, the controller controls the second M1-MUX module and the second 1M-MUX module connected to the ADC module to output the results in a time-sharing manner. At the first moment, the output ports of the 1st, P+1, 2P+1, ..., (N / P-1) / P+1 columns of the AMAC module are selected, and the corresponding analog signals are converted into digital signals for output through the ADC module; at the second moment, the output ports of the 2nd, P+2, 2P+2, ..., (N / P-1) / P+2 columns of the AMAC module are selected, and the corresponding analog signals are converted into digital signals for output through the ADC module; and so on, until the analog signals of all columns of the AMAC module are converted into digital signals for output through the ADC module.

[0042] If we adopt the existing solution, we need to connect a DAC unit in each row and an ADC unit in each column, which requires M DAC units and N ADC units. Usually, M and N are relatively large, for example, 1024. However, with the solution provided by the present invention, we only need M / T DAC units, N / P ADC units, (M / T) first M1-MUX units, (N / P) second M1-MUX units, (M / T) first 1M-MUX units, (N / P) second 1M-MUX units and M switching transistor units. It is worth noting that the area of ​​each (first and second) M1-MUX unit and (first and second) 1M-MUX unit is much smaller than the area of ​​the ADC unit and the DAC unit. It can be understood by those skilled in the art that the larger M and N are, and the larger T and P are, the more obvious the advantages of the present invention are.

[0043] In an optional embodiment, the device further includes: a programming circuit connected to the source, gate and / or substrate of each programmable semiconductor device, for adjusting the threshold voltage of the programmable semiconductor device.

[0044] In an optional embodiment, the system further includes: a controller for controlling the multiplexing process of the DAC and the DAC.

[0045] In the above embodiment, the programmable semiconductor device may use a floating gate transistor.

[0046] In an optional embodiment, the analog vector-matrix multiplication circuit may further include: a conversion device connected before the multiple analog voltage input terminals, for converting the multiple analog current input signals into analog voltage input signals respectively, and inputting them to the corresponding analog voltage input terminals.

[0047] The above is only an example to illustrate the specific structure of each module of the present invention. In specific implementation, the specific structure of each module is not limited to the above structure provided in the embodiment of the present invention, and can also be other structures known to those skilled in the art, which is not limited here.

[0048] On the other hand, an embodiment of the present invention further provides a chip, which includes the above-mentioned analog vector-matrix multiplication circuit, a digital-to-analog conversion circuit and an analog-to-digital conversion circuit multiplexing device.

[0049] In addition, an embodiment of the present invention also provides an electronic device, which may include the above-mentioned analog vector-matrix multiplication circuit, digital-to-analog conversion circuit and analog-to-digital conversion circuit multiplexing device. More specifically, the electronic device may be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.

[0050] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.

[0051] Specific embodiments are used in the present invention to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core ideas. At the same time, for those skilled in the art, according to the ideas of the present invention, there may be changes in the specific implementation methods and application scopes. In summary, the contents of this specification should not be understood as limiting the present invention.

Claims

1. A control method, characterized in that: include: At a first moment, controlling the first switch transistor unit to be turned on, and controlling the input of a first input signal to a first input terminal of the analog vector-matrix multiplication circuit module, wherein the first switch transistor unit corresponds to the first input terminal; controlling the first switching transistor to turn off, so as to clamp the first input signal at the first input terminal; At a second moment, controlling the second switch transistor unit to be turned on, and controlling the input of a second input signal to a second input terminal of the analog vector-matrix multiplication circuit module, wherein the second switch transistor unit corresponds to the second input terminal; The second switch transistor unit is controlled to be turned off to clamp the second input signal at the second input terminal.

2. The control method according to claim 1, characterized in that: Also includes: When the input of the simulated vector-matrix multiplication operation circuit module is completed, the simulated vector-matrix multiplication operation circuit module is controlled to perform the simulated vector-matrix multiplication operation.

3. The control method according to claim 1 or 2, characterized in that: The controlling the input of the first input signal to the first input terminal of the analog vector-matrix multiplication circuit module includes: controlling a first one-to-many multiplexer module to output the first input signal to a first output port, wherein the first output port is connected to the first switch transistor unit, so that the first input signal is input to the first input terminal via the first switch transistor unit; The control inputs a second input signal to the second input terminal of the analog vector-matrix multiplication circuit module, including: controlling the first one-to-many multiplexer module to output the second input signal to the second output port, the second output port being connected to the second switching transistor unit, so that the second input signal is input to the second input terminal via the second switching transistor unit.

4. The control method according to any one of claims 1 to 3, characterized in that: The first input signal is a first analog signal obtained by converting a first digital signal through a digital-to-analog conversion circuit module; The second input signal is a second analog signal obtained by converting the second digital signal through the digital-to-analog conversion circuit module.

5. The control method according to claim 4, characterized in that: The controlling step of inputting a first input signal to a first input terminal of the analog vector-matrix multiplication circuit module further includes: controlling a first many-to-one multiplexer module to select the first digital signal and output it to the digital-to-analog conversion circuit module; The control inputs a second input signal to the second input terminal of the analog vector-matrix multiplication circuit module, and also includes: controlling the first many-to-one multiplexer module to select the second digital signal to output to the digital-to-analog conversion circuit module.

6. The control method according to any one of claims 1 to 5, characterized in that: Also includes: At a third moment, controlling the second many-to-one multiplexer module to select the third analog signal outputted by the first output port of the analog vector-matrix multiplication circuit module and output it to the analog-to-digital conversion circuit module, so that the analog-to-digital conversion circuit module converts the third analog signal into a third digital signal and outputs the converted signal; At the fourth moment, the second many-to-one multiplexer module is controlled to select the fourth analog signal output from the second output port of the analog vector-matrix multiplication circuit module and output it to the analog-to-digital conversion circuit module, so as to convert the fourth analog signal into a fourth digital signal through the analog-to-digital conversion circuit module and output it.

7. A controller, characterized in that: include: a unit configured to control, at a first moment, the conduction of a first switching transistor unit and control the input of a first input signal to a first input terminal of the analog vector-matrix multiplication circuit module, wherein the first switching transistor unit corresponds to the first input terminal; a unit for controlling the first switching transistor to turn off, so as to clamp the first input signal at the first input terminal; a unit configured to control, at a second moment, the conduction of a second switching transistor unit and control the input of a second input signal to a second input terminal of the analog vector-matrix multiplication circuit module, wherein the second switching transistor unit corresponds to the second input terminal; A unit for controlling the second switch transistor unit to turn off, so as to clamp the second input signal at the second input terminal.

8. The controller according to claim 7, characterized in that Also includes: A unit for controlling the analog vector-matrix multiplication operation circuit module to perform an analog vector-matrix multiplication operation when the input of the analog vector-matrix multiplication operation circuit module is completed.

9. The controller according to claim 7 or 8, characterized in that: The unit configured to control the first switching transistor unit to be turned on at a first moment and to control the first input signal to be input to the first input terminal of the analog vector-matrix multiplication circuit module is configured to: controlling a first one-to-many multiplexer module to output the first input signal to a first output port, wherein the first output port is connected to the first switch transistor unit, so that the first input signal is input to the first input terminal via the first switch transistor unit; The unit configured to control the second switching transistor unit to be turned on at the second moment, and to control the second input signal to be input to the second input terminal of the analog vector-matrix multiplication circuit module, is configured to: The first one-to-many multiplexer module is controlled to output the second input signal to a second output port, and the second output port is connected to the second switch transistor unit, so that the second input signal is input to the second input terminal via the second switch transistor unit.

10. The control method according to any one of claims 7 to 9, characterized in that: The first input signal is a first analog signal obtained by converting a first digital signal through a digital-to-analog conversion circuit module; The second input signal is a second analog signal obtained by converting the second digital signal through the digital-to-analog conversion circuit module.

11. The control method according to claim 10, characterized in that: The unit configured to control the first switching transistor unit to be turned on at a first moment and to control the first input signal to be input to the first input terminal of the analog vector-matrix multiplication circuit module is configured to: Controlling a first many-to-one multiplexer module to select the first digital signal and output it to the digital-to-analog conversion circuit module; The unit configured to control the second switching transistor unit to be turned on at the second moment, and to control the second input signal to be input to the second input terminal of the analog vector-matrix multiplication circuit module, is configured to: The first many-to-one multiplexer module is controlled to select the second digital signal and output it to the digital-to-analog conversion circuit module.

12. The control method according to any one of claims 7 to 11, characterized in that: Also includes: a unit configured to control, at a third moment, the second many-to-one multiplexer module to select the third analog signal outputted by the first output port of the analog vector-matrix multiplication circuit module and output it to the analog-to-digital conversion circuit module, so as to convert the third analog signal into a third digital signal through the analog-to-digital conversion circuit module and output the converted signal; A unit for controlling the second many-to-one multiplexer module to select, at a fourth moment, the fourth analog signal output from the second output port of the analog vector-matrix multiplication circuit module and output it to the analog-to-digital conversion circuit module, so as to convert the fourth analog signal into a fourth digital signal through the analog-to-digital conversion circuit module and output it.

13. A controller, characterized in that: The device comprises at least one processor configured to execute the control method according to any one of claims 1 to 6.

14. A chip, characterized in that: include: Analog vector-matrix multiplication circuit module; The controller according to any one of claims 7 to 13; A plurality of switch transistor units are respectively connected to a plurality of input terminals of the analog vector-matrix multiplication circuit module.

15. The chip according to claim 14, wherein: It also includes a first one-to-many multiplexer module, wherein the multiple output terminals of the first one-to-many multiplexer module are respectively connected to the multiple input terminals of the analog vector-matrix multiplication circuit module through the multiple switch transistor units.

16. The chip according to claim 15, wherein: It also includes a digital-to-analog conversion circuit module, the output end of which is connected to the input end of the first one-to-many multiplexer module.

17. The chip according to any one of claims 16, wherein: It also includes a first many-to-one multiplexer module, wherein the output end of the first many-to-one multiplexer module is connected to the input end of the digital-to-analog conversion circuit module.

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