Longitudinal Hall element

Abstract

The invention provides a vertical Hall element capable of adjusting magnetic detection sensitivity. A vertical Hall element (100) is provided with: a P-type semiconductor substrate (10); an N-type epitaxial layer (30) formed on the surface of the P-type semiconductor substrate (10); an electrode group (110) which is disposed on the surface of the N-type epitaxial layer (30) and on which electrodes (111-115) are disposed in a straight line; a constant current source through which a constant current flows between the electrodes (111-115) in the electrode group (110); and a conductor (120) that is disposed so as to overlap at least a portion of the current path of the constant current in plan view, and that can be applied with a predetermined voltage.

Description

Technical Field

[0001] The present invention relates to a vertical Hall element. Background Art

[0002] Hall elements can be easily formed on the surface of a semiconductor substrate and can be used as magnetic sensors for contactless position and angle detection, making them useful in a variety of applications.

[0003] Among Hall elements, horizontal Hall elements that detect a magnetic field component perpendicular to the surface of a semiconductor substrate are generally known, but various vertical Hall elements that detect a magnetic field component parallel to the surface of a semiconductor substrate have also been proposed.

[0004] For example, a vertical Hall element has been proposed that has a structure in which a conductive plate fixed at a predetermined potential is provided so as to cover the surface of the element. This structure allows the detection accuracy of the Hall element to be maintained high and the noise tolerance of the Hall element to be improved (see Patent Document 1).

[0005] [Prior art literature]

[0006] [Patent Document]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-128400 Summary of the Invention

[0008] [Problems to be solved by the invention]

[0009] In one aspect of the present invention, an object is to provide a vertical Hall element capable of adjusting magnetic detection sensitivity.

[0010] [Technical means to solve the problem]

[0011] A vertical Hall element according to one embodiment of the present invention has:

[0012] a semiconductor substrate of a first conductivity type;

[0013] A second conductive type impurity diffusion layer is formed on the surface of the semiconductor substrate;

[0014] an electrode group, arranged on a surface of the impurity diffusion layer, and including three or more electrodes arranged in a straight line;

[0015] a constant current source for flowing a constant current between the electrodes in the electrode group; and

[0016] The conductor is arranged so as to overlap with at least a portion of the current path of the constant current in a plan view, and a predetermined voltage can be applied thereto.

[0017] [Effects of the Invention]

[0018] According to one aspect of the present invention, a vertical Hall element capable of adjusting magnetic detection sensitivity can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is an explanatory diagram showing a plan view of a vertical Hall element in the first embodiment of the present invention.

[0020] Figure 2 It is an explanatory diagram showing a cross section of a vertical Hall element in the first embodiment of the present invention.

[0021] Figure 3 It is an explanatory diagram showing a cross section of a vertical Hall element in the first embodiment of the present invention.

[0022] Figure 4 It is an explanatory diagram showing a plan view of a vertical Hall element according to a second embodiment of the present invention.

[0023] Figure 5 It is an explanatory diagram showing a cross section of a vertical Hall element in a second embodiment of the present invention.

[0024] Figure 6 It is an explanatory diagram showing a plan view of a vertical Hall element according to a third embodiment of the present invention.

[0025] Figure 7 It is an explanatory diagram showing a cross section of a vertical Hall element in a third embodiment of the present invention.

[0026] Figure 8 It is an explanatory diagram showing a cross section of a vertical Hall element in a fourth embodiment of the present invention.

[0027] Figure 9 It is an explanatory diagram showing a cross section of a vertical Hall element in a fifth embodiment of the present invention.

[0028] Explanation of Figure Numbers

[0029] 10: P-type semiconductor substrate (first conductivity type semiconductor substrate)

[0030] 20: N-type buried layer

[0031] 30: N-type epitaxial layer (second conductivity type impurity diffusion layer)

[0032] 40, 70: P-type buried layer

[0033] 50: P-type well layer (well layer of the first conductivity type)

[0034] 60: Insulation film

[0035] 80: Conductor (second conductor)

[0036] 100, 200, 300, 400: Vertical Hall element

[0037] 110: Electrode group

[0038] 111, 112, 113, 114, 115: Electrodes

[0039] 120, 140, 150: Conductor (first conductor)

[0040] 130: Interlayer insulating film

[0041] CC: constant current source

[0042] VS: Voltage Source DETAILED DESCRIPTION

[0043] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0044] In addition, in the drawings, the same components are denoted by the same reference numerals, and repeated descriptions are omitted. Furthermore, in the drawings, the X, Y, and Z directions are orthogonal to each other. The direction including the X direction and the direction opposite to the X direction (-X direction) is referred to as the "X-axis direction," the direction including the Y direction and the direction opposite to the Y direction (-Y direction) is referred to as the "Y-axis direction," and the direction including the Z direction and the direction opposite to the Z direction (-Z direction, depth direction) is referred to as the "Z-axis direction" (height direction, thickness direction). With regard to this aspect, in the following embodiments, the surface on the Z-direction side of each film may be referred to as the "surface."

[0045] The drawings are schematic diagrams, and the ratios of width, length, and depth are not as shown in the drawings.

[0046] In the following description, the first conductivity type is assumed to be P-type and the second conductivity type is assumed to be N-type.

[0047] (First embodiment)

[0048] Figure 1 It is an explanatory diagram showing a plan view of a vertical Hall element in the first embodiment of the present invention. Figure 2 It is along Figure 1 1 is a schematic cross-sectional view taken along line II-II of , and is an explanatory diagram showing a cross section of the vertical Hall element in the first embodiment of the present invention. Figure 3 It is along Figure 1 1 is a schematic cross-sectional view taken along line III-III of , and is an explanatory diagram showing a cross section of the vertical Hall element in the first embodiment of the present invention.

[0049] The vertical Hall element 100 of this embodiment includes an electrode group 110 , a P-type well layer 50 arranged on the periphery of the electrode group 110 , and a conductor 120 arranged above the electrode group 110 .

[0050] The electrode group 110 is an electrode group for making the vertical Hall element 100 function as a magnetic sensor and is formed of five electrodes 111 to 115 .

[0051] Electrodes 111 through 115 are arranged linearly on the surface of N-type epitaxial layer 30. Each electrode is formed from an N-type impurity region with a higher concentration than that of N-type epitaxial layer 30. All electrodes 111 through 115 have the same structure and are rectangular in plan view, spaced evenly along their short sides. This creates a highly symmetrical structure for electrodes 111 through 115, reducing the output offset voltage even when no external magnetic field is applied.

[0052] The electrodes 111 to 115 are respectively connected to a voltage source or the like, and a required voltage is applied by turning on and off the switching elements respectively connected thereto.

[0053] For example, Figure 1 As shown, electrodes 111, 113, and 115 serve as driving current supply electrodes, and electrodes 112 and 114 serve as Hall voltage output electrodes. In this case, a constant current source CC is connected to the central electrode 113, and electrodes 111 and 115 are grounded. Thus, driving current Ih flows in the +Y direction and -Y direction, respectively. The current path is as follows: Figure 1 As shown by the dashed arrow in the figure. When an external magnetic field is applied to the drive current Ih in the +X direction, a Lorentz force is generated in the -Z direction for electrons in the drive current Ih in the +Y direction, and a Lorentz force is generated in the +Z direction for electrons in the drive current Ih in the -Y direction. This generates a Hall voltage with opposite potential differences. The vertical Hall element 100 outputs the voltage between electrodes 112 and 114 as the Hall voltage by summing the absolute values ​​of these potential differences, thereby enabling highly sensitive detection of external magnetic fields applied from the +X direction.

[0054] When performing correction to remove the offset voltage using the spinning current method, the driving current supply electrode and the Hall voltage output electrode may be replaced in order to obtain a desired output voltage.

[0055] Furthermore, the electrodes 114 and 115 are provided to remove the offset voltage. If only the external magnetic field is to be detected, the three electrodes 111 to 113 are sufficient.

[0056] In addition, if Figure 2 and Figure 3As shown, vertical Hall element 100 is formed on the surface of P-type semiconductor substrate 10 and includes N-type buried layer 20, N-type epitaxial layer 30 as an impurity diffusion layer, P-type buried layer 40, P-type well layer 50, and insulating film 60. Vertical Hall element 100 also includes conductor 120 and interlayer insulating film 130.

[0057] The P-type semiconductor substrate 10 is a silicon wafer to which P-type impurities are added.

[0058] The N-type buried layer 20 is formed near the boundary between the P-type semiconductor substrate 10 and the N-type epitaxial layer 30 and is positioned below the electrode assembly 110. The N-type buried layer 20 has a higher impurity concentration than the N-type epitaxial layer 30, resulting in a lower resistance, allowing the drive current Ih to flow more easily. Therefore, while there is a current path for the drive current Ih that flows downward through the N-type epitaxial layer 30, passes through the N-type buried layer 20, and then flows upward through the N-type epitaxial layer 30, there is also a current path that does not flow through the N-type buried layer 20 but flows throughout the entire N-type epitaxial layer 30. Therefore, when operating as a magnetic sensor, the N-type buried layer 20 and the N-type epitaxial layer 30 serve as the current path for the drive current Ih, functioning as a magnetic sensing unit.

[0059] The N-type epitaxial layer 30 is disposed on the P-type semiconductor substrate 10 , and is implanted and diffused with N-type impurities.

[0060] In this embodiment, the impurity concentration of the N-type epitaxial layer 30 is constant, but the impurity concentration can also be increased as the layer becomes deeper. Thus, by setting the impurity concentration gradient so that the resistance value of the deepest current path is approximately the same as the resistance value of the current path passing through shallower areas, the current path can be expanded in a well-balanced manner, thereby improving the magnetic detection sensitivity of the vertical Hall element 100.

[0061] The P-type buried layer 40 is formed near the boundary between the P-type semiconductor substrate 10 and the N-type epitaxial layer 30 . The P-type buried layer 40 is disposed at a position separated from the N-type buried layer 20 and in contact with the bottom surface of the P-type well layer 50 .

[0062] The P-type well layer 50 is formed to isolate the device and, when viewed from above, is arranged in a rectangular ring shape on the periphery, separated from the electrode group 110. The P-type well layer 50 is formed deep enough to contact the P-type buried layer 40, described later. This electrically isolates the vertical Hall element 100 from other regions (not shown) surrounding the vertical Hall element 100. A region on the P-type semiconductor substrate 10 electrically isolated from the vertical Hall element 100 includes transistors and other components that form at least one of a circuit for processing the output signal from the vertical Hall element 100 and a circuit for supplying signals to the vertical Hall element 100.

[0063] Furthermore, since the P-type well layer 50 is annular in shape, the current from the electrode group 110 is prevented from spreading, thereby improving the magnetic detection sensitivity and the accuracy of offset voltage removal.

[0064] The insulating film 60 is a silicon oxide film formed on the surface of the N-type epitaxial layer 30 by the Local Oxidation of Silicon (LOCOS) method. The insulating film 60 is provided around the electrode group 110 and on the upper surface of the P-type well layer 50 .

[0065] The insulating film 60 preferably has no conductivity type from the viewpoint that a depletion layer is generated near the surface if the insulating film has conductivity type, such as a P-type electrode isolation diffusion layer.

[0066] Conductor 120 is a metal layer formed within interlayer insulating film 130 formed on the upper surface of insulating film 60 and electrode group 110, so as to cover the entire current path of N-type epitaxial layer 30 and N-type buried layer 20 surrounded by P-type well layer 50. Conductor 120 is connected to voltage source VS and is applied with a "predetermined voltage."

[0067] If the "prescribed voltage" is a "negative voltage", then Figure 2 As indicated by the middle arrow, an electric field E is applied to the N-type buried layer 20 and the N-type epitaxial layer 30, which serve as the current path for the drive current Ih. This reduces the carrier density in the N-type buried layer 20 and the N-type epitaxial layer 30. As the carrier density decreases, the drive current Ih becomes less likely to flow. Therefore, the voltage applied to the electrode 113 by the constant current source CC, which maintains a constant current flow of the drive current Ih, increases. This increases the Lorentz force exerted by the external magnetic field on the electrons in the rapidly flowing drive current Ih. Consequently, the magnetic detection sensitivity of the vertical Hall element 100 increases.

[0068] On the other hand, if the “predetermined voltage” is a “positive voltage”, a voltage equal to the positive voltage is applied to the N-type buried layer 20 and the N-type epitaxial layer 30. Figure 2 The electric field E in the direction opposite to the arrow in the middle increases the carrier density in the N-type buried layer 20 and the N-type epitaxial layer 30. As the carrier density increases, the drive current Ih flows more easily. Consequently, the voltage applied to the electrode 113 by the constant current source CC, which maintains a constant current of the drive current Ih, decreases. This reduces the Lorentz force exerted by the external magnetic field on the electrons in the slowly flowing drive current Ih. Consequently, the magnetic detection sensitivity of the vertical Hall element 100 decreases.

[0069] Thus, the vertical Hall element 100 can adjust the magnetic detection sensitivity according to the positive and negative sign and magnitude of the “predetermined voltage” applied to the conductor 120 .

[0070] Furthermore, since the vertical Hall element 100 is large enough that the conductor 120 covers the entire area of ​​the current path in a plan view, it is possible to block external noise that intrudes from above.

[0071] Furthermore, the conductor 120 is formed as a metal layer in this embodiment, but may also be formed as a high-concentration impurity conductor made of polysilicon.

[0072] The interlayer insulating film 130 is formed over the entire upper surface of the insulating film 60 and the electrode group 110. In this embodiment, the interlayer insulating film 130 is a silicon oxide film to which phosphorus and boron are added (sometimes also referred to as a "BPSG (Boro-PhosphoSilicate Glass) film").

[0073] Next, a method for manufacturing the vertical Hall element of this embodiment will be described.

[0074] First, N-type or P-type impurities are selectively implanted into the regions of the P-type semiconductor substrate 10 where the N-type buried layer 20 and the P-type buried layer 40 are to be formed. Then, an N-type epitaxial layer 30 containing N-type impurities is formed thereon. P-type impurities are selectively implanted into the surface of the N-type epitaxial layer 30 and diffused, forming a P-type well layer 50. Next, using the insulating film 60 formed on the surface of the N-type epitaxial layer 30 by the LOCOS method as a mask, N-type impurities are implanted from the surface of the N-type epitaxial layer 30 to a high concentration, forming the electrode group 110. Next, after the entire upper surface of the insulating film 60 and the electrode group 110 is formed and flattened, the conductor 120, serving as a metal layer, is formed.

[0075] As described above, the vertical Hall element 100 can be formed.

[0076] Thus, the vertical Hall element 100 of this embodiment includes a constant current source CC for flowing a constant current between the electrodes 111 to 115 , and a conductor 120 arranged to overlap at least a portion of the current path of the constant current in a plan view, to which a predetermined voltage can be applied.

[0077] Therefore, in the vertical Hall element 100, if a negative voltage is applied to the conductor 120, Figure 2When an electric field E is applied as indicated by the middle arrow, the carrier density of the current path decreases, making it difficult for the drive current Ih to flow. Consequently, the voltage applied from the constant current source CC to the electrode 113 increases, making the electrons of the rapidly flowing drive current Ih susceptible to the Lorentz force generated by the external magnetic field. Furthermore, since the electric field E is applied to the current path in the -Z direction, a Coulomb force in the +Z direction is applied to the moving electrons of the drive current Ih, causing the current path of the drive current Ih to disperse from the N-type buried layer 20 to the surface side of the N-type epitaxial layer 30, making it susceptible to the Lorentz force generated by the external magnetic field. Consequently, the magnetic detection sensitivity of the vertical Hall element 100 increases.

[0078] On the other hand, if a positive voltage is applied to the conductor 120, Figure 2 When an electric field E is applied in the direction opposite to the arrow, the carrier density of the current path becomes denser, making it easier for the drive current Ih to flow. Consequently, the voltage applied from the constant current source CC to the electrode 113 becomes lower, making the electrons of the slowly flowing drive current Ih less susceptible to the Lorentz force generated by the external magnetic field. Furthermore, since the electric field E is applied to the current path in the +Z direction, a Coulomb force in the -Z direction is applied to the moving electrons of the drive current Ih, causing the current path of the drive current Ih to be concentrated on the N-type buried layer side, making it less susceptible to the Lorentz force generated by the external magnetic field. Consequently, the magnetic detection sensitivity of the vertical Hall element 100 decreases.

[0079] Thus, the vertical Hall element 100 can adjust the magnetic detection sensitivity according to the positive and negative sign and magnitude of the “predetermined voltage” applied to the conductor 120 .

[0080] (Second embodiment)

[0081] Figure 4 It is an explanatory diagram showing a plan view of a vertical Hall element according to a second embodiment of the present invention. Figure 5 It is along Figure 4 1 is a schematic cross-sectional view taken along line VV of , and is an explanatory diagram showing a cross section of a vertical Hall element in a second embodiment of the present invention.

[0082] like Figure 4 and Figure 5 As shown, the vertical Hall element 200 in this embodiment is the same as the vertical Hall element 100 except that the conductor 120 in the vertical Hall element 100 is replaced with a conductor 140 having a narrower width.

[0083] Hereinafter, the conductor 140 , which is different from the vertical Hall element 100 , will be described.

[0084] Conductor 140 is a metal layer formed above electrode group 110, within interlayer insulating film 130 formed on insulating film 60 and the upper surface of electrode group 110, so as to partially cover electrode group 110. Like conductor 120, conductor 140 is connected to voltage source VS and a "predetermined voltage" is applied thereto.

[0085] Even in the vertical Hall element 200 having such a structure, the magnetic detection sensitivity can be adjusted by the positive and negative sign and magnitude of the “predetermined voltage” applied to the conductor 140 , similarly to the vertical Hall element 100 .

[0086] The conductor 140 may also serve as a conductor for generating a bias magnetic field used for correction. In this case, a high-resistance resistor is connected at the downstream stage to flow current through the conductor 140 in order to make the voltage distribution of the conductor 140 itself constant.

[0087] (Third embodiment)

[0088] Figure 6 It is an explanatory diagram showing a plan view of a vertical Hall element according to a third embodiment of the present invention. Figure 7 It is along Figure 6 VII-VII line of FIG, which is an explanatory diagram showing a cross section of a vertical Hall element in a third embodiment of the present invention.

[0089] like Figure 6 and Figure 7 As shown, the vertical Hall element 300 in this embodiment is the same as the vertical Hall element 100 except that the conductor 120 in the vertical Hall element 100 is changed to a conductor 150 having the same width as the electrodes 111 to 115 and further divided three times in the width direction.

[0090] Hereinafter, the conductor 150 , which is a point different from the vertical Hall element 100 , will be described.

[0091] Conductor 150 is a metal layer that is formed inside the interlayer insulating film 130 formed on the upper surface of the insulating film 60 and the electrode group 110. It has a winding shape when viewed from above, and a portion of the conductor 150 is formed above the electrode group 110 so as to cover the electrode group 110. One end of the winding conductor 150 is connected to a voltage source VS to apply a "predetermined voltage," and the other end is connected to a high-resistance resistor element to allow current to flow through the conductor 150.

[0092] Even with this structure, vertical Hall element 300, like vertical Hall element 100, can adjust magnetic detection sensitivity by adjusting the positive and negative sign and magnitude of the "predetermined voltage" applied to conductor 150. Furthermore, because conductor 150 is wound, it can generate a bias magnetic field more efficiently than conductor 140.

[0093] (Fourth embodiment)

[0094] Figure 8 It is an explanatory diagram showing a cross section of a vertical Hall element in a fourth embodiment of the present invention.

[0095] like Figure 8 As shown, the vertical Hall element 400 in this embodiment is the same as the vertical Hall element 100 except that a P-type buried layer 70 is configured instead of the N-type buried layer 20 and the P-type buried layer 40 in the vertical Hall element 100, so that the P-type buried layer 70 has the function of a conductor 120.

[0096] Hereinafter, the P-type buried layer 70 , which is a point different from the vertical Hall element 100 , will be described.

[0097] The P-type buried layer 70 is formed near the boundary between the P-type semiconductor substrate 10 and the N-type epitaxial layer 30 and is disposed below the electrode group 110 so as to contact the lower surface of the P-type well layer 50. The P-type buried layer 70 is connected to a voltage source VS and is applied with a "predetermined voltage."

[0098] In addition, the “predetermined voltage” in the fourth embodiment is the same as the “predetermined voltage” in the first embodiment.

[0099] Even in the vertical Hall element 400 having such a structure, the magnetic detection sensitivity can be adjusted by the positive and negative sign and magnitude of the “predetermined voltage” applied to the conductor 150 , similarly to the vertical Hall element 100 .

[0100] (Fifth embodiment)

[0101] Figure 9 It is an explanatory diagram showing a cross section of a vertical Hall element in a fifth embodiment of the present invention.

[0102] like Figure 9 As shown, the vertical Hall element 500 in this embodiment is the same as the vertical Hall element 100 except that a plurality of second conductors 80 are arranged above the N-type buried layer 20 instead of the insulating film 60 .

[0103] Hereinafter, the second conductor 80 , which is a difference from the vertical Hall element 100 , will be described.

[0104] Second conductor 80 is formed in a trench on the surface of N-type epitaxial layer 30 and is formed by P-type polysilicon embedded in the trench. Second conductor 80 is formed at least between electrodes 111 to 115 in a plan view, but may also be configured to surround the entirety of electrodes 111 to 115.

[0105] Thus, in the vertical Hall element 500 , the depletion layer can be expanded in the direction from the trench side surface toward each electrode in the N-type epitaxial layer 30 , and thus the sensitivity adjustment width can be further expanded.

[0106] As described above, a vertical Hall element according to one embodiment of the present invention comprises: a semiconductor substrate of a first conductivity type; an impurity diffusion layer of a second conductivity type formed on the surface of the semiconductor substrate; and an electrode group disposed on the surface of the impurity diffusion layer, comprising three or more electrodes arranged in a straight line. Furthermore, the vertical Hall element comprises: a constant current source for flowing a constant current between the electrodes in the electrode group; and a conductor disposed so as to overlap at least a portion of the current path of the constant current when viewed from above, enabling application of a predetermined voltage.

[0107] Thus, the vertical Hall element can adjust the magnetic detection sensitivity according to the positive and negative sign and magnitude of the “predetermined voltage” applied to the conductor.

[0108] As mentioned above, although embodiment of this invention was described, this invention is not limited to embodiment, Various changes can be made within the range which does not deviate from the summary of this invention.

[0109] For example, the first conductivity type is set to P type and the second conductivity type is set to N type in the above description, but the conductivity types may be switched such that the first conductivity type is set to N type and the second conductivity type is set to P type.

[0110] In addition, in each of the above embodiments, the number of electrodes in the electrode group is set to five, but it is not limited to this. For example, in the case where the offset voltage can be reduced to a level that does not require the use of the spinning current method to remove the offset voltage, at least two drive current supply electrodes and one Hall voltage output electrode, a total of three electrodes, may be sufficient. In other words, by not forming Figure 1 The configuration of the electrodes 114 and 115 of the vertical Hall element 100 shown in FIG. 1 and FIG. 2 can reduce the layout area, thereby achieving miniaturization of the vertical Hall element.

[0111] Furthermore, in each of the above-described embodiments, the electrode groups are formed in the N-type impurity regions having a higher concentration than that of the N-type epitaxial layer from the viewpoint of easy manufacturing, but the present invention is not limited to this.

[0112] The electrode group can also be formed from a P-type, highly impurity-concentrated conductor based on polysilicon. Forming the electrode group from P-type polysilicon is advantageous in that it can utilize the depletion of the N-type epitaxial layer caused by the work function difference between the P-type polysilicon and the N-type epitaxial layer, thereby improving sensitivity.

Claims

1. A vertical Hall element, characterized in that: have: a semiconductor substrate of a first conductivity type; A second conductive type impurity diffusion layer is formed on the surface of the semiconductor substrate; an electrode group, arranged on a surface of the impurity diffusion layer, and including three or more electrodes arranged in a straight line; a constant current source for flowing a constant current between the electrodes in the electrode group; as well as The first conductor is arranged so as to overlap with at least a portion of the current path of the constant current in a plan view, and is capable of being applied with a predetermined voltage.

2. The vertical Hall element according to claim 1, wherein The first conductor is disposed above the electrode group.

3. The vertical Hall element according to claim 2, wherein: The first conductor is a metal layer or a polysilicon-based high-concentration impurity conductor.

4. The vertical Hall element according to claim 1, wherein The first conductor is a buried layer of the first conductivity type disposed below the electrode group. 5 . The vertical Hall element according to claim 1 , further comprising a second conductor, the second conductor being arranged so as to overlap with at least a portion of the current path of the constant current when viewed in cross section, and being formed of polysilicon of the first conductivity type.

6. The vertical Hall element according to any one of claims 1 to 5, wherein The first conductivity type is P type, the second conductivity type is N type, The electrode group is formed of a P-type high-concentration impurity conductor based on polycrystalline silicon.

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