An optical module

By using a multi-layer PCB design and conductive via-filled traces, the problem of impedance discontinuity between the RF signal pins of the silicon photonics chip and the PCB pads was solved, achieving stable transmission of high-frequency signals and reducing RF interference and loss.

CN120742504BActive Publication Date: 2025-11-11SHANGHAI BOPU SEMICON TECH CO LTD
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Patent Information

Application Number
CN202511240542.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-09-02
Publication Date
2025-11-11
Estimated Expiration
2045-09-02

AI Technical Summary

Technical Problem

In existing optical modules, the impedance discontinuity between the RF signal pins of the silicon photonics chip and the pads on the PCB board leads to RF interference and loss during high-frequency signal transmission.

Method used

The design employs a multilayer PCB board, embedding the RF signal pins of the silicon photonics chip into the cavity of the multilayer PCB board and connecting them to the pads through conductive vias and traces. The impedance continuity of the traces and conductive vias is controlled, and the RF signal pins are located in the inner layer of the multilayer PCB board as a reference layer to prevent electromagnetic interference.

Benefits of technology

It reduces radio frequency interference and loss during high-frequency signal transmission, and improves signal integrity and transmission efficiency.

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Abstract

This invention discloses an optical module, comprising: a multilayer PCB board and a silicon photonics chip; the multilayer PCB board has more than N layers; N > 2, where N is a positive integer; the front side of the multilayer PCB board includes a first cavity and multiple first pads, the first cavity penetrating layers 1-N of the multilayer PCB board; the silicon photonics chip includes multiple radio frequency (RF) signal pins; the silicon photonics chip is embedded in the first cavity, and the RF signal pins are located on the Nth layer of the multilayer PCB board; the multiple first pads and the multiple RF signal pins correspond one-to-one, each first pad being connected to the corresponding RF signal pin through at least one conductive via and / or at least one first trace on the multilayer PCB board, thereby reducing RF signal transmission loss. The technical solution of this invention ensures impedance continuity between the RF signal pins of the silicon photonics chip and the pads of the PCB board, avoiding RF interference during high-frequency signal transmission, thus improving the integrity of high-frequency signals and reducing losses during high-frequency signal transmission.
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Description

Technical Field

[0001] This invention relates to the field of optoelectronic technology, and more particularly to an optical module. Background Technology

[0002] Optical modules are used to convert photoelectric signals into electrical signals. Currently, the receiving end of an optical module uses a silicon photonics chip to convert the received optical signal into an electrical signal. The silicon photonics chip in an optical module is typically mounted on the surface of a PCB board, or a slot is cut into the PCB board and the silicon photonics chip is mounted on a tungsten copper block. The radio frequency signal pins of the silicon photonics chip are connected to the PCB board pads via wire bonding, i.e., metal wire bonding. Wire bonding is a technique that connects the pins of an external chip to the PCB board via metal wires. These metal wires are typically gold wires, as gold wires have low hardness and good ductility, thus ensuring connection quality.

[0003] However, when using wire bonding to connect the RF signal pins of the silicon photonics chip to the PCB pads, the impedance of the gold wire is relatively low. The impedance between the gold wire and the RF signal pins of the silicon photonics chip and the PCB pads is not continuous, which makes it easy to generate RF interference during high-frequency signal transmission. The higher the frequency of the high-frequency signal, the more severe the RF interference. Summary of the Invention

[0004] This invention provides an optical module to solve the problems existing in the prior art, so that the impedance between the radio frequency signal pins of the silicon photonics chip and the pads of the PCB board is continuous, thereby avoiding radio frequency interference during the transmission of high-frequency signals, which is beneficial to improving the integrity of high-frequency signals and reducing the loss during the transmission of high-frequency signals.

[0005] In a first aspect, the present invention provides an optical module, comprising: a multilayer PCB board and a silicon photonics chip; wherein the number of layers of the multilayer PCB board is greater than N; and N > 2 and N is a positive integer;

[0006] The front side of the multilayer PCB board includes a first cavity and a plurality of first pads, the first cavity penetrating from the first layer to the Nth layer of the multilayer PCB board;

[0007] The silicon photonics chip includes multiple radio frequency signal pins; the silicon photonics chip is embedded in the first cavity, and the radio frequency signal pins are located on the Nth layer of the multilayer PCB board;

[0008] Each of the first pads corresponds to one of the RF signal pins. Each first pad is connected to the corresponding RF signal pin through at least one conductive via and / or at least one first trace on the multilayer PCB board to reduce the transmission loss of the RF signal.

[0009] Optionally, the first trace is located on layers 1-N of the multilayer PCB board.

[0010] Optional, N < 6.

[0011] Optional, N=4.

[0012] Optionally, the first trace that partially connects the first pad and the RF signal pin is located on the first layer of the multilayer PCB, and the first trace that partially connects the first pad and the RF signal pin is located on the fourth layer of the multilayer PCB.

[0013] Optionally, the multilayer PCB board further includes: a second pad; the second pad is located on the front side of the multilayer PCB board;

[0014] The silicon photonics chip also includes a control signal pin; the control signal pin is located on the Nth layer of the multilayer PCB board.

[0015] The second pad is electrically connected to the control signal pin through at least one conductive via and at least one second trace; the second trace is located in any of the layers 1 to N.

[0016] Optionally, the silicon photonics chip further includes multiple fiber optic interfaces; the multiple fiber optic interfaces are used for coupling with multiple optical fibers.

[0017] Optionally, when N≥4, the front side of the multilayer PCB board further includes: a second cavity;

[0018] The second cavity is used to accommodate multiple optical fibers to achieve coupling between each optical fiber and each optical fiber interface.

[0019] Optionally, the front side of the multilayer PCB board may also include a third pad;

[0020] The silicon photonics chip includes power supply pins;

[0021] The third pad and the power pin are both located on the first layer of the multilayer PCB board, and the third pad and the power pin are electrically connected by metal wire bonding.

[0022] Optionally, the multilayer PCB board further includes at least one fourth pad;

[0023] The silicon photonics chip includes at least one detection pin;

[0024] Each of the fourth pads and each of the detection pins are located on the first layer of the multilayer PCB board, and each of the fourth pads and each of the detection pins are electrically connected one-to-one via metal wire bonding.

[0025] The technical solution of this invention includes an optical module comprising a multilayer PCB board and a silicon photonics chip. The front side of the multilayer PCB board includes a first cavity and multiple first pads. The first cavity penetrates layers 1-N of the multilayer PCB board. The silicon photonics chip includes multiple radio frequency (RF) signal pins. The silicon photonics chip is embedded in the first cavity, and the RF signal pins are located on the Nth layer of the multilayer PCB board. The multiple first pads correspond one-to-one with the multiple RF signal pins. Each first pad is connected to the corresponding RF signal pin through at least one conductive via and at least one first trace on the multilayer PCB board. This allows the high-frequency signal transmitted by the silicon photonics chip to be transmitted to the first pad through the conductive via and / or the first trace on the multilayer PCB board. Since the impedance of the trace can be controlled by designing the width of the trace using corresponding software, and the impedance of the conductive via can also be controlled by designing the aperture size of the conductive via and the distance between its edge and the reference layer copper using corresponding software, the multiple... The impedance of the traces and conductive vias on the multilayer PCB can be kept consistent with the target impedance, thus ensuring impedance continuity between the first trace and conductive vias. Furthermore, the impedance difference between the traces / vias and the pads is small, resulting in impedance continuity between the RF signal pins of the silicon photonics chip and the pads on the multilayer PCB. Additionally, since the RF signal pins of the silicon photonics chip are located on the Nth layer of the multilayer PCB, and the number of layers in the multilayer PCB is greater than N, the RF signal pins are embedded within the PCB. This allows the layers above and below the RF signal pins—the (N-1)th and (N+1)th layers—to serve as reference layers, preventing electromagnetic interference from high-frequency signals transmitted between the RF signal pins and the first pads. This reduces reflection and ringing during high-frequency signal transmission, minimizes RF interference, reduces transmission losses, and improves the integrity of the high-frequency signal.

[0026] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 A perspective view of an optical module from a top-down view, provided for an embodiment of the present invention;

[0029] Figure 2 A cross-sectional view of an optical module provided in an embodiment of the present invention.

[0030] Figure 3 A cross-sectional view of another optical module provided in an embodiment of the present invention;

[0031] Figure 4 and Figure 5 Cross-sectional views of two other optical modules provided in embodiments of the present invention;

[0032] Figure 6 A perspective view of another optical module provided in an embodiment of the present invention, viewed from a top front view. Detailed Implementation

[0033] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0034] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in sequences other than those illustrated or described herein.

[0035] This embodiment provides an optical module that adopts a substrate-like design. The radio frequency (RF) signal pins of a silicon photonics chip are embedded in the laminated structure of a multilayer PCB board. The multilayer PCB board acts as a support and interconnection platform for the silicon photonics chip, thereby enabling the RF signal pins of the silicon photonics chip to be interconnected with the pads of the multilayer PCB board through its own traces and conductive vias. By designing the width of the traces and the size of the conductive vias, the impedance between the RF signal pins of the silicon photonics chip and the pads of the multilayer PCB board can be made continuous. Furthermore, by embedding the RF signal pins inside the PCB board, the layers above and below the layer containing the RF signal pins can be used as reference layers. This prevents electromagnetic interference from high-frequency signals transmitted between the RF signal pins and the first pad, thereby reducing RF interference during high-frequency signal transmission and helping to reduce losses during high-frequency signal transmission.

[0036] Figure 1 This is a perspective view of an optical module from a top-down view, provided in an embodiment of the present invention. Figure 2 This is a cross-sectional view of an optical module provided in an embodiment of the present invention, with reference to... Figure 1 and Figure 2As shown, the optical module includes a multilayer PCB board 1 and a silicon photonic chip 2. The multilayer PCB board 1 has more than N layers. The front side of the multilayer PCB board 1 includes a first cavity 11 and multiple first pads 12. The silicon photonic chip 2 includes multiple radio frequency signal pins 21. The silicon photonic chip 2 is embedded in the first cavity 11, and the radio frequency signal pins 21 are located on the Nth layer of the multilayer PCB board 1. The multiple first pads 12 and the multiple radio frequency signal pins 21 correspond one-to-one. Each first pad 12 is connected to the corresponding radio frequency signal pin 21 through at least one conductive via 17 and / or at least one first trace 13 located on the multilayer PCB board 1.

[0037] Where N > 2, and N is a positive integer.

[0038] The multilayer PCB board 1 can be, but is not limited to, a four-layer board, a six-layer board, an eight-layer board, or a ten-layer board, as long as the number of layers in the multilayer PCB board 1 is greater than N. In an exemplary embodiment, the multilayer PCB board 1 is a ten-layer board.

[0039] Each layer of the multilayer PCB board 1 can be designed with traces for signal transmission. It is understood that the wider the trace, the lower its impedance, and the narrower the trace, the higher its impedance. By designing the trace width using appropriate software, the impedance of the trace can be precisely controlled. The surface of the multilayer PCB board 1 is also equipped with pads, which are used to achieve electrical connections or fixation between components in the multilayer PCB board 1 or between the multilayer PCB board and external components.

[0040] To achieve continuity between the layers of the multilayer PCB board 1, it is necessary to design and fill holes in the multilayer PCB board to realize electrical connections between traces on different layers or between traces and pads. In this embodiment, the conductive filler 17 can be understood as a via formed by drilling holes in the multilayer PCB board and then filling the holes with conductive material through other processes, thus enabling electrical connections between traces on different layers or between traces and pads. In an optional embodiment, the conductive filler 17 is a via formed by laser drilling of the multilayer PCB board and filling with electroplated copper. It is understood that the hole diameter of the conductive filler 17 and the distance between its edge and the copper layer of the reference layer will affect the impedance of the conductive filler 17. Therefore, by designing the hole diameter of the conductive filler 17 and the distance between its edge and the copper layer of the reference layer, the impedance of the conductive filler 17 can be precisely controlled. Therefore, by designing the width of the trace, the diameter of the conductive via 17, and the distance between its edge and the reference copper layer, the impedance of the trace and the conductive via 17 can be precisely controlled, thereby ensuring the impedance continuity of the trace and the conductive via 17.

[0041] The first trace 13 of the multilayer PCB board can be understood as the trace in the multilayer PCB board 1 used to connect the radio frequency signal pin 21 of the silicon photonics chip 2 and the first pad 12 of the multilayer PCB board 1. The first pad 12 of the multilayer PCB board 1 can be understood as the pad in the multilayer PCB board 1 connected to the radio frequency signal pin 21 of the silicon photonics chip 2 through the conductive via 17 and the first trace 13.

[0042] The front side of the multilayer PCB board 1 is the first layer of the multilayer PCB board 1. From the front side to the back side of the multilayer PCB board 1, they are the first layer to the Nth layer to the Mth layer of the multilayer PCB board 1, respectively, where N < M, and M is the total number of layers of the multilayer PCB board 1.

[0043] The front side of the multilayer PCB board 1 includes a first cavity 11, which penetrates from the first layer to the Nth layer of the multilayer PCB board 1. That is, the depth of the first cavity 11 is at least the total thickness of the multilayer PCB board 1 from the first layer to the Nth layer. The silicon photonics chip 2 is used to convert the optical signal transmitted from the optical fiber into an electrical signal and transmit the electrical signal to the multilayer PCB board 1 to realize the conversion of photoelectric signals.

[0044] The silicon photonics chip 2 includes a first surface S1 and a second surface S2 parallel to its extension direction. A plurality of radio frequency (RF) signal pins 21 of the silicon photonics chip 2 are mounted on the edge of the second surface S2. A first cavity 11 is used to accommodate the silicon photonics chip 2. When the silicon photonics chip 2 is accommodated in the first cavity 11, the extension direction of the silicon photonics chip 2 is parallel to the extension direction of the multilayer PCB board 1, and the first surface S1 of the silicon photonics chip 2 is closer to the front surface of the multilayer PCB board 1 than the second surface S2. The second surface S2 is flush with the Nth layer of the multilayer PCB board 1, allowing the RF signal pins 21 of the silicon photonics chip 2 to be located on the Nth layer of the multilayer PCB board 1. In an exemplary embodiment, the first cavity 11 is obtained by drilling holes in the front surface of the multilayer PCB board 1.

[0045] In an optional embodiment, the thickness of the first to Nth layers of the multilayer PCB board 1 is less than or equal to the thickness of the silicon photonic chip 2, so that when the silicon photonic chip 2 is embedded in the first cavity 11, it will not affect the heat dissipation of the silicon photonic chip 2.

[0046] It should be noted that, Figure 2 This example only illustrates a 10-layer multilayer PCB board 1, with the first cavity 11 penetrating from the 1st to the 4th layer of the multilayer PCB board 1, and the radio frequency signal pin 21 of the silicon photonics chip 2 located on the 4th layer of the multilayer PCB board 1. It does not limit the number of layers of the multilayer PCB board 1, the position of the first cavity 11, or the position of the radio frequency signal pin 21, as long as the core inventive point of this embodiment can be achieved.

[0047] The conductive via 17 and the first trace 13 are used to connect the first pad 12 and the corresponding RF signal pin 21. The conductive via 17 can be a 3rd-order, 4th-order, or 5th-order via, etc., and the first trace 13 can be located on any layer of the multilayer PCB board 1. Figure 2 This example only illustrates the case where the conductive via 17 is a third-order via and the first trace 13 is located on the fourth layer of the multilayer PCB board 1. In practice, this embodiment does not impose special limitations on the conductive via 17 and the first trace 13, and it is possible to connect each first pad 12 to the corresponding RF signal pin 21 through at least one conductive via 17 and / or at least one first trace 13 located on the multilayer PCB board 1. It should also be noted that... Figure 1 This illustration only demonstrates the case where the first trace 13 is located on two layers of the multilayer PCB board 1 (red and green represent first traces 13 on different layers), and does not limit the location of the first trace 13 in the multilayer PCB board 1. In other embodiments, all first traces 13 are located on the same layer of the multilayer PCB board 1.

[0048] It is understandable that the larger N is, the greater the depth of the first cavity 11 in the thickness direction of the multilayer PCB board 1. When N≤2, since the depth of the first cavity 11 in the thickness direction of the multilayer PCB board 1 is small, when the silicon photonic chip 2 is embedded in the first cavity 11, part of the structure of the silicon photonic chip 2 protrudes from the front of the multilayer PCB board 1, which is not conducive to the miniaturization of the optical module. More importantly, when N≤2, the multiple RF signal pins 21 of the silicon photonic chip 2 are located on the first or second layer of the multilayer PCB board 1. When each first pad 12 is connected to the corresponding RF signal pin 21 through at least one conductive via 17 and / or at least one first trace 13 located on the multilayer PCB board 1, since a reference layer needs to be set for the first trace 13, at least one first trace 13 can only be located on the first layer of the multilayer PCB board 1, which is not conducive to the miniaturization of the optical module.

[0049] Each first pad 12 is connected to the corresponding RF signal pin 21 through at least one conductive via 17 and / or at least one first trace 13 located on the multilayer PCB board 1. This can be understood as each first pad 12 being connected to the corresponding RF signal pin 21 through at least one conductive via 17 located on the multilayer PCB board 1, or each first pad 12 being connected to the corresponding RF signal pin 21 through at least one conductive via 17 and at least one first trace 13 located on the multilayer PCB board 1.

[0050] In one exemplary embodiment, Figure 3 This is a cross-sectional view of another optical module provided in an embodiment of the present invention, with reference to... Figure 3As shown, the projections of each first pad 12 and each RF signal pin 21 on the plane extending in the multilayer PCB board 1 overlap, so each first pad 12 can be connected to the corresponding RF signal pin 21 through the conductive via 17 located on the multilayer PCB board 1.

[0051] In other exemplary embodiments, Figure 4 and Figure 5 Cross-sectional views of two other optical modules provided in embodiments of the present invention are shown below. Figure 2 , Figure 4 and Figure 5 The projections of each first pad 12 and each RF signal pin 21 on the plane extending in the multilayer PCB board 1 do not coincide, so each first pad 12 needs to be connected through at least one conductive via 17 and at least one first trace 13 located on the multilayer PCB board 1.

[0052] It should be noted that, regardless of whether each first pad 12 is connected to the corresponding RF signal pin 21 through at least one conductive via 17 on the multilayer PCB board 1, or each first pad 12 is connected to the corresponding RF signal pin 21 through at least one conductive via 17 and at least one first trace 13 on the multilayer PCB board 1, the impedance of the first trace 13 and the first pad 12 can be precisely controlled through simulation design, so that the impedance of each RF signal pin 21 of the silicon photonics chip 2 connected to each first pad 12 on the multilayer PCB board 1 is relatively uniform, which can reduce RF interference during the transmission of RF signals.

[0053] Specifically, the silicon photonics chip 2 includes multiple radio frequency (RF) signal pins 21, each RF signal pin 21 located on the Nth layer of the multilayer PCB board 1. Multiple first pads 12 correspond one-to-one with the multiple RF signal pins 21. Thus, during the fabrication of the multilayer PCB board 1, through pattern design, each RF signal pin 21 can be connected to the corresponding first pad 12 via at least one conductive via 17 and at least one first trace 13 located on the multilayer PCB board 1. This avoids the problem of discontinuous high-frequency signals transmitted by the optical module and allows the two layers above and below the layer where the RF signal pin is located, namely the N-1th layer and the N+1th layer, to serve as reference layers, preventing electromagnetic interference from the high-frequency signals transmitted between the RF signal pin and the first pad.

[0054] In this embodiment, the optical module includes a multilayer PCB board and a silicon photonics chip. The front side of the multilayer PCB board includes a first cavity and multiple first pads. The first cavity penetrates layers 1-N of the multilayer PCB board. The silicon photonics chip includes multiple radio frequency (RF) signal pins. The silicon photonics chip is embedded in the first cavity, and the RF signal pins are located on the Nth layer of the multilayer PCB board. The multiple first pads correspond one-to-one with the multiple RF signal pins. Each first pad is connected to the corresponding RF signal pin through at least one conductive via and at least one first trace on the multilayer PCB board. This allows the high-frequency signal transmitted by the silicon photonics chip to be transmitted to the first pad through the conductive via and / or the first trace on the multilayer PCB board. Since the impedance of the trace can be controlled by designing the width of the trace using corresponding software, and the impedance of the conductive via can also be controlled by designing the aperture size of the conductive via and the distance between its edge and the reference layer copper using corresponding software, the multilayer PCB board can achieve the desired signal transmission. The impedance of the traces and conductive vias on the PCB can be kept consistent with the target impedance, thus ensuring impedance continuity between the first trace and conductive vias. Furthermore, the impedance difference between the traces / vias and the pads is small, resulting in impedance continuity between the RF signal pins of the silicon photonics chip and the pads of the multilayer PCB. Additionally, since the RF signal pins of the silicon photonics chip are located on the Nth layer of the multilayer PCB, and the number of layers in the multilayer PCB is greater than N, the RF signal pins are embedded within the PCB. This allows the layers above and below the RF signal pins—the (N-1)th and (N+1)th layers—to serve as reference layers, preventing electromagnetic interference from high-frequency signals transmitted between the RF signal pins and the first pads. This reduces reflection and ringing during high-frequency signal transmission, minimizes RF interference, reduces transmission losses, and improves the integrity of the high-frequency signal.

[0055] Optionally, the first trace 13 is located on layers 1-N of the multilayer PCB board 1. Since each RF signal pin 21 of the silicon photonics chip 2 is located on the Nth layer of the multilayer PCB board 1, and each first pad 12 is located on the front side of the multilayer PCB board 1, by placing the first trace 13 on layers 1 to N of the multilayer PCB board 1, when each first pad 12 is connected to the corresponding RF signal pin 21 through at least one conductive via 17 and at least one first trace 13 located on the multilayer PCB board 1, the transmission distance of the RF signal is shorter, which helps to reduce the loss of the RF signal during transmission.

[0056] In an optional embodiment, to achieve miniaturization of the optical module, the first traces 13 can be arranged in layers, thereby reducing the area occupied by the first trace 13 when each first pad 12 is connected to the corresponding RF signal pin 21 through at least one conductive via 17 and at least one first trace 13 located on the multilayer PCB board 1. For example, some of the first traces 13 can be located on the first layer of the multilayer PCB board 1, and some of the first traces 13 can be located on the Nth layer of the multilayer PCB board 1. In this way, fewer conductive vias 17 are required when each first pad 12 is connected to the corresponding RF signal pin 21, thereby simplifying the structure of the optical module.

[0057] Optional, N < 6.

[0058] When N ≥ 6, the depth of the first cavity 11 in the thickness direction of the multilayer PCB board 1 is too large. When the silicon photonic chip 2 is embedded in the first cavity 11, its surface relative to the front of the multilayer PCB board 1 is recessed within the first cavity 11, which is detrimental to the heat dissipation of the silicon photonic chip 2 and thus affects the performance of the optical module. More importantly, the silicon photonic chip 2 in the optical module also needs to receive optical signals transmitted from the optical fiber. When the silicon photonic chip 2 is deeply embedded in the multilayer PCB board 1, the angle of the optical fiber is large, which is not conducive to the assembly of the optical module. To achieve the coupling between the silicon photonic chip 2 and the optical fiber, holes need to be drilled in the multilayer PCB board 1 near the coupling position of the silicon photonic chip 2 and the optical fiber to meet the angle when the silicon photonic chip 2 and the optical fiber are coupled, which will cause significant damage to the multilayer PCB board 1. In summary, when 2 < N < 6, the miniaturization requirements of the optical module can be met without affecting the heat dissipation of the silicon photonic chip 2, and it is also beneficial to the coupling between the silicon photonic chip 2 and the optical fiber.

[0059] Optionally, N=4. When N=4, the first cavity 11 penetrates from the first layer to the fourth layer of the multilayer PCB board 1, and the first radio frequency signal pin 21 is located on the fourth layer of the multilayer PCB board 1. This ensures that when the silicon photonic chip 2 is embedded in the first cavity 11, the surface of the silicon photonic chip 2 is basically flush with the front side of the multilayer PCB board 1. At the same time, the first traces 13 connecting each first pad 12 and the corresponding radio frequency signal pin 21 can be distributed in different layers of the multilayer PCB board 1, thereby maximizing the heat dissipation requirements of the silicon photonic chip 2 and the miniaturization requirements of the optical module.

[0060] Optionally, when N=4, the first trace 13 connecting the first pad 12 and the RF signal pin 21 is located on the first layer of the multilayer PCB board 1, and the first trace 13 connecting the first pad 12 and the RF signal pin 21 is located on the fourth layer of the multilayer PCB board 1. This allows the second and third layers to serve as reference layers, thereby preventing the first trace 13 located on the first and fourth layers from generating RF interference when transmitting high-frequency signals. In addition, by setting part of the first trace 13 on the first layer, which is the same layer as the first pad 12, and setting part of the first trace 13 on the fourth layer, which is the same layer as the RF signal pin 21, each first pad 12 can be connected to the corresponding RF signal pin 21 through a conductive via 17 and at least one first trace 13, thereby simplifying the structure of the optical module.

[0061] Optionally, the multilayer PCB board 1 further includes a second pad 14, which is located on the front side of the multilayer PCB board 1; the silicon photonics chip 2 further includes a control signal pin 22, which is located on the Nth layer of the multilayer PCB board 1. The second pad 14 is electrically connected to the control signal pin 22 through at least one conductive via 17 and at least one second trace 15, which is located on any of the 1-N layers, so that the transmission of the control signal of the optical module is not affected by radio frequency signals.

[0062] Optionally, the silicon photonics chip 2 also includes multiple fiber optic interfaces 23 for coupling with multiple optical fibers 3.

[0063] In this process, optical fiber 3 is used to transmit optical signals. Multiple optical fiber interfaces 23 are coupled to multiple optical fibers 3 respectively, so that the multiple optical fiber interfaces 23 can transmit the optical signals transmitted by each optical fiber 3 to the silicon photonics chip 2, so that the silicon photonics chip 2 can convert the optical signals into electrical signals.

[0064] In an optional embodiment, when N < 4, each fiber optic interface 23 can protrude from the front of the multilayer PCB board 1, so that each fiber optic 3 can be directly coupled to each fiber optic interface.

[0065] Conversely, when N≥4, since the silicon photonic chip 2 is recessed in the first cavity 11 relative to the plane of the multilayer PCB board 1, each fiber optic interface 23 is also recessed in the first cavity 11 relative to the plane of the multilayer PCB board 1, which is not conducive to the coupling of each fiber 3 with each fiber optic interface 23.

[0066] Optional, Figure 2 A perspective view from a top-down view of another optical module provided in an embodiment of the present invention. (Reference) Figure 2As shown, when N≥4, the front side of the multilayer PCB board 1 also includes a second cavity 16. The second cavity 16 is used to accommodate multiple optical fibers 3, so that each optical fiber 3 can be connected to each optical fiber interface 23 at a suitable angle, so as to realize the coupling of each optical fiber 3 with each optical fiber interface 23.

[0067] Optionally, the front side of the multilayer PCB board 1 also includes a third pad (not shown in the figure), and the silicon photonics chip 2 includes power pins (not shown in the figure). The third pad and the power pins are both located on the first layer of the multilayer PCB board 1, and the third pad and the power pins are electrically connected by metal wire bonding.

[0068] Specifically, since the power signal is a low-frequency signal, by connecting the third pad of the multilayer PCB board 1 to the power pin of the silicon photonic chip 2 through metal wire bonding, the manufacturing process of the optical module can be simplified without affecting the high-frequency signal transmission of the optical module.

[0069] Optionally, the multilayer PCB board 1 also includes at least one fourth pad (not shown in the figure), and the silicon photonics chip 2 includes at least one detection pin (not shown in the figure). Each fourth pad and each detection pin is located on the first layer of the multilayer PCB board 1, and each fourth pad and each detection pin is electrically connected one-to-one by metal wire bonding.

[0070] Specifically, the detection pins are used to detect low-frequency signals such as the temperature of the silicon photonic chip 2. By making the fourth pad of the multilayer PCB board 1 and the detection pins of the silicon photonic chip 2 electrically connected one-to-one through metal wire bonding, the manufacturing process of the optical module can be simplified without affecting the high-frequency signal transmission of the optical module.

[0071] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. An optical module, characterized in that, include: Multilayer PCB board and silicon photonics chip; the number of layers of the multilayer PCB board is greater than N; where N > 2 and N is a positive integer; The front side of the multilayer PCB board includes a first cavity and a plurality of first pads, the first cavity penetrating from the first layer to the Nth layer of the multilayer PCB board; The silicon photonics chip includes multiple radio frequency signal pins; the silicon photonics chip is embedded in the first cavity, and the radio frequency signal pins are located on the Nth layer of the multilayer PCB board; Each of the first pads corresponds to one of the RF signal pins. Each first pad is connected to the corresponding RF signal pin through at least one conductive via and / or at least one first trace on the multilayer PCB board to reduce the transmission loss of the RF signal.

2. The optical module according to claim 1, characterized in that, The first trace is located on layers 1-N of the multilayer PCB board.

3. The optical module according to claim 1, characterized in that, N<6。 4. The optical module according to claim 1, characterized in that, N=4。 5. The optical module according to claim 4, characterized in that, The first trace that partially connects the first pad and the RF signal pin is located on the first layer of the multilayer PCB board, and the first trace that partially connects the first pad and the RF signal pin is located on the fourth layer of the multilayer PCB board.

6. The optical module according to claim 1, characterized in that, The multilayer PCB board further includes: a second pad; the second pad is located on the front side of the multilayer PCB board; The silicon photonics chip also includes a control signal pin; the control signal pin is located on the Nth layer of the multilayer PCB board. The second pad is electrically connected to the control signal pin through at least one conductive via and at least one second trace; the second trace is located in any of the layers 1 to N.

7. The optical module according to claim 1, characterized in that, The silicon photonics chip also includes multiple fiber optic interfaces; the multiple fiber optic interfaces are used to couple with multiple optical fibers.

8. The optical module according to claim 7, characterized in that, When N≥4, the front side of the multilayer PCB board further includes: a second cavity; The second cavity is used to accommodate multiple optical fibers to achieve coupling between each optical fiber and each optical fiber interface.

9. The optical module according to claim 1, characterized in that, The front side of the multilayer PCB board also includes a third pad; The silicon photonics chip includes power supply pins; The third pad and the power pin are both located on the first layer of the multilayer PCB board, and the third pad and the power pin are electrically connected by metal wire bonding.

10. The optical module according to claim 1, characterized in that, The multilayer PCB board also includes at least one fourth pad; The silicon photonics chip includes at least one detection pin; Each of the fourth pads and each of the detection pins are located on the first layer of the multilayer PCB board, and each of the fourth pads and each of the detection pins are electrically connected one-to-one via metal wire bonding.

Citation Information

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