Method, system, program product, and storage medium for error injection of protection information

Abstract

The application discloses an error injection method, system, program product and storage medium for protecting information, and relates to the technical field of storage. The method comprises the following steps: acquiring current error injection information according to error injection parameters configured by a central processing unit; modifying to-be-executed microinstructions according to the current error injection information, generating corresponding microinstruction control pages in the memory, and calling an error injection hardware engine to execute an error injection task corresponding to the microinstruction control pages; and feeding back error hardware events corresponding to the current error injection information to the central processing unit according to error feedback hardware events of the acquired microinstruction control pages. The application uses error injection parameters configured dynamically by the CPU to accurately inject errors of a specified type at a required position, improves controllability, repeatability and coverage of an error test scene, and uses a token management mechanism based on error hardware events to realize closed-loop control of error triggering and feedback, thereby improving verification efficiency of error injection.

Description

Technical Field

[0001] This invention relates to the field of storage technology, and in particular to a method, system, program product, and storage medium for protecting information from error injection. Background Technology

[0002] As storage systems place increasing demands on data integrity and fault tolerance, the Protection Information (PI) mechanism in the NVMe (Non-Volatile Memory Express) protocol has become a key technology. PI is metadata used for data integrity verification, ensuring data consistency during transmission and storage by attaching verification information. The NVMe protocol defines an end-to-end data protection scheme based on PI, enabling data verification between the host and storage devices, thereby effectively detecting and correcting data corruption caused by hardware failures or transmission errors.

[0003] To verify the effectiveness of the PI mechanism and the system's fault tolerance, error injection technology is widely used in the testing and verification of storage systems. Error injection artificially introduces controllable errors during system operation to simulate abnormal states in real-world scenarios, thereby evaluating the system's error detection, recovery, and fault tolerance performance.

[0004] Error injection schemes in related technologies are typically implemented based on software or firmware. For example, in NVMe-based storage systems, the PI verification process is usually executed by a dedicated hardware engine. This engine receives tasks from the host via microinstructions, completes data verification or PI generation, and then feeds back the results to the host through the Completion Queue Entry (CQE). In this scheme, error injection relies on the CPU (Central Processing Unit) to dynamically configure the error enable field in the microinstructions and report the injection results through hardware events (HWE). However, this scheme has the following problems: 1) The CPU needs to frequently intervene in modifying microinstructions and recovering error states, leading to fragmentation of the injection process, resulting in low verification efficiency and difficulty in achieving efficient testing in high-concurrency scenarios; 2) The location of PI error injection (such as the first or last logic block) is usually statically configured by the engine registers and cannot be dynamically adjusted according to testing requirements, limiting the coverage of error testing scenarios. Therefore, how to achieve accurate and controllable error injection, improve the verification efficiency of error injection, and enhance the controllability, repeatability, and coverage of error testing scenarios are urgent problems to be solved. Summary of the Invention

[0005] The purpose of this invention is to provide a method, system, computer program product, and computer-readable storage medium for protecting information from error injection, so as to achieve precise and controllable error injection, improve the verification efficiency of error injection, and enhance the controllability, repeatability, and coverage of error testing scenarios.

[0006] To address the aforementioned technical problems, this invention provides a method for preventing error injection of protective information, comprising:

[0007] Based on the error injection parameters configured in the central processing unit, obtain the current error injection information; the current error injection information includes the current injection error type and the current injection location;

[0008] Based on the current error injection information, the microinstruction to be executed is modified to generate a corresponding microinstruction control page in memory, so as to call the error injection hardware engine to execute the error injection task corresponding to the microinstruction control page; wherein, the microinstruction to be executed is a microinstruction of input / output operation of any non-volatile memory interface specification; the error injection task is a protection information generation task or a protection information verification task;

[0009] Based on the error feedback hardware events obtained from the microinstruction control page, the CPU sends back the error hardware events corresponding to the current error injection information; wherein, the error hardware events include error source information and specific error type; the error source information is an injected error identifier or a real error identifier.

[0010] On the other hand, the current error injection information also includes the current engine selection; the current engine selection is either a protection information verification identifier or a protection information generation identifier.

[0011] On the other hand, the error injection parameters include injection error type information, injection location information, trigger count information, field selection mode information, and engine selection information; wherein, the injection error type information is any preset injection error type identifier, and the preset injection error type identifier includes at least one of protection field error identifier, application tag field error identifier, reference tag field error identifier, and storage tag field error identifier; the injection location information is any preset injection location identifier, and the preset injection location identifier includes the first logic block identifier and / or the last logic block identifier; the field selection mode information is any preset field selection mode identifier, and the preset field selection mode identifier includes the fixed field mode identifier and / or the circular shift mode identifier.

[0012] On the other hand, based on the error injection parameters configured in the central processing unit, the current error injection information is obtained, including:

[0013] Based on the error injection parameters and historical retention parameters configured in the central processing unit in the preset error injection register, the current error injection information is obtained; wherein, the historical retention parameters include the remaining number of triggers and the currently activated field; the currently activated field is any preset field identifier, and the preset field identifier includes the protection field identifier, the application tag field identifier, the reference tag field identifier, and the storage tag field identifier.

[0014] On the other hand, based on the error injection parameters configured in the central processing unit and the historical retention parameters in the preset error injection register, the current error injection information is obtained, including:

[0015] When the remaining number of triggers is greater than 0, if the field selection mode information is the cyclic shift mode identifier, then the current injection error type is determined according to the preset injection error type identifier corresponding to the next field of the currently activated field in the preset cyclic shift order.

[0016] Correspondingly, based on the current error injection information, after modifying the microinstruction to be executed, it also includes:

[0017] Decrease the remaining trigger count by one, and modify the currently activated field to the preset field identifier corresponding to the next field.

[0018] On the other hand, after feeding back the error hardware event corresponding to the current error injection information to the central processing unit based on the obtained error feedback hardware event of the microinstruction control page, the process further includes:

[0019] If the error source information in the fault hardware event is the injected error identifier, then the central processing unit is controlled to regenerate the microinstruction to be executed.

[0020] On the other hand, controlling the central processing unit to regenerate the microinstructions to be executed includes:

[0021] The central processing unit is controlled to regenerate the microinstruction to be executed and to disable the erroneous injection field of the microinstruction to be executed.

[0022] On the other hand, based on the error feedback hardware event of the acquired microinstruction control page, the error hardware event corresponding to the current error injection information is fed back to the central processing unit, including:

[0023] An error feedback interrupt is sent to the central processing unit (CPU) so that the CPU reads the error hardware event stored in the preset hardware event register according to the error feedback interrupt.

[0024] On the other hand, before sending an error feedback interrupt to the central processing unit, the following is also included:

[0025] The error feedback hardware event is generated and stored in the preset hardware event register based on the error feedback hardware event fed back by the protection information verification engine or the non-volatile memory interface specification initialization engine.

[0026] On the other hand, before modifying the microinstruction to be executed based on the current error injection information and generating the corresponding microinstruction control page in memory, the following steps are also included:

[0027] During the execution of input / output commands in the non-volatile memory interface specification, a microinstruction that needs to be executed at the moment is identified as the microinstruction to be executed.

[0028] On the other hand, the method also includes:

[0029] If the error feedback hardware event is not obtained within the timeout period, timeout information is fed back to the central processing unit; wherein, the error injection parameter also includes the timeout period.

[0030] The present invention also provides an error injection system for protecting information, comprising:

[0031] The microinstruction control page generation module is used to obtain current error injection information based on the error injection parameters configured in the central processing unit; modify the microinstruction to be executed based on the current error injection information, generate the corresponding microinstruction control page in memory, and call the error injection hardware engine to execute the error injection task corresponding to the microinstruction control page; wherein, the current error injection information includes the current injected error type and the current injection location; the microinstruction to be executed is a microinstruction for input / output operation of any non-volatile memory interface specification; the error injection task is a protection information generation task or a protection information verification task;

[0032] A closed-loop feedback controller is used to feed back the error hardware event corresponding to the current error injection information to the central processing unit based on the error feedback hardware event of the acquired microinstruction control page; wherein, the error hardware event includes error source information and a specific error type; the error source information is an injected error identifier or a real error identifier.

[0033] On the other hand, the system also includes the error injection hardware engine; wherein the error injection hardware engine includes a protection information verification engine and a non-volatile memory interface specification initialization engine.

[0034] The protection information verification engine is used to perform error injection verification on the data and protection information of the microinstruction control page obtained from memory when the error injection task is the protection information verification task, and obtain the verification result; and trigger the error feedback hardware event according to the verification result.

[0035] The non-volatile memory interface specification initialization engine is used to generate protection information for the microinstruction control page based on the data of the microinstruction control page obtained from memory when the error injection task is the protection information generation task; to perform error injection modification on the target content in the protection information, obtain the modified protection information and store it in memory, so as to use the controller in the non-volatile memory interface specification disk to verify the data of the microinstruction control page and the modified protection information, and trigger the error feedback hardware event.

[0036] The present invention also provides a computer program product, including a computer program / instruction that, when executed by a processor, implements the steps of the error injection method for protecting information as described above.

[0037] Furthermore, the present invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the error injection method for protecting information as described above.

[0038] The present invention provides a method for error injection of protection information, comprising: obtaining current error injection information according to error injection parameters configured in the central processing unit; wherein the current error injection information includes the current injected error type and the current injection location; modifying the microinstruction to be executed according to the current error injection information to generate a corresponding microinstruction control page in memory, thereby calling an error injection hardware engine to execute the error injection task corresponding to the microinstruction control page; wherein the microinstruction to be executed is a microinstruction of input / output operation of any non-volatile memory interface specification; the error injection task is a protection information generation task or a protection information verification task; and feeding back the error hardware event corresponding to the current error injection information to the central processing unit according to the error feedback hardware event of the obtained microinstruction control page; wherein the error hardware event includes error source information and a specific error type; the error source information is an injected error identifier or a real error identifier.

[0039] As can be seen, this invention, by modifying the microinstruction to be executed based on the current error injection information and generating a corresponding microinstruction control page in memory, can accurately inject a specified type of error at the required location using dynamically configured error injection parameters of the CPU, improving the controllability, repeatability, and coverage of error testing scenarios. Furthermore, by feeding back the error hardware event corresponding to the current error injection information to the central processing unit based on the error feedback hardware event of the acquired microinstruction control page, a token management mechanism based on error hardware events can be used to achieve closed-loop control of error triggering and feedback, improving the verification efficiency of error injection and realizing rapid and highly controllable system fault tolerance verification. In addition, this invention also provides an error injection system for protecting information, a computer program product, and a computer-readable storage medium, which also have the above-mentioned beneficial effects. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0041] Figure 1 A flowchart illustrating a method for error injection of protective information provided in an embodiment of the present invention;

[0042] Figure 2 A schematic diagram illustrating the framework of another error injection method for protecting information provided in an embodiment of the present invention;

[0043] Figure 3 This is a schematic diagram of the structure of an error injection system for protecting information provided in an embodiment of the present invention. Detailed Implementation

[0044] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0045] Please refer to Figure 1 , Figure 1 A flowchart illustrating a method for error injection into protected information provided in an embodiment of the present invention. The method may include:

[0046] Step 101: Obtain the current error injection information according to the error injection parameters configured in the central processing unit; wherein, the current error injection information includes the current injection error type and the current injection location.

[0047] It is understood that the error injection parameters in this embodiment can be parameters configured by the central processing unit (CPU) to control error injection, such as parameters configured by the CPU into a preset error injection register.

[0048] Correspondingly, the current error injection information in this step can be the information required for the current error injection. This information can include the current injection error type and the current injection location. The current injection error type can indicate the type of error injected in the current injection, such as the Guard field, Application Tag field, Reference Tag field, and Storage Tag field. The current injection location can indicate the error injection location, such as the first LB (Logical Block) or the last logical block, indicating the PI corresponding to the first and last LBs. In other words, in this embodiment, based on the error injection parameters configured by the central processing unit, the injection error type and injection location for the current error injection can be determined, allowing subsequent error injection of protection information (PI) to be completed without CPU intervention, thus improving the verification efficiency of error injection.

[0049] Correspondingly, the specific content of the error injection parameters in this embodiment can be set by the designer according to the practical scenario and user needs. For example, the error injection parameters may include injection error type information and injection location information; wherein, the injection error type information is any preset injection error type identifier, and the preset injection error type identifier includes at least one of the protection field error identifier, application tag field error identifier, reference tag field error identifier and storage tag field error identifier; the injection location information is any preset injection location identifier, and the preset injection location identifier includes the first logic block identifier and / or the last logic block identifier.

[0050] Correspondingly, the error injection parameters may also include engine selection information, which indicates the selected error injection hardware engine, i.e., the method of error injection (such as PI generation or PI verification). The engine selection information can be any preset engine identifier, which may include a protection information verification identifier and / or a protection information generation identifier. In other words, the current error injection information also includes the current engine selection; the current engine selection is either a protection information verification identifier or a protection information generation identifier, as shown in the engine selection information.

[0051] The error injection parameters may also include trigger count information and field selection mode information. Trigger count information indicates the number of error injections; field selection mode information indicates the field switching mode for each error injection. The field selection mode information can be any preset field selection mode identifier, which may include a fixed field mode identifier and / or a cyclic shift mode identifier. For example, if the field selection mode information is a fixed field mode identifier, the same injection error type can be used for each error injection; if the field selection mode information is a cyclic shift mode identifier, different injection error types can be switched according to a preset cyclic shift order. For example, after activating error injection for the Guard field this time, error injection for the Application Tag can be activated next time.

[0052] Accordingly, this step can obtain the current error injection information based on the error injection parameters configured in the central processing unit and the historical retention parameters in the preset error injection register; wherein, the historical retention parameters include the remaining number of triggers and the currently activated fields; the currently activated fields are any preset field identifiers, and the preset field identifiers include protection field identifiers, application tag field identifiers, reference tag field identifiers and storage tag field identifiers.

[0053] For example, when the remaining trigger count is greater than 0, if the field selection mode information is a circular shift mode identifier, then the current injection error type is determined according to the preset injection error type identifier corresponding to the next field of the currently activated field in the preset circular shift order; if the field selection mode information is a fixed field mode identifier, then the preset injection error type identifier or injection error type information corresponding to the currently activated field can be determined as the current injection error type. Correspondingly, after modifying the microinstruction to be executed based on the current error injection information in step 102, it also includes: decrementing the remaining trigger count by one, and modifying the currently activated field to the preset field identifier corresponding to the next field.

[0054] For example, the aforementioned preset error injection registers may include: Injection Error Configuration Register (EI_CFG), Injection Error Mode Register (EI_MODE), Injection Error Status Register (EI_STATUS), Injection Error Timeout Register (EI_TIMEOUT), and Preset Hardware Event Register (HWE_ID). The bit width and configuration meaning of each preset error injection register can be shown in Table 1.

[0055] Table 1. Bit width and configuration significance of preset error injection registers.

[0056]

[0057] Step 102: Based on the current error injection information, modify the microinstruction to be executed, generate the corresponding microinstruction control page in memory, and call the error injection hardware engine to execute the error injection task corresponding to the microinstruction control page.

[0058] Among them, the microinstruction to be executed is the microinstruction for input / output operations of any non-volatile memory interface specification; the error injection task is either a protection information generation task or a protection information verification task.

[0059] Correspondingly, this step may precede a process for acquiring the microinstruction to be executed. For example, in some embodiments, a microinstruction that needs to be executed can be determined as the microinstruction to be executed during the execution of NVMe's IO (input / output) commands. In other embodiments, a microinstruction specifically configured by the central processing unit for verifying PI can also be used as the microinstruction to be executed.

[0060] In this embodiment, the error injection hardware engine may include a PI verification engine (such as...). Figure 2 The protection information verification generation engine and the non-volatile memory interface specification initialization (NVMe Init) engine (such as...) Figure 2 (The solid-state drive command generation engine in the system). For example, the PI verification engine can include 2 instances, each supporting 16 parallel micro-instruction processing; the NVMe Init engine can include 4 instances, each supporting 8 parallel SQE (Submission Queue Entry) processing, to achieve parallel processing of up to 32 micro-instructions. Correspondingly, the HWE storage depth of the closed-loop feedback controller can be 16.

[0061] Correspondingly, the PI verification engine can be used to perform error injection verification on the data and protection information of the microinstruction control page obtained from memory when the error injection task is a protection information verification task, and obtain the verification result; based on the verification result, it triggers an error feedback hardware event. The NVMe Init engine can be used to generate protection information for the microinstruction control page based on the data of the microinstruction control page obtained from memory when the error injection task is a protection information generation task; it can perform error injection modification on the target content in the protection information, obtain the modified protection information and store it in memory, so that the controller in the NVMe disk (such as a solid-state drive SSD) can verify the data of the microinstruction control page and the modified protection information, and trigger an error feedback hardware event.

[0062] The target content can be the content corresponding to the error injection parameters, such as error injection-related fields corresponding to the error type information and injection location information, such as the Guard field, Application Tag field, Reference Tag field, or Storage Tag field.

[0063] For example, the microinstruction (i.e., the microinstruction to be executed) in this embodiment may include fields such as Guard Check Error, Application Check Error, Reference Check Error, and Storage Check Error, used to report errors after the corresponding PI information verification is completed; and fields such as Guard Gen Error Injection, Application Gen Error Injection, Reference Gen Error Injection, and Storage Gen Error Injection, used to implement error injection when generating the corresponding PI information. For example, in this step, the corresponding fields in the microinstruction can be modified according to the current error injection information configuration in the preset error injection register to trigger the corresponding error injection hardware engine to execute the corresponding error injection task.

[0064] Specifically, Guard Check Error instructs the reporting of errors after Guard verification is completed; Application Check Error instructs the reporting of errors after Application Tag verification is completed; Reference Check Error instructs the reporting of errors after Reference Tag verification is completed; and Storage Check Error instructs the reporting of errors after Storage Tag verification is completed. Guard Gen Error Injection instructs error injection to be implemented when generating Guard; Application Gen Error Injection instructs error injection to be implemented when generating Application Tag; Reference Gen Error Injection instructs error injection to be implemented when generating Reference Tag; and Storage Gen Error Injection instructs error injection to be implemented when generating Storage Tag.

[0065] Step 103: Based on the error feedback hardware event of the acquired microinstruction control page, report the error hardware event corresponding to the current error injection information to the central processing unit; wherein, the error hardware event includes error source information and specific error type; the error source information is either an injected error identifier or a real error identifier.

[0066] In this step, the CPU is informed of the error by reporting the corresponding error hardware event (ErrorHWE) to the CPU. The error hardware event can include error source information (such as the error source identifier in Table 1) and the specific error type.

[0067] Correspondingly, the specific method by which the error hardware event corresponding to the current error injection information is fed back to the central processing unit (CPU) based on the error feedback hardware event of the acquired microinstruction control page in this step can be set by the designer according to the practical scenario and user needs. For example, in this step, an error feedback interrupt can be sent to the CPU so that the CPU can read the error hardware event stored in the preset hardware event register (such as the HWE_ID register mentioned above) according to the error feedback interrupt. Alternatively, the error hardware event corresponding to the current error injection information can be fed back to the CPU in other ways besides interrupts; this embodiment does not impose any restrictions on this.

[0068] Accordingly, before sending the error feedback interrupt to the central processing unit, the method provided in this embodiment may further include: generating an error hardware event and storing it in a preset hardware event register based on the error feedback hardware event fed back by the PI verification engine or the NVMe Init engine.

[0069] For example, such as Figure 2 As shown, 1. During normal SSD I / O execution, the CPU can configure the registers of the microinstruction control page generation module. 2. Based on the register configuration, the microinstruction control page generation module, during the construction of the microinstruction control page, modifies the Error Injection-related fields in the microinstruction (i.e., the microinstruction to be executed), writes the microinstruction control page into memory, and drives the WQM (microinstruction dispatch module) to execute the microinstruction control page. 3. The engine with error injection capability (i.e., the error injection hardware engine) obtains the microinstruction and begins executing the task.

[0070] 4. Different engines, based on their microinstruction configurations, can be divided into two execution paths: PI information verification and PI information generation. 4.1 When the protection information verification engine performs the PI information verification task, it retrieves data and PI information from memory (this data can be written from an external system to the system memory or moved from the SSD disk to the system memory by the solid-state drive command generation engine), and then completes the normal verification function. If the verification is correct, according to the error injection configuration of the microinstruction, it feeds back an Injection Error HWE (injected error hardware event, i.e., an error hardware event including an injected error identifier) ​​to the CPU. If a real verification error occurs, it replies with an Error HWE (i.e., an error hardware event including a real error identifier). At this time, it needs to report an interrupt to the CPU, notifying the CPU that an Injection Error has been lost. 4.2 When the solid-state drive command generation engine (i.e., the NVMeInit engine) performs the PI information generation task, it only retrieves data from memory. After generating the PI information, it generates an error (such as inversion) for the fields of the PI information specified in the engine's registers and then writes it back to memory. At this time, the engine completes the microinstruction task normally.

[0071] 5. The SSD command generation engine writes data and PI information to the SSD. At this time, the SSD's SQE command needs to enable the relevant PI information verification. 6. The SSD's internal controller verifies the data and PI information. If an error is found, it returns the PI verification error result to the SSD command generation engine via the CQE (Completion Queue Entry) command. 7. The SSD command generation engine detects an error in the SSD's verification status and reports an ErrorHWE to the CPU. The CPU retrieves the current write operation status (i.e., PI verification error) from the CQE status and considers this HWE to be an InjectionError HWE. 8. After the CPU disables the error injection field of the microinstruction, it re-executes the microinstruction, and the IO operation process should complete normally.

[0072] In other words, after step 103 in this embodiment, if the error source information in the faulty hardware event is an injected error identifier, the CPU can be controlled to regenerate the microinstruction to be executed to realize the error recovery process and verify the system's self-healing capability. Furthermore, the microinstruction to be executed modified in step 102 can be a microinstruction that is not regenerated, to ensure that erroneous injection of the same microinstruction is avoided, thus preventing the normal execution of that microinstruction. For example, controlling the CPU to regenerate the microinstruction to be executed may include controlling the CPU to regenerate the microinstruction to be executed and disabling the error injection field of the microinstruction to be executed, so that subsequent error injection of the microinstruction to be executed will not occur. Correspondingly, the error injection field in the microinstruction to be executed modified in step 102 can be in an enabled state.

[0073] For example, the error injection method for PI information provided in this embodiment may include the following process: ① Error injection configuration process; The CPU can set the error type (Guard), injection location (first logic block PI), trigger count (3 times) and engine selection (PI verification engine) by writing to the EI_CFG register; by writing to the EI_MODE register, the field selection mode is set to circular shift, and the active field is initialized to the Guard field (0x1); by writing to the EI_TIMEOUT register, the timeout time is set to 0xFFFFF (approximately 1.6ms).

[0074] ② Microinstruction configuration process; The microinstruction control page generation module modifies the error injection field in the microinstruction according to the configuration of the EI_CFG register: the Guard Check Error field of the first microinstruction is set (0x1), and the remaining trigger count in EI_STATUS is reduced (3→2). Using a circular shift mode, the next microinstruction will activate the Application error injection field; the microinstruction is then transmitted to the microinstruction control page.

[0075] ③ Error triggering and execution process: The PI verification engine reads the micro-instructions and detects that the Guard Check Error field is set: reverses the Guard value of the first logic block; executes the verification task, and if the verification fails, triggers Error Injection HWE (ID=0x0101).

[0076] ④ Closed-loop feedback and recovery process: The closed-loop feedback controller captures Error Injection HWE (ID=0x0101) and notifies the CPU via an interrupt (i.e., error feedback interrupt). The CPU reads the HWE_ID register, confirms that the error is an injection error type (0x01), and disables the Guard Check Error field of the current microinstruction; the microinstruction control page generation module reconstructs the microinstruction, decrements the remaining trigger count by 1 (2→1), activates the Application Tag field, and repeats processes ③ and ④ until the trigger count is exhausted (EI_STATUS[15:8]=0).

[0077] ⑤ In the timeout process, if the CPU does not receive feedback on the error hardware event within the timeout period configured in the EI_TIMEOUT register, it considers the internal error injection verification to have failed.

[0078] Verification Results: Efficiency: Single error injection cycle (Configuration → Feedback) time <100 ns, supports 10 errors per second. 7 Secondary injection. Precision: By covering all PI fields (Guard, Application Tag, Reference Tag, and Storage Tag) using a cyclic shift pattern, error location accuracy reaches the single logic block level. Compatibility: Fully compatible with the standard NVMe protocol, requiring no modification to the SSD controller firmware.

[0079] In this embodiment, the present invention modifies the microinstruction to be executed based on the current error injection information to generate a corresponding microinstruction control page in memory. This allows for the precise injection of a specified type of error at the required location using dynamically configured error injection parameters from the CPU, improving the controllability, repeatability, and coverage of error testing scenarios. Furthermore, by feeding back the error hardware events corresponding to the current error injection information to the central processing unit based on the error feedback hardware events of the acquired microinstruction control page, a token management mechanism based on error hardware events can be used to achieve closed-loop control of error triggering and feedback, improving the verification efficiency of error injection and realizing rapid and highly controllable system fault tolerance verification.

[0080] Corresponding to the above method embodiments, this invention also provides an error injection system for protecting information. The error injection system for protecting information described below and the error injection method for protecting information described above can be referred to in correspondence.

[0081] Please refer to Figure 3 , Figure 3 This is a schematic diagram of a fault injection system for protecting information provided in an embodiment of the present invention. The system may include:

[0082] The microinstruction control page generation module 10 is used to obtain the current error injection information according to the error injection parameters configured by the central processing unit; modify the microinstruction to be executed according to the current error injection information, generate the corresponding microinstruction control page in memory, and call the error injection hardware engine to execute the error injection task corresponding to the microinstruction control page; wherein, the current error injection information includes the current injection error type and the current injection location; the microinstruction to be executed is a microinstruction of input / output operation of any non-volatile memory interface specification; the error injection task is a protection information generation task or a protection information verification task;

[0083] The closed-loop feedback controller 20 is used to feed back the error hardware event corresponding to the current error injection information to the central processing unit based on the error feedback hardware event of the acquired microinstruction control page; wherein, the error hardware event includes error source information and specific error type; the error source information is an injected error identifier or a real error identifier.

[0084] In some embodiments, the system further includes an error injection hardware engine; wherein the error injection hardware engine includes a protection information verification engine and a non-volatile memory interface specification initialization engine.

[0085] The protection information verification engine is used to perform error injection verification on the data and protection information of the microinstruction control page obtained from memory when the error injection task is a protection information verification task, and obtain the verification result; based on the verification result, it triggers an error feedback hardware event.

[0086] The Non-Volatile Memory Interface Specification (NVIM) initialization engine is used to generate protection information for microinstruction control pages based on data from the microinstruction control pages retrieved from memory during error injection tasks that generate protection information. It then performs error injection modifications on the target content within the protection information, obtaining the modified protection information and storing it in memory. The controller within the NVOCT disk then verifies the data in the microinstruction control pages and the modified protection information, triggering an error feedback hardware event.

[0087] In some embodiments, the current error injection information also includes the current engine selection, so as to perform error injection according to the selected corresponding error injection hardware engine; the current engine selection is a protection information verification identifier or a protection information generation identifier.

[0088] In some embodiments, the error injection parameters include injection error type information, injection location information, trigger count information, field selection mode information, and engine selection information; wherein, the injection error type information is any preset injection error type identifier, and the preset injection error type identifier includes at least one of protection field error identifier, application tag field error identifier, reference tag field error identifier, and storage tag field error identifier; the injection location information is any preset injection location identifier, and the preset injection location identifier includes the first logic block identifier and / or the last logic block identifier; the field selection mode information is any preset field selection mode identifier, and the preset field selection mode identifier includes the fixed field mode identifier and / or the circular shift mode identifier.

[0089] In some embodiments, the current error injection information is obtained based on the error injection parameters configured in the central processing unit, including:

[0090] Based on the error injection parameters configured in the central processing unit and the historical retention parameters in the preset error injection register, the current error injection information is obtained; among them, the historical retention parameters include the remaining number of triggers and the currently activated fields; the currently activated fields are any preset field identifiers, which include protection field identifiers, application tag field identifiers, reference tag field identifiers and storage tag field identifiers.

[0091] In some embodiments, current error injection information is obtained based on the error injection parameters configured by the central processing unit and the historical retention parameters in the preset error injection register, including:

[0092] When the remaining number of triggers is greater than 0, if the field selection mode information is a circular shift mode identifier, then the current injection error type is determined according to the preset injection error type identifier corresponding to the next field of the currently activated field in the preset circular shift order.

[0093] Correspondingly, the microinstruction control page generation module 10 is also used to, after modifying the microinstruction to be executed based on the current error injection information, decrement the remaining trigger count by one and modify the currently activated field to the preset field identifier corresponding to the next field.

[0094] In some embodiments, the closed-loop feedback controller 20 is further configured to, after feeding back the error hardware event corresponding to the current error injection information to the central processing unit based on the error feedback hardware event of the acquired microinstruction control page, control the central processing unit to regenerate the microinstruction to be executed if the error source information in the error hardware event is an injected error identifier.

[0095] In some embodiments, controlling the central processing unit to regenerate microinstructions to be executed includes:

[0096] Control the central processing unit to regenerate the microinstructions to be executed and disable the error injection field of the microinstructions to be executed.

[0097] In some embodiments, based on the error feedback hardware event of the acquired microinstruction control page, the error hardware event corresponding to the current error injection information is fed back to the central processing unit, including:

[0098] Send an error feedback interrupt to the central processing unit so that the central processing unit can read the error hardware event stored in the preset hardware event register based on the error feedback interrupt.

[0099] In some embodiments, the closed-loop feedback controller 20 is further configured to initialize the error feedback hardware event fed back by the engine according to the protection information verification engine or the non-volatile memory interface specification before sending the error feedback interrupt to the central processing unit, generate the error hardware event and store it in a preset hardware event register.

[0100] In some embodiments, the microinstruction control page generation module 10 is further configured to determine a microinstruction to be executed during the execution of input / output commands of the non-volatile memory interface specification before modifying the microinstruction to be executed based on the current error injection information and generating the corresponding microinstruction control page in memory.

[0101] In some embodiments, the closed-loop feedback controller 20 can also be used to provide timeout information to the central processing unit when no error feedback hardware event is received within the timeout period; wherein, the error injection parameter also includes the timeout period.

[0102] For example, the microinstruction control page generation module 10 can be used to parse error injection parameters (such as trigger count information and field selection mode information) issued by the CPU, and modify the error injection fields in the microinstruction (such as Guard Check Error) during the execution of multiple commands. The microinstruction control page generation module 10 can support multi-engine parallel configuration and implement error injection enable and priority control by specifying registers.

[0103] Error injection hardware engines (such as PI verification engines) can provide configurable error injection interfaces to support the injection of errors during the PI generation or verification phase; the error location can be specified through internal registers (such as the PI corresponding to the first and last LBs).

[0104] The closed-loop feedback controller 20 can receive error feedback hardware events from the error injection hardware engine, distinguish between injected errors (Injection Error HWE) and real errors (Error HWE); and notify the CPU of injected error loss events through an interrupt mechanism to ensure the complete recovery of injected errors.

[0105] For example, the microinstruction control page generation module 10 may include the following registers:

[0106] Check Error Injection Engine Register: When there are multiple engines in the system that can verify and inject errors (such as the PI verification engine), this register is used to select which engines to enable the Check Error Injection operation.

[0107] Gen Error Injection Engine register: When there are multiple engines in the system that can generate injection errors (such as the NVMe Init engine), this register is used to select which engines to enable GenError Injection operation;

[0108] Check Error Injection Mode register: During a microinstruction control page generation process, each time a microinstruction that supports Check Error Injection is enabled, one Injection field is enabled. This register configuration indicates whether to specify a field or to select fields cyclically through a shift register.

[0109] Gen Error Injection Mode register: During a microinstruction control page generation process, one injection field is enabled for each microinstruction that supports Gen Error Injection. This register configuration indicates whether to specify a field or select fields cyclically through a shift register.

[0110] The Check Error Injection Number register is dynamically written by the CPU. When the microinstruction control page generation module 10 modifies a Check Error Injection in the microinstruction, this value is decremented by 1. If the CPU writes again before the microinstruction control page generation module has consumed all the written counts, the value is incremented.

[0111] The Gen Error Injection Number register is dynamically written by the CPU. When the microinstruction control page generation module modifies a Gen Error Injection in a microinstruction, this value is decremented by 1. If the CPU writes again before the microinstruction control page generation module has used up the written count, the value is incremented.

[0112] In this embodiment, the microinstruction control page generation module 10 modifies the microinstruction to be executed based on the current error injection information to generate the corresponding microinstruction control page in memory. This allows for the precise injection of specified types of errors at the required locations using dynamically configured error injection parameters from the CPU, improving the controllability, repeatability, and coverage of error testing scenarios. Furthermore, the closed-loop feedback controller 20 feeds back the error hardware events corresponding to the current error injection information to the central processing unit based on the error feedback hardware events of the acquired microinstruction control page. This enables the use of a token management mechanism based on error hardware events to achieve closed-loop control of error triggering and feedback, improving the verification efficiency of error injection and realizing rapid and highly controllable system fault tolerance verification.

[0113] Corresponding to the above method embodiments, this invention also provides a computer program product. The computer program product described below can be referred to in conjunction with the error injection method for protecting information described above.

[0114] A computer program product includes a computer program / instructions that, when executed by a processor, implement the steps of the error injection method for protecting information provided in the above-described method embodiments.

[0115] Corresponding to the above method embodiments, this invention also provides a computer-readable storage medium. The computer-readable storage medium described below and the error injection method for protecting information described above can be referred to in correspondence.

[0116] A computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the error injection method for protecting information as provided in the above-described method embodiments.

[0117] The computer-readable storage medium can specifically be a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, or any other readable storage medium capable of storing program code.

[0118] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems, computer program products, and computer-readable storage media disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple; relevant details can be found in the method section.

[0119] The foregoing has provided a detailed description of the error injection method, system, computer program product, and computer-readable storage medium for protecting information provided by this invention. Specific examples have been used to illustrate the principles and implementation methods of this invention. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this invention. It should be noted that those skilled in the art can make various improvements and modifications to this invention without departing from its principles, and these improvements and modifications also fall within the protection scope of this invention.

Claims

1. A method of protecting information from error injection, characterized by, The method comprises: According to the error injection parameter configured by the central processor, the current error injection information is obtained; wherein, the current error injection information includes the current injection error type and the current injection position; According to the current error injection information, the to-be-executed microinstruction is modified to generate the corresponding microinstruction control page in the memory, so as to call the error injection hardware engine to execute the error injection task corresponding to the microinstruction control page; wherein, the to-be-executed microinstruction is the microinstruction of any non-volatile memory interface specification input / output operation; the error injection task is a protection information generation task or a protection information verification task; According to the error feedback hardware event of the obtained microinstruction control page, the central processor is fed back the error hardware event corresponding to the current error injection information; wherein, the error hardware event includes error source information and specific error type; the error source information is an injection error identifier or a real error identifier.

2. The error injection method of protecting information according to claim 1, characterized by, The current error injection information further includes the current engine selection; the current engine selection is a protection information verification identifier or a protection information generation identifier.

3. The error injection method of protecting information according to claim 2, characterized by, The error injection parameter includes injection error type information, injection position information, trigger number information, field selection mode information and engine selection information; wherein, the injection error type information is any preset injection error type identifier, and the preset injection error type identifier includes at least one of protection field error identifier, application tag field error identifier, reference tag field error identifier and storage tag field error identifier; the injection position information is any preset injection position identifier, and the preset injection position identifier includes first logical block identifier and / or last logical block identifier; the field selection mode information is any preset field selection mode identifier, and the preset field selection mode identifier includes fixed field mode identifier and / or cyclic shift mode identifier.

4. The error injection method of protecting information according to claim 3, characterized by, According to the error injection parameter configured by the central processor, the current error injection information is obtained, comprising: According to the error injection parameter configured by the central processor and the historical reserved parameter in the preset error injection register, the current error injection information is obtained; wherein, the historical reserved parameter includes the remaining trigger number and the current activated field; the current activated field is any preset field identifier, and the preset field identifier includes protection field identifier, application tag field identifier, reference tag field identifier and storage tag field identifier.

5. The error injection method for protecting information according to claim 4, characterized by, According to the error injection parameter configured by the central processor and the historical reserved parameter in the preset error injection register, the current error injection information is obtained, comprising: When the remaining trigger number is greater than 0, if the field selection mode information is the cyclic shift mode identifier, the next field corresponding to the preset injection error type identifier of the current activated field in the preset cyclic shift sequence is determined as the current injection error type; Correspondingly, after modifying the to-be-executed microinstruction according to the current error injection information, the method further comprises: The remaining trigger number is reduced by one, and the current activated field is modified to the preset field identifier corresponding to the next field.

6. The error injection method of protecting information according to claim 1, characterized by, The method further comprises the following steps of: If the error source information in the error feedback hardware event is the injection error identifier, the central processing unit is controlled to re-generate the micro instruction to be executed.

7. The error injection method of protecting information according to claim 6, characterized by, The method further comprises the following steps of: The central processing unit is controlled to re-generate the micro instruction to be executed and close the error injection field of the micro instruction to be executed.

8. The error injection method of protecting information according to claim 1, characterized by, The method further comprises the following steps of: The central processing unit is sent an error feedback interrupt, so that the central processing unit reads the error hardware event stored in a preset hardware event register according to the error feedback interrupt.

9. The error injection method of protecting information according to claim 8, characterized by, The method further comprises the following steps of: According to the error feedback hardware event fed back by the protection information verification engine or the non-volatile memory interface specification initialization engine, the error hardware event is generated and stored in the preset hardware event register.

10. The error injection method of protecting information according to claim 1, characterized by, The method further comprises the following steps of: In the execution process of the input / output command of the non-volatile memory interface specification, a micro instruction currently to be executed is determined as the micro instruction to be executed.

11. The error injection method of protecting information according to claim 1, characterized by, The method further comprises the following steps of: When the error feedback hardware event is not acquired within a timeout time, timeout information is fed back to the central processing unit; wherein the error injection parameter further comprises the timeout time.

12. An error injection system for protecting information, characterized by, The method further comprises the following steps of: A micro instruction control page generation module is configured to acquire current error injection information according to error injection parameters configured by the central processing unit. According to the current error injection information, a micro instruction to be executed is modified to generate a corresponding micro instruction control page in the memory, so as to call an error injection hardware engine to execute an error injection task corresponding to the micro instruction control page; wherein the current error injection information comprises a current injection error type and a current injection position; the micro instruction to be executed is a micro instruction of any input / output operation of the non-volatile memory interface specification; and the error injection task is a protection information generation task or a protection information verification task. A closed-loop feedback controller is configured to feed back, to the central processing unit, an error hardware event corresponding to the current error injection information according to an error feedback hardware event of the micro instruction control page; wherein the error hardware event comprises error source information and a specific error type; and the error source information is an injection error identifier or a real error identifier.

13. The error injection system for protecting information according to claim 12, wherein, The method further comprises the following steps of: The error injection hardware engine comprises a protection information verification engine and a non-volatile memory interface specification initialization engine. The protection information verification engine is configured to, when the error injection task is the protection information verification task, perform error injection verification on data and protection information of the micro instruction control page acquired from the memory, acquire a verification result, and trigger the error feedback hardware event according to the verification result. The non-volatile memory interface specification initialization engine is configured to, when the error injection task is the protection information generation task, generate protection information of the microinstruction control page according to data of the microinstruction control page obtained from the memory; modify target content in the protection information to obtain modified protection information and store the modified protection information into the memory, so as to use a controller in a non-volatile memory interface specification disk to check the data of the microinstruction control page and the modified protection information, and trigger the error feedback hardware event.

14. A computer program product comprising computer programs / instructions, characterized in that, The computer program / instruction is executed by the processor to implement the steps of the error injection method of the protection information according to any one of claims 1 to 11.

15. A computer-readable storage medium, characterized in that, The computer program / instruction is executed by the processor to implement the steps of the error injection method of the protection information according to any one of claims 1 to 11.

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