Shield gate trench MOSFET modeling method and system

Abstract

The invention relates to the technical field of design of power semiconductor devices, in particular to a modeling method and system for a shield gate trench MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor). The method comprises the following steps: selecting key positions of feature points, including corners, edges and centers, of a shield gate trench structure, calculating electric field intensity of the key positions of the feature points through two-dimensional simulation, and generating an electric field intensity distribution diagram; based on the electric field intensity distribution diagram, designing the shape of the shield grid into a trapezoidal structure with a wide upper part and a narrow lower part by defining a trapezoidal angle parameter set, modeling, establishing a quantitative relation between the inclination angle of the side wall and the electric field intensity of the groove corner, and generating an angle-electric field response curve; and calculating the change of the overlapping area between the shield grid and the control grid of different trapezoidal structures in the groove. According to the invention, by analyzing the relationship between the trapezoid angle and the grid overlapping area, a clear performance improvement index and an optimization direction are provided for the design of a power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor).

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power semiconductor device design, and particularly relates to a modeling method and system of shielded gate trench MOSFET. BACKGROUND

[0002] Power semiconductor devices are the core components of modern power electronic systems, among which shielded gate trench MOSFETs are widely used due to their excellent switching performance and low on-resistance. However, the traditional rectangular shielded gate MOSFET has a problem of electric field concentration at the corners, especially in the sharp corner region where the shielded gate bottom and side meet. Through accurate modeling analysis, these sharp corner regions become the highest points of electric field strength, limiting the breakdown voltage of the device, and are also hot spots and reliability hazards.

[0003] In the prior art, the shielded gate structure is mostly designed in a rectangular shape, which is relatively simple in manufacturing process, but in high-voltage applications, the sharp corners of the rectangular structure can cause serious electric field concentration. This electric field concentration not only reduces the breakdown voltage of the device, but also causes local hot spots during long-term operation, accelerating device aging and failure. In addition, the large-area overlap of the rectangular shielded gate and the control gate also increases the gate charge, reduces the switching speed, and increases the switching loss.

[0004] Currently, the industry's optimization of shielded gate structures mainly focuses on adjusting parameters such as gate spacing and depth, lacking systematic research and optimization methods for the gate geometry itself. Especially in the modeling and design stage, there is a lack of comprehensive optimization methods that combine changes in geometry, electric field distribution, gate charge, and manufacturing process, which limits the improvement of device performance.

[0005] Therefore, there is an urgent need for a modeling method that can systematically optimize the shielded gate geometry while considering electric field distribution, gate charge, and manufacturing process to improve the performance and reliability of power MOSFETs. SUMMARY

[0006] Therefore, it is necessary to provide a modeling method and system of shielded gate trench MOSFET to solve at least one of the above technical problems.

[0007] To achieve the above-mentioned purpose, a modeling method of shielded gate trench MOSFET includes the following steps: Step S1: Selecting key positions of characteristic points of the shielded gate trench structure, wherein the key positions of the characteristic points include corners, edges, and centers, calculating the electric field strength of the key positions of the characteristic points through two-dimensional simulation, and generating an electric field strength distribution map; Step S2: based on the electric field intensity distribution map, the shape of the shielding gate is designed as a trapezoidal structure with the upper part being wide and the lower part being narrow by defining a set of trapezoidal angle parameters, modeling and establishing a quantitative relationship between the side wall inclination angle and the electric field intensity at the corner of the trench, and generating an angle-electric field response curve; Step S3: using the angle-electric field response curve, the change of the overlapping area between the shielding gate and the control gate in the trench of different trapezoidal structures is calculated, and the gate charge optimization rate and the optimal trapezoidal angle are generated; Step S4: the angle control parameters and the reactive ion etching parameters of the etching equipment are obtained, the gate charge optimization rate is used as the basis, the angle control capability parameters of the semiconductor etching process are combined, the target structure is realized by adaptively controlling the etching conditions, and a trapezoidal shielding gate process scheme is generated; Step S5: the performance difference between the trapezoidal shielding gate designed by the trapezoidal shielding gate process scheme and the preset rectangular shielding gate is compared, the breakdown voltage improvement amplitude, the switch loss reduction ratio and the heat distribution improvement degree are measured, and a structure optimization benefit report is generated.

[0008] Preferably, the present application also provides a shielding gate trench MOSFET modeling system for executing the shielding gate trench MOSFET modeling method as described above, and the shielding gate trench MOSFET modeling system comprises: An electric field distribution analysis module is configured to select characteristic point key positions of the shielding gate trench structure, wherein the characteristic point key positions include corners, edges and centers, calculate the electric field intensity of the characteristic point key positions through two-dimensional simulation, and generate an electric field intensity distribution map; A trapezoidal structure optimization module is configured to design the shape of the shielding gate as a trapezoidal structure with the upper part being wide and the lower part being narrow based on the electric field intensity distribution map by defining a set of trapezoidal angle parameters, model and establish a quantitative relationship between the side wall inclination angle and the electric field intensity at the corner of the trench, and generate an angle-electric field response curve; A gate charge balance module is configured to use the angle-electric field response curve to calculate the change of the overlapping area between the shielding gate and the control gate in the trench of different trapezoidal structures, and generate a gate charge optimization rate and an optimal trapezoidal angle; A process parameter conversion module is configured to obtain the angle control parameters and the reactive ion etching parameters of the etching equipment, use the gate charge optimization rate as the basis, combine the angle control capability parameters of the semiconductor etching process, realize the target structure by adaptively controlling the etching conditions, and generate a trapezoidal shielding gate process scheme; A performance comparison and evaluation module is configured to compare the performance difference between the trapezoidal shielding gate designed by the trapezoidal shielding gate process scheme and the preset rectangular shielding gate, measure the breakdown voltage improvement amplitude, the switch loss reduction ratio and the heat distribution improvement degree, and generate a structure optimization benefit report.

[0009] The present application has the following beneficial effects: In one aspect, by analyzing the electric field distribution characteristics in the shielding gate trench structure, the key feature point positions are identified, and the quantitative relationship between the sidewall inclination angle and the electric field strength is established, realizing the accurate regulation of the electric field distribution. The design of the upper wide and lower narrow trapezoidal structure eliminates the sharp corners, making the electric field distribution more uniform, significantly improving the breakdown voltage of the device, typically by 15-25%.

[0010] On the other hand, by establishing a relationship model between the trapezoidal angle and the gate overlap area, the optimization of the gate charge is realized. The trapezoidal structure reduces the overlap area of the shielding gate and the control gate, reduces the Miller capacitance, improves the switching speed, reduces the switching loss, and maintains good shielding effect.

[0011] In addition, the present application combines theoretical models with actual process parameters to establish a conversion mechanism from the optimal trapezoidal angle to the etching process parameters, ensuring the implementability of the design scheme. By adaptively controlling the etching conditions, the trapezoidal shielding gate structure is accurately manufactured without the need for additional manufacturing steps, maintaining process compatibility and cost effectiveness.

[0012] Finally, the present application quantitatively analyzes the comprehensive advantages of the trapezoidal shielding gate structure compared to the traditional rectangular structure through systematic performance comparison and evaluation, providing clear performance improvement indicators and optimization directions for power MOSFET design, with significant practical value and promotional significance. BRIEF DESCRIPTION OF DRAWINGS

[0013] Fig. 1 A step flowchart of a modeling method for a shielding gate trench MOSFET; Fig. 2 A comparison diagram of the traditional rectangular shielding gate and the trapezoidal shielding gate structure.

[0014] The purpose of the present application, functional characteristics and advantages will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0015] The technical method of the present application will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor belong to the scope of protection of the present application.

[0016] Further, the accompanying drawings are included to provide a further understanding of the present application, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present application and, together with the description, serve to explain the principles of the present application. In the drawings:

[0017] It should be understood that, although terms such as "first", "second", and so on can be used herein to describe various elements, the elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the exemplary embodiments, a first element can be referred to as a second element, and similarly a second element can be referred to as a first element. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0018] To achieve the above object, the present application provides a modeling method of shield gate trench MOSFET, comprising the following steps: Figs. 1-2 The present application provides a modeling method of shield gate trench MOSFET, comprising the following steps: Step S1: selecting characteristic point key positions of the shield gate trench structure, wherein the characteristic point key positions include corners, edges and centers, generating an electric field intensity distribution map by two-dimensional simulation calculation of the electric field intensity of the characteristic point key positions; In the embodiment of the present application, first, the key positions sensitive to the electric field distribution characteristics in the shield gate trench structure are selected as characteristic points, which include corner points, edge points and center points. The electric field intensity of each point is obtained by two-dimensional simulation calculation of these characteristic points, and an electric field intensity distribution map is generated to intuitively display the electric field concentration area.

[0019] In one implementation manner of the embodiment of the present application, the characteristic point key positions specifically include a 90° corner point at the bottom of the shield gate, a midpoint of the sidewall, a top transition region and a depletion region boundary point, etc. The electric field intensity of each characteristic point is obtained by the finite element analysis software for electric field intensity simulation calculation of these characteristic points under a preset bias condition (such as a drain voltage of 600V). For example, in the rectangular shield gate structure, the electric field intensity of the 90° corner point at the bottom reaches V / cm, and the electric field intensity of the midpoint of the sidewall is V / cm.

[0020] Step S2: based on the electric field intensity distribution map, the shape of the shield gate is designed as a trapezoidal structure with the upper part wide and the lower part narrow by defining a set of trapezoidal angle parameters, modeling and establishing a quantitative relationship between the sidewall inclination angle and the electric field intensity of the trench corner, and generating an angle-electric field response curve; In the embodiment of the present application, according to the electric field intensity distribution map obtained in step S1, it is identified that the electric field concentration region is mainly located at the 90° corner at the bottom of the shield gate. In order to optimize the electric field distribution of this region, a trapezoidal angle parameter set is defined, and the shape of the shield gate is designed as a trapezoidal structure with the top being wide and the bottom being narrow, so as to eliminate the sharp corner and make the electric field distribution more uniform.

[0021] In an implementation manner of the embodiment of the present application, the trapezoidal angle parameter set includes five different angle variable values of 75°, 80°, 85°, 87° and 89°, and the width of the top of the shield gate is kept unchanged. For each angle value, the electric field intensity of the feature point is recalculated, a functional relationship between the side wall inclination angle and the maximum electric field intensity of the corner region is established, and an angle-electric field response curve is generated. For example, when the side wall inclination angle is reduced from 90° (rectangle) to 85°, the maximum electric field intensity of the corner region is reduced from V / cm to V / cm, which is reduced by about 20%.

[0022] Step S3: using the angle-electric field response curve, the change of the overlap area between the shield gate and the control gate in the trench for different trapezoidal structures is calculated, and a gate charge optimization rate and an optimal trapezoidal angle are generated; In the embodiment of the present application, after the angle-electric field response curve is obtained, the influence of the trapezoidal structure on the gate charge is further analyzed. Due to the characteristic of the trapezoidal structure that the top is wide and the bottom is narrow, the overlap area between the shield gate and the control gate in the trench will be reduced, thereby reducing the gate charge and improving the switching speed.

[0023] In an implementation manner of the embodiment of the present application, the capacitance value between the gate and the shield gate under different trapezoidal angles is calculated by the piecewise integration method. For example, when the side wall inclination angle is 85°, the overlap area is reduced by 15% compared with the rectangular shield gate structure, and the corresponding gate charge is also reduced by about 15%. By comprehensively considering the double benefits of the reduction of the electric field intensity and the reduction of the gate charge, the optimal trapezoidal angle is determined.

[0024] Step S4: obtaining the angle control parameter and the reactive ion etching parameter of the etching equipment, generating a trapezoidal shield gate process scheme based on the gate charge optimization rate and in combination with the angle control ability parameter of the semiconductor etching process, and realizing the target structure by adaptively controlling the etching condition; In the embodiment of the present application, the theoretical design is combined with the actual process to obtain the angle control parameter and the reactive ion etching parameter of the etching equipment, and the feasibility of the process implementation is evaluated. Based on the gate charge optimization rate and the optimal trapezoidal angle obtained in step S3, in combination with the angle control ability parameter of the etching process, a trapezoidal shield gate process scheme is generated.

[0025] In one implementation of the embodiment of the application, for a determined optimal trapezoidal angle (e.g. 85°), the reactive ion etching parameters, including gas ratio, power, pressure and time parameters, are adjusted to generate an angle etching recipe table. For example, by increasing the ratio of (carbon tetrafluoride) to (oxygen) and increasing the radio frequency power, a trapezoidal sidewall closer to 85° can be achieved. At the same time, a corresponding relationship between the etching parameters and the actual formed angle is established to realize adaptive adjustment of the process parameters, ensuring that the angle deviation is controlled within ±0.5°.

[0026] Step S5: Compare the performance difference between the trapezoidal shield gate designed by the trapezoidal shield gate process scheme and the preset rectangular shield gate, measure the breakdown voltage improvement amplitude, switch loss reduction ratio and heat distribution improvement degree, and generate a structure optimization benefit report.

[0027] In the embodiment of the application, based on the same device structure parameters, the performance difference between the trapezoidal shield gate and the traditional rectangular shield gate is compared, and key parameters including breakdown voltage, on-resistance, gate charge and switching time are measured to generate a double-structure parameter comparison table.

[0028] In one implementation of the embodiment of the application, compared with the rectangular shield gate structure, the trapezoidal shield gate structure has a 20% increase in breakdown voltage (e.g. from 600V to 720V), a 15% reduction in gate charge, a 12% reduction in switching loss, more uniform heat distribution and a 15°C reduction in hot spot temperature. By calculating the input-output ratio, the overall application value of the trapezoidal shield gate structure is evaluated to generate a structure optimization benefit report.

[0029] Preferably, step S1 includes the following steps: Step S11: Position the feature points sensitive to electric field distribution in the shield gate trench structure, including the bottom 90° corner point, the sidewall midpoint, the top transition zone and the depletion zone boundary point, record their spatial coordinates, and generate an electric field feature point position table; In the embodiment of the application, first, the feature points sensitive to electric field distribution are accurately positioned in the shield gate trench structure. These feature points include the bottom 90° corner point, the sidewall midpoint, the top transition zone and the depletion zone boundary point. The accurate spatial coordinates of these feature points are determined by device simulation software, and an electric field feature point position table is generated.

[0030] In one implementation of the embodiment of the application, assuming that the trench depth is 3 μm, the width is 1 μm, and the shield gate thickness is 0.5 μm. The coordinate of the bottom 90° corner point is (0.5 μm, 2.5 μm), the coordinate of the sidewall midpoint is (0.5 μm, 2.0 μm), the coordinate of the top transition region is (0.5 μm, 1.5 μm), and the coordinate of the depletion region boundary point is (0.7 μm, 2.5 μm). These coordinate values are recorded in the electric field characteristic point position table, providing a basis for subsequent electric field calculation.

[0031] Step S12: Calculate the electric field intensity vector and potential gradient under the preset bias condition for the electric field characteristic point position table, record the electric field intensity values and directions, and generate a characteristic point electric field intensity table. In the embodiment of the application, based on the electric field characteristic point position table obtained in step S11, the electric field intensity vector and potential gradient of each characteristic point are calculated under the preset bias condition (such as a drain voltage of 600 V and a gate voltage of 0 V). The values and directions of the electric field intensity are recorded, and a characteristic point electric field intensity table is generated.

[0032] In one implementation of the embodiment of the application, the following results are obtained by the finite element analysis method: The electric field intensity of the bottom 90° corner point is V / cm, and the direction is 135°; The electric field intensity of the sidewall midpoint is V / cm, and the direction is 180°; The electric field intensity of the top transition region is V / cm, and the direction is 225°; The electric field intensity of the depletion region boundary point is V / cm, and the direction is 90°.

[0033] These values and direction information are recorded in the characteristic point electric field intensity table.

[0034] Step S13: Connect the electric field values of the characteristic points to form a continuous electric field distribution representation, identify the region where the electric field intensity exceeds the preset threshold value, and generate an electric field intensity distribution map.

[0035] In the embodiment of the application, based on the characteristic point electric field intensity table obtained in step S12, the electric field values of the characteristic points are connected to form a continuous electric field distribution representation. A preset threshold value (such as V / cm) is set to identify the region where the electric field intensity exceeds the threshold value, and an electric field intensity distribution map is generated.

[0036] In one implementation of the embodiment of the present application, the electric field values of the feature points are connected by an interpolation algorithm to generate a continuous electric field distribution surface. In the electric field intensity distribution map, the color gradient is used to represent the change of the electric field intensity, and the red color represents the area with the highest electric field intensity, and the blue color represents the area with lower electric field intensity. The area with the electric field intensity exceeding 2000 V / cm is marked, and these areas are mainly concentrated at the 90° corner at the bottom of the shield gate, which is the focus of subsequent optimization.

[0037] Preferably, the step S2 comprises the following steps: Step S21: defining the trapezoidal side wall inclination angle, setting five different angle variable values of 75°, 80°, 85°, 87°, and 89°, and keeping the shield gate top width unchanged to generate a trapezoidal angle parameter set; In the embodiment of the present application, in order to systematically study the influence of the trapezoidal structure on the electric field distribution, the trapezoidal side wall inclination angle α is defined, and five different angle variable values of 75°, 80°, 85°, 87°, and 89° are set. When setting different angles, the shield gate top width is kept unchanged, and only the inclination degree of the side wall is changed, thereby generating a trapezoidal angle parameter set.

[0038] In one implementation of the embodiment of the present application, it is assumed that the shield gate top width is 0.5 μm, and the trench depth is 3 μm. When the side wall inclination angle is 90°, the shield gate is a standard rectangular shield gate structure, and the bottom width is also 0.5 μm; when the side wall inclination angle is 85°, the bottom width is reduced to about 0.44 μm; when the side wall inclination angle is 80°, the bottom width is reduced to about 0.38 μm; and when the side wall inclination angle is 75°, the bottom width is reduced to about 0.32 μm. These trapezoidal structures with different angles constitute the trapezoidal angle parameter set.

[0039] Step S22: calculating the position coordinates of the feature points corresponding to each trapezoidal angle parameter in the trapezoidal angle parameter set to generate an angle adjustment position mapping table; In the embodiment of the present application, the position coordinates of the feature points are recalculated for each angle value in the trapezoidal angle parameter set. Due to the change of the feature point positions caused by the trapezoidal structure, the mapping relationship between the angle and the position needs to be established to generate an angle adjustment position mapping table.

[0040] In one implementation of the embodiment of the present application, taking the bottom corner point as an example, when the side wall inclination angle is 90°, the coordinates are (0.5 μm, 2.5 μm); when the side wall inclination angle is 85°, the coordinates become (0.44 μm, 2.5 μm); and when the side wall inclination angle is 80°, the coordinates become (0.38 μm, 2.5 μm). Similarly, the position coordinates of other feature points under different angles are calculated to generate a complete angle adjustment position mapping table. ​

[0041] Step S23: constructing a geometric shape model of the shielding gate according to the angle adjustment position mapping table; In the embodiment of the present application, the geometric shape model of the shielding gate is constructed based on the angle adjustment position mapping table obtained in step S22. For each trapezoidal angle parameter, a corresponding shielding gate geometric shape model is generated, providing a basis for subsequent electric field analysis.

[0042] In one implementation of the embodiment of the present application, computer-aided design (CAD) software is used to construct the geometric shape models of the shielding gates with different trapezoidal angles according to the coordinate data in the angle adjustment position mapping table. For example, for a trapezoidal structure with a sidewall inclination angle of 85°, a trapezoidal model with a top width of 0.5 μm, a bottom width of 0.44 μm, and a height of 0.5 μm is constructed. These geometric shape models will be used for subsequent electric field simulation analysis.

[0043] Step S24: re-computing the electric field intensity of each feature point under different trapezoidal angles according to the geometric shape model, establishing a functional relationship between the angle and the maximum electric field intensity in the corner region, and generating an angle-electric field response curve.

[0044] In the embodiment of the present application, the electric field intensity of each feature point under different trapezoidal angles is re-computed based on the geometric shape model constructed in step S23. The change in the electric field distribution in the corner region is particularly focused on, a functional relationship between the sidewall inclination angle and the maximum electric field intensity in the corner region is established, and an angle-electric field response curve is generated.

[0045] In one implementation of the embodiment of the present application, the electric field of the shielding gate structure with different trapezoidal angles is simulated by using finite element analysis software. The calculation results show that, as the sidewall inclination angle decreases from 90° to 75°, the maximum electric field intensity in the corner region gradually decreases. For example, when the angle is 90° (rectangle), the maximum electric field intensity is V / cm; when the angle is 85°, the maximum electric field intensity decreases to V / cm; when the angle is 80°, the maximum electric field intensity further decreases to V / cm; and when the angle is 75°, the maximum electric field intensity decreases to V / cm. Through these data points, an angle-electric field response curve is drawn, intuitively showing the influence of the trapezoidal angle on the electric field intensity.

[0046] Please refer to Fig. 2 for a comparison diagram of the traditional rectangular shielding gate and the trapezoidal shielding gate structure.

[0047] The left side of the comparison schematic diagram is a traditional rectangular shield gate structure: the sidewall and the bottom form a standard 90° right angle; the top and bottom widths are both 0.5 μm; the corner is marked as an electric field concentration area (red dotted circle); and the electric field lines show the electric field concentration phenomenon at the sharp corner.

[0048] The right side of the comparison schematic diagram is a trapezoidal shield gate structure, the sidewall inclination angle is 80° (less than 90°); the trapezoidal structure is wide at the top and narrow at the bottom: the top is 0.5 μm, and the bottom is about 0.38 μm; the electric field line distribution is more uniform and smooth, and the sharp 90° corner is eliminated.

[0049] The electric field line distribution is more uniform and smooth, the electric field distribution is more uniform, the overlapping area of the shield gate and the control gate is reduced, and the gate charge is effectively reduced.

[0050] Preferably, the step S24 comprises: The maximum electric field intensity of the rectangular shield gate at the corner area is calculated, which is set as a reference value, the trapezoidal angle parameter set is superimposed and analyzed, the ratio of the electric field intensity at each angle to the reference value is identified, and the electric field intensity reduction percentage is obtained; A curve graph is drawn with the electric field intensity reduction percentage as the vertical coordinate and the angle value of the trapezoidal angle parameter set as the horizontal coordinate, the change of the curve slope is analyzed, the inflection point angle with the maximum change slope of the electric field intensity reduction rate is determined, and the inflection point angle is taken as the electric field modulation efficiency angle; When the angle value is reduced from 90° to the electric field modulation efficiency angle, the electric field intensity reduction rate presents an accelerating trend; When the angle value is less than the electric field modulation efficiency angle, the electric field intensity reduction rate tends to be flat, and the process complexity significantly increases.

[0051] In one implementation manner of the embodiment of the present application, first, the maximum electric field intensity of the rectangular shield gate (the sidewall inclination angle is 90°) at the corner area is calculated, which is assumed to be V / cm, which is set as a reference value. Then, for each angle value in the trapezoidal angle parameter set, the ratio of the corresponding maximum electric field intensity to the reference value is calculated to obtain the electric field intensity reduction percentage. For example: When the angle is 85°, the maximum electric field intensity is V / cm, and the reduction percentage is (3.5-2.8) / 3.5×100%=20%; When the angle is 80°, the maximum electric field intensity is V / cm, and the reduction percentage is (3.5-2.3) / 3.5×100%=34%; When the angle is 75°, the maximum electric field intensity is V / cm, and the reduction percentage is (3.5-2.1) / 3.5×100%=40%.

[0052] In another implementation of an embodiment of the present invention, a graph is plotted with the percentage of electric field intensity reduction as the ordinate and the angle values ​​of the trapezoidal angle parameter set as the abscissa. By analyzing the changes in the slope of the curve, the inflection point angle at which the slope of the electric field intensity reduction rate is the largest is determined. For example, the curve analysis shows that when the angle decreases from 90° to 83°, the electric field intensity reduction rate accelerates; when the angle is less than 83°, the electric field intensity reduction rate tends to level off. Therefore, 83° is determined as the electric field modulation efficiency angle.

[0053] In another implementation of this embodiment of the present invention, the rate of reduction in electric field intensity accelerates as the angle decreases from 90° to the electric field modulation efficiency angle (e.g., 83°). This indicates that reducing the sidewall tilt angle significantly reduces electric field intensity within this angle range. For example, when the angle decreases from 90° to 87°, the electric field intensity decreases by 10%, while when it decreases from 87° to 84°, the electric field intensity decreases by 15%, accelerating the rate of reduction.

[0054] In another implementation of the present invention, when the angle is less than the electric field modulation efficiency angle (e.g., 83°), the rate of reduction in electric field intensity tends to flatten, while process complexity increases significantly. For example, when the angle decreases from 83° to 80°, the electric field intensity decreases by only 5%, while when it decreases from 80° to 77°, the electric field intensity decreases by only 3%. Furthermore, the smaller the angle, the greater the difficulty and complexity of the etching process, leading to increased manufacturing costs and decreased yield. Therefore, in practical applications, it is necessary to find a balance between the electric field reduction effect and process complexity.

[0055] Preferably, step S3 includes the following steps: Step S31: Calculating the actual overlapping area of ​​the shield gate and the control gate in the trench according to the trapezoidal angle parameter set, and generating a gate overlapping area table by analyzing the area reduction effect caused by the sidewall tilt angle; In this embodiment of the present invention, the actual overlap area between the shield gate and the control gate within the trench is calculated based on the trapezoidal angle parameter set defined in step S2. Due to the wide-at-top, narrow-at-bottom nature of the trapezoidal structure, tilted sidewall angles reduce the overlap area, thereby affecting the gate charge. By accurately calculating the change in overlap area at different angles, a gate overlap area table is generated.

[0056] In one implementation of the embodiment of the present invention, assuming that in a rectangular shield gate structure (with a sidewall tilt angle of 90°), the overlapping area between the shield gate and the control gate is 0.25 μm When the sidewall tilt angle is 85°, the overlap area is reduced to 0.21 μm , reduced by 16%; when the sidewall inclination angle is 80°, the overlap area is reduced to 0.18μm , reduced by 28%; when the sidewall inclination angle is 75°, the overlapping area is reduced to 0.15 μm , reduced by 40%. These data are recorded in the gate overlapping area table, providing a basis for subsequent analysis.

[0057] Step S32: using the piecewise integration method, the gate-shield gate capacitance values under different trapezoidal angles are calculated to generate the gate capacitance distribution data; In the embodiment of the present application, based on the gate overlapping area table obtained in step S31, the piecewise integration method is used to calculate the gate-shield gate capacitance values under different trapezoidal angles. Due to the change of the overlapping area, the capacitance value will also change accordingly, thereby affecting the gate charge. Through accurate calculation, the gate capacitance distribution data is generated.

[0058] In one implementation manner of the embodiment of the present application, it is assumed that under the rectangular shield gate structure, the gate-shield gate capacitance value is 100 pF. Through the piecewise integration method, it is calculated that when the sidewall inclination angle is 85°, the capacitance value is reduced to 84 pF, reduced by 16%; when the sidewall inclination angle is 80°, the capacitance value is reduced to 72 pF, reduced by 28%; when the sidewall inclination angle is 75°, the capacitance value is reduced to 60 pF, reduced by 40%. These data constitute the gate capacitance distribution data, which directly shows the influence of the trapezoidal angle on the gate capacitance.

[0059] Step S33: calculating the gate charge reduction ratio of the trapezoidal structure, analyzing the charge optimization effect, and generating the gate charge optimization rate.

[0060] In the embodiment of the present application, based on the gate capacitance distribution data obtained in step S32, the gate charge reduction ratio of the trapezoidal structure relative to the rectangular shield gate structure is calculated. The gate charge is proportional to the gate capacitance, so the reduction of the capacitance directly reflects the reduction of the charge. By analyzing the charge optimization effect, the gate charge optimization rate is generated.

[0061] In one implementation manner of the embodiment of the present application, the gate charge reduction ratio is the same as the gate capacitance reduction ratio. When the sidewall inclination angle is 85°, the gate charge is reduced by 16%; when the sidewall inclination angle is 80°, the gate charge is reduced by 28%; when the sidewall inclination angle is 75°, the gate charge is reduced by 40%. These data constitute the gate charge optimization rate, which is used to evaluate the improvement effect of the trapezoidal structure on the switching performance.

[0062] Preferably, the step S33 comprises: grouping the data in the gate overlapping area table according to the trapezoidal angle, taking the structure overlapping area of the rectangular shield gate as the reference value, and calculating the percentage of the reduction of the overlapping area under each angle value in the trapezoidal angle parameter set; With the angle as the horizontal coordinate and the overlap area reduction percentage as the vertical coordinate, a functional relationship between the angle and the overlap area reduction rate is established to obtain the charge optimization curve; Superimpose the charge optimization curve and the angle-electric field response curve in the same coordinate system, analyze the intersection area of ​​the two curves, and determine the intersection angle range near the intersection point of the two curves; Within the intersection angle range, the angle is subdivided in steps of 0.5°, the electric field strength and gate charge are repeatedly calculated, and the comprehensive performance index is defined as the weighted sum of the electric field reduction percentage and the charge reduction percentage. The optimal trapezoidal angle is determined within the intersection angle range.

[0063] In one implementation of the present invention, the data in the gate overlap area table are first grouped by trapezoidal angle. For example, the overlap area of ​​a rectangular shielding gate (with a sidewall tilt angle of 90°) is 0.25 μm. Using the angle as the baseline, the percentage reduction in overlap area at each angle is calculated. For example, at an 85° angle, the overlap area is reduced by 16%; at an 80° angle, the overlap area is reduced by 28%; and at a 75° angle, the overlap area is reduced by 40%.

[0064] In another implementation of the present invention, a functional relationship between angle and overlap area reduction rate is established, with angle as the horizontal coordinate and overlap area reduction percentage as the vertical coordinate, to obtain a charge optimization curve. Simultaneously, the charge optimization curve is superimposed on the angle-electric field response curve obtained in step S24 in the same coordinate system, and the intersection region of the two curves is analyzed. For example, if the two curves intersect or approach within the angle range of 83°-85°, this interval is determined as the intersection angle range.

[0065] In another implementation of an embodiment of the present invention, within a determined intersection angle range (e.g., 83°-85°), the angle is subdivided in steps of 0.5°, and the electric field strength and gate charge are repeatedly calculated. A comprehensive performance index is defined as the weighted sum of the electric field reduction percentage and the charge reduction percentage, for example: comprehensive performance index = 0.6 × electric field reduction percentage + 0.4 × charge reduction percentage. The comprehensive performance index is calculated for each subdivided angle within the intersection angle range to determine the optimal trapezoidal angle. For example, after calculation, it is found that an angle of 84.5° has the highest comprehensive performance index, and therefore 84.5° is determined as the optimal trapezoidal angle.

[0066] Preferably, step S4 includes the following steps: Step S41: Based on the gate charge optimization rate and in combination with the angle control parameters, the process angle range is screened to generate a feasible process angle range; In the embodiment of the present application, based on the gate charge optimization rate and the optimal trapezoidal angle obtained in step S3, the angle control parameters of the etching equipment are combined to screen the process angle range, and the process feasible angle interval is generated. This step combines the theoretically optimal angle with the actual process capability to ensure the implementability of the design scheme.

[0067] In an implementation manner of the embodiment of the present application, it is assumed that the optimal trapezoidal angle calculated theoretically is 84.5°, and the angle control precision of the etching equipment is ±1°. Considering the process fluctuation and the equipment capability, it is determined that the process feasible angle interval is 83.5°-85.5°. In this interval, the etching process can stably achieve the target angle, while maintaining good electric field reduction effect and gate charge optimization effect.

[0068] Step S42: For the target angle, the gas ratio, power, pressure and time parameters of the reactive ion etching parameters are adjusted to generate an angle etching formula table; In the embodiment of the present application, for the determined target angle (such as 84.5°), the reactive ion etching parameters including the gas ratio, power, pressure and time parameters are adjusted to generate an angle etching formula table. By accurately controlling these parameters, the accurate control of the sidewall inclination angle is achieved.

[0069] In an implementation manner of the embodiment of the present application, through orthogonal experimental design, the influence of each etching parameter on the sidewall angle is systematically studied. For example, increasing and can make the sidewall angle closer to 90°, and reducing the ratio can make the angle smaller; increasing the radio frequency power can improve the anisotropy of etching, so that the sidewall is steeper; increasing the cavity pressure will make the etching more isotropic, and the sidewall angle is smaller. By adjusting the combination of these parameters, the best formula that can stably achieve the 84.5° sidewall angle is found, and the angle etching formula table is generated.

[0070] Step S43: The optimal trapezoidal angle, the process feasible angle interval and the angle etching formula table are integrated to generate a trapezoidal shield gate process scheme.

[0071] In the embodiment of the present application, the process feasible angle interval obtained in step S41 and the angle etching formula table obtained in step S42 are integrated to generate a complete trapezoidal shield gate process scheme in combination with the optimal trapezoidal angle. The scheme includes the target angle, the allowed deviation range, the etching parameter formula and the quality control requirements and the like.

[0072] In an implementation manner of the embodiment of the present application, the trapezoidal shield gate process scheme includes the following contents: the target trapezoidal angle is 84.5°, the allowed deviation range is ±1°; the etching gas ratio is : =8:2, RF power of 500W, chamber pressure of 50mTorr, and etching time of 60 seconds. Quality control requirements include angle measurement frequency, acceptance criteria, and abnormal handling procedures. This process plan provides complete technical guidance for the actual manufacturing of trapezoidal shielding grid structures.

[0073] Preferably, the step S43 includes: Perform etching process verification for each angle within the feasible process angle range to obtain etching parameters; use the optimal trapezoid angle as the target angle, measure the deviation angle between the actual trapezoid angle and the target angle, and obtain measurement results; According to the measurement results, the etching correction parameters of the deviation angle and etching parameters are established, and the next etching parameters are automatically adjusted according to the etching correction parameters to form a closed-loop control mechanism; Set real-time monitoring points during the etching process to collect key process parameters, including gas flow, RF power, chamber pressure, and substrate temperature, to form real-time monitoring parameters; Establish a corresponding relationship between the real-time monitoring parameters and the forming quality of each angle in the process feasible angle range, and construct a parameter-angle mapping model; Based on the parameter-angle mapping model, an online quality prediction model is established; When the angle deviation is detected to be beyond the preset range, the process parameter correction is automatically triggered.

[0074] In one implementation of an embodiment of the present invention, for angles within a process-feasible angle range (e.g., 83.5°-85.5°), an etching process verification is performed at 0.5° intervals to obtain the etching parameter combination corresponding to each angle. Using the optimal trapezoidal angle of 84.5° as the target angle, multiple etching experiments are performed to measure the deviation between the actual trapezoidal angle and the target angle. For example, under the same etching parameters, the actual angles measured were 84.3°, 84.7°, 84.2°, and so on, with deviations of -0.2°, +0.2°, and -0.3°, respectively.

[0075] In another implementation of the embodiment of the present invention, a relationship model between the deviation angle and the etching parameters is established based on the measurement results. For example, it is found that when the RF power increases by 10W, the sidewall angle increases by an average of 0.3°; when When the ratio increases by 5%, the sidewall angle increases by an average of 0.2°. Based on these relationships, an etching correction parameter table is established to automatically adjust the etching parameters for the next batch. This forms a closed-loop control mechanism that automatically adjusts the etching parameters for the next batch based on the angle measurement results of the previous batch.

[0076] In another implementation of the embodiment of the present application, a real-time monitoring point is set in the etching process to collect key process parameters, including gas flow, radio frequency power, cavity pressure and substrate temperature. For example, the actual values of radio frequency power and cavity pressure are recorded every 10 seconds to form a real-time monitoring parameter sequence. By analyzing the relationship between these parameters and the final formed sidewall angle, a parameter-angle mapping model is constructed.

[0077] In another implementation of the embodiment of the present application, based on the parameter-angle mapping model, an online quality prediction model is established. This model can predict the final formed sidewall angle according to the real-time monitoring parameters, realizing real-time monitoring of the trapezoidal shield gate shape. For example, when it is detected that the radio frequency power fluctuation exceeds 5%, the model predicts that the sidewall angle deviates from the target value by 0.4°, triggering a warning signal. When the angle deviation exceeds the preset range (such as ±0.5°), the system automatically triggers process parameter correction, such as adjusting the radio frequency power or gas ratio.

[0078] Preferably, step S5 comprises the following steps: Step S51: Based on the same device structure parameters and trapezoidal shield gate process scheme, measure the key parameters of breakdown voltage, on-resistance, gate charge and switching time of trapezoidal shield gate and rectangular shield gate, and generate a double-structure parameter comparison table; In the embodiment of the present application, in order to objectively evaluate the performance advantages of the trapezoidal shield gate structure, based on the same device structure parameters (such as trench depth, width, doping concentration, etc.) and the trapezoidal shield gate process scheme obtained in step S4, trapezoidal shield gate and traditional rectangular shield gate samples are made. The key electrical parameters of the two structures are measured, including breakdown voltage, on-resistance, gate charge and switching time, etc., to generate a double-structure parameter comparison table.

[0079] In one implementation of the embodiment of the present application, the measurement results show that the breakdown voltage of the trapezoidal shield gate structure (sidewall angle of 84.5°) is 720V, while the breakdown voltage of the rectangular shield gate structure is 600V; the on-resistance of the trapezoidal structure is 3.2mΩ·cm , and the on-resistance of the rectangular shield gate structure is 3.3mΩ·cm ; the gate charge of the trapezoidal structure is 85nC, and the gate charge of the rectangular shield gate structure is 100nC; the switching time of the trapezoidal structure is 35ns, and the switching time of the rectangular shield gate structure is 40ns. These data are recorded in the double-structure parameter comparison table, providing a basis for performance evaluation.

[0080] Step S52: Calculate the improvement percentage of the trapezoidal structure relative to the rectangular structure of the rectangular shield gate in each performance indicator, including the three core indicators of breakdown voltage improvement rate, gate charge reduction rate and switching loss reduction rate, and generate a performance improvement index diagram; In the embodiment of the present application, based on the double structure parameter comparison table obtained in step S51, the improvement percentage of trapezoidal structure relative to rectangular structure in each performance index is calculated. Three core indexes are focused on: breakdown voltage improvement rate, gate charge reduction rate and switching loss reduction rate, and a performance improvement index diagram is generated.

[0081] In an implementation manner of the embodiment of the present application, the following is calculated according to the measurement data: The breakdown voltage improvement rate of the trapezoidal shield gate structure is (720V-600V) / 600V*100%=20%; The gate charge reduction rate is (100nC-85nC) / 100nC*100%=15%; The switching loss reduction rate is (40ns-35ns) / 40ns*100%=12.5%.

[0082] The three core indexes constitute the performance improvement index diagram of the trapezoidal shield gate structure, which directly shows the comprehensive advantages of the trapezoidal structure relative to the traditional rectangular structure.

[0083] Step S53: According to the performance improvement index diagram, comprehensive analysis is performed, the input-output ratio is calculated, the overall application value of the trapezoidal shield gate trench structure is evaluated, and a structure optimization benefit report is generated.

[0084] In the embodiment of the present application, based on the performance improvement index diagram obtained in step S52, comprehensive analysis is performed. The additional process cost and time required for the trapezoidal structure to be implemented are considered, the input-output ratio is calculated, the overall application value of the trapezoidal shield gate trench structure is comprehensively evaluated, and a structure optimization benefit report is generated.

[0085] In an implementation manner of the embodiment of the present application, the additional process cost required for the trapezoidal shield gate structure to be implemented mainly includes the cost of etching parameter optimization and angle control, and it is estimated that the manufacturing cost is increased by about 3%. The performance improvement index diagram shows that the trapezoidal structure is improved by 20%, 15% and 12.5% in the core indexes of breakdown voltage, gate charge and switching loss, respectively. The input-output ratio is calculated as (20%+15%+12.5%) / 3 / 3%≈5.3, which indicates that for every 1% increase in manufacturing cost, about 5.3% of comprehensive performance improvement can be obtained. This high input-output ratio proves that the trapezoidal shield gate structure has significant application value. The structure optimization benefit report also includes performance advantage analysis of the trapezoidal structure in different application scenarios, as well as evaluation results of long-term reliability and thermal stability, which provides comprehensive support for product design decision.

[0086] The embodiment of the present application also provides a modeling system of a shield gate trench MOSFET, which is used to execute the modeling method of the shield gate trench MOSFET described above, and the modeling system of the shield gate trench MOSFET comprises: The electric field distribution analysis module is configured to select characteristic point key positions of the shielding gate trench structure, wherein the characteristic point key positions include corners, edges and centers, to calculate electric field intensity of the characteristic point key positions through two-dimensional simulation, and to generate an electric field intensity distribution map; The trapezoidal structure optimization module is configured to define a trapezoidal angle parameter set based on the electric field intensity distribution map, to design the shielding gate into a trapezoidal structure with a wide upper part and a narrow lower part, to model and establish a quantitative relationship between a sidewall inclination angle and a trench corner electric field intensity, and to generate an angle-electric field response curve. The gate charge balance module is configured to calculate a variation of an overlapping area between the shielding gate and the control gate in the trench for different trapezoidal structures by using the angle-electric field response curve, and to generate a gate charge optimization rate and an optimal trapezoidal angle. The process parameter conversion module is configured to obtain angle control parameters and reactive ion etching parameters of an etching device, to calculate a gate charge optimization rate based on the gate charge optimization rate and in combination with angle control capability parameters of a semiconductor etching process, to realize a target structure through adaptive control of etching conditions, and to generate a trapezoidal shielding gate process scheme. The performance comparison and evaluation module is configured to compare a performance difference between the trapezoidal shielding gate designed by the trapezoidal shielding gate process scheme and a preset rectangular shielding gate, to measure a breakdown voltage improvement amplitude, a switching loss reduction ratio and a thermal distribution improvement degree, and to generate a structure optimization benefit report.

[0087] In one implementation manner of the embodiment of the present application, the electric field distribution analysis module includes a characteristic point positioning unit, an electric field calculation unit and a distribution map generation unit. The characteristic point positioning unit is configured to position characteristic points sensitive to electric field distribution in the shielding gate trench structure; the electric field calculation unit is configured to calculate electric field intensity of the characteristic points under a preset bias condition; and the distribution map generation unit is configured to connect electric field values of the characteristic points to form a continuous electric field distribution representation and to generate an electric field intensity distribution map.

[0088] In another implementation manner of the embodiment of the present application, the trapezoidal structure optimization module includes an angle parameter setting unit, a position mapping unit, a geometric modeling unit and a response curve generation unit. The angle parameter setting unit is configured to define a trapezoidal sidewall inclination angle parameter set; the position mapping unit is configured to calculate position coordinates of the characteristic points under different angles; the geometric modeling unit is configured to construct a geometric shape model of the shielding gate; and the response curve generation unit is configured to calculate electric field intensity under different trapezoidal angles and to generate an angle-electric field response curve.

[0089] In another implementation manner of the embodiment of the present application, the gate charge balance module includes an overlapping area calculation unit, a capacitance distribution unit and a charge optimization unit. The overlapping area calculation unit is configured to calculate overlapping areas of the shielding gate and the control gate under different trapezoidal angles; the capacitance distribution unit is configured to calculate a gate-shielding gate capacitance value; and the charge optimization unit is configured to analyze a charge optimization effect and to determine an optimal trapezoidal angle.

[0090] In another implementation form of the embodiment of the present application, the process parameter conversion module comprises an angle range screening unit, an etching parameter adjustment unit and a process scheme generation unit. The angle range screening unit is configured to determine the process feasible angle interval; the etching parameter adjustment unit is configured to adjust the etching parameter for the target angle; and the process scheme generation unit is configured to integrate the optimal trapezoidal angle and the etching parameter to generate a complete process scheme.

[0091] In another implementation form of the embodiment of the present application, the performance comparison evaluation module comprises a parameter measurement unit, an improvement index calculation unit and a benefit analysis unit. The parameter measurement unit is configured to measure the electrical parameters of the trapezoidal shielding gate and the rectangular shielding gate; the improvement index calculation unit is configured to calculate the improvement percentage of each performance index; and the benefit analysis unit is configured to evaluate the overall application value of the trapezoidal structure and generate a structure optimization benefit report.

[0092] Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting, the scope of the present application being defined by the appended claims and not by the above description, therefore all variations falling within the meaning and scope of the equivalent elements of the application file are intended to be included in the present application.

[0093] The above description is merely illustrative of the application and is not intended to limit the scope of the application. Various modifications of the embodiments described herein will be apparent to those with skill in the art, and the general principles defined herein can be applied to other embodiments without departing from the spirit or scope of the application. Therefore, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A modeling method for a shielded gate trench MOSFET, characterized in that: Applied to power semiconductor device design, the following steps are included: Step S1: Selecting key locations of characteristic points of the shield gate trench structure, where the key locations of characteristic points include corners, edges, and centers, and calculating the electric field strength of the key locations of the characteristic points through two-dimensional simulation to generate an electric field strength distribution map; Step S2: Based on the electric field intensity distribution diagram, the shielding grid is designed to have a trapezoidal structure that is wide at the top and narrow at the bottom by defining a trapezoidal angle parameter set. A quantitative relationship between the sidewall tilt angle and the electric field intensity at the trench corner is modeled and established to generate an angle-electric field response curve. Step S3: using the angle-electric field response curve, calculating the overlap area change between the shield gate and the control gate of different trapezoidal structures in the trench, and generating the gate charge optimization rate and the optimal trapezoidal angle; Step S4: Obtaining the angle control parameters and reactive ion etching parameters of the etching equipment, based on the gate charge optimization rate and combined with the angle control capability parameters of the semiconductor etching process, adaptively controlling the etching conditions to achieve the target structure and generate a trapezoidal shield gate process solution; Step S5: Compare the performance difference between the trapezoidal shielding grid designed by the trapezoidal shielding grid process solution and the preset rectangular shielding grid, measure the improvement in breakdown voltage, the reduction ratio of switching loss and the degree of improvement in heat distribution, and generate a structural optimization benefit report.

2. The modeling method of shielded gate trench MOSFET according to claim 1, characterized in that: Step S1 includes the following steps: Step S11: locating characteristic points sensitive to electric field distribution in the shield gate trench structure, including the bottom 90° corner point, the sidewall midpoint, the top transition region, and the depletion region boundary point, recording their spatial coordinates, and generating an electric field characteristic point position table; Step S12: Calculating the electric field intensity vector and potential gradient under preset bias conditions for the electric field feature point position table, recording the electric field intensity value and direction, and generating a feature point electric field intensity table; Step S13: connecting the electric field values ​​of each feature point to form a continuous electric field distribution representation, identifying areas where the electric field intensity exceeds a preset critical value, and generating an electric field intensity distribution map.

3. The modeling method of shielded gate trench MOSFET according to claim 1, characterized in that: Step S2 includes the following steps: Step S21: defining the trapezoidal sidewall inclination angle, setting five different angle variable values ​​of 75°, 80°, 85°, 87°, and 89°, keeping the top width of the shielding grid unchanged, and generating a trapezoidal angle parameter set; Step S22: For each trapezoidal angle parameter in the trapezoidal angle parameter set, calculate the position coordinates corresponding to the feature point and generate an angle adjustment position mapping table; Step S23: constructing a geometric shape model of the shielding grille according to the angle adjustment position mapping table; Step S24: recalculating the electric field intensity of each feature point at different trapezoidal angles based on the geometric shape model, establishing a functional relationship between the angle and the maximum electric field intensity in the corner area, and generating an angle-electric field response curve.

4. The modeling method of shielded gate trench MOSFET according to claim 3, characterized in that: Step S24 includes: Calculate the maximum electric field intensity at the corner of the rectangular shielding grid and set it as the baseline value. Superimpose the trapezoidal angle parameter set and the electric field intensity distribution map for analysis. Identify the ratio of the electric field intensity at each angle to the baseline value and obtain the percentage reduction of the electric field intensity. Draw a graph with the percentage of electric field intensity reduction as the ordinate and the angle value of the trapezoidal angle parameter set as the abscissa, analyze the change in the slope of the curve, determine the inflection point angle where the slope of the electric field intensity reduction rate is the largest, and use the inflection point angle as the electric field modulation efficiency angle; When the angle value decreases from 90° to the electric field modulation efficiency angle, the rate of decrease of electric field intensity shows an accelerating trend; When the angle value is smaller than the electric field modulation efficiency angle, the electric field intensity reduction rate tends to be flat, while the process complexity increases significantly.

5. The modeling method of shielded gate trench MOSFET according to claim 1, characterized in that: Step S3 includes the following steps: Step S31: Calculating the actual overlapping area of ​​the shield gate and the control gate in the trench according to the trapezoidal angle parameter set, and generating a gate overlapping area table by analyzing the area reduction effect caused by the sidewall tilt angle; Step S32: Calculating gate-shield capacitance values ​​at different trapezoidal angles to generate gate capacitance distribution data; Step S33: Calculate the gate charge reduction ratio of the trapezoidal structure, analyze the charge optimization effect, and generate a gate charge optimization rate.

6. The modeling method of shielded gate trench MOSFET according to claim 5, characterized in that: The step S33 includes: The data in the gate overlap area table are grouped by trapezoidal angle, and the structural overlap area of ​​the rectangular shielding grid is used as the reference value. The percentage of overlap area reduction at each angle value in the trapezoidal angle parameter set is calculated. With the angle as the horizontal coordinate and the overlap area reduction percentage as the vertical coordinate, a functional relationship between the angle and the overlap area reduction rate is established to obtain the charge optimization curve; Superimpose the charge optimization curve and the angle-electric field response curve in the same coordinate system, analyze the intersection area of ​​the two curves, and determine the intersection angle range near the intersection point of the two curves; Within the intersection angle range, the angle is subdivided in steps of 0.5°, the electric field strength and gate charge are repeatedly calculated, and the comprehensive performance index is defined as the weighted sum of the electric field reduction percentage and the charge reduction percentage. The optimal trapezoidal angle is determined within the intersection angle range.

7. The modeling method of shielded gate trench MOSFET according to claim 1, characterized in that: Step S4 includes the following steps: Step S41: Based on the gate charge optimization rate and in combination with the angle control parameters, the process angle range is screened to generate a feasible process angle range; Step S42: adjusting the gas ratio, power, pressure and time parameters of the reactive ion etching parameters according to the target angle to generate an angle etching recipe table; Step S43: Integrate the optimal trapezoidal angle, the process feasible angle range and the angle etching recipe table to generate a trapezoidal shielding grid process solution.

8. The modeling method of shielded gate trench MOSFET according to claim 7, characterized in that: The step S43 includes: Perform etching process verification for each angle within the feasible process angle range to obtain etching parameters; use the optimal trapezoid angle as the target angle, measure the deviation angle between the actual trapezoid angle and the target angle, and obtain measurement results; According to the measurement results, the etching correction parameters of the deviation angle and etching parameters are established, and the next etching parameters are automatically adjusted according to the etching correction parameters to form a closed-loop control mechanism; Set real-time monitoring points during the etching process to collect key process parameters, including gas flow, RF power, chamber pressure, and substrate temperature, to form real-time monitoring parameters; Establish a corresponding relationship between the real-time monitoring parameters and the forming quality of each angle in the process feasible angle range, and build a parameter-angle mapping model; Based on the parameter-angle mapping model, an online quality prediction model is established; When the angle deviation is detected to be beyond the preset range, the process parameter correction is automatically triggered.

9. The modeling method of shielded gate trench MOSFET according to claim 1, characterized in that: Step S5 includes the following steps: Step S51: Based on the same device structure parameters and trapezoidal shield gate process solution, key parameters such as breakdown voltage, on-resistance, gate charge and switching time of the trapezoidal shield gate and the rectangular shield gate are measured to generate a dual structure parameter comparison table; Step S52: Calculate the improvement percentage of the trapezoidal structure relative to the rectangular structure of the rectangular shield gate in various performance indicators, including three core indicators: breakdown voltage improvement rate, gate charge reduction rate, and switching loss reduction rate, and generate a performance improvement index graph; Step S53: Perform a comprehensive analysis based on the performance improvement index graph, calculate the input-output ratio, evaluate the overall application value of the trapezoidal shield grid trench structure, and generate a structure optimization benefit report.

10. A modeling system for shielded gate trench MOSFET, characterized in that: A system for modeling a shielded gate trench MOSFET according to claim 1, wherein the system comprises: The electric field distribution analysis module is used to select the key locations of the characteristic points of the shielding gate trench structure, where the key locations of the characteristic points include corners, edges and centers, calculate the electric field intensity of the key locations of the characteristic points through two-dimensional simulation, and generate an electric field intensity distribution map; The trapezoidal structure optimization module is used to design the shield grid into a trapezoidal structure that is wide at the top and narrow at the bottom by defining a set of trapezoidal angle parameters based on the electric field intensity distribution map. This module also models and establishes a quantitative relationship between the sidewall tilt angle and the electric field intensity at the trench corner, generating an angle-electric field response curve. The gate charge balancing module is used to calculate the overlap area change between the shield gate and the control gate of different trapezoidal structures in the trench using the angle-electric field response curve, and generate the gate charge optimization rate and the optimal trapezoidal angle; The process parameter conversion module is used to obtain the angle control parameters and reactive ion etching parameters of the etching equipment. Based on the gate charge optimization rate and combined with the angle control capability parameters of the semiconductor etching process, the target structure is achieved by adaptively controlling the etching conditions and generating a trapezoidal shield gate process solution. The performance comparison and evaluation module is used to compare the performance differences between the trapezoidal shield grid designed by the trapezoidal shield grid process solution and the preset rectangular shield grid, measure the improvement in breakdown voltage, the reduction ratio of switching loss and the degree of improvement in thermal distribution, and generate a structural optimization benefit report.

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