Power amplifier and radio frequency chip

Abstract

The invention relates to the technical field of wireless communication, and provides a power amplifier and a radio frequency chip, and the power amplifier comprises an input matching circuit, a first-stage amplifier, a first inter-stage matching circuit, a second-stage amplifier, a second inter-stage matching circuit, a third-stage amplifier and an output matching circuit which are electrically connected in sequence; the power amplifier further comprises a control module, a direct current power supply module, a first bias circuit, a second bias circuit, a third bias circuit, a fourth bias circuit, a power amplification network and a switch control circuit. The switch control circuit comprises a diode, a first triode, a second triode, a first resistor and a second resistor; the anode of the diode serves as the input end of the switch control circuit, and the cathode of the diode is connected with the collector of the second triode and serves as the output end of the switch control circuit. The low-power-consumption mode current and gain of the power amplifier can be optimized.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technology, and in particular to a power amplifier and a radio frequency chip. Background Art

[0002] In wireless communication systems, power amplifiers are key components for wireless transmission of RF signals. The continuous advancement of mobile communication technology, especially the widespread adoption of 5G communications, has placed higher demands on communication system power consumption. Signals received by base stations from mobile phones and other communication terminals are susceptible to environmental factors such as distance, terrain, and weather. To meet base station performance requirements for signal stability and linearity, RF power amplifiers typically employ multiple power modes. When the mobile phone communication environment is favorable, the system switches the power amplifier to a low-gain, low-power mode. This low-power mode requires the power amplifier to maintain good linearity performance at low current and gain. Typically, in low-power mode, the power amplifier output power is required to be less than 10dBm to meet communication requirements, and the gain must be kept low. Traditional low-power, low-current mode achieves this by reducing the bias of each power amplifier stage. However, simply reducing the bias is limited in achieving low power consumption, and excessively low bias reduction can easily lead to nonlinear distortion in the power amplifier.

[0003] Currently, if Figure 1 As shown, a power amplifier in related art generally comprises an input matching circuit, a first-stage amplifier (PA), a first-stage inter-stage matching circuit, a second-stage amplifier, a second-stage inter-stage matching circuit, a third-stage amplifier, an output matching circuit, a control module, a first bias circuit, a second bias circuit, a third bias circuit, and a battery power module, all electrically connected in sequence. The control module receives logic instructions and controls the battery power module to power the first bias circuit, the second bias circuit, and the third bias circuit, respectively. The first bias circuit, the second bias circuit, and the third bias circuit provide bias voltages for the first, second, and third-stage amplifiers, respectively. When a mobile phone is operating in a good communication environment and does not need to transmit high power, the external logic circuit sends instructions to the control module to control the power amplifier to reduce the bias voltage, thereby lowering the quiescent operating current of the power amplifier and achieving low power consumption.

[0004] However, the above control module provides bias voltages to the corresponding amplifiers through three bias circuits, which only achieves the performance of reducing power consumption; but in the low-power and low-gain mode, it is easy to cause the power amplifier current and gain to be too high. Summary of the Invention

[0005] In view of the above prior art deficiencies, the present application provides a power amplifier to solve the problem of high current and gain in the low power consumption mode of the existing power amplifier.

[0006] To solve the above technical problems, the present application adopts the following technical solutions: In a first aspect, the present application provides a power amplifier, comprising input matching circuit, first stage amplifier, first inter-stage matching circuit, second stage amplifier, second inter-stage matching circuit, third stage amplifier and output matching circuit connected in sequence; the power amplifier further comprises control module, DC power supply module, first bias circuit, second bias circuit, third bias circuit, fourth bias circuit, power amplification network and switch control circuit; the DC power supply module is used for supplying power to the control module, the first stage amplifier, the second stage amplifier and the third stage amplifier respectively; The control module is used for receiving external logic enable signal and controlling the first bias circuit, the second bias circuit and the third bias circuit to provide bias voltage for the first stage amplifier, the second stage amplifier and the third stage amplifier respectively according to the external logic enable signal; The first input end of the power amplification network is connected with the input end of the first stage amplifier and inputs radio frequency signal respectively, and the second input end of the power amplification network is used for connecting the fourth bias circuit; the first output end of the power amplification network is connected with the input end of the switch control circuit, the second output end of the power amplification network is connected with the DC power supply module, and the output end of the switch control circuit is connected with the output end of the output matching circuit; The switch control circuit comprises diode, first triode, second triode, first resistor and second resistor; the positive electrode of the diode is used as the input end of the switch control circuit, the negative electrode of the diode is connected with the collector of the second triode and used as the output end of the switch control circuit, the emitter of the second triode is connected with the second resistor in series and used for inputting external control signal; the base of the second triode is connected with the first end of the first resistor, the base of the first triode and the collector of the first triode respectively, the emitter of the first triode is grounded, and the second end of the first resistor is used for connecting power supply; When the control module receives the external logic enable signal and enters the non-low power consumption low gain mode, the external control signal outputs high level, the whole path is suspended, and the diode is closed; when the control module receives the external logic enable signal and enters the low power consumption low gain mode, the external control signal outputs low level, and the diode is turned on.

[0007] Preferably, the power amplification network comprises a third transistor, a fourth transistor, a third resistor, a fourth resistor, a first capacitor, a first inductor, a second capacitor and a first back hole; A first end of the first capacitor is a first input end of the power amplification network, a second end of the first capacitor is connected to a first end of the third resistor and a base of the third transistor respectively, a second end of the third resistor is connected to a first end of the fourth resistor, a base of the fourth transistor and a collector of the fourth transistor respectively, an emitter of the fourth transistor is grounded, and a second end of the fourth resistor is a second input end of the power amplification network. An emitter of the third transistor is grounded through the first back hole in series, a collector of the third transistor is a first output end of the power amplification network, the collector of the third transistor is connected to a first end of the first inductor, a second end of the first inductor is connected to a first end of the second capacitor and is a second output end of the power amplification network, and a second end of the second capacitor is grounded.

[0008] Preferably, the power amplifier further comprises a third capacitor, a first end of the third capacitor is connected to an output end of the switch control circuit, and a second end of the third capacitor is connected to an output end of the output matching circuit. Preferably, the first bias circuit comprises a fifth resistor, a fourth capacitor, a fifth transistor, a sixth transistor and a seventh transistor. A first end of the fifth resistor is an input end of the first bias circuit and is connected to the control module, a second end of the fifth resistor is connected to a collector and a base of the fifth transistor respectively, an emitter of the fifth transistor is connected to a collector and a base of the sixth transistor respectively, and an emitter of the sixth transistor is grounded; the base of the fifth transistor is connected to a first end of the fourth capacitor and a base of the seventh transistor respectively, a collector of the seventh transistor is connected to the DC power supply module, and an emitter of the sixth transistor is an output end of the first bias circuit and is connected to the first-stage amplifier.

[0009] Preferably, the second bias circuit comprises a sixth resistor, a fifth capacitor, an eighth transistor, a ninth transistor and a thirteenth transistor. The first end of the sixth resistor is connected to the control module as an input end of the second bias circuit, the second end of the sixth resistor is connected to the collector of the eighth transistor and the base of the eighth transistor, the emitter of the eighth transistor is connected to the collector of the ninth transistor and the base of the ninth transistor, and the emitter of the ninth transistor is grounded; the base of the eighth transistor is connected to the first end of the fifth capacitor and the base of the thirteenth transistor, the collector of the thirteenth transistor is connected to the DC power supply module, and the emitter of the ninth transistor is connected to the second stage amplifier as an output end of the second bias circuit.

[0010] Preferably, the third bias circuit comprises a seventh resistor, a sixth capacitor, an eleventh transistor, a twelfth transistor and a tenth transistor. The first end of the seventh resistor is connected to the control module as an input end of the third bias circuit, the second end of the seventh resistor is connected to the collector of the eleventh transistor and the base of the eleventh transistor, the emitter of the eleventh transistor is connected to the collector of the twelfth transistor and the base of the twelfth transistor, and the emitter of the twelfth transistor is grounded; the base of the eleventh transistor is connected to the first end of the sixth capacitor and the base of the tenth transistor, the collector of the tenth transistor is connected to the DC power supply module, and the emitter of the twelfth transistor is connected to the third stage amplifier as an output end of the third bias circuit.

[0011] Preferably, the fourth bias circuit comprises an eighth resistor, a seventh capacitor, a fourteenth transistor, a fifteenth transistor and a sixteenth transistor. The first end of the eighth resistor is connected to the control module as an input end of the fourth bias circuit, the second end of the eighth resistor is connected to the collector of the fourteenth transistor and the base of the fourteenth transistor, the emitter of the fourteenth transistor is connected to the collector of the fifteenth transistor and the base of the fifteenth transistor, and the emitter of the fifteenth transistor is grounded; the base of the fourteenth transistor is connected to the first end of the seventh capacitor and the base of the sixteenth transistor, the collector of the sixteenth transistor is connected to the DC power supply module, and the emitter of the sixteenth transistor is connected to the second input end of the power amplifier network as an output end of the fourth bias circuit.

[0012] Preferably, the power amplifier further comprises a second back hole, a third back hole and a fourth back hole, the second back hole, the third back hole and the fourth back hole are connected in parallel with the first stage amplifier, the second stage amplifier and the third stage amplifier and then grounded.

[0013] Preferably, the input matching circuit is an eighth capacitor, a first end of the eighth capacitor is used as an input end of the input matching circuit, and is used for connecting a radio frequency signal, and a second end of the eighth capacitor is used as an output end of the input matching circuit, and is connected to an input end of the first-stage amplifier.

[0014] In a second aspect, the embodiment of the present application further provides a radio frequency chip comprising the power amplifier.

[0015] Compared with the related art, in the embodiment of the present application, the direct current power supply module is used for supplying power to the control module, the first-stage amplifier, the second-stage amplifier and the third-stage amplifier respectively; the control module is used for receiving an external logic enable signal, and controlling the first bias circuit, the second bias circuit and the third bias circuit to provide bias voltages for the first-stage amplifier, the second-stage amplifier and the third-stage amplifier respectively according to the external logic enable signal; the positive electrode of the diode of the switch control circuit is used as an input end of the switch control circuit, the negative electrode of the diode is connected with the collector of the second triode and is used as an output end of the switch control circuit, the emitter of the second triode is connected with the external control signal through the second resistor, the base of the second triode is connected with the first end of the first resistor, the base of the first triode and the collector of the first triode, the emitter of the first triode is grounded, and the second end of the first resistor is used for connecting a power supply; when the control module receives the external logic enable signal and enters the non-low-power-consumption low-gain mode, the external control signal outputs a high level, the whole path is suspended, and the diode is turned off; when the control module receives the external logic enable signal and enters the low-power-consumption low-gain mode, the external control signal outputs a low level, and the diode is turned on; thereby the low-power-consumption mode current and the gain of the power amplifier are effectively optimized, and the purpose of saving power of the mobile phone is achieved. BRIEF DESCRIPTION OF DRAWINGS

[0016] The present application will be described in detail below with reference to the drawings. The above and other aspects of the present application will become more apparent and more readily appreciated by referring to the following detailed description, taken in conjunction with the accompanying drawings. In the drawings: Figure 1 a circuit block diagram of a power amplifier provided by the prior art; Figure 2 a circuit block diagram of a power amplifier provided by the embodiment of the present application; Figure 3 a circuit diagram of a first bias circuit of a power amplifier provided by the embodiment of the present application; Figure 4 a circuit diagram of a second bias circuit of a power amplifier provided by the embodiment of the present application; Figure 5 a circuit diagram of a third bias circuit of a power amplifier provided by the embodiment of the present application; Figure 6A circuit diagram of a fourth bias circuit of a power amplifier provided by an embodiment of the present application; Figure 7a A comparison diagram of power and current simulation curves of a power amplifier provided by the prior art; Figure 7b A comparison diagram of power and current simulation curves of a power amplifier provided by an embodiment of the present application; Figure 8a A comparison diagram of power and gain simulation curves of a power amplifier provided by the prior art; Figure 8b A comparison diagram of power and gain simulation curves of a power amplifier provided by an embodiment of the present application.

[0017] Wherein, 100, power amplifier, 1, input matching circuit, 2, first stage amplifier, 3, first inter-stage matching circuit, 4, second stage amplifier, 5, second inter-stage matching circuit, 6, third stage amplifier, 7, output matching circuit, 8, control module, 9, DC power supply module, 10, power amplification network, 11, first bias circuit, 12, second bias circuit, 13, third bias circuit, 14, fourth bias circuit, 15, first back hole, 16, second back hole, 17, third back hole, 18, fourth back hole, 19, switch control circuit. DETAILED DESCRIPTION

[0018] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the application; the description and the drawings are to be regarded as illustrative in nature and are not intended to limit the application; the terminology used in the description of the application herein including the abstract is not intended to be limiting of the application and is only used for the purpose of providing constructive reduction to practice of the application. The use of the terms "including", "containing", "having" and "with" and any variations thereof in the specification and in the claims are intended to cover both the case where the specified feature is included or contained and the case where the specified feature is not included or contained.

[0019] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrase "in an embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily all directed to the same embodiment, or to a single alternative embodiment. It is explicitly contemplated that embodiments described herein can be combined with each other.

[0020] With reference to the drawings of the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments of the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the scope of the present application.

[0021] Embodiment one Please refer to Figures 2-6 As shown in the figure, the embodiment of the present application provides a power amplifier 100, which comprises input matching circuit 1, first stage amplifier 2, first stage inter-stage matching circuit 3, second stage amplifier 4, second stage inter-stage matching circuit 5, third stage amplifier 6 and output matching circuit 7 connected in sequence; the power amplifier 100 further comprises control module 8, DC power supply module 9, first bias circuit 11, second bias circuit 12, third bias circuit 13, fourth bias circuit 14, power amplification network 10 and switch control circuit 19. The DC power supply module 9 is used for supplying power to the control module 8, the first stage amplifier 2, the second stage amplifier 4 and the third stage amplifier 6 respectively. The control module 8 is used for receiving external logic enable signal, and controlling the first bias circuit 11, the second bias circuit 12 and the third bias circuit 13 to provide bias voltage for the first stage amplifier 2, the second stage amplifier 4 and the third stage amplifier 6 respectively according to the external logic enable signal. Wherein, the DC power supply module 9 is battery powered, which can be DC power supply or battery, etc.

[0022] The first input end of the power amplification network 10 is connected with the input end of the first stage amplifier 2 and accesses radio frequency signal respectively, and the second input end of the power amplification network 10 is used for connecting the fourth bias circuit 14; the first output end of the power amplification network 10 is connected with the input end of the switch control circuit 19, the second output end of the power amplification network 10 is connected with the DC power supply module 9, and the output end of the switch control circuit 19 is connected with the output end of the output matching circuit 7.

[0023] The switch control circuit 19 comprises a diode D1, a first transistor Q1, a second transistor Q2, a first resistor R1 and a second resistor R2; the positive pole of the diode D1 is the input terminal of the switch control circuit 19, the negative pole of the diode D1 is connected with the collector of the second transistor Q2 and is the output terminal of the switch control circuit 19, the emitter of the second transistor Q2 is connected with the second resistor R2 in series and is used for connecting the external control signal; the base of the second transistor Q2 is connected with the first terminal of the first resistor R1, the base of the first transistor Q1 and the collector of the first transistor Q1 respectively, the emitter of the first transistor Q1 is grounded, and the second terminal of the first resistor R1 is used for connecting the power supply.

[0024] When the control module 8 receives the external logic enable signal and enters the non-low-power low-gain mode, the external control signal outputs high level, the whole channel is suspended, and the diode D1 is closed; when the control module 8 receives the external logic enable signal and enters the low-power low-gain mode, the external control signal outputs low level, and the diode D1 is turned on. Specifically, when the first bias circuit 11, the second bias circuit 12 and the third bias circuit 13 are normally powered, the fourth bias circuit 14 is not powered, and the output voltage is 0V, the voltage of the external control signal is high level; when the external control signal provides a voltage same as the direct current power supply, the voltage difference between the two sides of the diode D1 is less than the conduction voltage of the diode D1, the diode D1 is disconnected, thereby forming an isolation effect. When the first bias circuit 11, the second bias circuit 12 and the third bias circuit 13 are not powered, the output voltage is 0V; the fourth bias circuit 14 is normally powered, the voltage of the external control signal is low level; when the voltage difference between the two sides of the diode D1 is less than the conduction voltage of the diode D1, the diode D1 is turned on; the power amplification network 10 normally outputs power. Thus, the low-power mode current and the gain of the power amplifier 100 are effectively optimized, and the purpose of saving power of the mobile phone is achieved.

[0025] In the application, the second resistor R2 is connected in series through the second transistor Q2 and the external control signal is connected, so that the second transistor Q2 enters the conduction mode and the output end of the power amplification network 10 is powered by the direct current power supply module 9. When the voltage of the external control signal is 0V, the voltage difference between the two sides of the diode D1 is greater than the conduction voltage of the diode D1, at this time the diode D1 is turned on, and the power amplification network 10 outputs the signal to the output end. When the external control signal provides a voltage same as the direct current power supply, the voltage difference between the two sides of the diode D1 is less than the conduction voltage of the diode D1, the diode D1 is disconnected, and the power amplification network 10 is turned off, thereby forming an isolation effect.

[0026] In this embodiment, the power amplification network 10 includes a third transistor Q3, a fourth transistor Q4, a third resistor R3, a fourth resistor R4, a first capacitor C1, a first inductor, a second capacitor C2 and a first back hole 15.

[0027] The first end of the first capacitor C1 is the first input end of the power amplification network 10, the second end of the first capacitor C1 is connected to the first end of the third resistor R3 and the base of the third transistor Q3, the second end of the third resistor R3 is connected to the first end of the fourth resistor R4, the base of the fourth transistor Q4 and the collector of the fourth transistor Q4, the emitter of the fourth transistor Q4 is grounded, and the second end of the fourth resistor R4 is the second input end of the power amplification network 10.

[0028] The emitter of the third transistor Q3 is connected to the ground through the first back hole 15 in series, the collector of the third transistor Q3 is the first output end of the power amplification network 10, the collector of the third transistor Q3 is connected to the first end of the first inductor, the second end of the first inductor is connected to the first end of the second capacitor C2 and is the second output end of the power amplification network 10, and the second end of the second capacitor C2 is grounded. By connecting the first back hole 15 to the ground at the emitter of the third transistor Q3, and by optimizing the signal integrity, heat dissipation, grounding, matching and power supply in five dimensions, the overall performance of the PA is improved.

[0029] Specifically, when the power amplifier 100 needs to work in a high-power high-gain mode, the control module 8 normally supplies power to the first bias circuit 11, the second bias circuit 12 and the third bias circuit 13, the voltage of the fourth bias circuit 14 is 0V, the third transistor Q3 is in a closed state, the voltage of the external control signal is high, and the diode D1 is in an isolation state. When the power amplifier 100 needs to work in a low-power low-gain mode, the supply voltage of the first bias circuit 11, the second bias circuit 12 and the third bias circuit 13 is 0V, the first-stage amplifier 2, the second-stage amplifier 4 and the third-stage amplifier 6 are all turned off, the fourth bias circuit 14 is normally powered, the third transistor Q3 is powered on, the external control signal is 0V low, the diode D1 is turned on, and the third transistor Q3 normally outputs power to the output port. Although in this mode, the output matching of the third transistor Q3 and the output matching of the first-stage amplifier 2, the second-stage amplifier 4 and the third-stage amplifier 6 are in parallel, but since the third transistor Q3 is a single-stage small-power amplifier, the output impedance itself requires to be large, and thus the output matching of the third transistor Q3 can be corrected by adjusting the first inductor. The low-power mode current and gain of the power amplifier 100 are effectively optimized, and the purpose of saving power of the mobile phone is achieved.

[0030] In the embodiment, the power amplifier 100 further comprises a third capacitor C3, a first end of the third capacitor C3 is connected to an output end of the switch control circuit 19, and a second end of the third capacitor C3 is connected to an output end of the output matching circuit 7. The first inductor and the third capacitor C3 are combined to adjust and correct the output matching of the third triode Q3.

[0031] In the embodiment, as shown in Figure 3 the first bias circuit 11 comprises a fifth resistor R5, a fourth capacitor C4, a fifth triode Q5, a sixth triode Q6 and a seventh triode Q7.

[0032] A first end of the fifth resistor R5 is connected to the control module 8 as an input end of the first bias circuit 11, a second end of the fifth resistor R5 is connected to a collector of the fifth triode Q5 and a base of the fifth triode Q5 respectively, an emitter of the fifth triode Q5 is connected to a collector of the sixth triode Q6 and a base of the sixth triode Q6 respectively, and an emitter of the sixth triode Q6 is grounded. The base of the fifth triode Q5 is connected to a first end of the fourth capacitor C4 and a base of the seventh triode Q7 respectively, a collector of the seventh triode Q7 is connected to the DC power supply module 9, and the emitter of the sixth triode Q6 is connected to the first-stage amplifier 2 as an output end of the first bias circuit 11. The fifth resistor R5 is used to supply power for the fifth triode Q5 and the sixth triode Q6 through the control module 8, and the fifth triode Q5 and the sixth triode Q6 are used as voltage stabilizing and temperature compensating tubes; the fourth capacitor C4 is used to store power for the whole bias circuit. The seventh triode Q7 is used as a bias driving tube of the first-stage amplifier 2 to supply power for biasing the first-stage amplifier 2. Optionally, the DC power supply module 9 provides power for a battery of the mobile phone system.

[0033] In the embodiment, as shown in Figure 4 the second bias circuit 12 comprises a sixth resistor R6, a fifth capacitor C5, an eighth triode Q8, a ninth triode Q9 and a thirteenth triode Q10.

[0034] The first end of the sixth resistor R6 is connected to the control module 8 as the input end of the second bias circuit 12, and the second end of the sixth resistor R6 is connected to the collector of the eighth transistor Q8 and the base of the eighth transistor Q8 respectively. The emitter of the eighth transistor Q8 is connected to the collector of the ninth transistor Q9 and the base of the ninth transistor Q9 respectively, and the emitter of the ninth transistor Q9 is grounded. The base of the eighth transistor Q8 is connected to the first end of the fifth capacitor C5 and the base of the thirteenth transistor Q10 respectively, the collector of the thirteenth transistor Q10 is connected to the DC power supply module 9, and the emitter of the ninth transistor Q9 is connected to the second stage amplifier 4 as the output end of the second bias circuit 12. The eighth transistor Q8 and the ninth transistor Q9 are powered through the sixth resistor R6 by the control module 8, and are used as voltage stabilizing and temperature compensating tubes, the thirteenth transistor Q10 is used as a bias driving tube of the second stage amplifier 4, and is used for biasing and powering the second stage amplifier 4.

[0035] In this embodiment, as shown in Figure 5 The third bias circuit 13 includes a seventh resistor R7, a sixth capacitor C6, an eleventh transistor Q11, a twelfth transistor Q12, and a thirteenth transistor Q13.

[0036] The first end of the seventh resistor R7 is connected to the control module 8 as the input end of the third bias circuit 13, and the second end of the seventh resistor R7 is connected to the collector of the eleventh transistor Q11 and the base of the eleventh transistor Q11 respectively. The emitter of the eleventh transistor Q11 is connected to the collector of the twelfth transistor Q12 and the base of the twelfth transistor Q12 respectively, and the emitter of the twelfth transistor Q12 is grounded. The base of the eleventh transistor Q11 is connected to the first end of the sixth capacitor C6 and the base of the thirteenth transistor Q13 respectively, the collector of the thirteenth transistor Q13 is connected to the DC power supply module 9, and the emitter of the twelfth transistor Q12 is connected to the third stage amplifier 6 as the output end of the third bias circuit 13. The eleventh transistor Q11 and the twelfth transistor Q12 are powered through the seventh resistor R7 by the control module 8, and are used as voltage stabilizing and temperature compensating tubes, the thirteenth transistor Q13 is used as a bias driving tube of the third stage amplifier 6, and is used for biasing and powering the third stage amplifier 6.

[0037] In this embodiment, as shown in Figure 6 The fourth bias circuit 14 includes an eighth resistor R8, a seventh capacitor C7, a fourteenth transistor Q14, a fifteenth transistor Q15, and a sixteenth transistor Q16.

[0038] The first end of the eighth resistor R8 is connected to the control module 8 as the input end of the fourth bias circuit 14, the second end of the eighth resistor R8 is connected to the collector of the fourteenth transistor Q14 and the base of the fourteenth transistor Q14 respectively, the emitter of the fourteenth transistor Q14 is connected to the collector of the fifteenth transistor Q15 and the base of the fifteenth transistor Q15 respectively, and the emitter of the fifteenth transistor Q15 is grounded. The base of the fourteenth transistor Q14 is connected to the first end of the seventh capacitor C7 and the base of the sixteenth transistor Q16 respectively, the collector of the sixteenth transistor Q16 is connected to the DC power supply module 9, and the emitter of the sixteenth transistor Q16 is connected to the second input end of the power amplifier network 10 as the output end of the fourth bias circuit 14. The fourteenth transistor Q14 and the fifteenth transistor Q15 are powered through the eighth resistor R8 controlled by the control module 8, the fourteenth transistor Q14 and the fifteenth transistor Q15 are used as voltage stabilizing and temperature compensation tubes, the sixteenth transistor Q16 is used as a bias driving tube of an amplifier, and the first-stage amplifier 2, the second-stage amplifier 4 and the third-stage amplifier 6 are biased and powered respectively; different bias voltages provided by the first bias circuit 11, the second bias circuit 12, the third bias circuit 13 and the fourth bias circuit 14 are used to realize the closing and conducting of the diode D1. The low-power consumption mode current and the gain of the power amplifier 100 are effectively optimized, and the power saving purpose of the mobile phone is achieved.

[0039] In the embodiment, the power amplifier 100 further comprises a second back hole 16, a third back hole 17 and a fourth back hole 18, and the second back hole 16, the third back hole 17 and the fourth back hole 18 are connected in parallel with the first-stage amplifier 2, the second-stage amplifier 4 and the third-stage amplifier 6 respectively and then grounded. The second back hole 16, the third back hole 17 and the fourth back hole 18 are connected in parallel with the first-stage amplifier 2, the second-stage amplifier 4 and the third-stage amplifier 6 respectively and then grounded, and the overall performance of the PA is improved through the synergistic optimization of the five dimensions of signal integrity, heat dissipation, grounding, matching and power supply.

[0040] In the embodiment, the input matching circuit 1 is an eighth capacitor C8, the first end of the eighth capacitor C8 is used as the input end of the input matching circuit 1 and is connected to a radio frequency signal, and the second end of the eighth capacitor C8 is connected to the input end of the first-stage amplifier 2 as the output end of the input matching circuit 1. The input matching effect can be achieved through the eighth capacitor C8.

[0041] In the embodiment, the output matching circuit 7 can be an inductor or an inductor, or a combination of an inductor and a capacitor in series, a combination of an inductor and a capacitor in parallel, and the like.

[0042] In the embodiment,Figure 7a The figure is a power current simulation curve comparison chart of the prior art traditional architecture, Figure 7b The figure is a power current simulation curve comparison chart of the power amplifier 100 of the present application. According to the result of the comparison chart, it can be obviously seen that, compared with the traditional architecture, the optimization of current of the present application is obvious, and the current is optimized by nearly 130mA, and the optimization is 81%.

[0043] In the embodiment, Figure 8a The figure is a power gain simulation curve comparison chart of the prior art traditional architecture, Figure 8b The figure is a power gain simulation curve comparison chart of the present application. According to the result of the comparison chart, it can be known that, compared with the traditional architecture, the optimization of gain reduction of the present application is obvious. The gain of the traditional architecture is 30.5dB, and the gain of the present application is about 12dB, and the optimization is obvious.

[0044] Embodiment two The embodiment of the present application further provides a radio frequency chip, which comprises the power amplifier 100 as described above.

[0045] It should be noted that the various embodiments described above with reference to the drawings are merely used to illustrate the present application but not to limit the scope of the present application. Those skilled in the art should understand that the modifications or equivalent replacements to the present application made without departing from the spirit and scope of the present application shall be included in the scope of the present application. In addition, the word appearing in singular form includes the plural form unless otherwise indicated by the context. In addition, unless otherwise specified, all or part of any embodiment can be used in combination with all or part of any other embodiment.

Claims

1. A power amplifier comprising an input matching circuit, a first-stage amplifier, a first inter-stage matching circuit, a second-stage amplifier, a second inter-stage matching circuit, a third-stage amplifier, and an output matching circuit electrically connected in sequence; characterized in that: The power amplifier further includes a control module, a DC power supply module, a first bias circuit, a second bias circuit, a third bias circuit, a fourth bias circuit, a power amplification network, and a switch control circuit; The DC power supply module is used to respectively supply power to the control module, the first-stage amplifier, the second-stage amplifier and the third-stage amplifier; The control module is configured to receive an external logic enable signal and control the first bias circuit, the second bias circuit, and the third bias circuit according to the external logic enable signal to provide bias voltages for the first-stage amplifier, the second-stage amplifier, and the third-stage amplifier, respectively; The first input end of the power amplification network is connected to the input end of the first-stage amplifier and is respectively connected to the radio frequency signal. The second input end of the power amplification network is used to connect to the fourth bias circuit. The first output end of the power amplification network is connected to the input end of the switch control circuit. The second output end of the power amplification network is connected to the DC power supply module. The output end of the switch control circuit is connected to the output end of the output matching circuit. The switch control circuit includes a diode, a first transistor, a second transistor, a first resistor, and a second resistor; the anode of the diode serves as the input end of the switch control circuit, the cathode of the diode is connected to the collector of the second transistor and serves as the output end of the switch control circuit, the emitter of the second transistor is connected in series with the second resistor and is used to receive an external control signal; the base of the second transistor is respectively connected to the first end of the first resistor, the base of the first transistor, and the collector of the first transistor, the emitter of the first transistor is grounded, and the second end of the first resistor is used to connect to a power supply; When the control module receives the external logic enable signal and enters the non-low power consumption and low gain mode, the external control signal outputs a high level, the entire path is suspended, and the diode is closed; When the control module receives the external logic enable signal and enters the low power consumption and low gain mode, the external control signal is output at a low level and the diode is turned on.

2. The power amplifier according to claim 1, wherein: The power amplification network includes a third transistor, a fourth transistor, a third resistor, a fourth resistor, a first capacitor, a first inductor, a second capacitor and a first back hole; The first end of the first capacitor serves as the first input end of the power amplification network, the second end of the first capacitor is respectively connected to the first end of the third resistor and the base of the third transistor, the second end of the third resistor is respectively connected to the first end of the fourth resistor, the base of the fourth transistor, and the collector of the fourth transistor, the emitter of the fourth transistor is grounded, and the second end of the fourth resistor serves as the second input end of the power amplification network; The emitter of the third transistor is connected in series with the first back hole and then grounded; the collector of the third transistor serves as the first output end of the power amplification network; the collector of the third transistor is connected to the first end of the first inductor, the second end of the first inductor is connected to the first end of the second capacitor and serves as the second output end of the power amplification network, and the second end of the second capacitor is grounded.

3. The power amplifier according to claim 1, wherein: The power amplifier further includes a third capacitor, a first end of the third capacitor is connected to the output end of the switch control circuit, and a second end of the third capacitor is connected to the output end of the output matching circuit.

4. The power amplifier according to claim 1, wherein: The first bias circuit includes a fifth resistor, a fourth capacitor, a fifth transistor, a sixth transistor and a seventh transistor; The first end of the fifth resistor is connected to the control module as an input end of the first bias circuit, the second end of the fifth resistor is respectively connected to the collector of the fifth transistor and the base of the fifth transistor, the emitter of the fifth transistor is respectively connected to the collector of the sixth transistor and the base of the sixth transistor, and the emitter of the sixth transistor is grounded; the base of the fifth transistor is respectively connected to the first end of the fourth capacitor and the base of the seventh transistor, the collector of the seventh transistor is used to be connected to the DC power supply module, and the emitter of the sixth transistor is connected to the first-stage amplifier as an output end of the first bias circuit.

5. The power amplifier according to claim 1, wherein: The second bias circuit includes a sixth resistor, a fifth capacitor, an eighth transistor, a ninth transistor, and a tenth transistor; The first end of the sixth resistor is connected to the control module as the input end of the second bias circuit, the second end of the sixth resistor is respectively connected to the collector of the eighth transistor and the base of the eighth transistor, the emitter of the eighth transistor is respectively connected to the collector of the ninth transistor and the base of the ninth transistor, and the emitter of the ninth transistor is grounded; the base of the eighth transistor is respectively connected to the first end of the fifth capacitor and the base of the tenth transistor, the collector of the tenth transistor is used to be connected to the DC power supply module, and the emitter of the ninth transistor is connected to the second-stage amplifier as the output end of the second bias circuit.

6. The power amplifier according to claim 1, wherein: The third bias circuit includes a seventh resistor, a sixth capacitor, an eleventh transistor, a twelfth transistor, and a thirteenth transistor; The first end of the seventh resistor is connected to the control module as the input end of the third bias circuit, the second end of the seventh resistor is respectively connected to the collector of the eleventh triode and the base of the eleventh triode, the emitter of the eleventh triode is respectively connected to the collector of the twelfth triode and the base of the twelfth triode, and the emitter of the twelfth triode is grounded; the base of the eleventh triode is respectively connected to the first end of the sixth capacitor and the base of the thirteenth triode, the collector of the thirteenth triode is used to be connected to the DC power supply module, and the emitter of the twelfth triode is connected to the third-stage amplifier as the output end of the third bias circuit.

7. The power amplifier according to claim 1, wherein: The fourth bias circuit includes an eighth resistor, a seventh capacitor, a fourteenth transistor, a fifteenth transistor, and a sixteenth transistor; The first end of the eighth resistor is connected to the control module as the input end of the fourth bias circuit, the second end of the eighth resistor is respectively connected to the collector of the fourteenth transistor and the base of the fourteenth transistor, the emitter of the fourteenth transistor is respectively connected to the collector of the fifteenth transistor and the base of the fifteenth transistor, and the emitter of the fifteenth transistor is grounded; the base of the fourteenth transistor is respectively connected to the first end of the seventh capacitor and the base of the sixteenth transistor, the collector of the sixteenth transistor is used to be connected to the DC power supply module, and the emitter of the sixteenth transistor is connected to the second input end of the power amplification network as the output end of the fourth bias circuit.

8. The power amplifier according to claim 1, wherein: The power amplifier further includes a second back hole, a third back hole and a fourth back hole. The second back hole, the third back hole and the fourth back hole are respectively connected in parallel to the first stage amplifier, the second stage amplifier and the third stage amplifier and then grounded.

9. The power amplifier according to claim 1, wherein: The input matching circuit is an eighth capacitor, the first end of the eighth capacitor serves as the input end of the input matching circuit and is used to connect the radio frequency signal, and the second end of the eighth capacitor serves as the output end of the input matching circuit and is connected to the input end of the first-stage amplifier.

10. A radio frequency chip, characterized in that: Comprising the power amplifier according to any one of claims 1 to 9.

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