Single multi-column label chip die bonding method, system, and readable storage medium

Abstract

The application discloses a single-multicolumn label chip die bonding method and system and a readable storage medium, and relates to the technical field of chip die bonding; the single-multicolumn label chip die bonding method comprises the following steps: a pin assembly is used to eject a chip from a wafer disc to a turnover assembly; wherein the wafer disc performs the ejection operation under the condition that the inclination angle is less than or equal to ±30 degrees; the turnover assembly is used to transfer the chip to a patch assembly; a glue spraying assembly is used to perform glue spraying operation on a preset die bonding position of a material belt; the patch assembly is used to attach the chip to the preset die bonding position of the material belt; and a curing assembly is used to perform curing operation on the material belt and the chip. The technical scheme provided by the application can eliminate the translation deviation and angle deviation of the chip after being transferred from the wafer disc to the patch assembly.

Description

Technical Field

[0001] This invention relates to the field of chip die bonding technology, and in particular to a method, system, and readable storage medium for die bonding single-column tag chips. Background Technology

[0002] Die bonding refers to the process of attaching chips to a substrate such as plastic or ceramic. The quality of die bonding technology directly affects the performance of the chip itself. Currently, die bonding equipment includes a spraying assembly, a placement assembly, and a curing assembly arranged sequentially along the direction of the substrate movement, as well as a pin assembly and a flipping assembly arranged vertically above the placement assembly. The pin assembly ejects the chip from the wafer disk, and the flipping assembly flips and transfers it to the placement assembly, which then attaches the chip to the preset die bonding position on the substrate.

[0003] In existing technologies, the adhesive spraying assembly, chip mounting assembly, curing assembly, ejector pin assembly, and flipping assembly are all located on the same vertical plane to ensure that after the flipping assembly flips the chip 180 degrees, the chip can correspond exactly to the chip mounting assembly directly below. Therefore, the horizontal mounting accuracy of the wafer disk is required to be high, and the wafer disk cannot be tilted. Otherwise, after the chip is transferred from the wafer disk to the chip mounting assembly, there will be a large translational and angular deviation, which will result in the chip not being accurately mounted on the preset die bonding position of the tape, affecting the finished product quality of single and multi-column labels.

[0004] It should be noted that the above content is only used to help understand the technical solution of the present invention, and does not represent an admission that the above content is prior art. Summary of the Invention

[0005] The main objective of this invention is to propose a single-multi-column label chip die bonding method, system, and readable storage medium, which aims to achieve chip die bonding suitable for wafer disk tilting, thereby minimizing translational and angular deviations after the chip is transferred from the wafer disk to the mounting assembly, ensuring that the chip can be accurately mounted at the preset die bonding position of the tape, and guaranteeing the finished product quality of single-multi-column labels.

[0006] To achieve the above objectives, this invention proposes a die bonding method for single-multi-column tag chips, comprising the following steps:

[0007] A chip is ejected from a wafer disk to a flipping assembly using a pusher assembly; wherein the ejection operation is performed on the wafer disk with a tilt angle ≤ ±30°.

[0008] The chip is transferred to the mounting assembly using a flip-over assembly;

[0009] The adhesive spraying assembly is used to spray adhesive onto the preset die-bonding position of the strip.

[0010] The chip is attached to the preset die-bonding position of the strip using a surface mount assembly;

[0011] The material tape and the chip are cured using a curing assembly;

[0012] The step of attaching the chip to the preset die-bonding position of the strip using a surface mount assembly includes the following steps:

[0013] The current position of the material strip is compared with the preset position of the material strip to obtain the first translational deviation data of the material strip;

[0014] The first current chip position of the chip is compared with the preset chip position to obtain the second translational deviation data and angle deviation data of the chip;

[0015] The third translation deviation data is obtained by combining the first translation deviation data and the second translation deviation data.

[0016] The material strip is translated and corrected based on the third translation deviation data.

[0017] The chip is angle-corrected based on the angle deviation data.

[0018] In one embodiment, the step of correcting the translation of the strip based on the third translation deviation data includes the following steps:

[0019] The material strip is translated and corrected using a material pulling correction component;

[0020] Furthermore, the strip includes multiple rows of preset die-bonding positions extending along the Y-axis, and the strip pull correction component can translate the strip along the Y-axis to achieve die-bonding operation of multiple rows of tag chips.

[0021] In one embodiment, the mounting assembly includes at least one first rotating arm, which can drive the first rotating arm to rotate to a first mounting station, a second mounting station, and a third mounting station; the end of the first rotating arm is provided with a first suction nozzle, which is used to vacuum pick up the chip, and the first suction nozzle can rotate axially relative to the first rotating arm.

[0022] The step of attaching the chip to the preset die-bonding position of the strip using a surface mount assembly further includes the following steps:

[0023] The first rotating arm rotates to the first placement station, and the first rotating arm receives the chip from the flipping component;

[0024] The first rotating arm rotates to the second placement station, and performs the following steps: acquiring the second translational deviation data and angle deviation data of the chip; and performing the following steps: correcting the angle of the chip based on the angle deviation data.

[0025] The first rotating arm rotates to the third placement station and performs the step of attaching the chip to the preset die bonding position of the material strip using the placement assembly.

[0026] In one embodiment, the step of correcting the angle of the chip based on the angle deviation data includes the following steps:

[0027] The rotation angle of the first rotating arm relative to the patch assembly is adjusted to perform coarse angle correction on the chip; wherein the angle adjustment range of the first rotating arm is ±25°;

[0028] The rotation angle of the first suction nozzle relative to the first rotating arm is adjusted to perform angle correction and fine-tuning of the chip; wherein the angle adjustment range of the first suction nozzle is ±5°.

[0029] In one embodiment, the step of correcting the translation of the strip based on the third translation deviation data includes the following steps:

[0030] The first translational deviation data includes a first X-axis deviation value and / or a first Y-axis deviation value;

[0031] The second translational deviation data includes a second X-axis deviation value and / or a second Y-axis deviation value;

[0032] The first X-axis deviation value is subtracted from the second X-axis deviation value to obtain the third X-axis deviation value; the material strip is then corrected on the X-axis based on the third X-axis deviation value.

[0033] And / or, subtract the first Y-axis deviation value from the second Y-axis deviation value to obtain the third Y-axis deviation value; and perform Y-axis correction on the material strip based on the third Y-axis deviation value.

[0034] In one embodiment, the step of applying adhesive to a predetermined die-bonding position of the strip using a spray adhesive assembly includes the following steps:

[0035] The coordinates of the adhesive path of the adhesive spraying assembly are obtained by a correction camera; wherein, the correction camera adopts FPGA image processing technology.

[0036] The adhesive path coordinates are transmitted to the adhesive spraying assembly to dynamically adjust the adhesive spraying path of the assembly.

[0037] In one embodiment, before the step of applying adhesive to a predetermined die-bonding position of the strip using the adhesive spraying assembly, the following steps are included:

[0038] The tension of the first strip is monitored using a first photoelectric array;

[0039] Determine whether the current position of the first material strip is within the first preset tension range; if not, use the first vacuum buffer component to dynamically buffer the material strip.

[0040] In one embodiment, prior to the step of curing the tape and the chip using a curing assembly, the following steps are included:

[0041] The tension of the second strip is monitored using a second photoelectric array;

[0042] Determine whether the current position of the second strip is within the second preset tension range; if not, use the second vacuum buffer component to dynamically buffer the strip.

[0043] In one embodiment, the curing assembly includes an upper hot press head and a lower hot press head; the step of using the curing assembly to cure the strip and the chip includes the following steps:

[0044] The upper hot press head descends to a vertical height of 1.5~2.5mm from the chip;

[0045] The lower hot press head rises to abut against the side of the material strip away from the preset die-bonding position;

[0046] The upper hot press head continues to descend until it contacts the chip, so that the upper hot press head and the lower hot press head combine, and the material strip and the chip are cured using a bidirectional hot press synergistic process;

[0047] The upper and lower heating heads each have independent temperature control, the temperature difference between the actual temperature value and the preset temperature value of each welding head is less than ±1℃, and the pressure difference between the actual pressure value and the preset pressure value of each welding head is ≤±0.1N.

[0048] To achieve the above objectives, the present invention proposes a single-multi-column tag chip die bonding correction system, comprising a processor and a memory, wherein the memory stores a computer program, which can be executed by the processor to implement the single-multi-column tag chip die bonding method as described in any of the preceding claims.

[0049] To achieve the above objectives, the present invention proposes a readable storage medium storing a computer program that can be read to implement the single-multi-column tag chip die bonding method as described in any of the preceding claims.

[0050] The technical solution of this invention effectively overcomes the chip transfer deviation problem caused by wafer disk tilt (tilt angle ≤ ±30°) in the prior art by introducing a real-time detection and deviation correction mechanism for the position of the tape and the chip during the chip bonding process. Specifically, by acquiring the first translational deviation data of the tape, the second translational deviation data of the chip, and the angle deviation data, and comprehensively calculating the third translational deviation data, the tape is translated and the chip is angled, significantly improving the accuracy of the chip bonding position. Even when the wafer disk has a certain tilt angle or insufficient mounting accuracy, it can still ensure that the chip is accurately bonded to the preset die bonding position of the tape, thereby improving the finished product quality and production yield of single and multi-column labels, reducing the stringent requirements for wafer disk mounting accuracy, and enhancing the system's fault tolerance and process stability. Attached Figure Description

[0051] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 A flowchart of one embodiment of the single-multi-column tag chip die bonding method provided by the present invention;

[0053] Figure 2 The second flowchart of an embodiment of the single-multi-column tag chip die bonding method provided by the present invention;

[0054] Figure 3 A schematic diagram of one embodiment of the single / multi-row tag chip die bonding device provided by the present invention;

[0055] Figure 4 A second schematic diagram of an embodiment of the single / multi-row tag chip die bonding device provided by the present invention;

[0056] Figure 5 This is a simplified schematic diagram of an embodiment of the single / multi-column tag chip die bonding device provided by the present invention.

[0057] Explanation of reference numerals in the attached figures:

[0058] 10. Glue spraying assembly; 20. SMT assembly; 30. Ejector pin assembly; 40. Flip assembly; 50. Material pulling and correction assembly; 100. Wafer disk; 200. Chip; 300. Material tape;

[0059] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0060] The technical solutions of this invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a portion of the embodiments of this invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0061] It should be noted that if the embodiments of the present invention involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0062] Furthermore, it should be noted that the descriptions involving "first," "second," etc., in this invention are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed by this invention.

[0063] In existing technologies, the adhesive spraying assembly, chip mounting assembly, curing assembly, ejector pin assembly, and flipping assembly are all located on the same vertical plane to ensure that after the flipping assembly flips the chip 180 degrees, the chip can correspond exactly to the chip mounting assembly directly below. Therefore, the horizontal mounting accuracy of the wafer disk is required to be high, and the wafer disk cannot be tilted. Otherwise, after the chip is transferred from the wafer disk to the chip mounting assembly, there will be a large translational and angular deviation, which will result in the chip not being accurately mounted on the preset die bonding position of the tape, affecting the finished product quality of single and multi-column labels.

[0064] To address the aforementioned technical problems, this invention proposes a die bonding method for single-multi-column tag chips.

[0065] Please see Figures 1 to 5 In one embodiment of the present invention, the die bonding method for the single-multi-column tag chip includes the following steps:

[0066] Step S10: The chip is ejected from the wafer disk 100 to the flipping assembly 40 using the ejector assembly 30; wherein the wafer disk 100 performs the ejection operation under the condition of tilt angle ≤ ±30°;

[0067] Step S20: Transfer the chip 200 to the mounting assembly 20 using the flipping component 40;

[0068] Step S30: Use the adhesive spraying assembly 10 to spray adhesive onto the preset die-bonding position of the strip 300;

[0069] Step S40: Use the surface mount assembly 20 to attach the chip 200 to the preset die bonding position of the strip 300;

[0070] Step S50: The tape 300 and the chip 200 are cured using a curing assembly (not shown in the figures);

[0071] Step S40 includes the following steps:

[0072] Step S41: Compare the current position of the material strip with the preset position of the material strip to obtain the first translational deviation data of the material strip;

[0073] Step S42: Compare the first current chip position of the chip with the preset chip position to obtain the second translational deviation data and angle deviation data of the chip;

[0074] Step S43: Combine the first translation deviation data and the second translation deviation data to obtain the third translation deviation data.

[0075] Step S44: Correct the translation of the material strip according to the third translation deviation data;

[0076] Step S45: Correct the angle of the chip according to the angle deviation data.

[0077] The technical solution of this invention effectively overcomes the chip transfer deviation problem caused by wafer disk tilt (tilt angle ≤ ±30°) in the prior art by introducing a real-time detection and deviation correction mechanism for the position of the tape and the chip during the chip bonding process. Specifically, by acquiring the first translational deviation data of the tape, the second translational deviation data of the chip, and the angle deviation data, and comprehensively calculating the third translational deviation data, the tape is translated and the chip is angled, significantly improving the accuracy of the chip bonding position. Even when the wafer disk has a certain tilt angle or insufficient mounting accuracy, it can still ensure that the chip is accurately bonded to the preset die bonding position of the tape, thereby improving the finished product quality and production yield of single and multi-column labels, reducing the stringent requirements for wafer disk mounting accuracy, and enhancing the system's fault tolerance and process stability.

[0078] As a preferred embodiment of the above, step S44 includes the following steps:

[0079] The material strip is translated and corrected using a material pulling correction component;

[0080] With this setup, the material strip will pass around the material pulling correction component during transportation, and the material pulling correction component can be displaced in the X-axis and Y-axis directions. In this way, by displacing the material strip in the X-axis and Y-axis directions according to the third translation deviation data, the translation correction of the material strip in the X-axis and Y-axis directions can be achieved. The structure is simple and highly practical.

[0081] Furthermore, the strip includes multiple rows of preset die-bonding positions extending along the Y-axis. The pull-and-correction assembly can translate the strip along the Y-axis to achieve die-bonding of multiple rows of label chips. This configuration, by driving the strip to translate along the Y-axis through the pull-and-correction assembly, allows the bonding assembly to smoothly attach the chips to the multiple rows of preset die-bonding positions on the strip, thereby improving the parallel processing capability of multiple rows of chips and supporting die-bonding operations for multiple rows of label chips.

[0082] As a preferred embodiment of the above embodiments, the chip mounting assembly includes at least one first rotating arm, which can drive the first rotating arm to rotate to a first mounting station, a second mounting station, and a third mounting station; the end of the first rotating arm is provided with a first suction nozzle, which is used to vacuum pick up the chip, and the first suction nozzle can rotate axially relative to the first rotating arm.

[0083] Step S40 also includes the following steps:

[0084] Step S46: The first rotating arm rotates to the first placement station, and the first rotating arm receives the chip from the flipping component;

[0085] Step S47: The first rotating arm rotates to the second placement station, and the steps are performed to obtain the second translational deviation data and angle deviation data of the chip, and to correct the angle of the chip according to the angle deviation data;

[0086] Step S48: The first rotating arm rotates to the third placement station and performs the step of attaching the chip to the preset die bonding position of the strip using the placement assembly.

[0087] With this configuration, by sequentially setting a first placement station, a second placement station, and a third placement station on the placement assembly, the chip, driven by the first rotating arm, performs a step at the second placement station to obtain the second translational deviation data and angular deviation data of the chip, and a step to correct the angle of the chip based on the angular deviation data; at the third placement station, the chip is attached to the preset die-bonding position of the strip using the placement assembly; thereby ensuring the smooth implementation of the technical solution of this application, with a simple structure and strong practicality.

[0088] In other embodiments, the number of first rotating arms can be set to three, four, or more. It is understood that as the number of first rotating arms increases, the operating speed of the surface mount assembly also increases, thereby improving the die bonding efficiency of the chip.

[0089] Specifically, step S45 includes the following steps:

[0090] The rotation angle of the first rotating arm relative to the patch assembly is adjusted to perform coarse angle correction on the chip; wherein the angle adjustment range of the first rotating arm is ±25°;

[0091] The rotation angle of the first suction nozzle relative to the first rotating arm is adjusted to perform angle correction and fine-tuning of the chip; wherein the angle adjustment range of the first suction nozzle is ±5°.

[0092] With this setup, a priority strategy is implemented when correcting the chip angle. Specifically, the rotation angle of the first rotating arm relative to the surface mount assembly is adjusted first to perform coarse adjustment of the chip angle; then the rotation angle of the first nozzle relative to the first rotating arm is adjusted to perform fine adjustment of the chip angle. By performing coarse adjustment first and then fine adjustment, the chip angle correction efficiency is greatly improved.

[0093] As a preferred embodiment of the above, step S44 includes the following steps:

[0094] The first translational deviation data includes a first X-axis deviation value and / or a first Y-axis deviation value;

[0095] The second translational deviation data includes a second X-axis deviation value and / or a second Y-axis deviation value;

[0096] The first X-axis deviation value is subtracted from the second X-axis deviation value to obtain the third X-axis deviation value; the material strip is then corrected on the X-axis based on the third X-axis deviation value.

[0097] The first Y-axis deviation value is subtracted from the second Y-axis deviation value to obtain the third Y-axis deviation value; the Y-axis correction of the material strip is performed based on the third Y-axis deviation value.

[0098] This setup refines the first and second translational deviation data into X and Y axis components, and uses the difference method to calculate the third translational deviation data (third X-axis deviation value and third Y-axis deviation value) as the basis for correction. This method decouples the calculation of material tape error and chip error, avoiding overcompensation or undercompensation caused by simple superposition.

[0099] Understandably, if the first X-axis deviation of the material strip is 1mm and the second X-axis deviation of the chip is 1mm, by subtracting the first X-axis deviation from the second X-axis deviation, we can obtain a third X-axis deviation of 0mm. This indicates that both the material strip and the chip have X-axis deviations and their values ​​and directions are the same. Therefore, it can be considered that the material strip and the chip have synchronous deviations, so that the total deviation between them is zero, and there is no need to perform X-axis correction on the material strip and the chip.

[0100] As a preferred embodiment of the above, step S30 includes the following steps:

[0101] Step S31: Obtain the adhesive path coordinates of the adhesive spraying assembly using a correction camera; wherein the correction camera employs FPGA image processing technology;

[0102] Step S32: Transmit the adhesive path coordinates to the adhesive spraying assembly to dynamically adjust the adhesive spraying path of the adhesive spraying assembly.

[0103] With this setup, when the conveyor belt passes through the glue spraying assembly, the correction camera continuously captures images to generate the glue path coordinates of the assembly. This glue path coordinate data is then directly connected to the glue spraying assembly, allowing for dynamic adjustment of the glue spraying path. Because the glue path coordinate data is directly transmitted to the glue spraying assembly, the traditional "photograph → calculation → compensation" process is eliminated, achieving a WYSIWYG (What You See Is What You Get) solution. This avoids incoming material / compensation errors, overcoming the visual latency bottleneck and eliminating the algorithm compensation step, resulting in a simultaneous improvement in positioning accuracy and speed. Research shows that using this mechanism, processing latency has been reduced from the traditional 20ms to 100μs, achieving a significant improvement.

[0104] FPGA image processing technology uses FPGAs (Field-Programmable Gate Arrays) for image acquisition, preprocessing, analysis, or output. By hard-coding image algorithms that were originally run by CPUs / GPUs into parallel hardware circuits and running them on FPGAs, it achieves microsecond-level latency, parallel pipelines, low power consumption, and online upgradeability.

[0105] As a preferred embodiment of the above, the following steps are included before step S30:

[0106] Step S33: Monitor the tension of the first strip using the first photoelectric array;

[0107] Step S34: Determine whether the tension of the first material strip is within the first preset tension range; if not, use the first vacuum buffer component to dynamically buffer the material strip;

[0108] With this setup, the tension of the conveyor belt is detected by the first photoelectric array before the glue spraying operation. When the tension of the conveyor belt does not meet the first preset tension range, for example, when the conveyor belt is too loose, the first vacuum buffer component is used to dynamically buffer the conveyor belt.

[0109] As a preferred embodiment of the above, before step S50, the following steps are included:

[0110] Step S51: Monitor the tension of the second strip using the second photoelectric array;

[0111] Step S52: Determine whether the current position of the second strip is within the second preset tension range; if not, use the second vacuum buffer component to dynamically buffer the strip.

[0112] With this setup, the running tension of the material belt is detected by the second photoelectric array before the curing operation. When the running tension of the material belt does not meet the second preset tension range, for example, when the material belt is too loose, the material belt is dynamically buffered by the second vacuum buffer component.

[0113] The first and second vacuum buffer components have identical structures and can instantly absorb or release the material strip without stopping the machine or causing it to break. This dynamically compensates for speed differences and tension fluctuations between the preceding and following processes, ensuring that all stations, including spraying, bonding, and curing, are always in a controllable "position-tension" dual closed-loop state. Since the vacuum buffer components are existing technology, their structure will not be described in detail in this application.

[0114] As a preferred embodiment of the above embodiments, the curing assembly includes an upper hot press head and a lower hot press head; step S50 includes the following steps:

[0115] Step S53: The upper hot press head descends to a position 1.5~2.5mm above the vertical height of the chip;

[0116] Step S54: The lower hot press head rises to abut against the side of the material strip away from the preset die-bonding position;

[0117] Step S55: The upper hot press head continues to descend until it contacts the chip, so that the upper hot press head and the lower hot press head are combined, and the material strip and the chip are cured using a bidirectional hot press synergistic process;

[0118] With this setup, the upper hot press head first descends to a safe height of 1.5~2.5 mm to avoid direct impact of the high-temperature press head on the chip, reducing the risk of breakage. Then, the lower hot press head supports the back of the strip, serving as a support surface for the strip during the hot pressing and curing process, ensuring that the chip and adhesive layer are evenly compressed. The bidirectional synergistic pressing of the upper and lower hot press heads eliminates strip deviation during the hot pressing and curing process, avoiding defects such as uneven curing, voids, or warping caused by strip sagging.

[0119] The upper and lower heating heads each employ independent temperature control, with the temperature difference between the actual and preset temperatures of each welding head being less than ±1℃, and the pressure difference between the actual and preset pressure values ​​of each welding head being ≤ ±0.1N. These settings improve the processing accuracy of the curing operation.

[0120] This invention also proposes a single-multi-column tag chip die bonding correction system, including a processor and a memory. The memory stores a computer program, which can be executed by the processor to implement the single-multi-column tag chip die bonding method as described in any of the above embodiments. Specific steps of the single-multi-column tag chip die bonding method can be referred to the above embodiments. Since this single-multi-column tag chip die bonding correction system adopts all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be elaborated further here.

[0121] This invention also proposes a readable storage medium storing a computer program that can be read to implement the single / multi-row tag chip die bonding method described in any of the above embodiments. The specific steps of the single / multi-row tag chip die bonding method can be referred to the above embodiments. Since this readable storage medium adopts all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be elaborated further here.

[0122] It should be noted that the single- or multi-column tag chip die bonding method, system, and other contents of the readable storage medium disclosed in this invention are prior art and will not be described in detail here.

[0123] The above are merely optional embodiments of the present invention and do not limit the patent scope of the present invention. Any application of the present invention directly or indirectly in other related technical fields is included within the patent protection scope of the present invention.

Claims

1. A single multi-row label chip die bonding method, characterized by, The method comprises the following steps: topping out the chip from a wafer disc to a turnover assembly by using a pin assembly; wherein the wafer disc performs the operation of toppling out under the condition that the angle of inclination is less than or equal to ±30°; transferring the chip to a patch assembly by using the turnover assembly; performing the operation of spraying glue on the preset die bonding position of the tape by using a glue spraying assembly; attaching the chip to the preset die bonding position of the tape by using the patch assembly; performing the operation of curing the tape and the chip by using a curing assembly; in the step of attaching the chip to the preset die bonding position of the tape by using the patch assembly, the method comprises the following steps: comparing the current tape position of the tape with the preset tape position to obtain first translation deviation data of the tape; comparing the first current chip position of the chip with the preset chip position to obtain second translation deviation data and angle deviation data of the chip; combining the first translation deviation data and the second translation deviation data to obtain third translation deviation data; performing translation correction on the tape according to the third translation deviation data; performing angle correction on the chip according to the angle deviation data.

2. The single multi-row tag chip die bonding method according to claim 1, wherein: in the step of performing translation correction on the tape according to the third translation deviation data, the method comprises the following steps: performing translation correction on the tape by using a tape pulling correction assembly; and the tape comprises a plurality of columns of preset die bonding positions arranged along the Y-axis direction, and the tape pulling correction assembly can perform Y-axis direction translation on the tape to realize multi-column label chip die bonding operation.

3. The single multi-row tag chip die bonding method according to claim 1, wherein: the patch assembly comprises at least one first rotating arm, and the patch assembly can drive the first rotating arm to rotate to a first patch station, a second patch station and a third patch station; the end of the first rotating arm is provided with a first suction nozzle, the first suction nozzle is used for vacuum adsorbing the chip, and the first suction nozzle can rotate axially relative to the first rotating arm; in the step of attaching the chip to the preset die bonding position of the tape by using the patch assembly, the method further comprises the following steps: the first rotating arm rotates to the first patch station, and the first rotating arm receives the chip from the turnover assembly; the first rotating arm rotates to the second patch station, and the steps of obtaining the second translation deviation data and the angle deviation data of the chip and the step of performing angle correction on the chip according to the angle deviation data are performed; the first rotating arm rotates to the third patch station, and the step of attaching the chip to the preset die bonding position of the tape by using the patch assembly is performed.

4. The single multi-row tag chip die bonding method according to claim 3, wherein: in the step of performing angle correction on the chip according to the angle deviation data, the method comprises the following steps: adjusting the rotation angle of the first rotating arm relative to the patch assembly to coarsely adjust the angle of the chip; wherein the angle adjustment range of the first rotating arm is ±25°; adjusting the rotation angle of the first suction nozzle relative to the first rotating arm to finely adjust the angle of the chip; wherein the angle adjustment range of the first suction nozzle is ±5°.

5. The single multi-row tag chip die bonding method according to claim 1, wherein: in the step of performing translation correction on the tape according to the third translation deviation data, the method comprises the following steps: The first translation deviation data includes a first X-axis deviation value and / or a first Y-axis deviation value; The second translation deviation data includes a second X-axis deviation value and / or a second Y-axis deviation value; The first X-axis deviation value is subtracted from the second X-axis deviation value to obtain a third X-axis deviation value; and the tape is corrected in the X-axis according to the third X-axis deviation value; And / or, the first Y-axis deviation value is subtracted from the second Y-axis deviation value to obtain a third Y-axis deviation value; and the tape is corrected in the Y-axis according to the third Y-axis deviation value.

6. The single multi-row tag chip die bonding method according to claim 1, wherein: In the step of performing glue spraying on the preset die bonding position of the tape by using the glue spraying assembly, the following steps are included: The glue track coordinates of the glue spraying assembly are obtained by a correction camera; wherein the correction camera adopts FPGA image processing technology; The glue track coordinates are transmitted to the glue spraying assembly to dynamically adjust the glue spraying path of the glue spraying assembly.

7. The single multi-row tag chip die bonding method according to claim 1, wherein: Before the step of performing glue spraying on the preset die bonding position of the tape by using the glue spraying assembly, the following steps are included: The first tape tension of the tape is monitored by using a first electric eye array; It is judged whether the current position of the first tape is within a first preset tension range; if not, the tape is dynamically buffered by using a first vacuum buffer assembly; And / or, before the step of performing curing operation on the tape and the chip by using the curing assembly, the following steps are included: The second tape tension of the tape is monitored by using a second electric eye array; It is judged whether the current position of the second tape is within a second preset tension range; if not, the tape is dynamically buffered by using a second vacuum buffer assembly.

8. The single multi-row tag chip die bonding method according to claim 1, wherein: The curing assembly includes an upper hot press head and a lower hot press head; in the step of performing curing operation on the tape and the chip by using the curing assembly, the following steps are included: The upper hot press head is lowered to a vertical height of 1.5-2.5 mm away from the chip; The lower hot press head is raised to abut against one side of the tape away from the preset die bonding position; The upper hot press head is continuously lowered to contact the chip, so that the upper hot press head and the lower hot press head are combined to perform curing operation on the tape and the chip by using a bidirectional hot pressing cooperative process; Wherein, each soldering head in the upper hot press head and the lower hot press head independently controls temperature, the temperature difference between the actual temperature value and the preset temperature value of each soldering head is less than ±1℃, and the pressure difference between the actual pressure value and the preset pressure value of each soldering head is less than or equal to ±0.1N.

9. A single multi-row label chip die bonding correction system comprising a processor and a memory having stored therein a computer program, wherein, The computer program can be executed by a processor to implement the single / multi-column label chip die bonding method of any one of claims 1-8.

10. A readable storage medium, storing a computer program, characterized in that, The computer program can be read to implement the single / multi-column label chip die bonding method of any one of claims 1-8.

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