Circuit board and manufacturing method thereof

Abstract

A circuit board comprises a glass substrate, a circuit layer, an electronic element, a first layer-adding structure and a second layer-adding structure. The glass substrate has a first surface and a second surface which are opposite to each other, and a conductive through hole communicating the first surface and the second surface. The melting point of the glass substrate is below 600 DEG C and is greater than the temperature of the soldering tin. The circuit layer and the electronic element are arranged in the glass substrate, the first layer-adding structure is arranged on the first surface and electrically connected with the conductive through hole, and the second layer-adding structure is arranged on the second surface and electrically connected with the conductive through hole. The circuit board can improve the product yield.

Description

TECHNICAL FIELD

[0001] The present application relates to a circuit board and a manufacturing method thereof, and more particularly to a circuit board including a glass substrate and a manufacturing method thereof. BACKGROUND

[0002] Glass substrate has good chemical stability, thermal stability, high flatness and high mechanical strength, so it is one of the choices for application in circuit board. However, at present, in the process of making conductive vias on glass substrate to realize electrical connection or making openings to embed components, there are problems such as large aperture and easy to produce cracks or breakage. In addition, with the trend of miniaturization of embedded components and circuit boards, the technical difficulty of applying glass substrate to circuit board is further increased, resulting in a decrease in product yield. SUMMARY

[0003] At least one embodiment of the present application provides a circuit board including a glass substrate, which can improve the product yield.

[0004] At least another embodiment of the present application provides a manufacturing method of the above-mentioned circuit board to help improve the product yield of the above-mentioned circuit board.

[0005] A circuit board provided by at least one embodiment of the present application includes a glass substrate, a circuit layer, an electronic component, a first build-up structure and a second build-up structure. The glass substrate has a first surface, a second surface and a conductive via connecting the first surface and the second surface, and the melting point of the glass substrate is below 600℃ and greater than the temperature of solder. The circuit layer is disposed in the glass substrate, the electronic component is disposed in the glass substrate, the first build-up structure is disposed on the first surface and electrically connected to the conductive via, and the second build-up structure is disposed on the second surface and electrically connected to the conductive via.

[0006] In at least one embodiment of the present application, the material of the glass substrate includes lead glass.

[0007] In at least one embodiment of the present application, the melting point of the circuit layer is above 1000℃.

[0008] In at least one embodiment of the present application, the electronic component is a passive component.

[0009] In at least one embodiment of the present application, the material of the passive component includes glass glaze.

[0010] In another embodiment of the present disclosure, a method for manufacturing a circuit board includes forming a first circuit layer on a release substrate. After forming the first circuit layer on the release substrate, the release substrate is disposed in a first mold. After disposing the release substrate in the first mold, a first molten glass material is poured into the first mold. The first molten glass material is annealed to form an initial glass substrate. After annealing the first molten glass material to form the initial glass substrate, the first mold is removed. A second circuit layer is formed on the initial glass substrate. After forming the second circuit layer on the initial glass substrate, an electronic component is mounted on the second circuit layer. After mounting the electronic component on the second circuit layer, the release substrate is disposed in a second mold. After disposing the release substrate in the second mold, a second molten glass material is poured into the second mold. The second molten glass material is annealed to form a glass substrate, the glass substrate having a melting point greater than a temperature of solder. After annealing the second molten glass material to form the glass substrate, the second mold and the release substrate are removed.

[0011] In another embodiment of the present disclosure, the method for manufacturing a circuit board further includes forming a first build-up structure and a second build-up structure on a first surface and a second surface opposite to the first surface of the glass substrate, respectively, after removing the second mold and the release substrate.

[0012] In another embodiment of the present disclosure, an annealing temperature for annealing the first molten glass material to form the initial glass substrate and an annealing temperature for annealing the second molten glass material to form the glass substrate are 500°C to 600°C.

[0013] In another embodiment of the present disclosure, an annealing time for annealing the first molten glass material to form the initial glass substrate and an annealing time for annealing the second molten glass material to form the glass substrate are 30 minutes to 60 minutes.

[0014] In another embodiment of the present disclosure, a cooling rate after annealing the first molten glass material to form the initial glass substrate and a cooling rate after annealing the second molten glass material to form the glass substrate are 5°C to 10°C per hour.

[0015] In another embodiment of the present disclosure, the step of mounting the electronic component on the second circuit layer includes injecting an electrically connecting material between the electronic component and the second circuit layer and curing the electrically connecting material.

[0016] In another embodiment of the present disclosure, a curing temperature for curing the electrically connecting material is 180°C to 220°C, and a curing time for curing the electrically connecting material is 5 minutes to 30 minutes. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1is a partial cross-sectional view of a circuit board according to at least one embodiment of the present invention.

[0018] Figures 2A to 2I is a partial cross-sectional view of a circuit board according to at least one embodiment of the present invention at different process stages.

[0019] Figure 3 is Figure 2C is a partial top view of the region A in

[0020] Figure 4 is Figure 2E is an enlarged view of the region A in DETAILED DESCRIPTION

[0021] In the following detailed description of embodiments of the application, the size of the elements, including the size of the layers, films, substrates, and regions, are exaggerated in the figures shown for illustrative purposes and are placed relative to one another, but are not necessarily drawn to scale. Therefore, the remarks that follow are made in connection with the preferred embodiments of the application as described, illustrated and so far as can be considered typical of those in which one of ordinary skill in the art could practice the application without undue experimentation. The examples set forth herein are intended to demonstrate specific embodiments of the application and are not intended to limit the scope of the application. Numerous modifications and adaptations thereof will be apparent to those skilled in the art without departing from the spirit and scope of the application.

[0022] Second, the use of relative terms, such as "approximately," "about," or "substantially" in connection with a given value or range of values, is intended to convey that exact numerical precision is not necessarily required for the value or range of values. Such terms encompass minor variations (e.g., tolerances, measurement error, and the like) that can be introduced by manufacturing processes, system limitations, or other factors. For example, two objects (e.g., a planar surface or a trace on a substrate) are "substantially parallel" or "substantially perpendicular" to one another, meaning that the objects can be parallel or perpendicular to one another within a range of acceptable deviations.

[0023] Spatially relative terms, such as "under", "below", "lower", "above", "upper", and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. For example, if a device described is turned over, elements described as "under" or "below" other elements or features would then be oriented "above" the other elements or features. The spatially relative terms can therefore, encompass the various

[0024] It should be understood that, although the terms "first", "second", "third" and the like can be used herein to describe various elements or features, these elements or features should not be limited by these terms. These terms are only used to distinguish one element or feature from another. In addition, the term "or" as used herein should be interpreted as possibly containing any one or more of the associated listed items.

[0025] Although the manufacturing method is described in the present application by a series of operations or steps, the order shown by these operations or steps should not be interpreted as a limitation of the present application. For example, some operations or steps can be performed in a different order and / or simultaneously with other steps. In addition, each operation or step described herein can include multiple sub-steps or actions.

[0026] In addition, the present application can be implemented or applied by other different embodiments, and the details of the present application can be combined, modified and changed in various embodiments without departing from the concept of the present application.

[0027] Figure 1 is a schematic diagram of a partial cross-section of a circuit board according to at least one embodiment of the present application. Referring to Figure 1 , the circuit board 10 includes a glass substrate 100, a circuit layer 200, an electronic component 300, a first build-up structure 400 and a second build-up structure 500. The glass substrate has a first surface S1, a second surface S2 and a conductive via T connecting the first surface S1 and the second surface S2, and the melting point of the glass substrate 100 is below 600°C.

[0028] The circuit layer 200 is disposed in the glass substrate 100, the electronic component 300 is disposed in the glass substrate 100, the first build-up structure 400 is disposed on the first surface S1 and electrically connected to the conductive via T, and the second build-up structure 500 is disposed on the second surface S2 and electrically connected to the conductive via T.

[0029] By using a glass material with a lower melting point, the above-mentioned glass material in a molten state can be formed on the circuit layer 200 after the formation of the circuit layer 200 and covering the electronic component 300, and the glass substrate 100 with a melting point below 600°C is formed after annealing and solidification. Therefore, the conductive via for electrical connection or the opening for embedding the component can be formed without etching, mechanical processing or laser drilling, avoiding cracks or breakage of the glass substrate, thereby improving the product yield.

[0030] In some embodiments, the melting point of the glass substrate 100 is greater than the temperature of the solder, for example, the melting point of the glass substrate 100 is greater than 220 °C. The material of the glass substrate 100 includes lead glass, for example, the melting point of the lead glass is 530 °C. The melting point of the circuit layer 200 is greater than 1000 °C, and the material of the circuit layer 200 can include copper or other alloy metals. The electronic element 300 can be a passive element, for example, a capacitor or a resistor, and the material of the passive element can include high-temperature-resistant materials, for example, glass glaze.

[0031] Through the above material selection, the annealing temperature of the glass substrate 100 is not too high, which can avoid affecting the circuit layer 200 and the electronic element 300, thereby improving the product yield. In addition, the conductive via T can include a conductive pillar, and the first build-up structure 400 and the second build-up structure 500 can include Ajinomoto Build-up Film (ABF).

[0032] For example, the thickness of the glass substrate 100 is about 40 microns, the depth of the conductive via T is greater than 40 microns, the line width to line spacing ratio (L / S) of the circuit layer 200 is greater than 30 / 30 microns, and the thickness of the electronic element 300 is not greater than 12 microns, for example, can be 8 to 12 microns, but the present application is not limited thereto. In addition, the glass substrate 100 can be applied to Ball Grid Array (BGA) packaging or Embedded Multi-Die Interconnect Bridge (EMIB) packaging, but the present application is not limited thereto.

[0033] Figures 2A to 2I is a partial cross-sectional view of a circuit board in different process stages of at least one embodiment of the present application. Please refer to Figure 2A , a first circuit layer 201 is formed on a release substrate R. In some embodiments, the release substrate R can include a tearable copper foil.

[0034] Please refer to Figure 2B , after the first circuit layer 201 is formed on the release substrate R, the release substrate R is disposed in a first mold M1. After the release substrate R is disposed in the first mold M1, a first molten glass material G1 is poured into the first mold M1.

[0035] Please refer to Figure 2C , the first molten glass material G1 is annealed to form an initial glass substrate 100'. After the first molten glass material G1 is annealed to form the initial glass substrate 100', the first mold M1 is removed. A second circuit layer 202 is formed on the initial glass substrate 100'. In some embodiments, the materials of the first circuit layer 201 and the second circuit layer 202 can include metals, for example, copper. The first circuit layer 201 and the second circuit layer 202 can be formed by an electroplating process.

[0036] Please refer to Figure 2D and Figure 2E After forming the second circuit layer 202 on the initial glass substrate 100', the electronic component 300 is fixed on the second circuit layer 202. In some embodiments, the step of fixing the electronic component 300 on the second circuit layer 202 includes injecting and curing the electrically connecting material C between the electronic component 300 and the second circuit layer 202.

[0037] Figure 3 is Figure 2C a partial top view of Figure 3 . Please refer to Figure 2C , the top view shape of the second circuit layer 202 corresponding to the electronic component 300 is a U-shaped type with two openings opposite, and the Figure 2D is a metal wall with a height, which can avoid the electronic component 300 from being offset when the second molten glass material G2 is injected later. In addition, as shown in , the distance D of the aforementioned metal wall is greater than the width W of the electronic component 300, so that there is a gap between the aforementioned metal wall and the electronic component 300.

[0038] Figure 4 is Figure 2E an enlarged view of the region A in Figure 4 . In detail, as shown in , the electrically connecting material C is injected in the aforementioned gap and the electrically connecting material C is cured. In some embodiments, the electrically connecting material C can include metal, such as copper paste. The baking temperature of the cured electrically connecting material C can be 180°C to 220°C, and the baking time of the cured electrically connecting material C can be 5 minutes to 30 minutes.

[0039] Figure 2F Please refer to , after fixing the electronic component 300 on the second circuit layer 202, the release substrate R is arranged in the second mold M2. After arranging the release substrate R in the second mold M2, the second molten glass material G2 is injected in the second mold M2.

[0040] Figure 2G Please refer to , the second molten glass material G2 is annealed to form a glass substrate 100, which includes the initial glass substrate 100' and the circuit layer 200 includes the first circuit layer 201 and the second circuit layer 202. In some embodiments, the melting point of the glass substrate 100 is greater than the temperature of the solder, and the first molten glass material G1 and the second molten glass material G2 can include a glass material with a melting point of 600°C or less, such as a lead glass material with a melting point of 530°C.

[0041] The annealing temperature of the first and second molten glass materials G1 and G2 can be 500 to 600 °C, the annealing time of the first and second molten glass materials G1 and G2 can be 30 to 60 minutes, and the cooling rate of the first and second molten glass materials G1 and G2 after annealing to room temperature can be 5 to 10 °C per hour. The aforementioned annealing process conditions can be applied to form a substrate with a thinner thickness, and the annealing process is full-surface annealing and remains flat, avoiding bending or deformation caused by gravity.

[0042] Referring to Figure 2H and Figure 2I After annealing the second molten glass material G2 to form the glass substrate 100, the second mold M2 and the release substrate R are removed, and the glass substrate 100 has a first surface S1 and a second surface S2 opposite the first surface S1.

[0043] Next, after removing the second mold M2 and the release substrate R, a first build-up structure 400 and a second build-up structure 500 are respectively formed on the first surface S1 and the second surface S2 of the glass substrate 100, as shown in Figure 1 .

[0044] In addition, polishing, such as chemical-mechanical polishing (CMP), can be performed after removing the first mold M1, removing the second mold M2, and removing the release substrate R. In some embodiments, the thickness of the initial glass substrate 100' can be 20 microns after removing the first mold M1 and performing polishing. The thickness of the glass substrate 100 can be 40 microns after removing the second mold M2, the release substrate R, and performing polishing.

[0045] In summary, in the circuit board and the manufacturing method thereof according to at least one embodiment of the present application, by using a glass material with a lower melting point, the glass material in a molten state can be formed on the circuit layer after the circuit layer is formed and covers the electronic components, and a glass substrate is formed after annealing and solidification. Therefore, it is not necessary to form conductive vias for electrical connection or openings for embedding components by etching, mechanical processing, or laser drilling, thereby avoiding cracks or breakage of the glass substrate and improving product yield.

[0046] Although the present application has been disclosed with reference to the embodiments above, it is not intended to limit the present application, and those skilled in the art can make some changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application is defined by the appended claims.

[0047]

Symbol Description

[0048] 10: circuit board

[0049] 100: glass substrate

[0050] 100’: initial glass substrate

[0051] 200: circuit layer

[0052] 201: first circuit layer

[0053] 202: second circuit layer

[0054] 300: electronic element

[0055] 400: first build-up structure

[0056] 500: second build-up structure

[0057] A: area

[0058] C: electrically connecting material

[0059] D: distance

[0060] G1: first molten glass material

[0061] G2: second molten glass material

[0062] M1: first mold

[0063] M2: second mold

[0064] R: release substrate

[0065] S1: first surface

[0066] S2: second surface

[0067] T: conductive via

[0068] W: width

Claims

1. A circuit board, characterized by, Comprising: a glass substrate having a first surface, a second surface opposite to the first surface, and a conductive via connecting the first surface and the second surface, wherein the glass substrate has a melting point of 600℃ or less and greater than a temperature of solder; a circuit layer disposed in the glass substrate; an electronic component disposed in the glass substrate; a first build-up structure disposed on the first surface and electrically connected to the conductive via; and a second build-up structure disposed on the second surface and electrically connected to the conductive via. The material of the glass substrate comprises lead glass.

2. The circuit board of claim 1, wherein The circuit layer has a melting point of 1000℃ or more.

3. The circuit board of claim 1, wherein The electronic component is a passive component.

4. The circuit board of claim 1, wherein The material of the passive component comprises glass frit.

5. The circuit board of claim 4, wherein Comprising:

6. A method of manufacturing a circuit board, characterized by, forming a first circuit layer on a release substrate; after forming the first circuit layer on the release substrate, disposing the release substrate in a first mold; after disposing the release substrate in the first mold, pouring a first molten glass material in the first mold; annealing the first molten glass material to form an initial glass substrate; after annealing the first molten glass material to form the initial glass substrate, removing the first mold; forming a second circuit layer on the initial glass substrate; after forming the second circuit layer on the initial glass substrate, mounting an electronic component on the second circuit layer; after mounting the electronic component on the second circuit layer, disposing the release substrate in a second mold; after disposing the release substrate in the second mold, pouring a second molten glass material in the second mold; annealing the second molten glass material to form a glass substrate, wherein the glass substrate has a melting point greater than a temperature of solder; and after annealing the second molten glass material to form the glass substrate, removing the second mold and the release substrate. Further comprising:

7. The method of manufacturing a circuit board according to claim 6, wherein after removing the second mold and the release substrate, forming a first build-up structure on a first surface of the glass substrate and a second build-up structure on a second surface of the glass substrate opposite to the first surface, respectively. The annealing temperature for annealing the first molten glass material to form the initial glass substrate and the annealing temperature for annealing the second molten glass material to form the glass substrate is 500℃ to 600℃.

8. The method of manufacturing a circuit board according to claim 6, wherein The annealing time for annealing the first molten glass material to form the initial glass substrate and the annealing time for annealing the second molten glass material to form the glass substrate is 30 minutes to 60 minutes.

9. The method of manufacturing a circuit board according to claim 6, wherein The cooling rate after annealing the first molten glass material to form the initial glass substrate and the cooling rate after annealing the second molten glass material to form the glass substrate is 5℃ to 10℃ per hour.

10. The method of manufacturing a circuit board according to claim 6, wherein The step of mounting the electronic component on the second circuit layer comprises:

11. The method of manufacturing a circuit board according to claim 6, wherein injecting an electrical connection material between the electronic component and the second circuit layer; and curing the electrical connection material. The curing temperature for curing the electrical connection material is 180℃ to 220℃, and the curing time for curing the electrical connection material is 5 minutes to 30 minutes.

12. The method of manufacturing a circuit board according to claim 11, wherein ​

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