Epitaxial wafer, SOI wafer, and method for manufacturing same

Abstract

Provided is an epitaxial wafer having a silicon epitaxial film on a silicon single crystal substrate having a resistivity of 10 [Omega] * cm or more and 5000 [Omega] * cm or less, the epitaxial wafer being characterized in that the concentration of carbon atoms in the silicon epitaxial film is 5 * 1017 atoms / cm < 3 > or more and less than 2 * 1019 atoms / cm < 3 >, and carbon defects are formed in the silicon epitaxial film. As a result, provided are: an epitaxial wafer and an SOI wafer which can be manufactured with a small number of steps without using a high-resistivity substrate, are easy to process, and more reliably reduce harmonics; and a method for manufacturing the epitaxial wafer and the SOI wafer.

Description

TECHNICAL FIELD

[0001] The present application relates to an epitaxial wafer and an SOI (Silicon-On-Insulator) wafer and a manufacturing method thereof. BACKGROUND

[0002] In recent years, there is a high demand for large-capacity communication, and development of instruments suitable for the fifth and sixth generation mobile communication systems (commonly known as 5G and 6G) is accelerating. Integrated circuits are installed in these communication instruments, and it is required that active elements (transistors, etc.) and passive elements (inductors, etc.) constituting the integrated circuits have a high degree of operational stability in the 5G and 6G environment. In particular, in these large-capacity communication systems, a high frequency band (millimeter wave to sub-terahertz band) is expected to be used, and therefore there is a public demand for device design and material development that take into account both excellent high-frequency characteristics and power saving performance.

[0003] Here, if we focus on the materials required for semiconductor integrated circuits, as a substrate for high-frequency integrated circuits, a silicon wafer made by the CZ (Czochralski) method is sometimes used. Based on the purpose of achieving a small resistance loss and good high-frequency characteristics, the silicon wafer used at this time needs to improve the substrate resistivity. Further, in applications that require more excellent high-frequency characteristics, a wafer formed with a trap-rich layer is often used as described in Patent Literature 1 and Patent Literature 2. This is because it is known that when a high-frequency signal is input to a device formed on a high-resistivity substrate, a phenomenon occurs in which a reversal layer is formed in the substrate to cause a change in resistivity, and by trapping carriers generated in the reversal layer at a deeper energy level of the trap-rich layer, a higher substrate resistivity can be maintained.

[0004] In particular, for passive elements, a wafer in which a polysilicon layer is formed on a high-resistivity substrate as a trap-rich layer is used. In contrast, active elements widely use SOI wafers having a trap-rich layer. In the structure of such an SOI wafer, a polysilicon layer as a trap-rich layer, an oxide film as a dielectric layer, and a single-crystal silicon layer are sequentially stacked on a high-resistivity substrate.

[0005] However, the manufacturing of a high-resistivity substrate such as 10,000 Ω·cm, which is widely used as a substrate for high-frequency integrated circuits, has a high technical difficulty in controlling the resistivity and poor productivity. In addition, the polysilicon used as the trap-rich layer has a high processing difficulty and causes deterioration of productivity, and the manufacturing process of the SOI structure using polysilicon as the trap-rich layer is complicated, posing a huge problem in terms of cost. Therefore, for a wafer in which a silicon epitaxial film is formed on a silicon single-crystal substrate without using a high-resistivity substrate, development of a technology that exhibits excellent high-frequency characteristics, particularly reduction of harmonics, has been sought.

[0006] Prior Art Documents

[0007] Patent Literature

[0008] Patent Literature 1: Japanese Patent Application Laid-Open No. 2015-503853

[0009] Patent Literature 2: Japanese Patent Application Laid-Open No. 2019-129195

[0010] Patent Literature 3: Japanese Patent Application Laid-Open No. 2009-164590 SUMMARY

[0011] (1) Technical Problem to be Solved

[0012] As described above, it is sought to reduce harmonics even if a high-resistivity substrate is not used as a substrate for an integrated circuit for high frequencies, and to replace an epitaxial wafer and an SOI wafer in which a polysilicon layer is used as a trap-rich layer. In order to develop a material that satisfies the above requirements, the inventors found that an epitaxial wafer in which a silicon epitaxial film containing carbon at a high concentration is formed on a general-resistivity substrate, and an SOI wafer using such an epitaxial wafer, are promising. Thus, it is possible to provide a substrate for an integrated circuit for high frequencies, which can be manufactured with a small number of steps and is easy to process.

[0013] However, the above-mentioned wafer is still inferior to a conventional wafer in which a polysilicon layer is used as a trap-rich layer in terms of the ability to reduce harmonics, and thus it is still urgent to develop a wafer that exhibits more excellent high-frequency characteristics.

[0014] The present application has been achieved in view of the above-mentioned problems, and aims to provide an epitaxial wafer and an SOI wafer, and a method for manufacturing the same, which do not use a high-resistivity substrate, can be manufactured with a small number of steps and are easy to process, and further reliably reduce harmonics.

[0015] (2) Technical Solution

[0016] In order to solve the above-mentioned technical problems, the epitaxial wafer of the present application is an epitaxial wafer having a silicon epitaxial film on a silicon single-crystal substrate having a resistivity of 10 Ω-cm or more and 5000 Ω-cm or less, in which the carbon atom concentration in the silicon epitaxial film is 5 x 10 17 atoms / cm 3 or more and less than 2 x 10 19 atoms / cm 3 , and carbon defects are formed in the silicon epitaxial film.

[0017] In such epitaxial wafers, the silicon epitaxial film containing carbon defects acts as a trap-rich layer, hindering the formation of an inversion layer. This allows the use of a silicon single crystal substrate to demonstrate excellent harmonic reduction capabilities. This eliminates the need for a high-resistivity substrate, enabling manufacturing with fewer steps and simplifying the processing.

[0018] Furthermore, such an epitaxial wafer exhibits excellent harmonic reduction capability and is therefore preferably used as a wafer for high-frequency devices.

[0019] Furthermore, the SOI wafer of the present invention preferably has a structure in which a dielectric layer and a silicon single crystal film are sequentially formed on the silicon epitaxial film of the epitaxial wafer.

[0020] With such SOI wafers, the silicon epitaxial film containing carbon defects acts as a trap-rich layer, hindering the formation of an inversion layer. This allows the use of a silicon single crystal substrate to demonstrate excellent harmonic reduction capabilities. This eliminates the need for a high-resistivity substrate, enabling manufacturing with fewer steps and simplifying the processing.

[0021] Furthermore, such an SOI wafer exhibits excellent harmonic reduction capability and is therefore preferably used as a wafer for high-frequency devices.

[0022] Furthermore, the method for producing an epitaxial wafer of the present invention is preferably: under reduced pressure, the carbon atom concentration is set to 5×10 17 atoms / cm 3 More than and less than 2×10 19 atoms / cm 3 A silicon epitaxial film is vapor-grown on a silicon single crystal substrate having a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less, and then heat-treated at a temperature of 900°C or more and 1100°C or less and for 1 hour or more and 36 hours or less, thereby forming carbon defects in the silicon epitaxial film.

[0023] This method of manufacturing an epitaxial wafer can easily manufacture an epitaxial wafer exhibiting excellent harmonic reduction capabilities. Furthermore, since a high-resistivity substrate is not required, the method can be manufactured with a reduced number of steps and simplified processing.

[0024] Furthermore, since epitaxial wafers manufactured by such methods exhibit excellent harmonic reduction capabilities, they are preferably manufactured as wafers for high-frequency devices.

[0025] Here, by performing heat treatment on the above-described epitaxial wafer having a carbon atom concentration, more excellent harmonic characteristics can be achieved by the effect of the silicon epitaxial film having carbon defects. The reason for this is considered to be that the formation of carbon defects in the silicon epitaxial film by heat treatment forms a deep energy level, and the function as a rich trap layer is improved, thereby hindering the formation of an inversion layer. Therefore, the epitaxial wafer of the present application is suitable for a wafer for a high-frequency device.

[0026] Further, the method of manufacturing an SOI wafer preferably manufactures the epitaxial wafer by the method, and bonds the silicon epitaxial film of the epitaxial wafer to a silicon single crystal substrate on which a dielectric layer is formed on a surface via the dielectric layer.

[0027] If it is such a method of manufacturing an SOI wafer, an SOI wafer exhibiting excellent harmonic reduction capability can be easily manufactured. Further, it is not necessary to use a high-resistivity substrate, and thus the manufacturing can be performed with a smaller number of processes and the processing steps can be easily performed.

[0028] Further, since the SOI wafer manufactured by such a method exhibits excellent harmonic reduction capability, it is preferably manufactured as a wafer for a high-frequency device.

[0029] (Three) Advantageous Effects

[0030] The epitaxial wafer of the present application having a silicon epitaxial film having carbon defects can greatly reduce harmonics by the effect of the silicon epitaxial film. The reason for this is considered to be that the silicon epitaxial film having carbon defects functions as a rich trap layer and hinders the formation of an inversion layer. Further, the SOI wafer of the present application having a silicon epitaxial film having carbon defects also exhibits excellent harmonic reduction capability by the effect of the silicon epitaxial film. The method of manufacturing an epitaxial wafer and the method of manufacturing an SOI wafer of the present application can easily manufacture the above-described epitaxial wafer and SOI wafer exhibiting excellent harmonic reduction capability.

[0031] In particular, even in the case of using a general resistivity silicon single crystal substrate, excellent harmonic reduction capability can be exhibited, and thus it is not necessary to use a high-resistivity substrate, and the manufacturing can be performed with a smaller number of processes and the processing steps can be easily performed. BRIEF DESCRIPTION OF DRAWINGS

[0032] Figure 1 A flowchart showing one example of the method of manufacturing an epitaxial wafer of the present application.

[0033] Figure 2 A flowchart showing one example of the method of manufacturing an SOI wafer of the present application.

[0034] Figure 3 The carbon atom concentration of Experimental Example 1 was 7.0 x 10 18 atoms / cm 3A planar TEM (transmission electron microscope) image of the interface between the silicon epitaxial film and the substrate is shown.

[0035] Figure 4 The carbon atom concentration of Experimental Example 1 is 7.0×10 18 atoms / cm 3 A cross-sectional TEM image of the interface between the silicon epitaxial film and the substrate.

[0036] Figure 5 The carbon atom concentration of Experimental Example 1 is 2.0×10 19 atoms / cm 3 A planar TEM image of the interface between the silicon epitaxial film and the substrate.

[0037] Figure 6 The lifetime measurement results of the epitaxial wafers of Experimental Examples 1 and 2 are shown.

[0038] Figure 7 Graph showing the relationship between the second harmonic characteristics and the carbon atom concentration of the epitaxial wafers of Experimental Examples 1 and 2. DETAILED DESCRIPTION

[0039] Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

[0040] As described above, in response to demands for miniaturization, power saving, and cost reduction of communication equipment, an epitaxial wafer that further improves high-frequency characteristics, and in particular reduces harmonics, is being sought.

[0041] The inventors of this application have conducted in-depth research on this technical problem. First, under reduced pressure, a silicon and carbon-containing gas atmosphere (such as monomethylsilane gas or trimethylsilane gas) is used to form a silicon single crystal substrate with a thickness of 0.5 to 5.5 μm and a carbon atomic concentration of 5×10 17 atoms / cm 3 More than and less than 2×10 19 atoms / cm 3 The researchers then heat-treated the epitaxial wafers containing the carbon-doped silicon epitaxial film in an atmosphere at temperatures between 900°C and 1100°C to further reduce harmonics. Electrodes with a line length of 2200μm were formed on these wafers, and the second harmonics were measured. The results showed that the heat-treated wafers exhibited superior second harmonic reduction compared to the untreated samples.

[0042] Among them, it is known that if the carbon atom concentration is less than 2×10 19 atoms / cm 3In silicon epitaxial films, no defects other than carbon defects will be formed, and there is no need to worry about other types of defects in the wafer deteriorating device characteristics. On the other hand, when the carbon atom concentration is 2×10 19 atoms / cm 3 When the above is true, it is confirmed that white defects that are not carbon defects are formed by heat treatment. Based on the above, it is preferable to set the carbon atom concentration to less than 2×10 19 atoms / cm 3 .

[0043] The reason why the heat-treated sample can reduce the second harmonic more than the unheat-treated epitaxial wafer is that the carbon atom concentration in the silicon epitaxial film is 5×10 17 atoms / cm 3 More than and less than 2×10 19 atoms / cm 3 This carbon atom concentration is significantly higher than the general carbon solubility in silicon, which is 3×10 17 atoms / cm 3 Since the concentration of carbon atoms is high, it is expected that carbon defects will be formed by heat treatment. Carbon defects are formed by agglomerating carbon atoms, and deeper energy levels are newly formed in the silicon epitaxial film, resulting in a higher trap density than before heat treatment.

[0044] This indicates that forming a silicon epitaxial film containing carbon defects by heat treatment is effective as a trap-rich layer, and that this method can also be applied to trap-rich SOI wafers used as substrates for active devices.

[0045] Based on the above findings, the inventors have completed the present invention. Specifically, one embodiment of the present invention is an epitaxial wafer having a silicon epitaxial film on a silicon single crystal substrate having a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less, wherein the carbon atom concentration in the silicon epitaxial film is 5×10 17 atoms / cm 3 More than and less than 2×10 19 atoms / cm 3 , and carbon defects are formed in the silicon epitaxial film.

[0046] In addition, another embodiment of the present invention is a method for manufacturing an epitaxial wafer, characterized in that the carbon atom concentration is set to 5×10 17 atoms / cm 3 More than and less than 2×10 19 atoms / cm 3A silicon epitaxial film is grown by vapor deposition on a silicon single crystal substrate having a resistivity of 10 Ω-cm or more and 5000 Ω-cm or less, and then heat-treated at a heat treatment temperature of 900°C or more and 1100°C or less and a heat treatment time of 1 hour or more and 36 hours or less, whereby carbon defects are formed in the silicon epitaxial film.

[0047] The present application will be described in detail below with reference to the accompanying drawings, but the present application is not limited thereto.

[0048] [Epitaxial wafer and method for manufacturing the same]

[0049] An example of a method for manufacturing an epitaxial wafer of the present application will be described below with reference to the accompanying drawings. Figure 1 As described above, the method is a method for manufacturing an epitaxial wafer in which a silicon epitaxial film in which carbon defects are formed is used as a trap-rich layer.

[0050] First, a silicon single crystal substrate 1 having a resistivity of 10 Ω-cm or more and 5000 Ω-cm or less is prepared. Next, a gas containing silicon atoms and carbon atoms is supplied to the silicon single crystal substrate under reduced pressure, whereby a carbon-doped silicon epitaxial film 2 (hereinafter, carbon-doped silicon epitaxial film) having a carbon atom concentration of 5 x 10 17 atoms / cm 3 or more and less than 2 x 10 19 atoms / cm 3 is grown by vapor deposition. Then, by heat-treating an epitaxial wafer having the carbon-doped silicon epitaxial film 2, carbon defects can be formed in the silicon epitaxial film.

[0051] By growing the carbon-doped silicon epitaxial film 2 by vapor deposition under reduced pressure, the concentration of impurities other than carbon doped in the silicon epitaxial film can be reduced. The pressure at which the carbon-doped silicon epitaxial film 2 is formed is not particularly limited as long as it is under reduced pressure, and can be about 10 Torr, for example, and is preferably performed at 5 Torr or more and 20 Torr or less (10 Torr is about 1.3 kPa, and 5 Torr or more and 20 Torr or less is about 0.67 kPa or more and about 2.7 kPa or less).

[0052] As described above, the carbon doping in the vapor deposition of the carbon-doped silicon epitaxial film 2 uses a gas containing silicon atoms and carbon atoms (source gas). As the source gas, at least either one of monomethylsilane gas and trimethylsilane gas is preferably included. By using these gases, good carbon doping of the silicon epitaxial film can be easily performed. Further, as a carrier gas at the time of supplying the source gas, hydrogen, argon, or the like can be included in the atmosphere of the vapor deposition.

[0053] The carbon-doped silicon epitaxial film under reduced pressure is formed by vapor deposition at 600 to 1000°C, and the carbon-doped silicon epitaxial film 2 can be formed well.

[0054] Further, the pressure, temperature, time, raw material gas concentration, and the like of the vapor phase growth are preferably appropriately set in a manner that the thickness of the formed carbon-doped silicon epitaxial film 2 becomes a desired thickness. The upper limit and lower limit of the thickness of the carbon-doped silicon epitaxial film are not particularly limited, but can be, for example, 0.1 μm or more and 10 μm or less, in consideration of productivity and cost. If so, a sufficient high frequency characteristic can be obtained at a lower cost. Further, it can be more appropriately set to 0.5 μm or more and 5.5 μm or less, but is not limited thereto.

[0055] The method of the heat treatment after the film formation of the carbon-doped silicon epitaxial film 2 is not particularly limited, and a general heat treatment furnace for a silicon wafer or a chamber for the vapor phase growth of the carbon-doped silicon epitaxial film can be used, for example.

[0056] The lower limit of the heat treatment temperature in the heat treatment can be set to 900°C or more. By so setting, the formation of carbon defects is promoted, and the manufacturing efficiency becomes good. Further, the heat treatment time can be set to 1 hour or more. By so setting, sufficient carbon defects are formed, and the quality becomes good. The upper limit of the heat treatment temperature can be set to 1100°C or less. By so setting, the influence of the heavy metal diffusion can be suppressed. The upper limit of the heat treatment time can be set to 36 hours or less. By so setting, from the viewpoint of the manufacturing efficiency, an excellent epitaxial wafer is obtained.

[0057] In consideration of the above, the epitaxial wafer is directly put into a heat treatment furnace whose heat treatment temperature has been raised to 900°C or more and 1100°C or less, and is heat treated under conditions of a heat treatment time of 1 hour or more and 36 hours or less, whereby carbon defects are formed in the silicon epitaxial film formed by the vapor phase growth under reduced pressure. At this time, the kind of gas at the time of the heat treatment can use different gases depending on the use, and can be set to oxygen or an inactive gas such as argon, nitrogen, or the like.

[0058] By so operating, the epitaxial wafer of the present application can be manufactured. The silicon epitaxial film 3 in which carbon defects are formed by the heat treatment functions as a trap-rich layer.

[0059] wherein, if the carbon atom concentration is 5 x 10 17 atoms / cm 3 or more and less than 2 x 10 19 atoms / cm 3 , a sufficient amount of carbon defects are formed by the heat treatment, and the second harmonic is more reduced than before the heat treatment. On the other hand, when the carbon atom concentration included in the silicon epitaxial film is 2 x 10 19 atoms / cm 3 or more, defects other than carbon defects are largely formed after the heat treatment, and the quality is deteriorated.

[0060] As described above, by setting the resistivity of the silicon single crystal substrate 1 to be 10 Ω-cm or more and 5,000 Ω-cm or less, the silicon single crystal substrate 1 can be used for a high frequency device. It is particularly preferable that the high frequency characteristics be good and that the resistivity be controlled to be 1,000 Ω-cm or more and 5,000 Ω-cm or less when the crystal is manufactured.

[0061] Thus, the epitaxial wafer of the present application is suitable as a wafer for a high frequency device.

[0062] In addition, a wafer in which a carbon-doped epitaxial film is formed on a silicon single crystal substrate has been described in Patent Document 3.

[0063] Patent Document 3 describes an epitaxial film that contains carbon at a high concentration, but the assumed use is different, and the structure and manufacturing process, and the resistivity are also different. The present application assumes use in a wafer for a high frequency device, whereas Patent Document 3 assumes use mainly as an imaging device. Therefore, the wafer of the present application is a two-layer structure of a silicon single crystal substrate 1 and a silicon epitaxial film 3 in which carbon defects are formed, or an SOI structure described later. In contrast, the wafer of Patent Document 3 is manufactured as a three-layer structure of at least a silicon single crystal substrate, a carbon-doped epitaxial film, and a silicon epitaxial film. Furthermore, if the heat treatment process is considered, the present application forms the carbon-doped silicon epitaxial film 2 by vapor phase growth under reduced pressure, and then performs heat treatment, thereby manufacturing the silicon epitaxial film 3 in which carbon defects are formed. Furthermore, when an SOI structure is manufactured, the two substrates manufactured by different processes are bonded to each other. In contrast, the wafer of Patent Document 3 is characterized in that a temperature of 750°C or higher is required in the film formation process using a general epitaxial growth furnace, and does not include a heat treatment process after film formation. In addition to this, a bonding process is not required when a multi-layer structure is to be formed.

[0064] If the required resistivity is considered, the present application is characterized in that the resistivity of the silicon single crystal substrate 1 can be used widely in the range of 10 Ω-cm or more and 5,000 Ω-cm or less. In contrast, in order to improve the performance of an imaging device, the wafer of Patent Document 3 is characterized in that at least one of a silicon epitaxial base film, a carbon-doped epitaxial film, and a silicon single crystal film is a low resistivity film having a specific resistance of 1 Ω-cm or less, and the two are significantly different. Further, the wafer of Patent Document 3 does not have a function of a rich trap layer in the epitaxial film, and it is difficult to use it for a wafer for a high frequency device.

[0065] Thus, according to the embodiment of the present application, an epitaxial wafer can be provided, which is an epitaxial wafer having a silicon epitaxial film on a silicon single crystal substrate 1 having a resistivity of 10 Ω-cm or more and 5,000 Ω-cm or less, in which the carbon atom concentration in the silicon epitaxial film is 5 x 10 17 atoms / cm 3 or more and less than 2 x 10 19 atoms / cm 3, and carbon defects are formed in the silicon epitaxial film.

[0066] In addition, such epitaxial wafers are suitable as wafers for high-frequency devices.

[0067] Furthermore, according to an embodiment of the present invention, there can be provided a method for manufacturing an epitaxial wafer, characterized in that the carbon atom concentration is set to 5×10 17 atoms / cm 3 More than and less than 2×10 19 atoms / cm 3 A silicon epitaxial film is vapor-grown on a silicon single crystal substrate 1 having a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less, and then heat-treated at a temperature of 900°C or more and 1100°C or less and for a time of 1 hour or more and 36 hours or less, thereby forming carbon defects in the silicon epitaxial film.

[0068] Furthermore, a method for manufacturing an epitaxial wafer suitable as a wafer for high-frequency devices can be provided.

[0069] [SOI wafer and manufacturing method thereof]

[0070] Next, a method for manufacturing an SOI wafer is described. An example of the method for manufacturing an SOI wafer of the present invention is shown in FIG. Figure 2 .

[0071] In particular, Figure 2 Step S1 is a step of preparing an epitaxial wafer (first substrate 4) having carbon defects. Figure 1 The epitaxial wafers shown are manufactured in the same manner.

[0072] Here, the epitaxial wafer (first substrate 4 ) having the silicon epitaxial film 3 formed with carbon defects becomes a base wafer during bonding.

[0073] also, Figure 2 In step S2, a second substrate 5 other than the epitaxial wafer is prepared. The second substrate 5 can be produced as follows: first, a silicon single crystal substrate 6 is prepared, and then a dielectric layer 7 is formed on the surface thereof. As the silicon single crystal substrate 6, for example, a silicon single crystal substrate 6 having a resistivity of about 10 Ω·cm can be used, but is not limited to this. As the dielectric layer 7, an oxide film or the like can be formed. When an oxide film is formed as the dielectric layer 7, the oxide film can be formed on the entire substrate surface by thermal oxidation. The second substrate 5 becomes a bond wafer.

[0074] The resistivity of the silicon single crystal substrate 6 on which the dielectric layer 7 is formed can be determined based on the type of device to be manufactured. On the other hand, the resistivity of the silicon single crystal substrate 1 on which the carbon-doped silicon epitaxial film 2 is formed is 10 Ω·cm or more and 5000 Ω·cm or less as described above.

[0075] Figure 2 The step S1 of making the first substrate 4 and the step S2 of making the second substrate 5 can be performed in any order. Either step can be performed first, or they can be performed together.

[0076] After the first substrate 4 and the second substrate 5 are prepared as described above, Figure 2 In step S3, the silicon epitaxial film 3 with carbon defects formed thereon, which is the epitaxial wafer of the first substrate 4, is bonded (joined) to the silicon single crystal substrate 6 with the dielectric layer 7 formed on the surface of the second substrate 5 via the dielectric layer 7. In this way, the SOI wafer 8 can be manufactured.

[0077] In addition, after bonding, Figure 2 In step S4, a portion of the silicon single crystal substrate 6 on the dielectric layer 7 (e.g., oxide film) side can be thinned. This thinning can be achieved by grinding or etching the silicon single crystal substrate 6 on the dielectric layer 7 (e.g., oxide film) side, or by ion implantation and stripping, to a desired thickness depending on the application. The ion implantation and stripping method can be implemented, for example, as follows: Figure 2 Before lamination, hydrogen ions or the like are implanted from the dielectric layer 7 side of the silicon single crystal substrate 6 to form an ion implantation layer in advance within the silicon single crystal substrate 6. After lamination, peeling is performed along the ion implantation layer by heat treatment or the like. By the above method, a thin-filmed silicon single crystal film 9 (silicon single crystal film) can be obtained.

[0078] In this way, the SOI wafer 8 of the present invention can be manufactured. The SOI wafer 8 of the present invention has a structure in which a silicon epitaxial film 3 with carbon defects, a dielectric layer 7, and a silicon single crystal film 9 are sequentially formed on a silicon single crystal substrate 1 with a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less. The silicon epitaxial film 3 with carbon defects is formed by a 5×10 17 atoms / cm 3 More than and less than 2×10 19 atoms / cm 3 The SOI wafer 8 of the present invention is suitable for use as a wafer for high-frequency devices.

[0079] According to the embodiment of the present application, an SOI wafer 8 can be provided, which is characterized by having a structure in which a dielectric layer 7 and a silicon single crystal film 9 are sequentially formed on a silicon epitaxial film 3 having carbon defects formed thereon, the epitaxial film being an epitaxial film having a silicon epitaxial film on a silicon single crystal substrate 1 having a resistivity of 10 Ω-cm or more and 5000 Ω-cm or less, characterized in that the carbon atom concentration in the silicon epitaxial film is 5 x 10 17 atoms / cm 3 or more and less than 2 x 10 19 atoms / cm 3 , and carbon defects are formed in the silicon epitaxial film.

[0080] Further, such an SOI wafer 8 is suitable as a wafer for a high frequency device.

[0081] Further, according to the embodiment of the present application, a manufacturing method of an SOI wafer 8 can be provided, which is characterized in that an epitaxial film is manufactured by an epitaxial film manufacturing method, and a silicon epitaxial film 3 having carbon defects formed thereon of the epitaxial film is bonded to a silicon single crystal substrate 6 on which a dielectric layer 7 is formed on a surface via the dielectric layer 7, the epitaxial film manufacturing method being a method in which a silicon epitaxial film having a carbon atom concentration of 5 x 10 17 atoms / cm 3 or more and less than 2 x 10 19 atoms / cm 3 is vapor-grown on a silicon single crystal substrate 1 having a resistivity of 10 Ω-cm or more and 5000 Ω-cm or less under reduced pressure, and heat treatment is performed at a heat treatment temperature of 900°C or more and 1100°C or less and a heat treatment time of 1 hour or more and 36 hours or less, whereby carbon defects are formed in the silicon epitaxial film.

[0082] Further, a manufacturing method of an SOI wafer 8 suitable as a wafer for a high frequency device can be provided.

[0083] [Harmonic characteristics]

[0084] Measurement of harmonic characteristics of the epitaxial film and the SOI wafer will be described.

[0085] "SOI wafer case"

[0086] Measurement of harmonic characteristics of the SOI wafer is performed in the following manner. Regarding the second harmonic characteristics (2HD characteristics), first, after the uppermost silicon single crystal film is removed, a coplanar waveguide (CPW) is formed on the dielectric layer (for example, an oxide film) with a metal (for example, aluminum), and probes are grounded at both ends of the metal electrode. Then, a high frequency signal is input from either electrode, and the second harmonic output from the other side is measured (for example, frequency of input signal: 1 GHz, input power: 15 dBm).

[0087] As a result, when carbon defects are formed in the carbon-doped silicon epitaxial film on the silicon single crystal substrate by heat treatment, the trap density of the trap-rich layer is higher than before the heat treatment, resulting in an improved carrier capture capability. Therefore, even if the silicon single crystal substrate does not have a high resistivity, excellent second harmonic characteristics can still be obtained.

[0088] The thicker the silicon epitaxial film formed with carbon defects is, the more the harmonic characteristics are improved.

[0089] "The situation of epitaxial wafers"

[0090] The harmonic characteristics of epitaxial wafers are measured as follows. After forming a carbon-doped silicon epitaxial film on a silicon single crystal substrate, the second harmonic characteristics of an epitaxial wafer containing carbon defects formed by heat treatment are measured. Following the same procedure as above, a coplanar waveguide (CPW) is formed using a metal (e.g., aluminum) on the carbon-defective silicon epitaxial film. Probes are grounded at both ends of the metal electrodes. A high-frequency signal is then input from either electrode, and the second harmonic output from the other side is measured (e.g., input signal frequency: 1 GHz, input power: 15 dBm).

[0091] As a result, similar to the case of SOI wafers, when carbon defects are formed in the carbon-doped silicon epitaxial film on the silicon single crystal substrate by heat treatment, the trap density of the trap-rich layer is higher than before the heat treatment, resulting in an improved carrier capture capability. Therefore, even if the silicon single crystal substrate does not have a high resistivity, excellent second harmonic characteristics can still be obtained.

[0092] As described above, the epitaxial wafer and SOI wafer of the present invention can improve the second harmonic characteristics and are suitable as wafers for high-frequency devices.

[0093] Example

[0094] Hereinafter, the present invention will be described in more detail with reference to Experimental Examples 1 to 4, but the present invention is not limited thereto.

[0095] (Experimental Example 1)

[0096] according to Figure 1 The epitaxial wafer of the present invention was produced by using a reduced pressure CVD apparatus. On a silicon single crystal substrate 1 having a diameter of 300 mm, obtained by slicing an ingot produced by the Czochralski method, monomethylsilane was used as a carbon source gas to form a carbon-doped silicon epitaxial film 2 (carbon atomic concentration: 2.0×10 18 ~2.0×10 19 atoms / cm 3, film thickness: 5.5 μm). After the film formation, heat treatment at 1000°C for 12 hours was applied to the obtained wafer in an oxygen atmosphere, whereby carbon defects were formed in the silicon epitaxial film.

[0097] In order to investigate the structure of the wafer, TEM observation was performed after the heat treatment, using a wafer in which the carbon atom concentration at the time of film formation was set to 7.0 x 10 18 atoms / cm 3 and a wafer in which the carbon atom concentration was set to 2.0 x 10 19 atoms / cm 3 . In the TEM observation, TEM images of the planar direction including the interface of the silicon epitaxial film 3 in which carbon defects were formed and the silicon single crystal substrate 1 ( Figure 3 ), and TEM images of the cross-sectional direction including the surface of the silicon epitaxial film 3 in which carbon defects were formed and the interface of the silicon epitaxial film 3 in which carbon defects were formed and the silicon single crystal substrate 1 ( Figure 4 ) were taken, respectively. Here, Figure 3 is a planar TEM image of a thin sample (thickness: about 500 nm) cut out at a deep position including the interface of the silicon epitaxial film and the substrate, Figure 4 is a cross-sectional TEM image of a thin sample (thickness: about 500 nm) cut out at a deep position including the interface of the silicon epitaxial film and the substrate. As a result, in the wafer in which the carbon atom concentration at the time of film formation was set to 7.0 x 10 18 atoms / cm 3 , black carbon defects were formed in the entire silicon epitaxial film by applying heat treatment after the film formation.

[0098] On the other hand, in the wafer in which the carbon atom concentration at the time of film formation was set to 2.0 x 10 19 atoms / cm 3 , white defects other than carbon defects were found to be formed by applying heat treatment after the film formation (a silicon epitaxial film 10 in which white defects were formed appeared) (see Figure 5 ). Here, Figure 5 is a planar TEM image of a thin sample (thickness: about 500 nm) cut out at a deep position including the interface of the silicon epitaxial film and the substrate.

[0099] In order to investigate the trap density of the wafer of Experimental Example 1 (carbon atom concentration: 2.0 x 10 18 ~ 2.0 x 10 19 atoms / cm 3 , film thickness: 5.5 μm) manufactured, carrier lifetime was measured based on the μ-PCD method. As a result, with respect to the carrier lifetime of the wafer of Experimental Example 1, the carbon atom concentration was 2.0 x 10 18 atoms / cm 3of about 384 μs, a carbon atom concentration of 7.0 x 10 18 atoms / cm 3 of about 145 μs, a carbon atom concentration of 2.0 x 10 19 atoms / cm 3 of about 106 μs (see Figure 6 ). Here, Figure 6 is a lifetime measurement result of the epitaxial wafer in which carbon defects were formed by heat treatment in Experimental Example 1 and the epitaxial wafer in which heat treatment was not performed in Experimental Example 2 described later.

[0100] Next, in order to investigate the harmonic characteristics of the epitaxial wafer of Experimental Example 1, the second harmonic characteristics were measured. An aluminum electrode having a line length of 2200 μm was formed on the silicon epitaxial film in which carbon defects were formed, and the second harmonic characteristics were measured. As a result, with respect to the second harmonic characteristics when the frequency of the input signal was set to 1 GHz, the epitaxial wafer in which the carbon atom concentration was 2.0 x 10 18 atoms / cm 3 had a value of about -19.6 dBm, the epitaxial wafer in which the carbon atom concentration was 7.0 x 10 18 atoms / cm 3 had a value of about -19.0 dBm, and the epitaxial wafer in which the carbon atom concentration was 2.0 x 10 19 atoms / cm 3 had a value of about -19.5 dBm. This result shows that the epitaxial wafer of Experimental Example 1 can reduce the second harmonic (see Figure 7 ). Here, Figure 7 is a graph showing the relationship between the second harmonic characteristics and the carbon atom concentration of the epitaxial wafer in which carbon defects were formed by heat treatment in Experimental Example 1 and the epitaxial wafer in which heat treatment was not performed in Experimental Example 2 described later.

[0101] (Experimental Example 2)

[0102] An epitaxial wafer was manufactured in the same manner as the epitaxial wafer of Experimental Example 1, except that heat treatment was not performed after film formation. First, using a reduced pressure CVD apparatus, a carbon-doped silicon epitaxial film (carbon atom concentration: 2.0 x 10 18 ~ 2.0 x 10 19 atoms / cm 3 , film thickness: 5.5 μm) was formed on a silicon single crystal substrate 1 having a diameter of 300 mm, which was obtained by slicing a crystal ingot manufactured by the Czochralski method, using monomethylsilane as a carbon source gas, thereby preparing the epitaxial wafer of Experimental Example 2.

[0103] In order to investigate the trap density of this epitaxial wafer, the carrier lifetime was measured based on the μ-PCD method. As a result, with respect to the carrier lifetime of the epitaxial wafer of Experimental Example 2, the epitaxial wafer in which the carbon atom concentration was 2.0 x 10 18atoms / cm 3 The wafer is about 953μs and the carbon atomic concentration is 7.0×10 18 atoms / cm 3 The wafer is about 805μs and the carbon atomic concentration is 2.0×10 19 atoms / cm 3 The wafer is about 101μs. Figure 6 Comparing Experimental Example 1 with Experimental Example 2, it can be seen that Experimental Example 1 can reduce the carrier lifetime. This result shows that the trap density of the epitaxial wafer of Experimental Example 1 is greatly increased due to the heat treatment.

[0104] Next, to investigate the harmonic characteristics of the epitaxial wafer, the second harmonic characteristics were measured. Aluminum electrodes with a line length of 2200 μm were formed on the silicon epitaxial film, and the second harmonic characteristics were measured. The results showed that the second harmonic characteristics when the input signal frequency was set to 1 GHz showed a carbon atom concentration of 2.0×10 18 atoms / cm 3 The wafer is about -18.8dBm and the carbon atom concentration is 7.0×10 18 atoms / cm 3 The wafer is about -18.5dBm and the carbon atom concentration is 2.0×10 19 atoms / cm 3 The wafer is about -19.3dBm. Figure 7 Comparing Experimental Example 1 with Experimental Example 2, it can be seen that Experimental Example 1 can reduce the second harmonic characteristics. This result shows that the ability of the epitaxial wafer in Experimental Example 1 to reduce the second harmonic is improved due to the heat treatment.

[0105] Based on the above results, it can be seen that by making the carbon-doped silicon epitaxial film with a carbon atomic concentration of 2.0×10 18 More than and less than 2.0×10 19 atoms / cm 3 , and an epitaxial wafer having a silicon epitaxial film with carbon defects formed by heat treatment can obtain an epitaxial wafer with excellent high-frequency characteristics.

[0106] (Experimental Example 3)

[0107] according to Figure 2 First, an epitaxial wafer was prepared. The epitaxial wafer was formed on a silicon single crystal substrate 1 with a diameter of 300 mm and a carbon atom concentration of 2.0×10 18 atoms / cm 3 More than and less than 2.0×10 19 atoms / cm 3A carbon-doped silicon epitaxial film 2 (film thickness: 5.5 μm) is formed. After the film is formed, the resulting epitaxial wafer is subjected to a heat treatment at 1000°C for 12 hours in an oxygen atmosphere, thereby forming carbon defects in the silicon epitaxial film. The epitaxial wafer is set as a base wafer (first substrate 4). In addition, a silicon wafer having an oxide film with a thickness of 400 nm formed on the surface of a silicon single crystal substrate 6 with a diameter of 300 mm is prepared as a bonding wafer (second substrate 5). Next, the surface of the silicon epitaxial film 3 with carbon defects formed on the base wafer is bonded to the oxide film surface (surface of the dielectric layer 7) of the bonding wafer, and then the silicon single crystal substrate 6 on the bonding wafer side is polished to form an SOI wafer 8 with a 1 μm silicon single crystal film remaining.

[0108] (Experimental Example 4)

[0109] An epitaxial wafer was manufactured using the same method as that used for the epitaxial wafer of Experimental Example 3, with the only difference being that no heat treatment was performed after the carbon-doped epitaxial film was formed. First, an epitaxial wafer was prepared. A film having a carbon atomic concentration of 2.0×10 18 atoms / cm 3 A carbon-doped silicon epitaxial film 2 (thickness: 5.5 μm) was prepared as the base wafer. Separately, a silicon wafer with a 300 mm diameter silicon single crystal substrate 6 and a 400 nm thick oxide film as the dielectric layer 7 formed on its surface was prepared as the bonding wafer. Next, the carbon-doped silicon epitaxial film 2 surface of the base wafer was bonded to the oxide film surface (the surface of the dielectric layer 7) of the bonding wafer. The silicon single crystal substrate 6 on the bonding wafer side was then polished, resulting in an SOI wafer with a 1 μm thickness of silicon single crystal film remaining.

[0110] The single crystal layer of the SOI wafers of (Experimental Example 3) and (Experimental Example 4) was polished and removed to expose the oxide film layer. A 2200 μm long aluminum electrode was then formed on the oxide film. The second harmonic characteristics were measured using the same procedure as in Experimental Example 1. The results showed that (Experimental Example 3) improved by approximately -1 dB compared to (Experimental Example 4). Based on the above results, it can be seen that by producing the carbon-doped silicon epitaxial film with a carbon atomic concentration of 2.0×10 18 More than and less than 2.0×10 19 atoms / cm 3 , and having an SOI wafer 8 in which the silicon epitaxial film 3 having carbon defects is formed by heat treatment, an SOI wafer 8 having excellent high-frequency characteristics can be obtained.

[0111] The present application is not limited to the above-described embodiments. The above-described embodiments are merely examples, and technical solutions having substantially the same technical concept and the same technical effects as those described in the claims of the present application are all included in the technical scope of the present application.

Claims

1. An epitaxial wafer, which is an epitaxial wafer having a silicon epitaxial film on a silicon single crystal substrate with a resistivity of 10 Ω-cm or more and 5000 Ω-cm or less, characterized by The carbon atom concentration in the silicon epitaxial film is 5×10 17 atoms / cm 3 More than and less than 2×10 19 atoms / cm 3 , and carbon defects are formed in the silicon epitaxial film.

2. The epitaxial wafer of claim 1, wherein, The epitaxial wafer is a wafer for high-frequency devices.

3. An SOI wafer, characterized by, The SOI wafer has a structure in which a dielectric layer and a silicon single-crystal film are sequentially formed on the silicon epitaxial film of the epitaxial wafer described in claim 1.

4. The SOI wafer of claim 3, wherein, The SOI wafer is a wafer for high-frequency devices.

5. A method for manufacturing an epitaxial wafer, characterized by A silicon epitaxial film having a carbon atom concentration of 5 x 10 17 atoms / cm 3 or more and less than 2 x 10 19 atoms / cm 3 is vapor-grown on a silicon single crystal substrate having a resistivity of 10 Ω-cm or more and 5,000 Ω-cm or less, and then heat-treated at a heat treatment temperature of 900°C or more and 1,100°C or less and a heat treatment time of 1 hour or more and 36 hours or less, thereby forming carbon defects in the silicon epitaxial film.

6. The method for manufacturing an epitaxial wafer according to claim 5, wherein The epitaxial wafer is a wafer for high-frequency devices.

7. A method of manufacturing an SOI wafer, characterized by, The epitaxial wafer is manufactured by the method described in claim 5, and the silicon epitaxial film of the epitaxial wafer is bonded to a silicon single-crystal substrate on which the dielectric layer is formed on a surface via the dielectric layer.

8. The method of manufacturing an SOI wafer according to claim 7, wherein The SOI wafer is a wafer for high-frequency devices.

Images