Chemical vapor deposition tool for preventing or suppressing arcing

Abstract

A chemical vapor deposition (CVD) tool suppresses or completely eliminates arcing between a substrate susceptor and a substrate. The CVD tool includes a direct current (DC) bias control system configured to maintain a substrate susceptor disposed in the processing chamber at the same or substantially the same DC bias as the DC bias generated by the plasma in the processing chamber. Arcing is suppressed or completely eliminated by maintaining the substrate pedestal and the substrate having the same potential as the plasma at the same or substantially the same voltage potential.

Description

This application is a divisional application of patent application No. 201980052665.8, filed on July 19, 2019, by Rum Research Corporation, entitled "Chemical Vapor Deposition Tool for Preventing or Suppressing Arcing". Cross-reference to related applications

[0001] This application claims priority to U.S. Application No. 16 / 057,383, filed August 7, 2018, which is incorporated herein by reference for all purposes. Background Art

[0002] Plasma-enhanced chemical vapor deposition (PECVD) tools are used to deposit thin films onto substrates. CVD tools typically include a processing chamber, a substrate holder for supporting the substrate within the processing chamber, and a nozzle. During operation, the nozzle distributes reactive gases over the surface of the substrate to be treated. A radio frequency (RF) potential is applied between two electrodes, typically positioned on the nozzle and / or substrate holder, to generate a plasma. Excited electrons ionize or dissociate (e.g., “crack”) the reactive gases from the plasma, producing chemically reactive free radicals. When these free radicals react, they deposit on the substrate and form a thin film.

[0003] Arcing is a well-known electrical phenomenon caused by the breakdown of a normally non-conductive gas supplied in a gap between two surfaces with different voltage potentials. When arcing occurs, the non-conductive gas breaks down, and a strong current or discharge briefly jumps across the gap between the two surfaces.

[0004] Arcing is a significant issue with PECVD tools. A resistive material (e.g., a dielectric film) is typically provided between the substrate and the substrate pedestal. During tool operation, when an RF potential is applied, the plasma in the processing chamber and the substrate inherently generate a direct current (DC) bias. As a result, a non-zero DC voltage exists between the substrate and the substrate pedestal due to the resistive material.

[0005] If the difference in DC voltage exceeds a certain threshold, electrical breakdown may occur in the gas between the substrate and the substrate base. As the thin film is deposited on the substrate, the magnitude of the DC bias tends to increase. As a result, the likelihood of electrical breakdown increases significantly. For certain types of substrates (e.g., semiconductor wafers), sudden discharges or arcing can damage sensitive circuitry. Damaging circuitry on semiconductor wafers reduces yield, leading to potentially significant manufacturing losses and increased costs.

[0006] Therefore, CVD tools are needed to suppress or completely eliminate arcing between the substrate and the substrate base. Summary of the Invention

[0007] A chemical vapor deposition (CVD) tool is disclosed that suppresses or completely eliminates arcing between a substrate pedestal and a substrate. The tool includes a processing chamber, a substrate pedestal for supporting the substrate within the processing chamber, and a nozzle positioned within the processing chamber. The nozzle is configured to dispense a gas, which is converted into plasma, and the plasma generates a DC bias voltage in response to a radio frequency (RF) potential. The tool also includes a DC bias control system configured to maintain the substrate pedestal at a DC bias voltage that is the same as or substantially the same as the DC bias voltage generated by the plasma.

[0008] In a non-exclusive implementation, when the resistance between the ground and the substrate remains constant, the DC bias control system adjusts the DC bias of the substrate base by measuring the DC current between the plasma and the substrate base and maintaining the DC current constant.

[0009] In another non-exclusive embodiment, the DC bias control system is further configured to measure the DC current at the start of substrate processing and then adjust the DC bias to maintain the measured DC current for the remainder of substrate processing in order to compensate for resistor drift.

[0010] In various non-exclusive embodiments, the current path between the plasma and the electrode includes one or more of the following: (a) a substrate supported by a substrate base, (b) any thin film formed on the substrate, (c) the substrate base, and (d) a power supply coupled to the substrate base. The resistor consists of one or more of the following: (f) the substrate, (g) any thin film formed on the substrate, (h) the substrate base, and (i) a resistive component in the power supply system coupled to the substrate base. Attached Figure Description

[0011] The present application and its advantages can be best understood by referring to the following description taken in conjunction with the accompanying drawings, wherein:

[0012] Figure 1 This is a block diagram of a chemical vapor deposition (CVD) chamber according to a non-exclusive embodiment of the present invention.

[0013] Figure 2A and Figure 2B These are top and cross-sectional views of a substrate according to a non-exclusive embodiment of the present invention.

[0014] Figure 3 A schematic diagram illustrating how to suppress or prevent arcing according to a non-exclusive embodiment of the present invention.

[0015] Figure 4 A diagram illustrating the unpredictability of the DC bias voltage generated by the plasma in the tool over time.

[0016] Figure 5A block diagram illustrating the active DC bias control system for a substrate according to the present invention is provided.

[0017] Figure 6 This is a schematic diagram of a CVD chamber having multiple substrate bases according to a non-exclusive embodiment of the present invention.

[0018] Figure 7 This is a block diagram of a system controller for controlling CVD tools according to a non-exclusive embodiment of the present invention.

[0019] In the accompanying drawings, similar reference numerals are sometimes used to denote similar structural elements. It should also be understood that the descriptions in the drawings are schematic and not necessarily drawn to scale. Detailed Implementation

[0020] This application will now be described in detail with reference to several non-exclusive embodiments illustrated in the accompanying drawings. Numerous specific details are set forth in the following description to provide a thorough understanding of this disclosure. However, it will be apparent to those skilled in the art that this disclosure may be practiced without some or all of these specific details. In other instances, well-known process steps and / or structures have not been described in detail to avoid unnecessarily obscuring the invention.

[0021] refer to Figure 1 A block diagram of a chemical vapor deposition (CVD) tool 10 is shown. Tool 10 includes a processing chamber 12, a nozzle 14, a substrate pedestal 16 for positioning a substrate 18 to be processed, a radio frequency (RF) source generator 20, a gas source 22, a system controller 24, an ESC power supply 26 coupled to the substrate pedestal 16, and a DC bias control system 28. In various embodiments, the CVD tool may be plasma-enhanced CVD, plasma-enhanced atomic layer deposition (PEALD), or any other type of CVD tool using plasma.

[0022] During operation, the reactive gas is supplied from gas source 22 to processing chamber 12 via nozzle 14. Within nozzle 14, the gas is distributed into the region above the surface of substrate 18 within chamber 12 via one or more filling chambers (not shown). An RF potential generated by RF generator 20 is applied to one or more electrodes (not visible) on substrate base 16. The RF potential causes gas ionization and generates plasma inside processing chamber 12. Within the plasma, excited electrons dissociate (i.e., "crack") from the reactive gas, generating chemically reactive free radicals. As these free radicals react, they deposit on substrate 18 and form a thin film.

[0023] In various embodiments, the RF generator 20 can be a single RF generator or multiple RF generators capable of generating high, medium, and / or low RF frequencies. For example, at high frequencies, the RF generator 20 can generate frequencies ranging from 2 to 100 MHz, and preferably 13.56 MHz or 27 MHz. When generating low frequencies, the range is from 50 kHz to 2 MHz, and preferably from 350 kHz to 600 kHz. In alternative embodiments, the RF source can be coupled to an RF electrode disposed on the nozzle 14 instead of an RF electrode disposed on the substrate 16, or coupled to both the nozzle 14 and the substrate 16.

[0024] The system controller 24 is generally used to control the overall operation of the CVD tool 10 and to manage process conditions during deposition, post-deposition, and / or other process operations.

[0025] In a non-exclusive embodiment, the substrate base 16 is an electrostatic chuck (ESC) type substrate base. An ESC power supply 26 is provided to electrodes embedded in the clamping surface of the substrate base 16. Figure 1 (Not shown) A reverse voltage is supplied, the magnitude of which is sufficient to generate the electrostatic force required to hold the substrate 18.

[0026] When an RF potential is applied to the reactive gas in the processing chamber 12, plasma is generated. In response to the RF potential, the plasma generates a DC bias typically in the range of (0) volts to (-100) volts. When substrate 18 is exposed to the plasma, the substrate generates the same or substantially the same DC bias as the plasma. Generally, substrate base 16 is typically maintained at a different voltage. The voltage difference between substrate base 16 and substrate 18 is prone to arcing.

[0027] A DC bias control system 28 is provided to maintain the substrate pedestal 16 at the same or substantially the same DC bias voltage as that generated by the plasma and the substrate 18. Therefore, the voltage difference between the substrate pedestal 16 and the substrate 18 is zero or close to zero. As a result, arcing between the substrate pedestal 16 and the substrate 18 is suppressed or completely eliminated.

[0028] refer to Figure 2A and Figure 2B The image shows a top view and a cross-sectional view of a non-exclusive embodiment of the substrate base 16. In this particular embodiment, the body 29 of the substrate base 16 is made of a non-conductive ceramic material, such as aluminum nitride. An electrostatic chuck (ESC) surface 30 for holding the substrate 18 is embedded in the substrate base 16.

[0029] like Figure 2AAs best illustrated, electrode 30 is embedded in substrate base 16 and includes a pair of "D-shaped" ESC clamping electrodes 32A and 32B. During clamping, voltages of opposite polarities (e.g., + / - 500 volts) are applied to electrodes 32A and 32B, respectively. The resulting electrostatic force clamps substrate 18 to clamping surface 30 of substrate base 16.

[0030] The substrate pedestal 16 also includes an RF electrode 34 embedded in the top surface 30 and positioned around its periphery and through its center. Electrodes 32A, 32B, and 34 are coupled to an RF source 20 and configured to provide the RF potential required to ionize the reactive gas supplied to the processing chamber 12 and generate plasma. Figure 2B As best illustrated, the cross-sectional view shows the ESC clamping electrodes 32A and 32B, and the RF electrodes 32A, 32B and 34 embedded in the body 29 of the substrate base 16.

[0031] To suppress or prevent arcing, the DC bias control system 28 provides bias voltages to the left and right electrodes 32A and 32B. For example, consider an ESC clamping voltage of (+ / - 500 volts) applied to electrodes 32A and 32B, respectively. If the plasma in the processing chamber 12 generates a bias of (-10 volts), a bias voltage of the same or similar amplitude V is applied. DC A bias voltage V is applied to electrodes 32A and 32B. In other words, electrode 32A is maintained at 490 volts (500-10), and electrode 32B is maintained at -510 volts (-500-10). In another non-exclusive embodiment, the same bias voltage V... DC (For example, -10V) can also be applied to electrode 34.

[0032] Because the voltage difference between the two electrodes 32A and 32B remains the same, the bias voltage V DC It will not affect the ESC clamping force. However, the voltage difference between the substrate base 16 and the substrate 18 is reduced to zero or very close to zero, thereby suppressing or completely eliminating arcing.

[0033] refer to Figure 3 The diagram illustrates how to prevent or suppress arcing. Nozzle 14 introduces one or more reactive gases into processing chamber 12. An RF potential provided by electrodes 34 embedded in the substrate pedestal 16 causes ionization of the reactive gases, thereby generating plasma.

[0034] In this particular example, a conductive thin film 36, such as a metal or conductive carbon layer, is deposited over a dielectric layer 38. During deposition, layers or films 36, 38 are formed on both the top surface of the substrate 18 and the surrounding portion of the substrate base 16. When the conductive layer 36 is formed, negative surface charges, represented by the letter "e", accumulate on the surface of the substrate 18.

[0035] The same DC bias voltage "V" as the DC bias voltage generated by the plasma DC Electrodes 32A and 32B (not shown) are applied to substrate 16. Because the voltage difference between substrate 18 and substrate 16 is the same or substantially the same, the surface charge “e” on substrate 18 is not attracted to substrate 16. As a result, arcing is suppressed or completely eliminated, especially in the region described by ellipse 40, which tends to be the most prone to arcing.

[0036] During the processing of substrate 18 in processing chamber 12, the DC bias generated by the plasma tends to vary unpredictably over time. For example, during the deposition of a conductive (e.g., carbon) layer onto a semiconductor wafer, the plasma treats the conductive layer as an electrode. During the extended deposition process, the layer tends to gradually widen and thicken on the top surface around the wafer and substrate pedestal 16 over time. Due to this growth, the plasma tends to spread out, causing changes in the DC bias generated by the plasma. However, the DC bias generated by the plasma is typically not linear. As a result, it is difficult to predict how the DC bias generated by the plasma will vary over time.

[0037] Figure 4 An exemplary graph illustrating the unpredictability of the DC bias voltage generated by the plasma in a CVD tool during deposition is provided. The graph shows that the DC bias voltage tends to decrease over time (e.g., from about -5.0 volts to about -20.0 volts). However, this decrease is not linear. Therefore, the graph shows that if a fixed bias voltage V... DC When applied to electrodes 32A, 32B, and / or 34, a voltage difference may sometimes exist between substrate 18 and substrate base 16 as the DC bias of the plasma varies. Substrate 18 is prone to arcing whenever a voltage difference exists. The diagrams shown are illustrative only, used to illustrate the nonlinearity of the DC bias reduction. It should be understood that in actual embodiments, the diagrams will be quite different, but will generally show a reduction in DC bias.

[0038] When a non-zero voltage difference exists, a DC current flows between the plasma and the ground electrode due to the finite resistance between them. The current path between the plasma and the electrode includes one or more of the following: (a) the substrate 18 supported by the substrate base 16; (b) any thin film formed on the substrate 18; (c) electrodes 32A, 32B, 34 disposed on the substrate base 16; (d) a power supply 26 coupled to the substrate base 16; and (e) the substrate base 16 itself.

[0039] The resistor consists of one or more of the following provided on the current path defined above: (a) substrate 18; (b) any thin film formed on substrate 18; (c) electrodes 32A, 32B and 34 disposed on substrate base 16; and power supply 26 coupled to substrate base 16.

[0040] As described above, the DC bias voltage of the plasma changes with the conditions within the processing chamber 12. When the resistance is constant, the change in the measured current will indicate the change in the DC bias voltage of the plasma. The result is ΔV DC The change in the value corresponds to the change in DC bias voltage generated by the plasma over time. This is achieved by continuously measuring ΔV. DC And this is applied to electrodes 32A, 32B and / or 34, and the DC bias of the substrate base can substantially track the DC bias generated by the plasma and substrate 18 when the processing conditions change. In other words, when the conditions in the processing chamber 12 change, the voltage difference between the substrate base 16 and the substrate 18 remains zero or close to zero.

[0041] refer to Figure 5 A block diagram is shown illustrating a DC bias control system 28. System 28 includes a current measuring device 50 and an ESC power supply 26. The current measuring device 50 measures a sample of the current between the plasma and the ground electrode. The DC power supply 52 adjusts the bias voltage applied to electrodes 32A, 32B, and / or 34 via the ESC power supply 26 to maintain a constant current. By maintaining a constant current, the voltage difference between substrate 18 and the substrate base is zero or near zero.

[0042] In various implementations, the predetermined sampling rate used to measure the current sample can vary widely. For example, the sampling rate can be any point ranging from 1 ms to 10 seconds. Generally, a higher sampling rate allows for more precise adjustment of the bias voltage to track variations in the actual DC bias voltage generated by the plasma. As a result, a higher degree of arc suppression may be achieved.

[0043] Based on the above, there are many methods to suppress or completely prevent arcing. For example: • By maintaining a constant voltage (zero or near-zero volts) between substrate 18 and substrate base 16, arcing can be eliminated or significantly limited. However, as the DC bias of the plasma changes over time, the voltage difference between the base and the substrate may increase. As a result, the chance of arcing may also increase. • By using a feedback loop to measure the sampling current and controlling the DC bias power supply 52 to adjust the bias voltage applied to electrodes 32A, 32B, and / or 34 via the ESC power supply 26, the measured current can be maintained at a predefined constant value. This method remains effective even if the plasma's DC bias voltage changes over time; however, it is susceptible to changes in resistance. For example, the likelihood of arcing increases if the resistance changes from one substrate to the next, or when multiple layers are added to the substrate. The current is measured once and used as the setpoint for each substrate. Subsequently, the aforementioned feedback loop is used to adjust the bias voltage applied to electrodes 32A, 32B, and / or 34. For the next substrate, the setpoint is measured again and the bias voltage is adjusted accordingly. By measuring the current of each substrate, the setpoint is updated to compensate for drift in the system. This scheme significantly suppresses the chance of arcing, even when the DC bias voltage of the plasma and / or the conditions in chamber 12 change over time.

[0044] The ability to measure DC current and adjust and apply DC bias to electrodes 32A, 32B, and / or 34 of substrate pedestal 16 offers several advantages. First, the voltage difference between substrate pedestal 16 and substrate 18 remains zero or near zero throughout the duration of substrate 18 processing in chamber 12. Second, when one substrate 18 is replaced by another substrate 18 for processing, the current can be measured and the DC bias adjusted to match the current conditions in processing chamber 12. Third, the DC bias control system 28 has the ability to adjust the DC bias regardless of the tool 10 and / or processing chamber 12. Therefore, any change from one CVD tool 10 to the next, or from one processing chamber 12 to the next, is not a problem because the DC bias control system 28 has the ability to adjust the DC bias regardless of how conditions may change from one tool to the next.

[0045] refer to Figure 6 A schematic diagram of a CVD chamber 12 with multiple substrate pedestals 16 is illustrated. In this particular embodiment, the CVD tool 10 is referred to as a "quad" tool because it has four substrate pedestals 16A-16D within the processing chamber 12. Therefore, the DC bias control system 28 provides four (AD) bias voltages ΔV. DC (+ / -) , calculate each bias voltage for each of the four substrate bases 16A-16D as described above. It should be understood that the four-station tool 10 described herein is merely exemplary and should not be construed as limiting in any way. Systems for suppressing or eliminating arcing can be used in CVD tools with any number of substrate bases.

[0046] Figure 7This is a high-order block diagram of the system controller 24. The computer system 24 can take many physical forms, ranging from integrated circuits, printed circuit boards, small handheld devices, personal computers, servers, and supercomputers, any of which may have one or more processors. The computer system 24 may also include an electronic display device 804 (for displaying graphics, text, and other data), non-transient main memory 806 (e.g., random access memory (RAM)), storage device 808 (e.g., hard disk drive), removable storage device 810 (e.g., optical disc drive), user interface device 812 (e.g., keyboard, touchscreen, keypad, mouse, or other positioning device), and communication interface 814 (e.g., wireless network interface). The communication interface 814 enables software and data to be transferred between the system controller 24 and external devices via a link. The system controller 24 may also include communication infrastructure 816 (e.g., communication bus, cross-over bar, or network) to which the aforementioned devices / modules are connected.

[0047] The term “non-transitory computer-readable medium” is generally used to refer to media such as main memory, secondary memory, mobile storage devices, and storage devices (such as hard disks, flash memory, hard disk drive memory, CD-ROMs, and other forms of permanent storage), and shall not be construed as covering transient objects such as carrier waves or signals.

[0048] In some implementations, the system controller 24, which runs or executes system software or code, controls all or at least most of the activities of the tool 10, including, for example, controlling the timing of processing operations, the frequency and power of the operation of the RF generator 20, the pressure within the processing chamber 12, the flow rate, concentration and temperature of the gas flowing into the processing chamber 12 and its relative mixing, and the temperature of the substrate 18 supported by the substrate holder 16.

[0049] Information transmitted via communication interface 814 may be in the form of signals that can be received by communication interface 814 via a communication link. These signals may be, for example, electronic, electromagnetic, optical, or other signals. The communication link carries the signals and may be implemented using wires or cables, optical fibers, telephone lines, cellular telephone links, radio frequency links, and / or other communication channels. Using such a communication interface, it is anticipated that one or more processors 802 may receive information from or output information to the network. Furthermore, the method implementation may execute solely on the processor or may be combined with remote processors on a network such as the Internet, sharing some processing capabilities.

[0050] It should be understood that the embodiments provided herein are merely exemplary and should not be construed as restrictive in any way. Generally, this application is intended to cover any nozzle having at least two sets of orifices, said at least two sets of orifices defining two helical patterns and two air chambers for the two patterns.

[0051] Although only some embodiments are described in detail, it should be understood that this application can be implemented in many other forms without departing from the spirit or scope of the disclosure provided herein. For example, the substrate may be a semiconductor wafer, a discrete semiconductor device, a flat panel display, or any other type of workpiece.

[0052] Therefore, the presented embodiments should be considered illustrative rather than restrictive, and are not limited to the details given herein, but can be modified within the scope of the appended claims and equivalents.

Claims

1. A chemical vapor deposition tool, comprising: Processing room; Radio frequency source; A substrate base for supporting a substrate within the processing chamber, the substrate base comprising: An electrostatic chuck (ESC) clamping electrode pair embedded in the substrate base; and a radio frequency electrode embedded in the substrate base and disposed around the ESC clamping electrode pair and between the ESC clamping electrodes in the ESC clamping electrode pair, wherein the ESC clamping electrode pair and the radio frequency electrode are coupled to the radio frequency source; A nozzle located within the processing chamber is arranged to spray gas that transforms into plasma within the processing chamber in response to a radio frequency potential applied by the radio frequency source to the ESC clamping electrode pair and the radio frequency electrodes, the plasma generating a DC bias voltage; and A DC bias control system configured to apply a DC bias voltage to the ESC clamping electrode pair to suppress arcing between the substrate and the substrate base.

2. The chemical vapor deposition tool according to claim 1, wherein, The DC bias control system is also configured to apply a DC bias voltage to the radio frequency electrode.

3. The chemical vapor deposition tool according to claim 1, wherein, The opposite clamping potential applied to the ESC electrode is regulated by the DC bias.

4. The chemical vapor deposition tool according to claim 1, wherein, The processing chamber also includes two or more substrate bases.

5. The chemical vapor deposition tool according to claim 1, wherein, The DC bias voltage generated by the plasma and the substrate has a voltage difference of 10.0 volts or less.

6. The chemical vapor deposition tool according to claim 1, wherein, The DC bias voltage generated by the plasma and the substrate has a voltage difference of 0.1 volts or less.

7. The chemical vapor deposition tool according to claim 1, wherein, Each ESC clamping electrode in the ESC clamping electrode pair is D-shaped.

8. The chemical vapor deposition tool according to claim 1, wherein, The substrate base includes a body made of a non-conductive ceramic material, and the ESC clamping electrode and the radio frequency electrode are embedded in the body.

9. The chemical vapor deposition tool according to claim 8, wherein, The main body is made of aluminum nitride.

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