Semiconductor chilling plate with preset solder layer and manufacturing method of semiconductor chilling plate

Abstract

The invention discloses a semiconductor chilling plate with a preset solder layer and a manufacturing method of the semiconductor chilling plate, and solves the problems that in the prior art, solder is preset on the surface of a TEC (Thermoelectric Cooler) in a manner of heating and welding after a tin sheet is pasted, the welding surface is uneven, and welding holes are easy to generate when an optical device is welded. The manufacturing method comprises the following steps: preparing semiconductor particles and a substrate printed with soldering paste, and carrying out vacuum welding on the semiconductor particles and the substrate to obtain a TEC product; presetting a solder area on the lower surface of the TEC product and printing solder paste by using the steel mesh; and carrying out vacuum heating welding on the TEC product with the solder paste printed in the preset solder region to obtain the semiconductor chilling plate with the preset solder layer. The flatness and thickness consistency of the preset solder can be effectively controlled, and after an optical device is welded, light transmission is not blocked, the welding surface is smooth, and no welding cavity is generated.

Description

Technical Field

[0001] This invention relates to the field of thermoelectric cooling device manufacturing technology, and in particular to a semiconductor cooling chip with a pre-formed solder layer and its manufacturing method. Background Technology

[0002] Thermoelectric coolers, represented by semiconductor cooling chips, possess unique advantages such as small size, vibration-free operation, high reliability, and environmental friendliness. They are widely used in medical temperature control, laser transmitters, and optical receivers in the optical communication industry. In particular, the requirements for small size and high reliability in optical communication applications make semiconductor cooling chips an irreplaceable core component. It should be noted that most thermoelectric cooler (TEC) products at the customer's end-user end will have optical components soldered onto their surface. Therefore, it is often required that solder be pre-applied to the TEC surface after fabrication to facilitate the soldering of optical components at the customer's end-user location. Furthermore, a requirement for consistent solder thickness on the TEC surface is also specified to prevent light transmission obstruction.

[0003] TEC surface-mount solder typically involves applying tin sheets followed by heating and soldering. For example, Chinese Patent Office published patent CN115764543A on January 9, 2023: "A radiation-resistant narrow-linewidth external cavity laser and optical device," in which a semiconductor gain chip, photonic filter, coupling component, and thermistor are soldered onto the upper surface of a heat sink, which is then soldered onto the upper surface of the semiconductor cooler. This method directly solders the heat sink onto the upper surface of the semiconductor cooler. However, short heating times can result in uneven surfaces, while longer heating times can lead to a thicker center and thinner edges due to the surface tension characteristics of the solder paste during melting, failing to meet the customer's requirements for subsequent optical component soldering. Summary of the Invention

[0004] The purpose of this invention is to overcome the problems in the existing technology where the pre-placed solder on the TEC surface is usually achieved by applying tin sheets and then heating and soldering. Short heating times result in uneven surfaces, while long heating times cause the solder paste to be thicker in the center and thinner around the edges due to the surface tension characteristics during melting. This invention provides a semiconductor refrigeration chip with a pre-placed solder layer and its manufacturing method, which can effectively control the flatness and thickness consistency of the pre-placed solder. After soldering optical devices, light transmission will not be blocked, the soldering surface will be flat, and no soldering voids will be generated.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: A semiconductor cooling chip with a pre-formed solder layer includes: an upper substrate and a lower substrate, with semiconductor particles disposed between the upper substrate and the lower substrate, and a pre-formed solder area disposed on the upper surface of the upper substrate or the lower surface of the lower substrate by vacuum welding, wherein square solder paste is disposed on the pre-formed solder area in a matrix arrangement, and the square solder paste is vacuum heated to obtain the pre-formed solder layer.

[0006] This invention addresses the issue of improving the flatness of pre-placed solder in TEC products. It solves the problems of light source obstruction and weld voids caused by welding TEC to the terminal housing. By using a pre-placed solder layer in TEC, it effectively avoids the phenomenon of the solder paste being pulled towards the center area during melting due to the tension characteristics of the solder paste, resulting in a thicker center area and a thinner perimeter in the pre-placed solder layer. This achieves ideal appearance flatness, and the thickness consistency can be controlled within 5μm.

[0007] Preferably, the semiconductor particles include N-type semiconductors and P-type semiconductors, which are staggered in the horizontal direction.

[0008] A method for fabricating a semiconductor refrigeration chip with a pre-formed solder layer includes: S1: Prepare a substrate for semiconductor particles and printed solder paste, and vacuum weld the semiconductor particles to the substrate to obtain TEC products; S2: Using a stencil, solder paste is printed on the pre-placed solder area on the lower surface of the TEC product; S3: Vacuum heating soldering is performed on TEC products with solder paste printed on the pre-solder area to obtain a semiconductor refrigeration chip with a pre-solder layer.

[0009] Preferably, the pre-placed solder area of ​​the completed semiconductor refrigeration chip is divided into n small areas. Each small area is tested at x points, and the average thickness at x points is taken as the solder thickness of that small area. It is determined whether the solder thickness range of the n small areas meets the threshold. If it does not meet the threshold, the test is repeated. If it still does not meet the threshold, the semiconductor refrigeration chip is considered a defective product.

[0010] Preferably, the openings of the stencil are arranged in a matrix of small holes, with the total area of ​​the openings accounting for 45%-50% of the area of ​​the pre-placed welding material.

[0011] Preferably, the substrate for preparing the solder paste includes: sputtering a copper metal composite layer on both sides of an insulating material board as a substrate; electroplating a Cu layer on the surface of the copper metal composite layer; preparing a Ni layer and a highly solderable Au layer on the Cu layer; etching the desired circuit pattern on the prepared substrate metal layer; and placing solder at the circuit soldering positions.

[0012] Preferably, the preparation of semiconductor particles includes: slicing a base material crystal rod to obtain a bare wafer; preparing a Ni layer and an Au layer on the bare wafer to form a wafer; and cutting the wafer to obtain semiconductor particles.

[0013] Preferably, in step S3, the heating temperature is less than or equal to 225°C, and the time above the melting point is 15 seconds.

[0014] Preferably, the Cu layer has a thickness of 15–25 micrometers, the Ni layer has a thickness of 3–9 micrometers, and the Au layer has a thickness of 0.2–0.5 micrometers.

[0015] Preferably, the insulating material is a high thermal conductivity ceramic, and the electrode material is a high electrical conductivity and high thermal conductivity metal material.

[0016] Therefore, the present invention has the following beneficial effects: After the TEC is prepared, according to the user's requirements for the thickness of the pre-placed solder, the corresponding solder paste is printed on the area of ​​the TEC surface that requires pre-placed solder by means of screen printing or stencil printing. The printed pattern is arranged in a matrix of small holes. The design of the hole size and spacing is mainly based on the requirements for the thickness of the pre-placed solder and the characteristics of the selected solder. Solder paste is not printed on the entire surface. Vacuum welding is used to precisely control the PEAK temperature of the heating curve and the time above the solder melting point, thereby reducing the influence of the surface tension characteristics of the solder paste during melting. This allows the solder paste printed in a matrix arrangement to begin to cool down and solidify rapidly in the early stage of heating and melting, which can prevent the melted solder paste from continuing to be drawn to the central area, resulting in a thicker central area. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the TEC semiconductor cooling chip structure.

[0018] Figure 2 This is a schematic diagram of the pre-placed solder area of ​​the TEC semiconductor cooling chip in this invention.

[0019] Figure 3 This is a schematic diagram of light transmission after the TEC semiconductor cooling chip is soldered to the housing and other components.

[0020] Figure 4 This is a flowchart illustrating the steps of the semiconductor refrigeration chip fabrication method in this invention.

[0021] Figure 5 A schematic diagram of the pre-applied solder heating curve for an existing TEC semiconductor cooling chip.

[0022] Figure 6 This is a schematic diagram of the pre-placed solder heating curve of the TEC semiconductor cooling chip in this invention.

[0023] Figure 7 This is a schematic diagram of solder thickness detection in the pre-placed solder area of ​​the TEC semiconductor cooling chip in this invention.

[0024] In the diagram: 1. Tube shell; 2. Semiconductor cooling chip; 3. Backlight tube; 4. Thermistor; 5. Laser; 6. First lens; 7. Isolator; 8. Second lens; 9. Metal sleeve; 10. Metal layer; 11. Optical fiber; 12. Upper substrate; 13. Lower substrate; 14. Semiconductor particle; 15. Pre-placed solder area; 16. Square solder paste. Detailed Implementation

[0025] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments: Example 1: This embodiment provides a semiconductor cooling chip with a pre-formed solder layer, such as Figure 1 As shown, it includes: an upper substrate 12, a lower substrate 13, and semiconductor particles 14. The semiconductor particles are disposed between the upper substrate and the lower substrate. The upper surface of the upper substrate or the lower surface of the lower substrate is a pre-placed solder area 15. A pre-placed solder layer can be set in the pre-placed solder area on the upper surface of the upper substrate or the lower surface of the lower substrate as needed. The pre-placed solder layer is vacuum welded to the upper surface of the upper substrate or the lower surface of the lower substrate. The pre-placed solder area includes square solder paste 16 arranged in a matrix. The square solder paste is heated by a high-precision temperature control device to form the pre-placed solder layer.

[0026] Specifically, the semiconductor particles include N-type semiconductors and P-type semiconductors, which are staggered in the horizontal direction. The upper surfaces of the N-type and P-type semiconductors are connected to the lower surface of the upper substrate by vacuum welding, and the lower surfaces of the N-type and P-type semiconductors are connected to the upper surface of the lower substrate by vacuum welding.

[0027] In this embodiment, the upper substrate is a hot-end ceramic substrate, and the lower substrate is a cold-end ceramic substrate. Both the hot-end and cold-end ceramic substrates are aluminum nitride substrates, alumina substrates, or silicon carbide substrates.

[0028] like Figure 2 As shown in this embodiment, the pre-placed solder area is provided with 5 rows and 14 columns of square solder paste arranged in a matrix.

[0029] In this embodiment, the fabrication process of the semiconductor refrigeration wafer with a pre-formed solder layer includes the following steps: Step (1): Slice the Bi2Te3-based material ingot.

[0030] Step (2): Prepare a Ni layer and an Au layer on the bare die cut in step (1) to form a wafer.

[0031] Step (3): Cut the wafer prepared in step (2) into semiconductor particles of a preset size.

[0032] Step (4): Sputter a copper metal composite layer on both sides of the insulating material board to serve as the substrate for the semiconductor cooling chip.

[0033] The insulating material is a high thermal conductivity ceramic, including aluminum nitride and aluminum oxide. The electrode material is a high electrical and thermal conductivity metallic material such as Cu and Al.

[0034] Step (5): Prepare a Ni layer and a highly solderable Au layer on the surface of the substrate sputtered layer prepared in step (4).

[0035] The coating preparation method is either electroplating or chemical plating.

[0036] Step (6): Etch the required circuit diagram into the substrate metal layer prepared in step (5) according to the shape of the design drawing.

[0037] Step (7): Place solder on the circuit soldering position of the substrate prepared in step (6).

[0038] Soldering is done through printing.

[0039] Step (8): Connect the semiconductor particles prepared in step (3) with the substrate with printed solder prepared in step (7) by soldering to prepare a semiconductor cooling chip device.

[0040] Before soldering, the upper and lower surfaces of the substrate to which the solder is printed are cleaned using plasma.

[0041] Step (9): The semiconductor refrigeration wafer prepared in step (8) is heated and welded.

[0042] Step (10): Print the corresponding square solder paste on the surface of the TEC prepared in step (9) that requires pre-placed solder. The printed pattern is arranged in a small hole matrix.

[0043] When printing solder paste, screen printing or stencil printing is usually used. The size and spacing of the mesh depend on the user's requirements for the thickness of the pre-applied solder layer and the characteristics of the selected solder.

[0044] Step (11): The semiconductor cooling chip with pre-printed solder paste printed in step (10) is heated by a high-precision temperature control device to form a pre-printed solder layer. The heating temperature of PEAK is 10% lower than that of the traditional process, and the time above the melting point is also 70% shorter than that of the traditional process.

[0045] In this embodiment, a vacuum welding furnace is used as the high-precision temperature control device.

[0046] A schematic diagram of optical transmission after the semiconductor cooling chip with the pre-placed solder layer provided in this embodiment is soldered to the casing and other devices is shown below. Figure 3As shown, a semiconductor cooling chip 2 is disposed inside a housing 1. A backlight tube 3, a thermistor 4, a laser 5, a first lens 6, an isolator 7, and a second lens 8 are soldered onto the semiconductor cooling chip through a pre-placed solder layer. The first lens and the second lens are respectively disposed at both ends of the isolator, with the isolator located to the right of the first lens, the laser located to the left of the first lens, the thermistor located to the left of the laser, and the backlight tube located to the left of the thermistor. A metallized optical fiber is disposed inside a metal sleeve 9. The metal sleeve and the metallized optical fiber are connected by solder. The metallized optical fiber includes a metal layer 10 and an optical fiber 11. The metallized optical fiber is connected to the semiconductor cooling chip by laser spot welding. The optical fiber is opposite to the second lens, and laser output is performed through the optical fiber.

[0047] The first and second lenses are either tapered fiber optic lenses or aspherical lenses.

[0048] This embodiment provides a semiconductor refrigeration chip with a pre-placed solder layer, which improves the flatness of the pre-placed solder in TEC products and overcomes the problems of light source obstruction and solder voids after terminal casing soldering. By setting a rectangular array of square solder paste in the pre-placed solder area on the semiconductor refrigeration chip, and then vacuum heating the square solder paste to form a pre-placed solder layer, the tension characteristics of the solder paste during melting can be effectively avoided, which causes the solder paste to be pulled towards the center area after melting, resulting in a thicker center area and thinner periphery of the pre-placed solder layer. This achieves ideal appearance flatness and thickness consistency. After soldering optical devices, light transmission is not obstructed, the solder surface is flat, and no solder voids are generated.

[0049] Example 2: This embodiment provides a method for fabricating a semiconductor cooling chip with a pre-applied solder layer, such as... Figure 4 As shown, it includes the following steps: Step 1: Prepare semiconductor particles and a substrate for printing solder paste. Vacuum weld the semiconductor particles to the substrate to obtain a TEC product. Step 2: Use a stencil to print solder paste on a pre-placed solder area on the lower surface of the TEC product. Step 3: Vacuum heat weld the TEC product with solder paste printed on the pre-placed solder area to obtain a semiconductor refrigeration chip with a pre-placed solder layer.

[0050] The semiconductor refrigeration chip fabrication method with pre-placed solder layer provided in this embodiment addresses the technical problem that traditional methods, such as heating and melting tin sheets, can only form pre-placed solder on the surface. However, due to the surface tension characteristics of the solder paste during melting, the pre-placed solder area is uneven, or tends to be thicker in the center and thinner around the edges, failing to meet the requirement of thickness uniformity and causing optical path obstruction after optical device soldering. By printing, the corresponding solder is printed on the TEC surface in the areas where pre-placed solder is required. The printed pattern is arranged in a matrix of pinholes, and a vacuum soldering method is used to precisely control the PEAK temperature of the heating curve and the time above the solder melting point, reducing the influence of the surface tension characteristics of the solder paste during melting. This allows the solder paste after matrix arrangement printing to rapidly cool and solidify in the early stage of heating and melting, avoiding the phenomenon of the molten solder paste continuing to be drawn to the center area, resulting in a thick center area. The semiconductor cooling chip fabrication method with pre-placed solder layer provided in this embodiment can effectively control the flatness and thickness consistency of the pre-placed solder. Good flatness can meet customer requirements. After welding optical devices, light transmission will not be blocked, the welding surface is flat, and no welding voids will be generated.

[0051] The following examples and specific application scenarios further illustrate the technical solution and effects of the present invention. The following examples are explanations of the present invention, but the present invention is not limited to the following examples.

[0052] During the production of semiconductor refrigeration chips, users often require that solder be pre-applied to the surface of the TEC after its fabrication. The melting point of this solder is generally 30°C or more lower than that of the solder used for soldering the TEC itself. Pre-applying solder is usually done by attaching tin sheets and then heating and soldering.

[0053] The existing method for fabricating a semiconductor refrigeration chip with a pre-applied solder layer includes the following steps: A Bi2Te3-based material ingot is sliced ​​to the required thickness using an inner-circle cutting method to obtain a bare wafer; a Ni layer is prepared on the bare wafer using electroplating, an Au layer is prepared on the Ni layer, and then the wafer is cut to obtain semiconductor particles. A Cu metal composite layer is sputtered on both sides of an insulating aluminum nitride substrate, followed by electroplating of a Cu layer, then a Ni layer, and finally an Au layer. A circuit pattern is etched onto the substrate, and the semiconductor particles are soldered to the substrate to obtain the TEC product. Flux is applied to the underside of the TEC product, and a SAC305 solder sheet (melting point 217℃) of a specified size of 10.3*2.3*0.025mm is attached. Vacuum furnace soldering is then performed, such as... Figure 5 As shown, this method heats the PEAK to 250℃, and the time above the melting point is 50 seconds. PEAK temperature, or peak temperature, refers to the highest temperature value reached during a specific process.

[0054] However, the above methods result in poor surface flatness and thickness consistency after pre-applied solder. When optical devices are soldered to the TEC surface, they will be not level, light transmission will be blocked, and soldering voids will be generated, affecting the cooling performance of the product and failing to meet user requirements. Therefore, it is necessary to develop a new pre-applied solder process.

[0055] The solution adopted in this embodiment is as follows: After the TEC is prepared, according to the user's requirements for the thickness of the pre-placed solder, the corresponding solder paste is printed on the area of ​​the TEC surface that needs to be pre-placed solder by means of screen printing or stencil printing. The printed pattern is arranged in a matrix of small holes. The design of the hole size and spacing is mainly based on the requirements for the thickness of the pre-placed solder and the characteristics of the selected solder. Solder paste is not printed on the entire surface.

[0056] Specifically include: 1. Prepare a substrate for semiconductor particles and printed solder paste, and vacuum weld the semiconductor particles to the substrate to obtain a semiconductor cooling chip product.

[0057] Step (1): Cut the Bi2Te3-based material ingot into slices according to the required thickness using the inner circle cutting method to obtain bare wafers.

[0058] Step (2): Prepare a Ni layer on the bare wafer from step (1) by electroplating. The Ni layer has a thickness of 3 to 9 micrometers. Prepare an Au layer on the Ni layer. The Au layer has a thickness of 0.2 to 0.5 micrometers to obtain the wafer.

[0059] Step (3): Cut the wafer prepared in step (2) into semiconductor particles of 0.42×0.42mm.

[0060] Step (4): Sputter a Cu metal composite layer on both sides of the insulating aluminum nitride plate.

[0061] Step (5): Electroplat a Cu layer on the surface of the Cu metal composite layer of the substrate prepared in step (4), with a Cu layer thickness of 15 to 25 micrometers. Electroplat a Ni layer on the Cu layer, with a Ni layer thickness of 3 to 9 micrometers. Electroplat a highly solderable Au layer on the Ni layer, with an Au layer thickness of 0.2 to 0.5 micrometers.

[0062] Step (6): Etch the required circuit diagram into the substrate metal layer prepared in step (5) according to the shape of the drawing.

[0063] Step (7): Print Au-Sn solder paste onto the substrate soldering area using a printing method.

[0064] Step (8): Connect the semiconductor particles prepared in step (3) to the substrate after the solder paste is printed in step (7) using Au-Sn solder paste, and weld them in a vacuum furnace to complete the semiconductor refrigeration chip welding and obtain the semiconductor refrigeration chip product.

[0065] 2. Using a stencil, solder paste is printed on the pre-placed solder area on the lower surface of the semiconductor cooling chip product.

[0066] Step (9): Using a 0.08mm thick steel mesh, print PF305-153 solder paste on the area where solder needs to be pre-placed on the lower surface of the semiconductor cooling chip product. The mesh openings are arranged in a matrix manner, and the total area of ​​the openings accounts for 45%-50% of the area of ​​the pre-placed solder area. In this embodiment, it is 47%.

[0067] By printing, the corresponding solder is printed on the surface of the semiconductor cooling chip product in the area where solder needs to be pre-placed. The printed pattern is arranged in a matrix of small holes, which can reduce the influence of the surface tension characteristics when the solder paste melts. This allows the solder paste printed in the matrix arrangement to start cooling down and solidifying rapidly in the early stage of heating and melting, which can prevent the molten solder paste from being drawn to the central area and forming a thick central area.

[0068] 3. Vacuum heating is performed on the semiconductor refrigeration chip product with solder paste printed on the pre-solder area to obtain a semiconductor refrigeration chip with a pre-solder layer.

[0069] Step (10): Place the TEC with solder paste printed on the pre-placed solder area into a vacuum soldering furnace for heating and soldering. For example... Figure 6 As shown, in this embodiment, the PEAK is heated to 225°C for 15 seconds above its melting point.

[0070] Compared to Figure 5 The existing manufacturing method shown heats the PEAK at 250°C for 50 seconds above the melting point. The heating temperature of the PEAK is reduced by 25°C and the time above the melting point is reduced by 35 seconds, saving time, improving efficiency, and reducing costs.

[0071] Meanwhile, after testing and comparison, it was found that the pre-solder layer obtained after heating the pre-solder of the semiconductor cooling chip produced in this embodiment has a smooth solder surface.

[0072] Based on the experimental data, the vacuum heating temperature of PEAK and the time above the melting point, controlled according to the process parameters of this embodiment, can meet the test requirements for the appearance flatness and thickness uniformity after the pre-applied solder.

[0073] Specifically, the thickness of the semiconductor refrigeration chip fabricated using the method provided in this embodiment is tested, such as... Figure 7As shown, the pre-set solder area is divided into n small areas. In this embodiment, n is 15, resulting in A1-A15 small areas. The thickness of each small area is tested at point x. In this embodiment, x is 5. The 5 points are located at the four corners and the center of each small area.

[0074] The average thickness of the 5 points was taken as the solder thickness of the small area. Thus, the solder thickness of each of the 15 small areas was obtained, and the test results are shown in the table below.

[0075] The difference between the maximum and minimum solder thickness in 15 small regions was calculated to obtain the solder thickness range of the 15 small regions. According to the table above, the maximum solder thickness in the 15 small regions is 14.4 micrometers, and the minimum solder thickness is 18.1 micrometers, with a difference of 3.7 micrometers. Therefore, the range of the fabricated semiconductor refrigeration chip is 3.7 micrometers. This indicates that the semiconductor refrigeration chip obtained in this embodiment has a smooth pre-placed solder layer with uniform thickness within a single chip, achieving ideal smoothness and thickness consistency. After soldering it to optical devices, the solder distribution on the bonding surface with the casing is uniform, light transmission is not obstructed, the bonding surface is smooth, and no voids are generated.

[0076] Based on the above, the semiconductor refrigeration chip fabrication method with a pre-placed solder layer provided in this embodiment has the following beneficial effects: 1. By printing, the corresponding solder is printed on the area of ​​the TEC surface where solder needs to be pre-placed. The printed pattern is arranged in a matrix of small holes. Vacuum welding is then used to precisely control the PEAK temperature of the heating curve and the time above the solder melting point. This reduces the influence of the surface tension characteristics when the solder paste melts, so that the solder paste printed in the matrix arrangement begins to cool down and solidify rapidly in the early stage of heating and melting. This can prevent the molten solder paste from being drawn to the center area and forming a thick center area.

[0077] 2. Vacuum heating welding is adopted to precisely control the heating temperature of the PEAK and the time above the melting point of the solder paste. The PEAK temperature is 10% lower than that of traditional heating PEAK, and the time above the melting point is shortened by 70% compared with traditional heating methods.

[0078] Example 3: This embodiment provides a method for fabricating a semiconductor refrigeration chip with a pre-applied solder layer. Based on Embodiment 2, it also provides a testing method for detecting whether the semiconductor refrigeration chip fabricated using the process described in Embodiment 2 is qualified.

[0079] According to the description in Example 2, under normal circumstances, the semiconductor refrigeration chip with a pre-solder layer is manufactured using the manufacturing process in Example 2. The flatness of the pre-solder layer is good, so this characteristic can be used to detect whether the semiconductor refrigeration chip is qualified.

[0080] like Figure 4 As shown, after the semiconductor refrigeration wafer with the pre-placed solder layer is fabricated, the pre-placed solder area is divided into n small areas. The thickness of each small area is tested at point x, and the average thickness of point x is taken as the solder thickness of that small area.

[0081] Thus, the solder thickness of each of the n small regions is obtained. The difference between the maximum and minimum solder thickness in the n small regions is calculated to obtain the solder thickness range of the n small regions. It is then determined whether the range is less than or equal to a threshold. In this embodiment, the threshold is 5 micrometers. If it is, it indicates that the semiconductor refrigeration chip with the pre-placed solder layer is qualified and can be used to weld optical devices.

[0082] If the range is greater than the threshold, the thickness is retested to determine if the obtained range still does not meet the requirement of being less than or equal to the threshold. If so, it indicates an error occurred during the manufacturing process, and the semiconductor refrigeration chip with the pre-placed solder layer is defective. If the test results on both sides are inconsistent, test points are added to each region, and the test is repeated.

[0083] The embodiments described above are merely preferred embodiments of the present invention and are not intended to limit the present invention in any way. Other variations and modifications are possible without departing from the technical solutions described in the claims.

Claims

1. A semiconductor cooling chip with a pre-formed solder layer, characterized in that, include: An upper substrate and a lower substrate are provided, with semiconductor particles between the upper substrate and the lower substrate. A pre-placed solder area is provided on the upper surface of the upper substrate or the lower surface of the lower substrate by vacuum welding. Square solder paste is arranged in a matrix on the pre-placed solder area. The square solder paste is vacuum heated to obtain a pre-placed solder layer.

2. The semiconductor cooling chip with a pre-formed solder layer according to claim 1, characterized in that, The semiconductor particles include N-type semiconductors and P-type semiconductors, which are staggered in the horizontal direction.

3. A method for fabricating a semiconductor refrigeration chip with a pre-formed solder layer, characterized in that, include: S1: Prepare a substrate for semiconductor particles and printed solder paste, and vacuum weld the semiconductor particles to the substrate to obtain a semiconductor cooling chip product. S2: Using a stencil, solder paste is printed on the pre-placed solder area on the lower surface of the semiconductor cooling chip product; S3: Vacuum heating is performed on the semiconductor refrigeration chip product with solder paste printed on the pre-solder area to obtain a semiconductor refrigeration chip with a pre-solder layer.

4. The method for fabricating a semiconductor refrigeration chip with a pre-placed solder layer according to claim 3, characterized in that, The pre-placed solder area of ​​the completed semiconductor refrigeration chip is divided into n small areas. x points are tested in each small area, and the average thickness of x points is taken as the solder thickness of the small area. It is determined whether the solder thickness range of the n small areas meets the threshold. If it does not meet the threshold, the test is repeated. If it still does not meet the threshold, the semiconductor refrigeration chip is considered a defective product.

5. A method for fabricating a semiconductor refrigeration chip with a pre-placed solder layer according to claim 3 or 4, characterized in that, The openings of the steel mesh are arranged in a matrix of small holes, and the total area of ​​the openings accounts for 45%-50% of the area of ​​the pre-placed welding material.

6. The method for fabricating a semiconductor refrigeration wafer with a pre-placed solder layer according to claim 3, characterized in that, The substrate for preparing printed solder paste includes: sputtering a copper metal composite layer on both sides of an insulating material board as a substrate; electroplating a Cu layer on the surface of the copper metal composite layer; preparing a Ni layer and a highly solderable Au layer on the Cu layer; etching the required circuit pattern on the prepared substrate metal layer; and placing solder at the circuit soldering positions.

7. A method for fabricating a semiconductor refrigeration wafer with a pre-placed solder layer according to claim 3 or 6, characterized in that, The preparation of semiconductor particles includes: slicing a base material crystal rod to obtain a bare wafer; preparing a Ni layer and an Au layer on the bare wafer to form a wafer; and cutting the wafer to obtain semiconductor particles.

8. A method for fabricating a semiconductor refrigeration wafer with a pre-placed solder layer according to claim 3, 4, or 6, characterized in that, In step S3, the heating temperature is less than or equal to 225°C, and the time above the melting point is 15 seconds.

9. A method for fabricating a semiconductor refrigeration chip with a pre-placed solder layer according to claim 6, characterized in that, The Cu layer has a thickness of 15-25 micrometers, the Ni layer has a thickness of 3-9 micrometers, and the Au layer has a thickness of 0.2-0.5 micrometers.

10. A method for fabricating a semiconductor refrigeration wafer with a pre-placed solder layer according to claim 6 or 9, characterized in that, The insulating material is a high thermal conductivity ceramic, and the electrode material is a high electrical conductivity and high thermal conductivity metal material.

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