Surface-mounted substrate integrated waveguide filter and preparation method thereof

Abstract

The invention relates to a surface-mounted substrate integrated waveguide filter and a preparation method thereof. The surface-mounted substrate integrated waveguide filter comprises at least one substrate and at least one substrate integrated waveguide filter, the upper surface of each substrate is formed by sequentially arranging a first metal region, a second metal region and a third metal region along the y-axis direction; one end of each second metal area along the x-axis direction is provided with a radio frequency input section, and the other end of each second metal area along the x-axis direction is provided with a radio frequency output section; each substrate is provided with an insulating area; a plurality of conductive holes which are symmetrically distributed along the center line of the second metal region are formed in each first metal region and each third metal region at intervals; at least one substrate integrated waveguide filter is mounted on each substrate in each first metal area or each third metal area. The microwave millimeter wave filter can be widely applied to the field of microwave millimeter wave circuits.

Description

Technical Field

[0001] This invention relates to the field of microwave and millimeter-wave circuits, and in particular to a surface-mount substrate integrated waveguide filter and its fabrication method. Background Technology

[0002] Substrate integrated waveguide filters are high-performance filters implemented using modern microwave and millimeter-wave integrated circuits. They simulate the behavior of traditional rectangular waveguides by etching metallized conductive holes or slots on a common dielectric substrate, thereby achieving efficient transmission and control of electromagnetic waves. Substrate integrated waveguides combine the advantages of traditional waveguides, such as low loss, high power capacity, and ease of integration with planar circuits, while overcoming the disadvantages of large size and high cost. In wireless communication equipment, substrate integrated waveguide filters are directly integrated into the RF front-end module for selective signal filtering to remove unwanted frequency components and improve signal quality; or they can be integrated into the feed network of antenna arrays to facilitate the design of high-performance multi-antenna systems.

[0003] In the aforementioned integrated applications, substrate-integrated waveguide filters typically employ gold wire bonding to connect the filter's input port to the peripheral circuitry. However, substrate-integrated waveguides are generally several hundred micrometers in height, resulting in relatively long gold wire arcs during bonding, which significantly introduces parasitic parameters, primarily parasitic inductance. In the field of microelectronics, besides gold wire bonding, another commonly used integration method is surface mounting. However, the upper surface of substrate-integrated waveguide filters usually contains several resonant vias and resonant elements, posing a significant challenge to surface mounting. Therefore, gold wire bonding remains the conventional integration method.

[0004] Regardless of the integration method, it is undesirable to introduce additional insertion loss and return loss. Substrate-integrated waveguides have advantages in the millimeter-wave band, but at this frequency, parasitic parameters are easily introduced. If gold wire bonding is used, it means that the inherent performance advantages cannot be maximized. Therefore, a surface-mount substrate-integrated waveguide filter is needed that can solve high-frequency parasitic parameters without introducing additional insertion loss and return loss. Summary of the Invention

[0005] To address the aforementioned problems, the present invention aims to provide a surface-mount substrate integrated waveguide filter and its fabrication method, which can solve high-frequency parasitic parameters without introducing additional insertion loss and return loss.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: On one hand, a surface mount substrate integrated waveguide filter is provided, comprising at least one substrate and at least one substrate integrated waveguide filter, wherein each of the substrates comprises a first metal region, a second metal region, a third metal region, an RF input segment, an RF output segment and an insulating region, and each of the substrate integrated waveguide filters comprises at least one resonant cavity; The upper surface of each substrate is formed by the first metal region, the second metal region and the third metal region arranged sequentially along the y-axis; one end of each second metal region along the x-axis is provided with the radio frequency input segment for receiving and processing external radio frequency signals, and the other end of each second metal region along the x-axis is provided with the radio frequency output segment for generating and transmitting processed radio frequency signals; Located in the middle of each of the second metal regions, each of the substrates is provided with an insulating region for avoiding the absorption of electromagnetic fields from the etched areas on the upper surface of the chip; each of the first metal regions and the third metal regions is provided with a plurality of conductive holes symmetrically distributed along the center line of the second metal region for shielding electromagnetic field lines; at least one of the substrate integrated waveguide filters is mounted on each of the substrates located in each of the first metal regions or the third metal regions.

[0007] Furthermore, each of the substrates is composed of a first upper surface metal layer, a first dielectric layer and a first lower surface metal layer, wherein the first metal region, the second metal region and the third metal region constitute the first upper surface metal layer.

[0008] Furthermore, both the RF input segment and the RF output segment include a first interconnect port, an impedance transformation segment, and a second interconnect port; The first interconnect port of the RF input segment is located at one end of the second metal region along the x-axis, and the first interconnect port of the RF output segment is located at the other end of the second metal region along the x-axis. Located in the second metal region, each first interconnect port is connected to a corresponding second interconnect port through a corresponding impedance transformation segment. The second interconnect ports of the RF input segment and the RF output segment correspond to the two ends of the insulating region on the substrate along the x-axis, respectively. The first interconnect port is used to connect to an RF coaxial connector or to transmit signals when used in cooperation with other devices. The impedance transformation segment is used to generate a frequency response and impedance matching to achieve the target impedance value at the first interconnect port. The second interconnect port is used to connect to the input port or output port of the corresponding substrate integrated waveguide filter.

[0009] Furthermore, there is at least one impedance transformation segment, and the transformation segment adopts a T-shaped transformation, asymptotic transformation, or trapezoidal transformation.

[0010] Furthermore, when the dielectric of the substrate integrated waveguide filter and the dielectric of the substrate are the same and have the same thickness, the width of the second metal region at the second interconnect port is equal to the width of the signal line at the input port or output port of the substrate integrated waveguide filter, and the spacing between the second metal region and the first metal region or the third metal region at the second interconnect port is equal to the spacing between the signal line at the input port or output port of the substrate integrated waveguide filter and ground.

[0011] Furthermore, the insulating region on each of the substrates is etched through to air, or the upper surface metal is etched away to expose the first dielectric layer.

[0012] Furthermore, the conductive holes on each of the first and third metal regions are distributed along the y-direction from the edge of the insulating region to or beyond the periphery of the substrate integrated waveguide filter.

[0013] Furthermore, each of the aforementioned substrate integrated waveguide filters is composed of a second upper surface metal layer, a second dielectric layer, and a second lower surface metal layer.

[0014] Furthermore, each of the substrate integrated waveguide filters is divided into two or more resonant cavities by using axisymmetric through-holes.

[0015] On the other hand, a method for fabricating a surface-mount substrate integrated waveguide filter is provided, including: Based on the dimensions of the input or output ports of the substrate-integrated waveguide filter, determine the initial dimensions of the RF input and RF output sections on the corresponding substrate. Based on the material and thickness of the substrate, the spacing between the second metal region and the first or third metal region at the second interconnection port of the RF input section and the RF output section is initially determined. The cutoff frequency of the substrate is determined based on the passband and center frequency of the substrate-integrated waveguide filter. Based on the cutoff frequency of the substrate, determine the initial diameter of the conductive holes corresponding to the first and third metal regions, and the initial distance along the y-axis between the center point of the second metal region and the center point of the nearest conductive hole. Based on actual application requirements or the specifications of the RF coaxial connector, the dimensions of the first interconnection port of the RF input section and RF output section on the substrate are initially determined. The initial dimensions of the substrate are determined in advance, thereby obtaining the initial design of the substrate; The initial design of the substrate is optimized to obtain the optimized substrate design; A substrate-integrated waveguide filter is set on the optimized substrate, and overall collaborative optimization simulation is performed to obtain the final design of the substrate.

[0016] The present invention has the following advantages due to the adoption of the above technical solutions: 1. This invention cleverly designs the dielectric substrate by interconnecting the substrate-integrated waveguide filter with the dielectric substrate, achieving a loss degradation of no more than 5% at a working frequency of 40GHz.

[0017] 2. This invention can improve the performance of filters, including the degradation of insertion loss and return loss, and frequency offset.

[0018] 3. This invention is applicable to different situations. Regardless of whether the substrate-integrated waveguide filter has any resonant pattern or not, the surface mount of this invention can be performed.

[0019] 4. By designing the insulating region of the substrate and using surface mounting, this invention can reduce radiation loss, resulting in an extremely low insertion loss for the entire surface-mount substrate integrated waveguide filter.

[0020] 5. By designing the structure (size) of the substrate, this invention can avoid the generation of high-order modes within a specific frequency range, thereby achieving broadband and low-loss performance.

[0021] 6. This invention is easy to mass-produce, reduces costs, and improves system performance.

[0022] In summary, this invention can be widely applied in the field of microwave and millimeter-wave circuits. Attached Figure Description

[0023] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts. In the drawings: Figure 1 This is a schematic diagram of the structure of a surface-mount substrate integrated waveguide filter provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of a substrate provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of a radio frequency input segment or radio frequency output segment provided in an embodiment of the present invention, wherein, Figure 3 (a) is a schematic diagram of the structure where the first row of conductive structures consists of conductive holes. Figure 3 (b) is a schematic diagram of the first row of conductive structures being conductive walls; Figure 4 This is a schematic diagram of the shape of the impedance transformation section provided in an embodiment of the present invention; Figure 5 This is a schematic diagram showing the dimensions of a radio frequency input segment or radio frequency output segment according to an embodiment of the present invention; Figure 6 This is a cross-sectional schematic diagram of a substrate provided in an embodiment of the present invention; Figure 7 This is a schematic diagram of the measured curve of the chip before mounting according to an embodiment of the present invention; Figure 8 This is a schematic diagram of the measured curve of the entire assembly after mounting, provided in an embodiment of the present invention. Detailed Implementation

[0024] Exemplary embodiments of the invention will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the invention and to fully convey the scope of the invention to those skilled in the art.

[0025] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” as used herein may also include the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The method steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated unless the order of performance is explicitly indicated. It should also be understood that additional or alternative steps may be used.

[0026] Although terms such as first, second, third, etc., may be used in this document to describe multiple elements, components, regions, layers, and / or segments, these elements, components, regions, layers, and / or segments should not be limited by these terms. These terms may be used only to distinguish one element, component, region, layer, or segment from another. Unless the context clearly indicates otherwise, terms such as "first," "second," and other numerical terms used herein do not imply order or sequence. Therefore, the first element, component, region, layer, or segment discussed below may be referred to as the second element, component, region, layer, or segment without departing from the teachings of the exemplary embodiments.

[0027] For ease of description, spatial relative terms may be used in the text to describe the relationship of one element or feature relative to another element or feature as shown in the figure. These relative terms include, for example, "inside," "outside," "middle," "outer," "below," "above," etc. Such spatial relative terms are intended to include different orientations of the device in use or operation, other than those depicted in the figure.

[0028] In the aforementioned integrated applications, substrate-integrated waveguide filters typically employ gold wire bonding to connect the filter's input port to the peripheral circuitry. However, substrate-integrated waveguides are generally several hundred micrometers in height, resulting in long gold wire arcs during bonding, which significantly introduces parasitic parameters, primarily parasitic inductance. In the field of microelectronics, besides gold wire bonding, another commonly used integration method is surface mounting. However, the upper surface of a substrate-integrated waveguide filter usually contains several resonant vias and resonant elements, posing a significant challenge to surface mounting. Therefore, gold wire bonding remains the conventional integration method. Regardless of the integration method, it is undesirable to introduce additional insertion loss and return loss. Substrate-integrated waveguides have advantages in the millimeter-wave band, where parasitic parameters are easily introduced. Using gold wire bonding would mean that the inherent performance advantages cannot be maximized. Therefore, a surface-mount substrate-integrated waveguide filter is needed that can address high-frequency parasitic parameters without introducing additional insertion loss and return loss. This invention provides a surface-mount substrate integrated waveguide filter, comprising at least one substrate and at least one substrate integrated waveguide filter. Each substrate includes a first metal region, a second metal region, a third metal region, an RF input segment, an RF output segment, and an insulating region. Each substrate integrated waveguide filter includes at least one resonant cavity. The upper surface of each filter is formed by the first, second, and third metal regions sequentially arranged along the y-axis. One end of each second metal region along the x-axis is provided with an RF input segment for receiving and processing external RF signals, and the other end of each second metal region along the x-axis is provided with an RF output segment for generating and transmitting processed RF signals. An insulating region is provided on each substrate at the center of each second metal region to avoid absorbing electromagnetic fields from the etched area on the chip's upper surface. A plurality of conductive holes for shielding electromagnetic field lines are symmetrically distributed along the centerline of each second metal region on each first and third metal region. At least one substrate integrated waveguide filter is mounted on each substrate at each first or third metal region. The design of this invention can improve the filter's insertion loss, return loss degradation, frequency offset, and other performance characteristics, achieving a loss degradation of no more than 5% at a working frequency of 40GHz.

[0029] Example 1 like Figure 1 , Figure 2As shown, this embodiment provides a surface mount substrate integrated waveguide filter, including at least one substrate 1 and at least one substrate integrated waveguide filter 2. Each substrate 1 includes a first metal region 11, a second metal region 12, a third metal region 13, an RF input section 14, an RF output section 15, and an insulating region 16. Each substrate integrated waveguide filter 2 includes at least one resonant cavity.

[0030] The upper surface of each substrate 1 is formed by a first metal region 11, a second metal region 12, and a third metal region 13 arranged sequentially along the y-axis. One end of the second metal region 12 of each substrate 1 along the x-axis is provided with an RF input segment 14, and the other end of the second metal region 12 of each substrate 1 along the x-axis is provided with an RF output segment 15. The RF input segment 14 is used to receive and process external RF signals, and the RF output segment 15 is used to generate and transmit processed RF signals.

[0031] An insulating region 16 is provided on each substrate 1 at the center of each second metal region 12 to prevent absorption of electromagnetic fields from the etched areas on the upper surface of the chip. A plurality of conductive holes 17 are provided at intervals on each first metal region 11 and third metal region 13, symmetrically distributed along the center line of the second metal region 12, to shield electromagnetic field lines. At least one substrate-integrated waveguide filter 2 is mounted on each substrate 1 at either the first metal region 11 or the third metal region 13.

[0032] In a preferred embodiment, each substrate 1 is composed of a first upper surface metal layer, a first dielectric layer and a first lower surface metal layer. The first metal region 11, the second metal region 12 and the third metal region 13 constitute the first upper surface metal layer. The first dielectric layer can be made of a high-frequency dielectric material, including but not limited to PCB substrate 1, high-resistivity single crystal silicon and high-resistivity compound semiconductors. The metals of the first upper surface metal layer and the first lower surface metal layer can be good conductors, including but not limited to gold, copper, titanium, titanium + gold and chromium + gold.

[0033] In a preferred embodiment, the first metal region 11, the second metal region 12, the third metal region 13, the first row of conductive holes 17 adjacent to the outer side of the substrate 1, and the first lower surface metal layer of the substrate 1 together constitute a resonant cavity and jointly determine the cutoff frequency of the substrate 1.

[0034] In a preferred embodiment, the insulating region 16 on each substrate 1 can be etched through to form air; or the upper surface metal can be etched away to expose the first dielectric layer of the substrate 1. The length of the insulating region 16 on each substrate 1 along the x-direction is less than the total length of the corresponding substrate integrated waveguide filter 2 in the x-direction, with a length difference of 20 to 1000 μm. The width Wmy of the insulating region 16 on each substrate 1 along the y-axis is less than the peripheral width Wa of the corresponding substrate integrated waveguide filter 2 in the y-direction and greater than the spacing LL between the outer endpoints of the axisymmetric vias of the substrate integrated waveguide filter 2.

[0035] In a preferred embodiment, each substrate 1 has mechanical holes 18 at its four corners for mounting and fixing the RF coaxial connector during testing.

[0036] In a preferred embodiment, such as Figure 2 , Figure 3 As shown, both the RF input section 14 and the RF output section 15 include a first interconnect port 141, an impedance transformation section 142, and a second interconnect port 143.

[0037] The first interconnect port 141 of the RF input section 14 is located at one end of the second metal region 12 along the x-axis, and the first interconnect port 141 of the RF output section 15 is located at the other end of the second metal region 12 along the x-axis. The first interconnect port 141 is used for signal transmission when connecting to an RF coaxial connector or when used in conjunction with other devices. Located in the second metal region 12, each first interconnect port 141 is connected to a corresponding second interconnect port 143 through a corresponding impedance transformation section 142. The second interconnect ports 143 of the RF input section 14 and the RF output section 15 correspond to the two ends of the insulating region 16 on the substrate 1 along the x-axis, respectively. Each second interconnect port 143 is adjacent to the corresponding insulating region 16. The impedance transformation section 142 is used to generate a wider frequency response and impedance matching to achieve the target impedance value at the first interconnect port 141. The second interconnect port 143 is used to connect to the input port or output port of the corresponding substrate integrated waveguide filter 2.

[0038] Specifically, such as Figure 4 As shown, there is at least one impedance transformation segment 142, and the transformation segment can adopt a T-type transformation, asymptotic transformation or trapezoidal transformation.

[0039] Specifically, the length between the first interconnect port 141 and the second interconnect port 143 is the total length of the RF input segment 14 or the RF output segment 15. This length design needs to take into account both performance and miniaturization requirements. In some applications, the size of the RF coaxial connector during testing also needs to be considered.

[0040] Specifically, such as Figure 5As shown, the dimensions of the first interconnect port 141 are W1 and S1, where W1 is the width of the second metal region 12 at the first interconnect port 141, and S1 is the spacing between the second metal region 12 and the first metal region 11 or the third metal region 13 at the first interconnect port 141; the dimensions of the second interconnect port 143 are W2 and S2, where W2 is the width of the second metal region 12 at the second interconnect port 143, and S2 is the spacing between the second metal region 12 and the first metal region 11 or the third metal region 13 at the second interconnect port 143; the dimensions of the input port or output port of the substrate integrated waveguide filter 2 are both Wc and Gc, where Wc is the width of the signal line at the input port or output port of the substrate integrated waveguide filter 2, and Gc is the spacing between the signal line at the input port or output port of the substrate integrated waveguide filter 2 and ground; when the dielectric of the substrate integrated waveguide filter 2 and the dielectric of the substrate 1 are the same and have the same thickness, W2=Wc, S2=Gc; otherwise, preferably, W2=Wc.

[0041] In a preferred embodiment, the conductive holes 17 on each of the first metal region 11 and the third metal region 13 are distributed along the y-direction from the edge of the insulating region 16 to the periphery of the substrate integrated waveguide filter 2, and may extend beyond the periphery, but cannot be located inside the periphery.

[0042] Specifically, such as Figure 3 As shown, the conductive hole 17 can be circular or square, and can be an open hole or a continuous conductive wall formed by filling the etching groove with metal.

[0043] In a preferred embodiment, such as Figure 6 As shown, the width of the second metal region 12 is W. There is a spacing S between the first metal region 11 and the second metal region 12, and between the second metal region 12 and the third metal region 13. The diameter of the conductive holes 17 on the surfaces of the first metal region 11 and the third metal region 13 is r. The distance along the y-axis between the center point of the second metal region 12 and the center point of the nearest conductive hole 17 is VL. The distance from the edge of the first metal region 11 near its center to the center point of the nearest conductive hole 17 is the effective grounding width eW, where eW = VL - W / 2 - Sr / 2.

[0044] In a preferred embodiment, each substrate integrated waveguide filter 2 is composed of a second upper surface metal layer, a second dielectric layer, and a second lower surface metal layer. The second dielectric layer can be made of a high-frequency dielectric material, including but not limited to PCB substrate 1, high-resistivity single-crystal silicon, and high-resistivity compound semiconductors. The metals of the second upper surface metal layer and the second lower surface metal layer can be good conductors, including but not limited to gold, copper, titanium, titanium + gold, and chromium + gold.

[0045] In a preferred embodiment, the second upper surface metal layer of each substrate integrated waveguide filter 2 may or may not have any resonant pattern distributed on it. The resonant pattern may be of the form of slotted C-type, U-type, E-type, S-type, spiral coil type, or a combination of various resonators.

[0046] In a preferred embodiment, each substrate integrated waveguide filter 2 is divided into more than two resonant cavities by using an axisymmetric via 21 between its resonant cavities.

[0047] In a preferred embodiment, the axisymmetric vias 21 of each substrate integrated waveguide filter 2 penetrate the corresponding second upper surface metal layer, second dielectric layer and second lower surface metal layer, and the inner surface of each via 21 is covered with a metal layer for conducting electricity.

[0048] In a preferred embodiment, the present invention can be used as a standalone device, or the substrate 1 on which the substrate integrated waveguide filter 2 is mounted can be placed on a large substrate 1, such as a transceiver, for use in conjunction with other devices.

[0049] In a preferred embodiment, such as Figure 7 , Figure 8 As shown, this is the frequency response curve of the substrate-integrated waveguide filter 2 before and after it is mounted on the substrate 1. Figure 7 In the 24.25-27.5GHz band, S21 ≤ 1.987dB; |S11| ≥ 15dB; |S22| ≥ 15dB; out-of-band rejection ≤ -30dB@22GHz, out-of-band rejection ≤ -44dB@30GHz. Figure 8 In the 24.25-27.5GHz band, S21≤2.315dB (without de-embedding); |S11|≥16.8dB; |S22|≥16.6dB; out-of-band rejection ≤-30dB@22GHz, out-of-band rejection ≤-44dB@30GHz; after de-embedding, S21≤2.08dB, that is, the surface mount substrate integrated waveguide filter only increases the insertion loss by <5% compared with the substrate integrated waveguide filter 2; the return loss and out-of-band rejection remain at the original levels.

[0050] Example 2 This embodiment provides a method for fabricating a surface-mount substrate integrated waveguide filter, including the following steps: 1) Based on the dimensions Wc and Gc of the input or output port of the substrate integrated waveguide filter 2, determine the initial dimensions of the second interconnection port 143 of the corresponding RF input segment 14 and RF output segment 15 on the substrate 1 as W2=Wc.

[0051] 2) Based on the material and thickness of the substrate 1, the spacing S2 between the second metal region 12 and the first metal region 11 or the third metal region 13 at the second interconnect port 143 of the RF input section 14 and the RF output section 15 is initially determined to be 50Ω.

[0052] 3) Determine the cutoff frequency of substrate 1 based on the passband and center frequency of substrate integrated waveguide filter 2.

[0053] 4) Based on the cutoff frequency of substrate 1, determine the initial diameter r0 of the conductive hole 17 corresponding to the first metal region 11 and the third metal region 13, and the initial distance VL0 between the center point of the second metal region 12 and the center point of the nearest conductive hole 17 along the y-axis.

[0054] 5) Based on actual application requirements or the specifications of the RF coaxial connector, the dimensions W1 and S1 of the first interconnection port 141 of the RF input section 14 and the RF output section 15 on the substrate 1 are initially determined.

[0055] 6) The initial dimensions of substrate 1 are initially determined, thereby obtaining the initial design of substrate 1.

[0056] Specifically, based on the sum of the length L2 of the substrate integrated waveguide filter 2 along the X-axis, the minimum length of the first interconnect port 141 (40um), the length of the impedance transformation section 142 (set as a variable, with a minimum value of 0um), and the minimum length of the second interconnect port 143 (40um), the initial size of the substrate 1 is determined to be (40um+40um)×2+L2. With S11 and S21 as optimization targets, the lengths of each segment of the first interconnect port 141, the impedance transformation section 142, and the second interconnect port 143 are obtained, thus obtaining the initial length of the substrate 1.

[0057] 7) Using high-frequency simulation software, with S11 and S21 as optimization targets, the initial design of substrate 1 is optimized to obtain the optimized design of substrate 1, including the dimensions W1 and S1 of the first interconnect port 141, the dimensions W2 and S2 of the second interconnect port 143, the length of substrate 1, and the dimensions of impedance transformation section 142.

[0058] 8) Using high-frequency simulation software, a substrate integrated waveguide filter 2 is set on the optimized substrate 1, and overall collaborative optimization simulation is performed to obtain the final design of substrate 1.

[0059] The above embodiments are only used to illustrate the present invention. The structure, connection method and manufacturing process of each component can be varied. All equivalent transformations and improvements made on the basis of the technical solution of the present invention should not be excluded from the protection scope of the present invention.

Claims

1. A surface-mount substrate integrated waveguide filter, characterized in that, The filter includes at least one substrate and at least one substrate integrated waveguide filter, wherein each substrate includes a first metal region, a second metal region, a third metal region, an RF input section, an RF output section and an insulating region, and each substrate integrated waveguide filter includes at least one resonant cavity. The upper surface of each substrate is formed by the first metal region, the second metal region and the third metal region arranged sequentially along the y-axis; one end of each second metal region along the x-axis is provided with the radio frequency input segment for receiving and processing external radio frequency signals, and the other end of each second metal region along the x-axis is provided with the radio frequency output segment for generating and transmitting processed radio frequency signals; Located in the middle of each of the second metal regions, each of the substrates is provided with an insulating region for avoiding the absorption of electromagnetic fields from the etched areas on the upper surface of the chip; each of the first metal regions and the third metal regions is provided with a plurality of conductive holes symmetrically distributed along the center line of the second metal region for shielding electromagnetic field lines; at least one of the substrate integrated waveguide filters is mounted on each of the substrates located in each of the first metal regions or the third metal regions.

2. The surface-mount substrate integrated waveguide filter as described in claim 1, characterized in that, Each of the substrates is composed of a first upper surface metal layer, a first dielectric layer and a first lower surface metal layer, wherein the first metal region, the second metal region and the third metal region constitute the first upper surface metal layer.

3. The surface-mount substrate integrated waveguide filter as described in claim 1, characterized in that, Both the RF input segment and the RF output segment include a first interconnect port, an impedance transformation segment, and a second interconnect port; The first interconnect port of the RF input segment is located at one end of the second metal region along the x-axis, and the first interconnect port of the RF output segment is located at the other end of the second metal region along the x-axis. Located in the second metal region, each first interconnect port is connected to a corresponding second interconnect port through a corresponding impedance transformation segment. The second interconnect ports of the RF input segment and the RF output segment correspond to the two ends of the insulating region on the substrate along the x-axis, respectively. The first interconnect port is used to connect to an RF coaxial connector or to transmit signals when used in cooperation with other devices. The impedance transformation segment is used to generate a frequency response and impedance matching to achieve the target impedance value at the first interconnect port. The second interconnect port is used to connect to the input port or output port of the corresponding substrate integrated waveguide filter.

4. The surface-mount substrate integrated waveguide filter as described in claim 3, characterized in that, There is at least one impedance transformation segment, and the transformation segment adopts T-type transformation, asymptotic transformation or trapezoidal transformation.

5. A surface-mount substrate integrated waveguide filter as described in claim 3, characterized in that, When the dielectric of the substrate integrated waveguide filter and the dielectric of the substrate are the same and have the same thickness, the width of the second metal region at the second interconnect port is equal to the width of the signal line of the input port or output port of the substrate integrated waveguide filter, and the spacing between the second metal region and the first metal region or the third metal region at the second interconnect port is equal to the spacing between the signal line of the input port or output port of the substrate integrated waveguide filter and ground.

6. The surface-mount substrate integrated waveguide filter as described in claim 1, characterized in that, The insulating region on each substrate is etched through to air, or the upper surface metal is etched away to expose the first dielectric layer.

7. A surface-mount substrate integrated waveguide filter as described in claim 1, characterized in that, The conductive holes on each of the first and third metal regions are distributed along the y-direction from the edge of the insulating region to or beyond the periphery of the substrate integrated waveguide filter.

8. A surface-mount substrate integrated waveguide filter as described in claim 1, characterized in that, Each of the aforementioned substrate integrated waveguide filters is composed of a second upper surface metal layer, a second dielectric layer, and a second lower surface metal layer.

9. A surface-mount substrate integrated waveguide filter as described in claim 1, characterized in that, Each of the substrate integrated waveguide filters is divided into two or more resonant cavities by using axisymmetric through-holes.

10. A method for fabricating a surface-mount substrate integrated waveguide filter based on any one of claims 3 to 9, characterized in that, include: Based on the dimensions of the input or output ports of the substrate-integrated waveguide filter, determine the initial dimensions of the RF input and RF output sections on the corresponding substrate. Based on the material and thickness of the substrate, the spacing between the second metal region and the first or third metal region at the second interconnection port of the RF input section and the RF output section is initially determined. The cutoff frequency of the substrate is determined based on the passband and center frequency of the substrate-integrated waveguide filter. Based on the cutoff frequency of the substrate, determine the initial diameter of the conductive holes corresponding to the first and third metal regions, and the initial distance along the y-axis between the center point of the second metal region and the center point of the nearest conductive hole. Based on actual application requirements or the specifications of the RF coaxial connector, the dimensions of the first interconnection port of the RF input section and RF output section on the substrate are initially determined. The initial dimensions of the substrate are determined in advance, thereby obtaining the initial design of the substrate; The initial design of the substrate is optimized to obtain the optimized substrate design; A substrate-integrated waveguide filter is set on the optimized substrate, and overall collaborative optimization simulation is performed to obtain the final design of the substrate.

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