Direct current motor drive circuit layout optimization method based on thermal simulation

Abstract

The invention discloses a direct current motor drive circuit layout optimization method based on thermal simulation, and relates to the technical field of circuit layout optimization. The method comprises the following steps: modeling circuit thermal characteristics, defining a thermal resistance network of a power device, considering a heat conductivity coefficient of a PCB, constructing an electric-thermal coupling model, setting boundary conditions, loading current and voltage, solving a temperature field by using a Joule law and a Fourier equation, defining layout variables, establishing an objective function containing junction temperature, temperature difference and cost, and performing iterative optimization by using a genetic algorithm. And thermal simulation optimization of the layout of the driving circuit is realized. The temperature field is accurately predicted, the heat management efficiency is improved, and the optimization period is shortened; thermal coupling influence is reduced, chip stability is guaranteed, multi-working-condition verification is reliable, heat dissipation is consistent with simulation, cost can be reduced, and safety and service life of a motor system are improved.

Description

Technical Field

[0001] This invention relates to the field of cross-border e-commerce security system technology, and in particular to a method for optimizing the layout of DC motor drive circuits based on thermal simulation. Background Technology

[0002] In fields such as industrial automation, electric vehicles, and consumer electronics, DC motors are widely used due to their superior speed regulation performance and high control precision. The thermal management of the drive circuit directly affects the stability and lifespan of the motor system. Traditional DC motor drive circuit layout design relies heavily on engineers' experience, involving repeated trial and error adjustments to component positions and heat dissipation structures, making it difficult to accurately quantify thermal coupling effects. For example, power devices (IGBTs, diodes) generate significant heat during high-frequency switching. Improper layout can lead to excessively high local temperatures, causing device failure or degraded circuit performance. Existing methods lack systematic analysis of heat conduction paths and multi-physics coupling.

[0003] As motor power density increases, the problem of heat accumulation in drive circuits becomes increasingly prominent. Traditional layout methods typically consider only a single thermal resistance path, failing to integrate the multi-field coupling characteristics of electro-thermal-fluid systems. For example, the interaction between the copper foil distribution on the PCB board, the heat sink structure, and air convection significantly affects the temperature field distribution. However, existing simulation methods often employ simplified models, leading to discrepancies between layout optimization results and actual operating conditions. Furthermore, the dynamic changes in device power consumption under different operating conditions (start-up, constant speed, braking) make it difficult for traditional methods to quickly assess the reliability of layout schemes in multiple scenarios. This often requires multiple physical prototype tests, which are time-consuming, labor-intensive, and costly.

[0004] Existing technologies still suffer from insufficient protection for heat-sensitive components. Drive control chips (such as MCUs) and detection sensors are susceptible to thermal radiation from power devices. Traditional partitioned layouts lack quantitative design guidelines, potentially leading to abnormal control signals or distorted temperature detection. For example, insufficient spacing between the MCU and IGBT can cause the chip temperature to exceed its operating threshold, resulting in system failure. Furthermore, the lack of efficient optimization algorithms makes it difficult to balance heat dissipation efficiency and layout cost when replacing heat dissipation materials or adjusting layout parameters, thus limiting the miniaturization and reliability improvement of drive circuits. Summary of the Invention

[0005] This invention proposes a DC motor drive circuit layout optimization method based on thermal simulation to solve the problems mentioned in the prior art.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: a DC motor drive circuit layout optimization method based on thermal simulation, comprising: Thermal characteristic parameter modeling steps: Establish a heat conduction model for the DC motor drive circuit, define the thermal resistance network of power devices (IGBT, diode), and the formula is as follows: ,in To achieve the thermal resistance of the junction to the shell, For the junction temperature, Shell temperature, To determine the power consumption of the device, a thermal conductivity matrix for the PCB board is established, considering the influence of copper foil thickness and substrate material on heat diffusion. Multiphysics coupling simulation steps: Construct an electro-thermal coupling model using the finite element method (FEM), and set boundary conditions in ANSYS Icepak: ambient temperature... ℃, natural convection heat transfer coefficient The operating current of the loaded circuit is I=10A and the voltage is V=48V. The conductor loss is calculated using Joule's law, P=I²R (where R is the conductor resistance), combined with the Fourier heat conduction equation. (Q is the power density of the internal heat source) Solve for the temperature field distribution; Layout parameter optimization steps: Define layout optimization variables: power device spacing d, heat dissipation path length L, via density N; establish objective function. ,in The highest junction temperature, Let C be the temperature difference between devices, C be the layout cost, and the weights be w_1=0.6, w_2=0.3, w_3=0.1; iterative optimization is performed using a genetic algorithm (GA).

[0007] Furthermore, it also includes: The heat-sensitive component partitioning steps are as follows: Divide the circuit into a power zone (IGBT), an inductor zone (MCU), and a resistor and temperature sensor zone; in the power zone, use copper foil to ensure the junction temperature of the power devices. ℃; Spacing between drive control area and power area Reduce the impact of thermal coupling; Heat dissipation path design steps: Install thermal vias below the IGBT to connect the top and bottom heat dissipation layers of the PCB; apply thermal grease to the contact surface between the heatsink and the device to reduce contact thermal resistance. ,in S represents the thickness of the silicone grease and S represents the contact area.

[0008] Simulation verification steps: Simulate three operating conditions: motor start-up, constant speed operation, and braking. Run the simulation for 300 seconds under each condition and record the data. and Establish a thermal transient model during operating condition switching; Experimental verification and feedback steps: Create an optimized PCB prototype, use an infrared thermal imager to measure the surface temperature of the components, and compare the result with the simulation results. The error should be less than 5%. If the error exceeds the limit, adjust the layout parameters d and L and re-simulate.

[0009] Furthermore, in the thermal characteristic parameter modeling step, an equivalent thermal resistance network model is adopted to simplify the IGBT into a four-level thermal resistance system: junction-case-heat sink-ambient environment. The formula is as follows: ,in The thermal resistance from the casing to the heatsink. Given the thermal resistance from the heatsink to the environment; establish a power consumption model for the diode. ,in For positive pressure drop, This represents the average current.

[0010] Furthermore, in the multiphysics coupling simulation step, a current density boundary is set in COMSOL Multiphysics. Where A is the conductor cross-sectional area, the heat load is generated through the Joule heat source module; the natural convection module is enabled to calculate the air velocity and couple it to the heat conduction equation for solution.

[0011] Furthermore, in the layout parameter optimization step, the fitness function of the genetic algorithm is designed as follows: Where F is the objective function value; set constraints: device spacing Through-hole density Layout area .

[0012] Furthermore, in the heat-sensitive element partitioning step, the MCU chip in the drive control area uses a low thermal resistance package and is surrounded by decoupling capacitors; the temperature sensor in the detection area is spaced further from the power device. Avoid thermal interference.

[0013] Furthermore, in the heat dissipation path design step, the heat sink uses aluminum profiles, with fin height H=20mm and spacing P=5mm; based on the fin efficiency formula... Optimize the heat dissipation structure, among which t is the thickness of the rib.

[0014] Furthermore, in the aforementioned operating condition simulation verification step, the transient thermal analysis of the startup condition adopts the finite difference method (FDM); the switching losses of the IGBT under the braking condition... As a transient thermal load input, For the opening time, This represents the switching frequency.

[0015] Furthermore, in the experimental verification and feedback steps, thermocouples are used to measure the junction temperature, and the result is obtained through a formula. Calculate; if the simulation and actual measurement errors exceed 5%, adjust the thermal grease thickness. Alternatively, if the number of vias is N, perform a new thermal simulation.

[0016] Compared with existing technologies, the beneficial effects of this invention are: Multi-dimensional thermal characteristic modeling and intelligent optimization algorithms have improved the thermal management efficiency and layout reliability of the drive circuit. Thermal characteristic parameter modeling and multi-physics coupled simulation have enabled accurate prediction of the circuit temperature field. Compared with traditional empirical design, the prediction error of the highest junction temperature has been reduced from 20% to less than 5%, avoiding premature device failure caused by insufficient thermal design.

[0017] The layout parameter optimization step incorporates a genetic algorithm, which achieves global optimization of the layout scheme by quantifying the objective function (combining junction temperature, temperature difference, and cost). Compared with the traditional trial-and-error method, the optimization cycle is shortened by more than 60%. The quantitative method for the partitioning of heat-sensitive components and the design of heat dissipation paths (such as the copper foil thickness in the power area and the device spacing) effectively reduces the impact of thermal coupling, making the temperature of the drive control area 15-20℃ lower than that of the traditional layout, thus ensuring the stable operation of the control chip.

[0018] Multi-condition simulation verification and experimental feedback mechanisms ensure the reliability of the layout scheme under different working scenarios. By simulating the thermal transient response of dynamic processes such as start-up and braking, potential thermal risk points are identified in advance. Combined with iterative optimization based on infrared thermal imager measured data, the actual heat dissipation performance of the layout scheme matches the simulation results by more than 95%. In addition, this method supports rapid optimization of heat dissipation structures (such as radiator fin height and via density), which can reduce layout costs by 10-15% while ensuring heat dissipation efficiency, meeting the dual requirements of economy and reliability in industrial scenarios.

[0019] In summary, the method proposed in this application solves the problems of crude thermal analysis, low optimization efficiency, and poor adaptability to multiple scenarios in traditional layout design. It provides a systematic thermal management solution for high power density DC motor drive circuits, which can be widely used in new energy vehicles, industrial robots and other fields, effectively improving the safety and service life of motor systems. Attached Figure Description

[0020] Figure 1 This is a schematic block diagram of a DC motor drive circuit layout optimization method based on thermal simulation proposed in this invention. Detailed Implementation

[0021] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0023] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified. Furthermore, the terms "installed," "connected," and "linked" should be interpreted broadly; for example, they may refer to a fixed connection, a detachable connection, or an integral connection; they may refer to a mechanical connection or an electrical connection; they may refer to a direct connection or an indirect connection through an intermediate medium; and they may refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances. The invention will now be described in further detail with reference to the accompanying drawings.

[0024] Reference Figure 1 A specific implementation method for optimizing the layout of a DC motor drive circuit based on thermal simulation: Thermal characteristic parameter modeling steps: Establish a heat conduction model for the DC motor drive circuit, and construct a thermal resistance network for power devices (IGBT, diode). Use formulas... Calculate the junction-to-shell thermal resistance, where The junction-to-shell thermal resistance (KW). The junction temperature is ℃. The shell temperature is (°C). The power consumption (W) of the device is given. For the IGBT module (model FF300R12ME4), the power consumption under rated current was measured experimentally. =150W, junction temperature =110℃, shell temperature =85℃, substituting into the formula, we get ; When constructing a heat conduction model for a DC motor drive circuit, building a thermal resistance network is a key method for understanding the heat transfer path of power devices (such as IGBTs and diodes). Taking the junction-to-case thermal resistance as an example... Taking the calculation as an example, it reflects the degree of heat transfer resistance inside the power device, from the chip junction region to the device casing; Taking the IGBT module (model FF300R12ME4) as an example, under rated current conditions, the power consumption P was accurately collected through experiments. d = 150W, junction temperature T j =110℃, shell temperature T c = 85℃. Substituting these actual measured parameters into the formula, the junction-to-shell thermal resistance can be calculated. The smaller the thermal resistance value, the smoother the heat transfer from the junction to the casing, and the better the heat dissipation performance of the device. Such thermal resistance calculation and analysis can provide crucial information for the design of heat dissipation schemes for power devices in DC motor drive circuits (such as heat sink selection and thermal interface material optimization), ensuring stable operation of the devices within a reasonable temperature range and improving the reliability and lifespan of the entire drive system.

[0025] When establishing the thermal conductivity matrix of the PCB board, the influence of copper foil thickness and substrate material on heat diffusion is considered. The thermal conductivity of the FR-4 substrate is k = 0.22 W / m·K, while the thermal conductivity of copper foil is much higher than that of the substrate due to its excellent thermal conductivity. The copper foil thickness is t = 35 μm. This can be calculated using the formula... Calculate the effective thermal conductivity, where The thermal conductivity of the substrate is... The thermal conductivity of copper is 401 Wm·K. Calculations show that the effective thermal conductivity of the PCB containing copper foil increases to 0.35 Wm·K. This result directly demonstrates the enhanced heat dissipation capability of the PCB by the copper foil, providing crucial thermal property data for subsequent PCB thermal design (such as power device layout and heat dissipation hole planning). This ensures that in high-heat-generating scenarios such as DC motor drive circuits, the PCB can efficiently dissipate heat and maintain system thermal balance.

[0026] Using an equivalent thermal resistance network model, the IGBT is simplified to a four-level thermal resistance system: junction-case-heat sink-ambient environment. The formula is as follows: ,in The thermal resistance from the casing to the heat sink is 0.2KW. Given the thermal resistance from the heatsink to the environment (taken as 1.5KW), the total thermal resistance is... Establish a power consumption model for the diode. For the MUR460 diode, the forward voltage drop Average current Then power consumption ; For power modules, the thermal resistance from the casing to the heatsink can be calculated in the following way: If the junction temperature of the device is known Shell temperature Radiator temperature And the device power consumption P, when heat transfer is stable, the thermal resistance from the case to the heat sink. The logic here is: thermal resistance is defined as "the ratio of temperature difference to heat flow (which can be approximated by device power consumption P, where heat flow equals power consumption in steady state)". - It is the temperature difference between the casing and the heat sink, and P is the heat flow through this thermal resistance, which conforms to the thermal resistance. The basic definition of .

[0027] Multiphysics coupling simulation steps: Construct an electro-thermal coupling model in ANSYS Icepak using the finite element method (FEM). Set boundary conditions: ambient temperature. ℃, natural convection heat transfer coefficient ,in Kelvin is the thermodynamic temperature unit; the operating current of the loaded circuit is I=10A and the voltage is V=48V. The conductor loss is calculated using Joule's law P=I²R, where R is the conductor resistance (0.1Ω in this example). Therefore, P=10²×0.1=10W.

[0028] Combining Fourier heat conduction equation Solve for the temperature field distribution, where Q is the power density of the internal heat source. Set the current density boundary in COMSOL Multiphysics. Where A is the cross-sectional area of ​​the conductor (taken as 1 mm²), then The heat load is generated using the Joule heat source module, and the airflow velocity is calculated by enabling the natural convection module. ,in Substituting into .

[0029] Layout parameter optimization steps: Define layout optimization variables: power device spacing d, heat dissipation path length L, and via density N. Establish the objective function. ,in The highest junction temperature, The temperature difference between devices is represented by C, and the layout cost is represented by the weight. When optimizing layout parameters, the key optimization variables should be identified first, with power device spacing, heat dissipation path length, and via density selected as the core adjustment targets. These variables directly affect heat transfer efficiency and layout cost.

[0030] Subsequently, an objective function was constructed, comprehensively considering three key indicators: the maximum junction temperature reflects the ultimate thermal stress that the device can withstand, the temperature difference between devices reflects the uniformity of heat distribution, and layout cost involves the economic investment in design and manufacturing. By setting different weights (maximum junction temperature weight 0.6, inter-device temperature difference weight 0.3, and layout cost weight 0.1), the optimization orientation prioritizing thermal performance is highlighted. This guides the algorithm to reduce the risk of high-temperature operation of devices, balance heat distribution, and moderately control costs, achieving a balance between technical performance and economic feasibility. This provides a scientific optimization basis for PCB layout of systems such as DC motor drive circuits, ensuring the stable and reliable operation of power devices.

[0031] Genetic algorithm (GA) is used for iterative optimization, and crossover probability is set. =0.8, mutation probability =0.05, population size =50. After 20 iterations, the optimal layout was obtained: device spacing d=8mm, heat dissipation path length L=15mm, via density N=60 cm², and the objective function value F=78.5 (corresponding to junction temperature 75℃, temperature difference 12℃, and cost 120 yuan). The fitness function of the genetic algorithm was designed as follows: Set constraints: device spacing Through-hole density Layout area ; During the optimization of layout parameters, a genetic algorithm (GA) is used for iterative optimization. Key parameters of the algorithm are first set as follows: the crossover probability is set to 0.8, allowing for a high probability of gene exchange among individuals within the population, promoting the generation of superior combinations; the mutation probability is set to 0.05, introducing new genes with a low probability to avoid the algorithm getting trapped in local optima; and the population size is set to 50 to ensure population diversity and the algorithm's exploration capabilities.

[0032] After 20 generations of iterative evolution, the algorithm outputs the optimal layout scheme: the power device spacing is set to 8mm, which ensures heat dissipation space between devices while avoiding an overly sparse layout; the heat dissipation path length is controlled at 15mm to shorten the heat transfer distance and improve heat dissipation efficiency; the via density reaches 60 vias / cm², which helps heat to be quickly conducted through the PCB layer. At this point, the objective function value corresponds to a junction temperature of 75℃, a temperature difference between devices of 12℃, and a layout cost of 120 yuan, achieving a good balance between thermal performance and cost.

[0033] To adapt to the genetic algorithm, a fitness function was designed, using the reciprocal of the objective function value to measure the quality of individual components; a higher value indicates a better layout. Constraints were also set: component spacing was no less than 2mm to prevent thermal interference and routing difficulties caused by excessively small spacing; via density was no more than 100 vias / cm² to balance manufacturing feasibility and cost; and the layout area was limited to 100cm² to constrain PCB size and ensure practicality. These settings allow the algorithm to search efficiently within reasonable limits, arriving at the optimal solution that meets engineering requirements.

[0034] The heat-sensitive component partitioning process involves dividing the circuit into a power zone (IGBT, inductor), a drive and control zone (MCU, resistor), and a detection zone (temperature sensor). The power zone utilizes a large-area copper foil (thickness t=35μm) with a high thermal diffusivity. Calculated Ensure the junction temperature of power devices ℃. The distance between the drive control area and the power area is d=7mm to reduce the impact of thermal coupling.

[0035] The MCU chip in the drive control area uses a low thermal resistance package (junction-to-board thermal resistance). Decoupling capacitors are arranged around it (spacing) =1mm); distance between the temperature sensor and the power device in the detection area =12mm, to avoid thermal interference. Calculations using a thermal resistance network show that the temperature rise of the MCU chip during power device operation is... ℃, to ensure that the MCU operating temperature is below 70℃.

[0036] Heat dissipation path design steps: A thermal via (diameter φ=0.8mm) is placed below the IGBT to connect the top and bottom heat dissipation layers of the PCB. The thermal resistance calculation formula is as follows: Where L = 1.6mm (PCB thickness). The thermal conductivity of copper is k = 401 W / m·K. Substituting this into the equation, we get... .

[0037] Apply thermal grease (with thermal conductivity) to the contact surface between the heat sink and the device. Contact thermal resistance ,in =0.1mm, contact area Calculated The heat sink uses aluminum profiles (thermal conductivity k = 202 W / m·K), with fin height H = 20 mm and fin spacing P = 5 mm. The fin efficiency formula is used... Calculation, where Substituting into ,but ; When IGBTs operate, they generate heat. If heat is conducted solely through the PCB surface, there is a certain thermal resistance between the surface layer and the underlying heat dissipation layer. Adding thermal vias effectively creates a more efficient heat conduction channel beneath the IGBT. These vias can be filled with highly thermally conductive materials such as metals, allowing heat to be quickly transferred from the top layer of the PCB to the bottom heat dissipation layer. This reduces the obstacles to heat transfer between PCB layers caused by interlayer contact and the inherent thermal resistance of the materials, thereby lowering the overall thermal resistance (including contact thermal resistance) and accelerating heat dissipation.

[0038] Multi-condition simulation verification steps: Simulate three operating conditions: motor start-up (current I=20A), constant speed operation (I=10A), and braking (reverse voltage V=-24V). Each operating condition is simulated for t=300s. Under the start-up condition, the switching losses of the IGBT are... ,in , Substituting into Record the conditions under which each work is performed. and The results are shown in the table below: Operating conditions Maximum junction temperature (°C) Device temperature difference (°C) Simulation time (s) Measured time (s) error(%) start up 92.5 18.3 300 305 1.7 constant speed 75.2 10.5 300 298 0.7 brake 87.6 15.7 300 302 0.7 The transient thermal analysis of the start-up condition was performed using the finite difference method (FDM), with a time step of [missing information]. =0.1s, through the formula The temperature distribution was calculated, where α is the thermal diffusivity. The switching losses of the IGBT under braking conditions were used as the transient thermal load input. The calculated temperature response curve showed a 98% good fit with the measured curve.

[0039] After optimizing the PCB prototype, the experimental verification and feedback steps involved creating a prototype and measuring the surface temperature of the devices using an infrared thermal imager. Under constant speed operation, the measured IGBT junction temperature was 78.6℃, with an error of 4.5% compared to the simulation result of 75.2℃, meeting the requirement of less than 5%. The junction temperature was measured using thermocouples and analyzed using the formula... Calculations were performed. If the simulation and measured error exceeded 5%, the layout parameters were adjusted. For example, when the measured temperature was 8% higher than the simulation, the device spacing was increased from 8mm to 10mm. After resimulating, the predicted junction temperature was 77.1℃, and the measured value was 80.3℃, reducing the error to 2.7%. Through three iterations of optimization, the final error was controlled within 1.5%.

[0040] Data representation and interpretation: The effectiveness of this patented method is verified by comparing key indicators before and after optimization. A DC motor drive circuit of a certain model was selected for testing, and the data is as follows: index Traditional layout Optimized layout Increase ratio Maximum junction temperature (°C) 105.3 75.2 28.6% Device temperature difference (°C) 22.7 10.5 53.7% Thermal cycle life (hours) 8500 12800 50.6% Startup response time (ms) 125 98 21.6% Braking energy loss (J) 245 198 19.2% Layout optimization cycle (days) 15 6 60.0% Material cost (RMB) 280 245 12.5% The data shows that the proposed method significantly improves thermal management and cost control. The maximum junction temperature is reduced by 28.6%, directly extending device lifespan and increasing thermal cycle life by 50.6%. The device temperature difference is reduced by 53.7%, indicating a more uniform temperature distribution and avoiding the risk of failure caused by localized hot spots. Startup response time is shortened by 21.6%, and braking energy loss is reduced by 19.2%, indicating improved circuit dynamic performance. The layout optimization cycle is shortened by 60%, significantly improving R&D efficiency. Material costs are reduced by 12.5%, thanks to the precise design of the heat dissipation structure, which reduces the use of unnecessary heat dissipation materials.

[0041] In practical applications, a new energy vehicle company improved system reliability by 35% and reduced maintenance costs by 22% after optimizing the motor drive circuit layout using this method. An industrial robot manufacturer, after applying this method, saw a 20°C decrease in the operating temperature of the drive module and an increase in continuous fault-free operation time from 6,000 hours to 10,000 hours. These data fully demonstrate the effectiveness and practicality of the method presented in this application in real-world engineering projects.

[0042] The above are merely preferred embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A method for optimizing the layout of a DC motor drive circuit based on thermal simulation, characterized in that, include: Thermal characteristic parameter modeling steps: Establish a heat conduction model for the DC motor drive circuit, define the thermal resistance network of power devices (IGBT, diode), and the formula is as follows: ,in To achieve the thermal resistance of the junction to the shell, For the junction temperature, Shell temperature, To determine the power consumption of the device, a thermal conductivity matrix for the PCB board is established, considering the influence of copper foil thickness and substrate material on heat diffusion. Multiphysics coupling simulation steps: Construct an electro-thermal coupling model using the finite element method (FEM), and set boundary conditions in ANSYS Icepak: ambient temperature... ℃, natural convection heat transfer coefficient ,in The thermodynamic temperature unit is Kelvin; the operating current of the loaded circuit is I = 10A and the voltage is V = 48V. The conductor loss is calculated using Joule's law, P = I²R, where R is the conductor resistance. This is combined with the Fourier equation of heat conduction. Where Q is the power density of the internal heat source, solve for the temperature field distribution; Layout parameter optimization steps: Define layout optimization variables: power device spacing d, heat dissipation path length L, via density N; establish objective function. ,in The highest junction temperature, Let C be the temperature difference between devices, C be the layout cost, and the weights be w1=0.6, w2=0.3, and w3=0.

1. Genetic algorithm (GA) is used for iterative optimization.

2. The DC motor drive circuit layout optimization method based on thermal simulation according to claim 1, characterized in that, Also includes: The heat-sensitive component partitioning steps are as follows: Divide the circuit into a power zone (IGBT), an inductor zone (MCU), and a resistor and temperature sensor zone; in the power zone, use copper foil to ensure the junction temperature of the power devices. ℃; Spacing between drive control area and power area Reduce the impact of thermal coupling; Heat dissipation path design steps: Install thermal vias below the IGBT to connect the top and bottom heat dissipation layers of the PCB; apply thermal grease to the contact surface between the heatsink and the device to reduce contact thermal resistance. ,in S represents the thickness of the silicone grease and S represents the contact area.

3. The DC motor drive circuit layout optimization method based on thermal simulation according to claim 1, characterized in that, Also includes: Simulation verification steps: Simulate three operating conditions: motor start-up, constant speed operation, and braking. Run the simulation for 300 seconds under each condition and record the data. and Establish a thermal transient model during operating condition switching; Experimental verification and feedback steps: Create an optimized PCB prototype, use an infrared thermal imager to measure the surface temperature of the components, and compare the result with the simulation results. The error should be less than 5%. If the error exceeds the limit, adjust the layout parameters: power device spacing d, heat dissipation path length L, and re-simulate.

4. The method according to claim 1, characterized in that, In the thermal characteristic parameter modeling step, an equivalent thermal resistance network model is used to simplify the IGBT into a four-level thermal resistance system: junction-case-heat sink-ambient environment. The formula is as follows: ,in The thermal resistance from the casing to the heatsink. Given the thermal resistance from the heatsink to the environment; establish a power consumption model for the diode. ,in For positive pressure drop, This represents the average current.

5. The method according to claim 1, characterized in that, In the multiphysics coupling simulation step, the current density boundary is set in COMSOLMultiphysics. , where A is the conductor cross-sectional area, and the heat load is generated through the Joule heat source module; Enable the natural convection module to calculate the air velocity and couple it to the heat conduction equation for solution.

6. The method according to claim 1, characterized in that, In the layout parameter optimization step, the fitness function of the genetic algorithm is designed as follows: Where F is the objective function value; set constraints: device spacing Through-hole density Layout area .

7. The method according to claim 2, characterized in that, In the heat-sensitive element partitioning step, the MCU chip in the drive control area uses a low thermal resistance package and is surrounded by decoupling capacitors; the temperature sensor in the detection area is spaced apart from the power device. Avoid thermal interference.

8. The method according to claim 2, characterized in that, In the heat dissipation path design steps, the heat sink uses aluminum profiles, with fin height H=20mm and spacing P=5mm; the fin efficiency formula is used... Optimize the heat dissipation structure, among which t is the fin thickness, and k is the thermal conductivity.

9. The method according to claim 3, characterized in that, In the simulation verification step, the transient thermal analysis of the startup condition uses the finite difference method (FDM); the switching losses of the IGBT under the braking condition... As a transient thermal load input, For the opening time, V represents the switching frequency, V represents the voltage the device withstands when it is off, and I represents the current the device conducts when it is on.

10. The method according to claim 3, characterized in that, In the experimental verification and feedback steps, thermocouples are used to measure the junction temperature, and the formula is used to... Calculate; if the simulation and actual measurement errors exceed 5%, adjust the thermal grease thickness. Alternatively, if the number of vias is N, perform a new thermal simulation.

Images