Method for attaching metal body to thin semiconductor die at wafer level

Abstract

A method includes providing a semiconductor wafer having a thickness of 250 microns or less. The semiconductor wafer includes a plurality of die sites, each die site including a vertical power semiconductor device. The method further includes attaching the metal wafer to the semiconductor wafer. The metal wafer has a shape similar to that of the semiconductor wafer. The die sites of the semiconductor wafer are singulated into individual semiconductor dies before or after attaching the metal wafer to the semiconductor wafer. After the metal wafer is attached to the semiconductor wafer but before the individual semiconductor die is removed from the semiconductor wafer, the metal wafer is singulated into a plurality of separate metal bodies that remain attached to the individual semiconductor die.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more particularly to a packaging method. Background Technology

[0002] The demand for electronic components for power applications continues to increase rapidly across a wide range of industries, including automotive, consumer electronics, renewable energy, manufacturing, and medical. Advances in semiconductor materials such as silicon carbide (SiC) and gallium nitride (GaN) have enabled the realization of power electronic devices with advantageous characteristics such as smaller footprint, higher voltage and current capabilities, and faster switching speeds. However, in some cases, the performance gains offered by semiconductor technology may not be fully realized when integrating the corresponding power semiconductor devices (e.g., chips or dies) into components, modules, or other assemblies due to limitations in packaging and interconnect technologies. For example, the operating current of a power semiconductor device that can be implemented in a component may be limited by the connections used to electrically couple the power semiconductor device to a substrate (e.g., leadframe, printed circuit board) rather than the device itself. Additionally, in some applications, the heat dissipation associated with the high current through the power semiconductor device may be limited by the component's heat dissipation capabilities, thus limiting the current that can pass through the power semiconductor device without exceeding the component's thermal limits. Finally, the dimensions of power semiconductor devices (such as die thickness) may be constrained by the handling required to integrate them into components, modules, or other assemblies. Specifically, using current packaging technology to handle thinner dies (e.g., less than 250 micrometers) can be difficult and carries the risk of damage.

[0003] Therefore, there is a need for an improved solution to integrate power semiconductor devices, especially thin power semiconductor dies, into power semiconductor components, modules, and assemblies. Summary of the Invention

[0004] According to an embodiment of a method for attaching a metal body to a thin semiconductor die at the wafer level, the method includes: providing a semiconductor wafer comprising a plurality of die sites, each of the plurality of die sites comprising a vertical power semiconductor device, the semiconductor wafer having a thickness of 250 micrometers or less; attaching a metal wafer to the semiconductor wafer, the metal wafer having a shape similar to the semiconductor wafer; individualizing the die sites into individual semiconductor dies before or after attaching the metal wafer to the semiconductor wafer; and individualizing the metal wafer into a plurality of separate metal bodies that hold the individual semiconductor dies attached after the metal wafer is attached to the semiconductor wafer but before removing the individual semiconductor dies from the semiconductor wafer.

[0005] Those skilled in the art will recognize additional features and advantages when reading the following detailed description and when viewing the accompanying drawings. Attached Figure Description

[0006] The elements in the accompanying drawings are not necessarily proportional to each other. Similar reference numerals denote corresponding similar parts. Features of the various illustrated embodiments can be combined unless they are mutually exclusive. Embodiments are shown in the accompanying drawings and described in detail below.

[0007] Figures 1A to 1C The semiconductor wafer and metal wafer used in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment, are shown.

[0008] Figures 2A to 2C A side view of a semiconductor wafer is shown in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment.

[0009] Figures 3A to 3C The illustration shows attaching a metal wafer to a semiconductor wafer in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment.

[0010] Figure 4 The application of an encapsulating agent is illustrated in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment.

[0011] Figure 5 The illustration shows a method for attaching metal bodies to a thin semiconductor die at the wafer level, according to an embodiment, in which a metal wafer is individualized into a plurality of separate metal bodies.

[0012] Figure 6 The method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment, illustrates the removal of an individual semiconductor die from a semiconductor wafer.

[0013] Figures 7A to 7B The illustration shows an individual semiconductor die from a semiconductor wafer being placed on a power semiconductor module in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment.

[0014] Figure 8 The illustration shows a method for attaching a second metal wafer to a semiconductor wafer in a wafer-level method for attaching a metal body to a thin semiconductor die, according to an embodiment.

[0015] Figure 9 The illustration shows a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment, in which a second metal wafer is individualized into a plurality of independent metal bodies.

[0016] Figures 10A to 10BThe method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment, illustrates the removal of an individual semiconductor die from a semiconductor wafer.

[0017] Figures 11A to 11B The illustration shows an individual semiconductor die from a semiconductor wafer being placed on a power semiconductor module in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment. Detailed Implementation

[0018] This document describes a method for pre-packaging thin (less than 250 micrometers) power semiconductor devices at the wafer level for subsequent integration into power semiconductor modules or other components. Specifically, the method includes attaching a metal wafer to one or both sides of a thin semiconductor wafer. The metal wafer may include multiple distinct metal bodies attached to terminals of a vertical power semiconductor device of the semiconductor wafer during processing, or it may be a planar metal wafer without defined features. The semiconductor wafer may be in a pre-singled state, or it may be partially or completely singled into individual semiconductor dies. After attaching the metal wafer to the semiconductor wafer, the metal wafer is singled into multiple individual metal bodies that remain attached to the individual semiconductor dies. One or more metal bodies that remain attached to the individual semiconductor dies may form contacts for one or more terminals of a power semiconductor device realized from the semiconductor die. Each individual semiconductor die of the semiconductor wafer may then be transferred to an assembly, such as a module, for example, using a pick-and-place tool and placing and attaching the semiconductor die and / or metal body to an assembly (e.g., to a substrate of the assembly), the pick-and-place tool contacting the metal body attached to the respective individual semiconductor die.

[0019] The method described herein offers several advantages over other methods of integrating thin power semiconductor dies into components such as power semiconductor modules. For example, the handling of individual thin semiconductor dies can be reduced by attaching the metal body of a metal wafer to the semiconductor die at the wafer level. The metal body from the metal wafer provides mechanical support for the thin semiconductor die and can reduce damage and / or breakage of the thin semiconductor die during subsequent handling, such as when transferring them to modules or other components. Reducing the likelihood of die damage and breakage increases manufacturing yield and enables the use of thinner semiconductor dies (e.g., less than 250 micrometers, less than 160 micrometers, or even less than 110 micrometers), potentially enabling device designs that deliver higher performance. Furthermore, the method described herein eliminates the need to place individual semiconductor dies on a substrate that does not contribute to the device's functionality, as the method involves directly transferring the individual semiconductor die and the attached metal body (single or multiple) to the module or other component. The metal body of the metal wafer can provide its own thermal and / or electrical benefits to vertical power semiconductor devices, such as providing a larger contact area for wire bonding and heat dissipation. The shape and structure of the metal body of a metal wafer can be customized for optimal current and heat dissipation for a given vertical power semiconductor device design, and therefore the methods described herein can provide flexibility for the design and layout of a variety of power semiconductor devices to be integrated into standard modules, parts, and assemblies. Furthermore, the methods described herein utilize standard packaging and manufacturing methods, such as wafer bonding techniques (e.g., soldering, sintering), wafer individualization and subsequent handling of individual wafers, and pick-and-place of individual semiconductor dies.

[0020] An exemplary embodiment of a method for attaching a metal body to a thin semiconductor die at the wafer level will now be described with reference to the accompanying drawings.

[0021] Figures 1A to 1C The semiconductor wafer 100 and metal wafer 110 used in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment, are shown.

[0022] Figure 1AA top view of a semiconductor wafer 100 and a metal wafer 110 is shown. The semiconductor wafer 100 is a thin wafer with a thickness of 250 micrometers or less. In some examples, the semiconductor wafer 100 may have a thickness of 160 micrometers or less, or even 110 micrometers or less. For example, the semiconductor wafer 100 may be a wafer that has been processed by a thinning process on the back side of the wafer (e.g., CMP (chemical mechanical polishing), grinding, etching, etc.). The thickness of the semiconductor wafer 100 may include the thickness of the semiconductor material (e.g., Si, SiC, GaN, etc.) used to implement electrical devices such as transistors, diodes, etc., and the thickness of any layer formed on the semiconductor material such as one or more metallization layers, one or more interlayer dielectrics, one or more passivation layers, etc. In some examples, the semiconductor material may have a thickness of less than 10 micrometers (e.g., about 6 micrometers or less), and the thickness of the semiconductor wafer 100 may be less than 250 micrometers, less than 160 micrometers, or less than 110 micrometers.

[0023] Semiconductor wafer 100 includes a plurality of die sites 102. Each die site 102 includes a vertical power semiconductor device 120. For each vertical power semiconductor device 120, a primary current flow path exists between the front and back sides of the corresponding die site 102 (along...). Figure 1A (z-direction in the image). In one embodiment, some or all of the vertical power semiconductor devices 120 may be vertical power transistors, such as SiC or GaN power MOSFETs (metal-oxide-semiconductor field-effect transistors). One or more of the vertical power semiconductor devices 120 may be Si power MOSFETs, HEMTs (high electron mobility transistors), IGBTs (insulated-gate bipolar transistors), JFETs (junction field-effect transistors), diodes, etc. The vertical power semiconductor devices 120 of the semiconductor wafer 100 may all have similar or identical designs (e.g., device type, structure, material, size, etc.), or some or each of the vertical power semiconductor devices 120 may have different designs. Various arrangements of the vertical power semiconductor devices 120 on the semiconductor wafer 100 are envisioned. Although Figure 1A A single vertical power semiconductor device 120 for each die site 102 is shown, but examples are envisioned in which one or more die sites 102 each include two or more vertical power semiconductor devices 120.

[0024] The metal wafer 110 has a similar shape to the semiconductor wafer 100. Figures 1A to 1CIn the example, the metal wafer 110 includes a plurality of distinct metal bodies 112, but examples in which the metal wafer 110 is not constructed with distinct metal bodies are contemplated (e.g., a planar metal wafer 110). The metal bodies 112 of the metal wafer 110 may be provided in a layout corresponding to (e.g., a mirror image) the die sites 102 of the semiconductor wafer 100 and / or the vertical power semiconductor device 120 (e.g., the contact pads of the vertical power semiconductor device 120).

[0025] exist Figure 1A In the example, the metal wafer 110 is a solid metal part 111, which includes a plurality of distinct metal bodies 112 formed in the solid metal part 111. Figure 1B A top view of an alternative example of a metal wafer 110 is shown, wherein multiple distinct metal bodies 112 are interconnected via a network frame 113, rather than by means of... Figure 1A The solid metal parts are formed.

[0026] The metal wafer 110 can be formed from a sheet, plate, or other substrate of metal or metal alloy. For example, the metal wafer 110 can be formed from a sheet of copper, aluminum, conductive alloy, etc. The sheet, plate, or other substrate can be imprinted, etched, stamped, or otherwise processed to produce a distinguishable metal substrate 112 and network frame 113 (in Figure 1B (In the example) and the arrangement of any other features of the metal wafer 110. The metal wafer 110 may have a thickness greater than 50 micrometers. In some examples, the metal wafer 110 has a thickness greater than 100 micrometers (e.g., up to 500 micrometers).

[0027] Figure 1C A cross-sectional side view of a portion of the metal wafer 110 is shown. Figure 1C Various exemplary structures of the distinct metal body 112 of the metal wafer 110 are shown. In some examples, such structures are attached to the semiconductor wafer 100 (e.g., attached to, for example...). Figure 1A The vertical power semiconductor device 120 can provide thermal and / or thermomechanical advantages. In some examples, the structure of the illustrated metal body 112 can provide benefits such as improved attachment to the semiconductor wafer 100. Some metal bodies 112 of the metal wafer 110 include one or more vacuum openings (ports) 114 that extend at least partially through the metal body 112. Vacuum openings (single or multiple) 114 can provide improved suction (e.g., from a vacuum conduit) during pick-and-place processes. Although Figure 1CEach of the metal bodies 112 has a different structure, but this is only to illustrate a number of possible structures. Any example of a metal wafer 110 disclosed herein may include a metal body 112 having only one of these structures or a combination of two or more of these structures. Structures not shown and combinations thereof with those shown herein are also contemplated. For simplicity, the remainder of this disclosure will show a metal wafer 110 with a single structure having a metal body 112.

[0028] Figures 2A to 2C A side view of a semiconductor wafer 100 is shown in an embodiment of a method for attaching a metal body to a thin semiconductor die at the wafer level.

[0029] Figure 2A A side view of a semiconductor wafer 100 prior to individual formation into a single semiconductor die is shown in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment. The semiconductor wafer 100 is shown as a continuous wafer including a plurality of die sites 102.

[0030] Figure 2B A side view of a semiconductor wafer 100 after being partially individualized into an individual semiconductor die 104 in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment, is shown. Figure 2B The die sites 102 of the semiconductor wafer 100 are partially individualized into individual semiconductor dies 104. Trench 103 (e.g., from a saw) extends partially through the semiconductor wafer 100 between each die site 102 to define the individual semiconductor die 104.

[0031] Figure 2C A side view of a semiconductor wafer 100 after being completely individualized into an individual semiconductor die 104 is shown in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment. Figure 2C The die sites 102 of the semiconductor wafer 100 are completely individualized into individual semiconductor dies 104. Trench 103 extends completely through the semiconductor wafer 100 between each die site 102 to define the individual semiconductor die 104. The individual semiconductor dies 104 of the semiconductor wafer 100 may be suspended by a frame 105 or other structures including tape, foil, or by other components supporting the individual semiconductor dies 104 in the shape of the semiconductor wafer 100 for subsequent processing.

[0032] The subsequent steps show that, as Figure 2C The semiconductor wafer 100 is shown in a fully uniform state (e.g., optionally supported on frame 105). However, it can be separately located in, for example... Figure 2A and Figure 2B The unsingled or partially singulated state shown is achieved through subsequent... Figures 3A to 5 Any of the steps shown are used to process the semiconductor wafer 100 in the example below.

[0033] Figures 3A to 3C The illustration shows a method for attaching a metal wafer 110 to a semiconductor wafer 100 at the wafer level in a method for attaching a metal body to a thin semiconductor die according to an embodiment.

[0034] Figure 3A A top view of a metal wafer 110 aligned with a semiconductor wafer 100 is shown. For example, the metal wafer 110 and the outer periphery of the semiconductor wafer 100 may be aligned. In an example where the metal wafer 110 includes a plurality of distinct metal bodies 112, one or more distinct metal bodies 112 of the metal wafer 110 may be aligned with each die site 102, individual semiconductor die 104, and / or vertical power semiconductor device 120 of the semiconductor wafer 100.

[0035] Figure 3B This illustrates attaching a metal wafer 110 to a first side 100 of a semiconductor wafer 100. S1 Side view. Attaching the metal wafer 110 to the semiconductor wafer 100 includes a first contact surface 112 of a metal body 112 distinct from the metal wafer 110. S1 A first load terminal 121 is attached to each die site 102 of the vertical power semiconductor device 120. A first contact surface 112 is attached to each metal body 112. S1 The opposite second contact surface 112 S2 A contact portion is formed for attaching to the first load terminal 121 of the vertical power semiconductor device 120 of the metal body 112. The first load terminal 121 of the vertical power semiconductor device 120 at each die site 102 may be one of the source terminal, emitter terminal, drain terminal or collector terminal of, for example, MOSFET, IGBT, HEMT, JFET or the like.

[0036] Figure 3C This illustrates attaching a metal wafer 110 to a first side 100 of a semiconductor wafer 100. S1 A side view. In this example, attaching the metal wafer 110 to the semiconductor wafer 100 includes attaching a first contact surface 112 of the first metal body 1121 of the metal wafer 110. 1,S1 The first load terminal 121 of the vertical power semiconductor device 120 is attached to each die site 102, and the first contact surface 112 of the second metal body 1122 of the metal wafer 110 is attached to the first contact surface 112. 2,S1 Control terminals 122 of vertical power semiconductor devices 120 attached to each die site 102. First contact surface 112 of each first metal body 1121. 1,S1The opposite second contact surface 112 1,S2 A contact portion is formed for attaching to the first load terminal 121 of the vertical power semiconductor device 120 of the first metal body 1121. The first contact surface 112 of each second metal body 1122... 2,S1 The opposite second contact surface 112 2,S2 A contact portion is formed for attaching to the control terminal 122 of the vertical power semiconductor device 120 of the second metal body 1122. The first load terminal 121 of the vertical power semiconductor device 120 at each die site 102 can be one of the source terminal, emitter terminal, drain terminal, or collector terminal of, for example, MOSFET, IGBT, HEMT, JFET, etc. The control terminal 122 of the vertical power semiconductor device 120 at each die site 102 can be a gate terminal.

[0037] exist Figures 3A to 3C In the example, attaching the metal wafer 110 to the semiconductor wafer 100 may include at least one of sintering, diffusion brazing, brazing, fusion welding, adhesion, gluing, etc. For example, the metal bodies 112, 1121, and / or 1122 may be sintered, diffuse brazed, brazed, adhered, glued, etc., to the first load terminal 121, control terminal 122, or another terminal of the vertical power semiconductor device 120.

[0038] Figure 4 An encapsulant 130 is shown in an embodiment of a method for attaching a metal body to a thin semiconductor die at the wafer level. The encapsulant 130 is optional and not required by the method described herein. The encapsulant 130 may be applied after the metal wafer 110 is attached to the semiconductor wafer 100 but before the individual semiconductor die 104 is removed from the semiconductor wafer 100. The encapsulant 130 may be applied such that it encapsulates at least a portion of each die site 102, for example, part or all of the vertical power semiconductor device 120 and a portion of the metal body 112, such that the contact surfaces of the metal body 112 (e.g., Figure 3B Second contact surface 112 S2 , Figure 3C Second contact surface 112 1,S2 112 2,S2 ) Exposed to encapsulant 130.

[0039] Encapsulant 130 can be a molding compound. A molding compound is a plastic encapsulant typically formed from an organic resin such as epoxy resin. Plastic encapsulants may include fillers such as non-melting inorganic materials. Catalysts may be used to accelerate the curing reaction of the organic resin. Depending on the application, other materials (such as flame retardants, adhesion promoters, ion traps, stress relievers, colorants, etc.) may be added to the plastic encapsulant. Molding compounds can be formed by injection molding, compression molding, film-assisted molding (FAM), reaction injection molding (RIM), resin transfer molding (RTM), blow molding, etc.

[0040] Figure 5 The illustration shows a method for attaching metal bodies to a thin semiconductor die at the wafer level, according to an embodiment, in which a metal wafer 110 is individualized into a plurality of separate metal bodies 112. After the metal wafer 110 is individualized, the separate metal bodies 112 remain attached to individual semiconductor dies 104 of the semiconductor wafer 100. Two or more metal bodies 112 of the metal wafer 110 are attached to a single individual semiconductor die 104 (e.g., ...). Figure 3C In the example of metal bodies 1121 and 1122, two or more metal bodies 112 can be individualized into two or more independent metal bodies 112, which remain attached to a single individual semiconductor die 104 at this step.

[0041] Individualizing the metal wafer 110 can be performed by sawing (e.g., mechanical sawing or laser sawing), etching, etc. In some examples, during the same individualization process (e.g., using the same saw, e.g., different cutting wheels of a single sawing tool), the die sites 102 of the semiconductor wafer 100 are simultaneously individualized into individual semiconductor dies 104, and the metal wafer 110 is individualized into multiple separate metal bodies 112 that remain attached to the individual semiconductor dies 104. In some other examples, the semiconductor wafer 100 and the metal wafer 110 can be individualized by different processes. For example, one of the two wafers can be individualized via laser sawing, and the other wafer can be individualized by mechanical sawing. It is also conceivable that these two processes can be performed by a single tool (e.g., a tool that can perform both laser sawing and mechanical sawing) or by individual tools.

[0042] Figure 6 The illustration shows the removal of an individual semiconductor die 1041 from a semiconductor wafer 100 in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment.

[0043] After the die site 102 is individualized into an individual semiconductor die 104 and after the metal wafer 110 is individualized into a plurality of separate metal bodies 112 that remain attached to the individual semiconductor dies 104, one or more of the individual semiconductor dies 104 (e.g., individual semiconductor die 1041) can be picked up and removed from the semiconductor wafer 100. Figure 6 The diagram illustrates picking up an individual semiconductor die 1041 by bringing a metal body 112 attached to the individual semiconductor die 1041 into contact with a component 152 of a pick-and-place machine 150 and removing the individual semiconductor die 1041 from the semiconductor wafer 100. The pick-and-place machine 150 may use suction (e.g., a vacuum through component 152), adhesive material on component 152, or another measure for attaching the component 152 of the pick-and-place machine 150 to the metal body 112 of the individual semiconductor die 1041, making it possible to peel the individual semiconductor die 1041 from the semiconductor wafer 100. More than one semiconductor die 1041 can be picked up and placed simultaneously.

[0044] Figures 7A-7B The illustration shows an individual semiconductor die 1041 from a semiconductor wafer 100 placed on a power semiconductor module 10 in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment.

[0045] The power semiconductor module 10 includes a substrate 12 having one or more metallization layers 14. The substrate 12 may be a printed circuit board (PCB), an insulating metal substrate (IMS), a DCB (direct copper bonding) substrate, an AMB (active metal brazed) substrate, a lead frame, etc. Figure 7A and 7B Individual semiconductor dies 104 (e.g., from semiconductor wafer 100, from different semiconductor wafers) already attached to the metallization layer 14 of the power semiconductor module 10 are shown. A metal body 112 (e.g., from metal wafer 110) is attached to the individual semiconductor die 104 attached to the metallization layer 14. Wire bonding 16 attaches the metal body 112 attached to the individual semiconductor die 104 to different metallization layers 14 of the power semiconductor module 10.

[0046] Figure 7A The image shows the placement of an individual semiconductor die 1041 onto the metallization layer 14 of a power semiconductor module 10 using a pick-and-place machine 150. Figure 7BThe diagram illustrates the attachment of an individual semiconductor die 1041 to a metallization layer 14 of a power semiconductor module 10. In some examples, a second load terminal 123 of the individual semiconductor die 1041 is attached to the metallization layer 14 of the power semiconductor module 10. The second load terminal 123 may be one of a source terminal, an emitter terminal, a drain terminal, or a collector terminal. In some examples, the individual semiconductor die 1041 may be attached to the metallization layer 14 of the power semiconductor module 10 by diffusion soldering, soldering, or sintering (e.g., second load terminal 123 to metallization layer 14).

[0047] Repeatable for additional individual semiconductor dies 104 of semiconductor wafer 100 Figures 6 to 7B The method. Each additional individual semiconductor die 104 can be placed on the power semiconductor module 10 or another module, component, structure, etc.

[0048] Figure 8 The illustration shows a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment, in which a second metal wafer 210 is attached to a semiconductor wafer 100.

[0049] The second metal wafer 210 may be similar to the metal wafer 110. Specifically, the second metal wafer 210 includes a plurality of distinct metal bodies 212; however, examples in which the second metal wafer 210 is not constructed with distinct metal bodies are contemplated (e.g., a planar second metal wafer 210). The metal bodies 212 of the second metal wafer 210 may be provided in a layout corresponding to (e.g., a mirror image) the die sites 102 of the semiconductor wafer 100 and / or the layout of the vertical power semiconductor device 120. The second metal wafer 210 may be a solid metal piece (e.g., as shown in the image). Figure 1A The metal wafer 110, or may include a network frame (e.g., such as...) Figure 1B The second metal wafer 210 comprises a plurality of distinct metal bodies 212 interconnected with the first metal wafer 110. The second metal wafer 210 may be formed from a sheet, plate, or other body of a metal, metal alloy, or other electrical conductor. For example, the second metal wafer 210 may be formed from a sheet of copper, aluminum, conductive alloy, etc. The sheet, plate, or other body may be imprinted, etched, stamped, or otherwise processed to produce an arrangement of distinct metal bodies 212, network frames, and any other features of the second metal wafer 210. The second metal wafer 210 may have a thickness greater than 50 micrometers. In some examples, the second metal wafer 210 has a thickness greater than 100 micrometers (e.g., up to 500 micrometers). The second metal wafer 210 may be thicker than the first metal wafer 110. The metal bodies 212 of the second metal wafer 210 may have a similar thickness to the first metal wafer 110. Figure 1CThe structure is similar to that shown for the metal body 112 of the metal wafer 110. Some of the metal bodies 212 of the second metal wafer 210 may include one or more vacuum openings 214 that extend at least partially through the metal body 212, thereby potentially providing improved suction during pick-and-place processes (e.g., from a vacuum conduit).

[0050] In this example, a first metal body 112 (e.g., from a metal wafer 110) is attached to a first side 100 of the semiconductor wafer 100. S1 Each of the individual semiconductor dies 104 on the semiconductor wafer 100. A second metal wafer 210 is attached to the second opposite side 100 of the semiconductor wafer 100. S2 .Although Figure 8 A semiconductor wafer 100 is shown that is entirely individualized as a single semiconductor die 104, but Figure 8 The steps shown in the subsequent figures can be performed on the non-singleized semiconductor wafer 100 (e.g., as shown in the figure). Figure 2A (as shown) or partially individualized semiconductor wafer 100 (e.g., as shown) Figure 2B Completed on (as shown). In Figure 8 In this configuration, the individual semiconductor die 104 of the semiconductor wafer 100 is suspended by the frame 105, but other components are envisioned to support the individual semiconductor die 104 in the shape of the semiconductor wafer 100 for subsequent processing. Additionally, although... Figure 8 A separate first metal body 112 is shown attached to each of the individual semiconductor dies 104 (e.g., in the case of completion). Figure 5 (After the steps shown), but an example is envisioned in which the second metal wafer 210 is attached to the semiconductor wafer 100 before the metal wafer 110 is individualized into a separate first metal body 112.

[0051] The second metal wafer 210 is attached to the second side 100 of the semiconductor wafer 100. S2 Includes the first contact surface 212 of the second metal body 212 of the second metal wafer 210. S1 A second load terminal 123 is attached to each die site 102 of the vertical power semiconductor device 120. The first contact surface 212 of each second metal body 212... S1 The opposite second contact surface 212 S2 A contact portion is formed for attaching to the second load terminal 123 of the vertical power semiconductor device 120 of the second metal body 212. In some examples, the second metal wafer 210 is attached to the second side 100 of the semiconductor wafer 100. S2It includes at least one of sintering, diffusion brazing, brazing, fusion welding, adhesion, and gluing. For example, the second metal body 212 can be sintered, diffused brazing, brazing, adhered, glued, etc., to the second load terminal 123 of the vertical power semiconductor device 120.

[0052] In this example, a single, independent second metal body 212 is attached to each individual semiconductor die 104; however, examples are envisioned where multiple second metal bodies 212 are attached to a single semiconductor die 104, similar to... Figure 3C Examples of the metal bodies 1121 and 1122 of the metal wafer 110.

[0053] Figure 9 The illustration shows a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment, in which a second metal wafer 210 is individualized into a plurality of independent second metal bodies 212.

[0054] The second metal wafer 210 is attached to the second side 100 of the semiconductor wafer 100. S2 Subsequently, but before removing the individual semiconductor die 104 from the semiconductor wafer 100, the second metal wafer 210 is individualized. Individual second metal bodies 212 remain attached to the individual semiconductor die 104. The individualization of the second metal wafer 210 can be performed using methods similar to those used to individualize the metal wafer 110 into individual first metal bodies 112, such as sawing, for example, mechanical sawing or laser sawing, etching, etc. In some examples, the individualization of the die sites 102 of the semiconductor wafer 100 into individual semiconductor dies 104 and the individualization of the second metal wafer 210 into multiple individual second metal bodies 212 remaining attached to the individual semiconductor dies 104 are performed sequentially or simultaneously during the same individualization process (e.g., using the same saw, but using different cutting wheels). In some examples, the die sites 102 of semiconductor wafer 100 are individualized into individual semiconductor dies 104, the metal wafer 110 is individualized into a plurality of independent first metal bodies 112 held attached to the individual semiconductor die 104, and the second metal wafer 210 is individualized into a plurality of independent second metal bodies 212 held attached to the individual semiconductor die 104, which are performed sequentially or simultaneously during the same individualization process (e.g., using the same saw, or, for example, using different cutting wheels).

[0055] Figures 10A to 10B The illustration shows the removal of an individual semiconductor die 1041 from a semiconductor wafer 100 in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment.

[0056] After the die site 102 is individualized into an individual semiconductor die 104, after the first metal wafer 110 is individualized into a plurality of independent first metal bodies 112, and after the second metal wafer 210 is individualized into a plurality of independent second metal bodies 212, one or more of the individual semiconductor dies 1041 (e.g., individual semiconductor dies 1041) can be picked up and removed from the semiconductor wafer 100. Figure 10A The diagram illustrates picking up the individual semiconductor die 1041 by bringing the second metal body 212 of the second metal wafer 210 attached to the individual semiconductor die 1041 into contact with the component 152 of the pick-and-place machine 150 and removing the individual semiconductor die 1041 from the semiconductor wafer 100. Figure 10B The diagram illustrates picking up an individual semiconductor die 1041 by bringing a first metal body 112 of a metal wafer 110 attached to the individual semiconductor die 1041 into contact with a component 152 of a pick-and-place machine 150 and removing the individual semiconductor die 1041 from the semiconductor wafer 100. More than one semiconductor die 1041 can be picked up and placed simultaneously.

[0057] Figures 11A to 11B The illustration shows an individual semiconductor die 1041 from a semiconductor wafer 100 placed on a power semiconductor module 10 in a method for attaching a metal body to a thin semiconductor die at the wafer level, according to an embodiment.

[0058] Figure 11A The image shows the placement of an individual semiconductor die 1041 onto the metallization layer 14 of a power semiconductor module 10 using a pick-and-place machine 150. Figure 11B The diagram illustrates the attachment of an individual semiconductor die 1041 to a metallization layer 14 of a power semiconductor module 10. In this example, the individual semiconductor die 1041 is picked up by contacting a second metal body 212 attached to the individual semiconductor die 1041 with a component 152 of a pick-and-place machine 150, and the second contact surface 112 of the metal body 112 attached to the individual semiconductor die 1041 is shown. S2 Attached to the metallization layer 14. On the second contact surface 112 S2 Forming a first load terminal 121 for a vertical power semiconductor device 120 for an individual semiconductor die 1041 (e.g., Figure 3B In the example of the contact portion of the first load terminal 121, the first load terminal 121 is electrically coupled to the metallization layer 14 to which the first metal body 112 is attached.

[0059] It is envisioned that the individual semiconductor die 1041 is picked up by contacting a first metal body 112 attached to the individual semiconductor die 1041 with a component 152 of the pick-and-place machine 150, and the individual semiconductor die 1041 is positioned such that a second contact surface 212 of a second metal body 212 attached to the individual semiconductor die 1041 is formed. S2 An example attached to the metallization layer 14. In such an example, the second contact surface 212 S2 A contact portion of the second load terminal 123 for the vertical power semiconductor device 120 of the individual semiconductor die 1041 can be formed, and the second load terminal 123 is therefore electrically coupled to the metallization layer 14 to which the metal body 212 is attached.

[0060] exist Figure 11A and Figure 11B In the example, the first metal body 112 and the second metal body 212 can be attached to the power semiconductor module 10 by diffusion brazing, brazing or sintering (e.g., to the metallization layer 14).

[0061] Repeatable for additional individual semiconductor dies 104 of semiconductor wafer 100 Figures 10A to 11B The method. Each additional individual semiconductor die 104 can be placed on the power semiconductor module 10 or another module, component, structure, etc.

[0062] Although this disclosure is not limited thereto, the examples numbered below illustrate one or more aspects of this disclosure.

[0063] Example 1. A method comprising: providing a semiconductor wafer including a plurality of die sites, each of the plurality of die sites including a vertical power semiconductor device, the semiconductor wafer having a thickness of 250 micrometers or less; attaching a metal wafer to the semiconductor wafer, the metal wafer having a shape similar to that of the semiconductor wafer; individualizing the die sites into individual semiconductor dies before or after attaching the metal wafer to the semiconductor wafer; and individualizing the metal wafer into a plurality of separate metal bodies holding the individual semiconductor dies attached to the semiconductor wafer after attaching the metal wafer to the semiconductor wafer but before removing the individual semiconductor dies from the semiconductor wafer.

[0064] Example 2. According to the method of Example 1, attaching the metal wafer to the semiconductor wafer includes attaching a first contact surface of a first metal body of the metal wafer to a first load terminal of the vertical power semiconductor device at each die site, such that a second contact surface of each first metal body opposite to the first contact surface forms a contact portion for attaching to the first load terminal of the vertical power semiconductor device of the first metal body.

[0065] Example 3. According to the method of Example 2, wherein the first load terminal of the vertical power semiconductor device at each die site is one of a source terminal, an emitter terminal, a drain terminal, or a collector terminal.

[0066] Example 4. According to the method of Example 2 or 3, attaching the metal wafer to the semiconductor wafer further includes attaching a first contact surface of a second metal body of the metal wafer to a control terminal of the vertical power semiconductor device at each die site, such that a second contact surface of each second metal body opposite to the first contact surface forms a contact portion for attaching to the control terminal of the vertical power semiconductor device of the second metal body.

[0067] Example 5. The method according to Example 4, wherein the first load terminal of the vertical power semiconductor device at each die site is a source terminal or an emitter terminal, and wherein the control terminal of the vertical power semiconductor device at each die site is a gate terminal.

[0068] Example 6. The method according to any of the examples 2 to 5, wherein one or more first metal bodies of the metal wafer include a vacuum opening that extends at least partially through the first metal body.

[0069] Example 7. The method according to any of Examples 1 to 6, wherein, before the metal wafer is individualized into a plurality of separate metal bodies to be held attached to the individual semiconductor die, the metal wafer is a solid metal piece comprising a plurality of distinct metal bodies formed therein.

[0070] Example 8. The method according to any of Examples 1 to 6, wherein the metal wafer comprises a plurality of distinct metal bodies interconnected via a network frame before being individualized into a plurality of separate metal bodies that remain attached to the individual semiconductor die.

[0071] Example 9. The method according to any one of Examples 1 to 8, wherein attaching the metal wafer to the semiconductor wafer includes at least one of sintering, diffusion brazing, or brazing.

[0072] Example 10. The method according to any of Examples 1 to 9, wherein the die sites are at least partially individualized into individual semiconductor dies before the metal wafer is attached to the semiconductor wafer.

[0073] Example 11. The method according to any one of Examples 1 to 10 further includes: applying an encapsulating agent to at least a portion of each die site after attaching the metal wafer to the semiconductor wafer but before removing the individual semiconductor die from the semiconductor wafer.

[0074] Example 12. The method according to any of Examples 1 to 11, wherein the individualization of the die site into an individual semiconductor die and the individualization of the metal wafer into a plurality of independent metal bodies held attached to the individual semiconductor die are performed simultaneously during the same individualization process.

[0075] Example 13. The method according to any one of Examples 1 to 12 further includes: after individualizing the die site into individual semiconductor dies and after individualizing the metal wafer into a plurality of independent metal bodies held attached to the individual semiconductor dies, picking up one or more of the individual semiconductor dies by contacting the metal body attached to the respective individual semiconductor die with a component of a pick-and-place machine and removing the respective individual semiconductor die from the semiconductor wafer.

[0076] Example 14. The method according to Example 13 further includes: after removing the respective individual semiconductor die from the semiconductor wafer, placing the respective individual semiconductor die onto the power semiconductor module using the pick-and-place machine.

[0077] Example 15. According to the method of Example 14, placing the respective individual semiconductor die on the power semiconductor module includes attaching the respective individual semiconductor die to the power semiconductor module by diffusion soldering, brazing, or sintering.

[0078] Example 16. A method according to any of Examples 1 to 15, wherein attaching a metal wafer to the semiconductor wafer includes attaching a first metal wafer to a first side of the semiconductor wafer, wherein individualizing the metal wafer into a plurality of independent metal bodies to be held attached to the individual semiconductor die includes individualizing the first metal wafer into a plurality of independent first metal bodies to be held attached to the individual semiconductor die, and wherein the method further includes: attaching a second metal wafer to an opposing second side of the semiconductor wafer, the second metal wafer having a shape similar to the semiconductor wafer and the first metal wafer; and after attaching the second metal wafer to the second side of the semiconductor wafer but before removing the individual semiconductor die from the semiconductor wafer, individualizing the second metal wafer into a plurality of independent second metal bodies to be held attached to the individual semiconductor die.

[0079] Example 17. According to the method of Example 16, attaching the second metal wafer to the second side of the semiconductor wafer includes attaching a first contact surface of a second metal body of the second metal wafer to a second load terminal of the vertical power semiconductor device at each die site, such that a second contact surface of each second metal body opposite to the first contact surface forms a contact portion for attaching to the second load terminal of the vertical power semiconductor device of the second metal body.

[0080] Example 18. The method according to Example 17, wherein the second load terminal of the vertical power semiconductor device at each die site is one of a source terminal, an emitter terminal, a drain terminal, or a collector terminal.

[0081] Example 19. The method according to Example 17 or 18, wherein one or more second metal bodies of the second metal wafer include a vacuum opening that extends at least partially through the second metal body.

[0082] Example 20. The method according to any of Examples 16 to 19, wherein attaching the second metal wafer to the second side of the semiconductor wafer includes at least one of sintering, diffusion brazing, or brazing.

[0083] Example 21. The method according to any of Examples 16 to 20 further includes: after individualizing the die site into an individual semiconductor die, after individualizing the first metal wafer into a plurality of independent first metal bodies, and after individualizing the second metal wafer into a plurality of independent second metal bodies, picking up one or more of the individual semiconductor dies by contacting the first metal body or the second metal body attached to the respective individual semiconductor die with a component of a pick-and-place machine and removing the respective individual semiconductor die from the semiconductor wafer.

[0084] Example 22. The method according to Example 21 further includes: after removing the respective individual semiconductor die from the semiconductor wafer, placing the respective individual semiconductor die onto the semiconductor module using the pick-and-place machine.

[0085] Example 23. According to the method of Example 22, placing the respective individual semiconductor die on the semiconductor module includes attaching the respective individual semiconductor die to the semiconductor module by diffusion soldering, brazing, or sintering.

[0086] Terms such as "first" and "second" are used to describe various components, areas, parts, etc., and are not intended to be limiting. Throughout the specification, similar terms refer to similar components.

[0087] As used herein, the terms “having,” “containing,” “including,” “comprising,” etc., are open-ended terms that indicate the presence of the stated element or feature but do not exclude additional elements or features. Unless the context clearly indicates otherwise, the articles “a,” “an,” and “the” are intended to include both plural and singular forms.

[0088] Unless otherwise expressly stated, the expression “and / or” shall be interpreted to include all possible combinations of connections and separations. For example, the expression “A and / or B” shall be interpreted to mean only A, only B, or both A and B. Unless otherwise expressly stated, the expression “at least one” shall be interpreted in the same manner as “and / or”. For example, the expression “at least one of A and B” shall be interpreted to mean only A, only B, or both A and B.

[0089] It should be understood that, unless otherwise specifically stated, the features of the various embodiments described herein can be combined with each other.

[0090] Although specific embodiments have been shown and described herein, those skilled in the art will understand that various alternative and / or equivalent implementations may be used instead of the specific embodiments shown and described without departing from the scope of the invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, the invention is intended to be limited only by the claims and their equivalents.

Claims

1. A method comprising: A semiconductor wafer comprising a plurality of die sites, each of the plurality of die sites comprising a vertical power semiconductor device, the semiconductor wafer having a thickness of 250 micrometers or less; A metal wafer is attached to the semiconductor wafer, the metal wafer having a shape similar to that of the semiconductor wafer; Before or after attaching the metal wafer to the semiconductor wafer, the die site is individualized into an individual semiconductor die; as well as After the metal wafer is attached to the semiconductor wafer but before the individual semiconductor die is removed from the semiconductor wafer, the metal wafer is individualized into multiple independent metal bodies that remain attached to the individual semiconductor die.

2. The method according to claim 1, wherein, Attaching the metal wafer to the semiconductor wafer includes attaching a first contact surface of a first metal body of the metal wafer to a first load terminal of the vertical power semiconductor device at each die site, such that a second contact surface of each first metal body opposite to the first contact surface forms a contact portion for attaching to the first load terminal of the vertical power semiconductor device of the first metal body.

3. The method according to claim 2, wherein, The first load terminal of the vertical power semiconductor device at each die site is one of the source terminal, emitter terminal, drain terminal, or collector terminal.

4. The method according to claim 2, wherein, Attaching the metal wafer to the semiconductor wafer also includes attaching a first contact surface of a second metal body of the metal wafer to a control terminal of the vertical power semiconductor device at each die site, such that a second contact surface of each second metal body opposite to the first contact surface forms a contact portion for attaching to the control terminal of the vertical power semiconductor device of the second metal body.

5. The method according to claim 4, in, The first load terminal of the vertical power semiconductor device at each die site is either a source terminal or an emitter terminal, and In this context, the control terminal of the vertical power semiconductor device at each die site is a gate terminal.

6. The method according to claim 2, wherein, One or more first metal bodies of the metal wafer include a vacuum opening that extends at least partially through the first metal body.

7. The method according to claim 1, wherein, Before the metal wafer is individualized into multiple independent metal bodies that remain attached to the individual semiconductor die, the metal wafer is a solid metal part comprising multiple distinct metal bodies formed within the solid metal part.

8. The method according to claim 1, wherein, Before the metal wafer is individualized into multiple independent metal bodies that remain attached to the individual semiconductor die, the metal wafer comprises multiple distinct metal bodies interconnected via a network frame.

9. The method according to claim 1, wherein, Attaching the metal wafer to the semiconductor wafer includes at least one of sintering, diffusion brazing, or brazing.

10. The method according to claim 1, wherein, Before attaching the metal wafer to the semiconductor wafer, the die sites are at least partially individualized into individual semiconductor dies.

11. The method according to claim 1, further comprising: After the metal wafer is attached to the semiconductor wafer but before the individual semiconductor die is removed from the semiconductor wafer, an encapsulating agent is applied to at least a portion of each die site.

12. The method according to claim 1, wherein, The individualization of the die site into an individual semiconductor die and the individualization of the metal wafer into multiple independent metal bodies that remain attached to the individual semiconductor die are performed simultaneously during the same individualization process.

13. The method according to claim 1, further comprising: After the die site is individualized into an individual semiconductor die and after the metal wafer is individualized into a plurality of independent metal bodies attached to the individual semiconductor dies, one or more of the individual semiconductor dies are picked up by contacting the metal body attached to the respective individual semiconductor die with a component of the pick-and-place machine and removing the respective individual semiconductor die from the semiconductor wafer.

14. The method of claim 13, further comprising: After the respective individual semiconductor die is removed from the semiconductor wafer, the respective individual semiconductor die is placed on the power semiconductor module using the pick-and-place machine.

15. The method according to claim 14, wherein, Placing the respective individual semiconductor die on the power semiconductor module includes attaching the respective individual semiconductor die to the power semiconductor module by diffusion soldering, brazing, or sintering.

16. The method according to claim 1, in, Attaching a metal wafer to the semiconductor wafer includes attaching a first metal wafer to a first side of the semiconductor wafer. Specifically, the process of individualizing the metal wafer into multiple independent metal bodies attached to the individual semiconductor die includes individualizing the first metal wafer into multiple independent first metal bodies attached to the individual semiconductor die, and... The method further includes: A second metal wafer is attached to a second opposite side of the semiconductor wafer, the second metal wafer having a shape similar to both the semiconductor wafer and the first metal wafer; and After the second metal wafer is attached to the second side of the semiconductor wafer, but before the individual semiconductor die is removed from the semiconductor wafer, the second metal wafer is individualized into a plurality of independent second metal bodies that remain attached to the individual semiconductor die.

17. The method according to claim 16, wherein, Attaching the second metal wafer to the second side of the semiconductor wafer includes attaching a first contact surface of a second metal body of the second metal wafer to a second load terminal of the vertical power semiconductor device at each die site, such that a second contact surface of each second metal body opposite to the first contact surface forms a contact portion for attaching to the second load terminal of the vertical power semiconductor device of the second metal body.

18. The method according to claim 17, wherein, The second load terminal of the vertical power semiconductor device at each die site is one of the source terminal, emitter terminal, drain terminal, or collector terminal.

19. The method of claim 17, wherein, One or more second metal bodies of the second metal wafer include a vacuum opening that extends at least partially through the second metal body.

20. The method of claim 16, wherein, Attaching the second metal wafer to the second side of the semiconductor wafer includes at least one of sintering, diffusion brazing, or brazing.

21. The method of claim 16, further comprising: After the die site is individualized into an individual semiconductor die, after the first metal wafer is individualized into a plurality of independent first metal bodies, and after the second metal wafer is individualized into a plurality of independent second metal bodies, one or more of the individual semiconductor dies are picked up by contacting the first metal body or the second metal body attached to the respective individual semiconductor die with a component of the pick-and-place machine and removing the respective individual semiconductor die from the semiconductor wafer.

22. The method of claim 21, further comprising: After the respective individual semiconductor die is removed from the semiconductor wafer, the respective individual semiconductor die is placed on the semiconductor module using the pick-and-place machine.

23. The method according to claim 22, wherein, Placing the respective individual semiconductor die on the semiconductor module includes attaching the respective individual semiconductor die to the semiconductor module by diffusion soldering, brazing, or sintering.

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