Connected devices, interworking system and server
By using MCIO and Surelink connectors to achieve blind-mating interconnection between devices and switching board circuits in servers, the problem of traditional connectors limiting hardware architecture is solved, device space utilization and compatibility are improved, and costs and complexity are reduced.
Patent Information
- Application Number
- CN202511464014.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-14
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2045-10-14
AI Technical Summary
The layout of connectors in traditional servers limits the flexibility of the device hardware architecture, resulting in insufficient space utilization, increased cost and complexity, and high-density connectors are difficult to be compatible with devices from different brands.
Employing multichannel input/output connectors (MCIO) and Surelink connectors, blind mating interconnection is achieved via cables to plug and socket subassemblies, ensuring reliable connectivity and flexible layout within limited space.
It enables low-cost and reliable interconnection between equipment and switching board circuits, improves the flexibility and compatibility of equipment hardware architecture, reduces wiring difficulty, and reduces the risk of mis-insertion.
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Figure CN120933694B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of servers, and particularly relates to a connection device, an interconnection system and a server. BACKGROUND
[0002] In a conventional server design, especially in the connection device in the server, such as in a mid-backplane (MBP), the layout of the conventional blind-mate connector has significant limitations. The high-density connector on the front occupies a large projection area on the back of the device, which results in that the area cannot be used to place other components or to perform signal wiring, thereby forming a shielding effect in the physical and electrical aspects, so that the wiring areas on the upper and lower sides of the backplane are isolated from each other, it is difficult to fully utilize the space, and because the position of the high-density connector limits the layout of the peripheral devices, the related devices can only be arranged nearby, thereby adversely affecting the overall board size, PCB (Printed Circuit Board) layer design and heat dissipation structure design. Especially for the mid-position connector which needs to lead a large number of signals to the upper and lower sides of the backplane, the layout of the connector must be located in the central region of the device, which further restricts the flexibility of the overall hardware architecture of the system, and the high-density connector is a non-standard connector, when connecting with old devices or devices of different brands, it may be difficult to be compatible, and additional conversion devices or adapters are needed to realize the connection, which increases the complexity and cost of the system. SUMMARY
[0003] The present application provides a connection device, an interconnection system and a server to at least solve the technical problem that the connector limits the hardware architecture of the device in the related art.
[0004] The application provides a connection device, comprising: a device body and at least one connector assembly; the connector assembly comprises a first connector, a second connector, a first cable, a second cable, a socket subassembly and a plug subassembly, wherein the socket subassembly comprises a socket body and a first plug-in part and a second plug-in part formed in the socket body, the socket body is arranged on the device body, the plug subassembly comprises a plug body, a third plug-in part and a fourth plug-in part formed in the plug body, a third connector arranged in the third plug-in part and a fourth connector arranged in the fourth plug-in part, the first connector, the second connector, the third connector and the fourth connector are multi-channel input and output connectors; the first connector is connected with the third connector through the first cable, the second connector is connected with the fourth connector through the second cable, the first connector and the second connector are connected with a switching board circuit, the third connector and the fourth connector are connected with an uplink switching board circuit, the third connector and the fourth connector are connected with a graphics processor circuit, a power board circuit and a fan board circuit, the first plug-in part is matched with the third plug-in part, and the second plug-in part is matched with the fourth plug-in part, so that the plug and the socket are inserted into each other, when the plug and the socket are inserted into each other, the connection device is interconnected with the switching board circuit; the graphics processor circuit receives at least one of a high-speed signal, a reference clock signal and a reset signal sent by the connection device, data signals of at least one of a non-volatile memory, a universal serial bus and a baseboard management controller are transmitted between the graphics processor circuit and the connection device, a sideband signal is transmitted between the connection device and the power board circuit, a fan-related sideband signal is transmitted between the connection device and the fan board circuit, a sideband signal and a power signal are transmitted between the connection device and the switching board circuit.
[0005] The application also provides an interconnection system, comprising: a switching board circuit, a graphics processor circuit, a power board circuit and a fan board circuit; the connection device described above, wherein the connection device is connected with the switching board circuit, the graphics processor circuit, the power board circuit and the fan board circuit respectively.
[0006] The application also provides a server, comprising the interconnection system described above.
[0007] By the present application, at least one set of connector assemblies are used to realize the blind insertion interconnection between the device and the switching board circuit, wherein the connector assembly comprises a plug subassembly and a socket subassembly, the socket subassembly is arranged on the device body, one end of the first and second connectors is connected with the third and fourth connectors in the plug subassembly through the cable, and the other end of the first and second connectors is connected with the switching board circuit, when the plug subassembly and the socket subassembly are inserted into each other, the third and fourth connectors are connected with the device body, the interconnection between the device and the switching board circuit is realized, and the downlink communication with the device body is realized, the first, second, third and fourth connectors with lower cost are used to realize the blind insertion interconnection between the device and the switching board circuit, and the compatibility is better, therefore, the technical problem that the connector limits the hardware architecture of the device in the related art can be solved, and the technical effect that the device space is fully utilized and the flexibility of the hardware architecture of the device is improved is achieved. BRIEF DESCRIPTION OF DRAWINGS
[0008] In order to more clearly illustrate the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.
[0009] Figure 1 A connection device structure schematic diagram provided for an embodiment of the present application;
[0010] Figure 2 An example diagram of each plug-in part on the plug subassembly and the socket subassembly provided for an embodiment of the present application;
[0011] Figure 3 A mutual connection system topology diagram provided for an embodiment of the present application;
[0012] Figure 4 A structure diagram of the connector assembly provided for an embodiment of the present application. DETAILED DESCRIPTION
[0013] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, but not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.
[0014] It should be noted that in the description of the present application, the terms "comprising", "containing" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or equipment including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such a process, method, article or equipment. The terms "first", "second" and the like in the present application are used to distinguish similar objects, not to describe a specific order or sequence.
[0015] In the related art, the interconnection of the switching board is generally realized by a high-density connector. Compared with some small-sized connectors, the high-density connector has a larger size, and especially in some application scenarios with extremely harsh space requirements, such as miniaturized servers, portable devices and the like, the connector size may be limited. For a connection device such as a backplane, the high-density connector is prone to cause the high-speed lines of the PCB to avoid the power layer, and some power layers have to be additionally connected by an extra copper bar. Moreover, the design of the high-density connector is relatively complex, and many advanced technologies are adopted to realize high performance, such as an integrated embossed grounding structure, a beam-to-beam interface design and the like, which makes the manufacturing process requirement higher, and the production cost also rises, thereby causing the product price to be relatively high. Especially for an AI (Artificial Intelligence) server, the high-speed signal quality requirement is higher, and the cost of the high-density connector used is higher. At the same time, in order to fully exert the performance advantages of the high-density connector, accurate PCB design and manufacturing are required, including strict control of impedance, accurate planning of wiring and the like, which increases the manufacturing difficulty and cost of the PCB. Moreover, the high-density connector is a non-standard connector, and when connected with old devices or devices of different brands, compatibility problems may occur, and additional conversion devices or adapters are required to realize the connection, thereby increasing the complexity and cost of the system.
[0016] In view of the above defects, the embodiments of the present application propose a connection device, an interconnection system and a server to solve the technical problems of high cost of the connector and limitation of the hardware architecture of the device in the related art, and achieve the technical effect of cost saving. The specific details will be described in the following.
[0017] In order for those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the drawings and specific embodiments.
[0018] Figure 1 The connection device structure schematic diagram provided by the embodiments of the present application is as follows, Figure 1As shown, the connection device comprises: a device body 100, at least one connector assembly 110, a first connector 111, a second connector 112, a first cable 113, a second cable 114, a plug subassembly 115, a plug body 1151, a third plug-in part 1152, a fourth plug-in part 1153, a third connector 1154, a fourth connector 1155, a socket subassembly 116, a socket body 1161, a first plug-in part 1162 and a second plug-in part 1163.
[0019] The connector assembly 110 comprises the first connector 111, the second connector 112, the first cable 113, the second cable 114, the socket subassembly 116 and the plug subassembly 115, wherein the socket subassembly 116 comprises the socket body 1161 and the first plug-in part 1162 and the second plug-in part 1163 formed in the socket body 1161, the socket body 1161 is arranged on the device body 100, the plug subassembly 115 comprises the plug body 1151, the third plug-in part 1152 and the fourth plug-in part 1153 formed in the plug body 1151, the third connector 1154 arranged in the third plug-in part 1152 and the fourth connector 1155 arranged in the fourth plug-in part 1153, the first connector 111, the second connector 112, the third connector 1154 and the fourth connector 1155 are multi-channel input and output connectors; the first connector 111 is connected with the third connector 1154 through the first cable 113, the second connector 112 is connected with the fourth connector 1155 through the second cable 114, the first connector 111 and the second connector 112 are connected with the switching board circuit 50, the third connector 1154 and the fourth connector 1155 are connected with the switching board circuit 50 in uplink, the third connector 1154 and the fourth connector 1155 are connected with the graphic processor circuit 20, the power board circuit 30 and the fan board circuit 40 in downlink, the first plug-in part 1162 cooperates with the third plug-in part 1152, the second plug-in part 1163 cooperates with the fourth plug-in part 1153, the mutual insertion of the plug and the socket is realized, when the plug and the socket are inserted into each other, the connection device is interconnected with the switching board circuit 50; the graphic processor circuit 20 receives at least one of the high-speed signal, the reference clock signal and the reset signal sent by the connection device 10, the data signal of at least one of the non-volatile memory, the universal serial bus and the baseboard management controller is transmitted between the graphic processor circuit 20 and the connection device 10, the sideband signal is transmitted between the connection device 10 and the power board circuit 30, the fan-related sideband signal is transmitted between the connection device 10 and the fan board circuit 40, the sideband signal and the power signal are transmitted between the connection device 10 and the switching board circuit 50.
[0020] The exchange board circuit 50 is a PCB module of an integrated high-speed exchange chip, responsible for forwarding and scheduling data traffic between multiple processors efficiently; the fan board is a special circuit board for controlling and managing fan modules in the server; the reference clock signal is PEX_REFCLK<0-2>, which is the reference clock signal of PCIe, the reset signal is PEX_RST<0-2>_N, which is the reset signal of PCIe, the high-speed signals of the graphics processor circuit are transmitted through the interface PCIE 5.0X16_GPU1B~8B designed for high-performance graphics processors with a width of 16 channels, and the digital signals of the non-volatile memory and the graphics processor circuit 20 are transmitted through the interface PCIE 3.0 X2_NVS designed for high-performance graphics processors with a width of 2 channels, PCIe 3.0, for data transmission of NVS (Non-Volatile Storage) and other devices, the digital signals of the universal serial bus and the graphics processor circuit 20 are transmitted through the USB (Universal Serial Bus) 2.0 interface managed by HMC (High-Speed Memory Controller, Hybrid Memory Cube), the digital signals of the baseboard management controller and the graphics processor circuit 20 are transmitted through the BMC_I2C BMC (Baseboard Management Controller) I2C interface, realizing the downlink transmission and interconnection of data.
[0021] It should be noted that the multi-channel input and output connector is an MCIO (Mini Cool Edge Input / Output, multi-channel input / output connector) connector, and the first connector 111 and the second connector 112 form a set of MCIO connectors in the embodiment of the application, that is, a set of two MCIO connectors. The MCIO connector is a high-performance, high-density internal interface solution. The MCIO has a pin pitch of 0.6 mm, adopts a compact design, optimizes system space while supporting high-performance data transmission, is suitable for designs that require high-speed signal wiring and management in limited space, such as servers, network equipment, and other demanding data center applications, and because the MCIO connector can be wired behind it, the wiring on the back of the device does not need to avoid the position of the blind insertion structure, greatly reducing the wiring difficulty, supporting multiple data transmission protocols such as PCIe, CXL (Compute Express Link, Compute Express Link), and can meet single-channel 56Gbps transmission requirements, with a maximum data transmission rate of 64Gbps, and can realize high-speed data transmission from chip to chip, chip to I / O (Input / Output), chip to backplane, board to board, and PCB card edge, etc.
[0022] The MCIO connector provides multiple channel options such as 4X (38 pins), 8X (74 pins), 16X (124 pins), and 20X (148 pins), where X represents the number of high-speed differential signal channels supported by the connector, i.e. 4X represents 4 channels, and up to 20 channels can be customized, providing flexible choices for different application scenarios; the plug subassembly 115 and the socket subassembly form a Surelink connector, and the first plug-in part 1162 and the second plug-in part 1163 of the Surelink connector and the corresponding third plug-in part 1152 and the fourth plug-in part 1153 ensure reliable blind insertion through double guidance, where the double guidance design is a mechanism that ensures that the plug subassembly 115 and the socket subassembly can be accurately aligned and smoothly connected during insertion, guiding the two components through physical structural features, so that reliable connection can be achieved even in limited space or blind insertion conditions, which can effectively prevent incorrect connection, reduce wear and tear, improve connection stability and life, and realize a reliable blind insertion connection solution.
[0023] It can be understood that the embodiment of the application includes the device body 100 and at least one connector assembly 110, which is composed of the first connector 111, the second connector 112, the first cable 113, the second cable 114, the socket subassembly 116 and the plug subassembly 115, wherein the socket subassembly 116 includes the socket body 1161 provided with the first plug-in part 1162 and the second plug-in part 1163, which is installed on the device body 100; the plug subassembly 115 includes the plug body 1151 provided with the third plug-in part 1152 and the fourth plug-in part 1153, and the third connector 1154 and the fourth connector 1155 arranged in the third plug-in part 1152 and the fourth plug-in part 1153 respectively, wherein the above-mentioned connectors are all multi-channel input and output connectors, namely MCIO connectors, the first connector 111 is connected with the third connector 1154 through the first cable 113, the second connector 112 is connected with the fourth connector 1155 through the second cable 114, the first connector 111 is connected with the second connector 112 to exchange the board circuit 50, the third connector 1154 and the fourth connector 1155 are connected with the downstream circuits of the device body 100 (such as the graphic processor circuit 20, the power board circuit 30 and the fan board circuit 40), receive the high-speed signals, including at least one of the reference clock signal and the reset signal, transmitted by the connection device 10 through the graphic processor circuit 20, and transmit the data signals of at least one of the non-volatile memory, the universal serial bus and the baseboard management controller between the connection device 10 and the graphic processor circuit 20, transmit the sideband signals between the connection device 10 and the power board circuit 30, transmit the fan-related sideband signals between the connection device 10 and the fan board circuit 40, and transmit the sideband signals and the power signals between the connection device 10 and the exchange board circuit 50, so as to realize the data intercommunication of the uplink and the downlink, the plug subassembly 115 and the socket subassembly 116 are connected through the precise matching of the first plug-in part 1162 and the third plug-in part 1152 and the second plug-in part 1163 and the fourth plug-in part 1153, the Surelink connector structure adopted by the plug subassembly 115 and the socket subassembly 116 has a double-direction mechanism, which ensures that the plug subassembly 115 and the socket subassembly 116 can be reliably aligned and smoothly connected in the blind plug environment, effectively prevents misplug and wear, and since the MCIO connector can be wired behind, the wiring on the back of the device does not need to avoid the position of the blind plug structure, thereby greatly reducing the wiring difficulty.
[0024] In the embodiment of the application, at least one fifth plug-in part is formed on the plug body 1151, and at least one sixth plug-in part is formed on the socket body 1161, the fifth plug-in part is matched with the sixth plug-in part, and the mutual insertion of the plug subassembly 115 and the socket subassembly 116 is realized.
[0025] The fifth plug-in part and the sixth plug-in part ensure reliable blind insertion through double guiding, can ensure correct position during blind insertion, prevent wrong connection, reduce wear and tear, improve connection stability and service life, and realize a reliable blind insertion connection solution. Figure 2 The plug-in parts on the plug subassembly 115 and the socket subassembly 116 are shown in the example diagram, and the specific design mode can be determined according to actual needs. Figure 2 Only as a structural example, not as a specific limitation.
[0026] It can be understood that at least one fifth plug-in part is formed on the plug body 1151, and at least one sixth plug-in part is formed on the socket body 1161. The fifth plug-in part and the sixth plug-in part cooperate with each other to realize the pluggable connection of the plug subassembly 115 and the socket subassembly 116. The fifth plug-in part and the sixth plug-in part ensure reliable blind insertion through a double guiding structure, can ensure correct position during blind insertion, prevent wrong connection, reduce wear and tear, improve connection stability and service life, and thus realize a high-reliability blind insertion connection solution.
[0027] In the embodiment of the application, the connector assembly 110 is provided with a power supply line, which is routed along the signal lines of the sideband signals of the first connector 111, the second connector 112, the third connector 1154 and the fourth connector 1155, and takes power from the switching board circuit 50 through the power supply line.
[0028] Some voltages of the device body 100 need to be taken from the switching board circuit 50, for example, 12V of the device body 100 needs to be taken from the switching board circuit 50. The sideband signal refers to a low-speed signal used for transmitting control, state and management information in addition to the main high-speed data channel, such as I2C (Inter-Integrated Circuit), GPIO (General-Purpose Input / Output), USB (Universal Serial Bus), PSU (Power Supply Unit) communication, etc.
[0029] It can be understood that the connector assembly 110 is provided with a power supply line, which is routed along the signal lines of the sideband signals between the first connector 111, the second connector 112, the third connector 1154 and the fourth connector 1155; through the power supply line, power is taken from the connected switching board circuit 50, and the power is transmitted to the device body 100.
[0030] In the embodiment of the present application, the first connector 111, the second connector 112, the third connector 1154 and the fourth connector 1155 are provided with power supply pins, and the pins on both sides of the power supply pins are left empty.
[0031] The pins on both sides of the power supply pins are left empty, which is to prevent the first connector 111, the second connector 112, the third connector 1154 or the fourth connector 1155 from being skewed due to blind insertion out of position, causing the power supply pins to be short-circuited to the pins on both sides, resulting in voltage breakdown of other devices. The in-position pin is a special electrical contact for detecting whether the module or the connection assembly has been correctly inserted and in position. When the connector is fully inserted, the pin changes the level state by grounding or electrifying, sends a signal to the system to show that the connector is in position.
[0032] It should be noted that, since the first connector 111 and the second connector 112 are a group, and the third connector 1154 and the fourth connector 1155 are a group, the first connector 111 and the second connector 112 only need to reserve the in-position pin on one of the connectors, and do not need to reserve the in-position pin on each connector, so as to minimize the occupation of the sideband pins of the connector and increase the number of available pins for interconnection. The same applies to the third connector 1154 and the fourth connector 1155.
[0033] It can be understood that the first connector 111, the second connector 112, the third connector 1154 and the fourth connector 1155 of the embodiment of the present application are provided with power supply pins, and the pin positions on both sides of the power supply pins are designed to be empty. The purpose of this empty design is to prevent the first connector 111, the second connector 112, the third connector 1154 or the fourth connector 1155 from being skewed due to insertion out of position or deviation of the position during blind insertion, thereby causing the power supply pins to be short-circuited to the pins on both sides, resulting in abnormal voltage conduction to other circuit devices, causing device breakdown or damage. By leaving the pins on both sides of the power supply pins empty, the safety and reliability of the connection are improved.
[0034] In the embodiment of the present application, the first connector 111, the second connector 112, the third connector 1154 and the fourth connector 1155 are provided with in-position pins, which are used to determine the in-position state of the connector assembly 110.
[0035] The in-position pin is a special electrical contact for detecting whether the module or the connection assembly has been correctly inserted and in position. When the connector is fully inserted, the pin changes the level state by grounding or electrifying, sends a signal to the system to show that the connector is in position.
[0036] It should be noted that, since the first connector 111 and the second connector 112 are a group, and the third connector 1154 and the fourth connector 1155 are a group, the in-place pin is only reserved on one of the connectors, and it is not necessary to reserve the in-place pin on each connector, so as to reduce the occupation of the sideband pin of the connector and increase the available pin number of interconnection, and the third connector 1154 and the fourth connector 1155 are the same.
[0037] It can be understood that the first connector 111, the second connector 112, the third connector 1154 and the fourth connector 1155 are provided with an in-place pin, which is an electrical contact for detecting whether the module or the connection assembly is correctly inserted and in place, for determining the in-place state of the connector, and since the first connector 111 and the second connector 112 are a group, and the third connector 1154 and the fourth connector 1155 are a group, only one connector needs to be selected to reserve the in-place pin in the first connector 111 and the second connector 112, and it is not necessary to set the in-place pin on each connector, so as to reduce the occupation of the sideband pin of the connector and increase the available pin number of interconnection, and the third connector 1154 and the fourth connector 1155 are the same.
[0038] In the embodiment of the application, the first connector 111, the second connector 112, the third connector 1154 and the fourth connector 1155 are provided with at least one sideband signal pin and at least one high-speed signal pin, the sideband signal pin receives a sideband signal, and the high-speed signal pin receives a high-speed signal, and the high-speed signal pin is provided with ground pins on both sides, and the ground pins are used for shielding the high-speed signal.
[0039] Since the original MCIO has limited high-speed signal pins, part of the relatively high-speed signals need to pass through the sideband signal of the MCIO connector, and part of the high-speed signal pins are replaced by the improved sideband signal pins; the high-speed signal pin is connected in the sideband signal pin of the MCIO by adding ground pins on both sides, and the high-speed signal is shielded by the ground pins on both sides, so as to ensure the signal integrity.
[0040] It should be noted that, in the embodiment of the application, the relatively low-speed I2C signal pin is also ensured by adding ground pins on both sides of the pin to ensure the signal quality, and the standardization of the cable is also ensured by this method, and a separate cable is not needed for the sideband signal to pass through the high-speed line, and only a standard cable is needed.
[0041] It can be understood that at least one sideband signal pin and at least one high-speed signal pin are arranged in the first connector 111, the second connector 112, the third connector 1154 and the fourth connector 1155 of the embodiment of the present application, wherein the sideband signal pin is used to receive a sideband signal, and the high-speed signal pin is used to receive a high-speed signal. Since the number of original high-speed signal pins of the MCIO connector is limited, part of the relatively high-speed signals need to be transmitted through the sideband signal channel of the MCIO, and therefore, part of the high-speed signal pins are served by the improved sideband signal pins. In addition, ground pins are arranged on both sides of the high-speed signal pin, and the high-speed signal is shielded through the ground pins on both sides to ensure the integrity of the high-speed signal, so that a separate cable is not needed for the sideband signal to pass through the high-speed line, only a standard cable is needed, and the design complexity is reduced.
[0042] In the embodiment of the present application, the power board circuit 30 includes a power board body, a power connection sheet and a sideband connector arranged on the power board body. The power connection sheet connects the graphic processor circuit 20 and the fan board circuit 40, and the sideband connector is connected with the third connector 1154 and the fourth connector 1155 to relay the sideband signal to the power board circuit 30.
[0043] The power connection sheet is a CILP (Current Integrated Link Power) which is a high-power connection component for large-current power transmission and is commonly used in scenes with extremely high power supply requirements. In the embodiment of the present application, the power connection sheet provides a connection with the power board for the device body 100 and provides a P54V input for the device body 100.
[0044] It can be understood that the power board circuit 30 of the embodiment of the present application mainly includes a power board body, and a power connection sheet and a sideband connector arranged thereon. The power connection sheet is used to connect the graphic processor circuit 20 and the fan board circuit 40 to realize power supply for these functional modules. The power connection sheet adopts a CILP structure and is a high-density power connection component specially designed for high-power and large-current transmission, which is suitable for application scenes with strict power supply requirements and can provide stable P54V power input for the device body 100. At the same time, the sideband connector is connected with the third connector 1154 and the fourth connector 1155 in the plug subassembly 115 to relay the sideband signal from the switching board circuit 50 to the power board circuit 30, realize auxiliary functions such as power state monitoring and management communication, and thus guarantee the reliability and manageability of system power supply.
[0045] In the embodiment of the present application, the graphic processor circuit 20 includes a high-density connector and a first power connection connector. The high-density connector is connected with the third connector 1154 and the fourth connector 1155, and the first power connection connector is connected with the power connection sheet.
[0046] The high-density connector is a high-density connector (such as EXAMAX) supporting a high-speed serial protocol (such as PCIe, CXL), and is used for data transmission between the device and a graphics processor (GPU) board; and the first power connector is a board-to-board power connector, which can supply power to the graphics processor circuit 20.
[0047] It can be understood that the graphics processor circuit 20 of the embodiment of the application mainly includes the high-density connector and the first power connector, wherein the high-density connector is connected with the third connector 1154 and the fourth connector 1155 in the plug subassembly 115, and high-speed data communication between the graphics processor board and the device is realized; and the first power connector is connected with the power connection sheet on the power board, and is used for providing required power for the graphics processor circuit 20. The high-density connector is a high-performance connection solution supporting PCIe, CXL and other high-speed serial protocols, has high density, small pitch and excellent signal integrity, and is suitable for efficient interconnection between the GPU and the switching board in the server and the high-performance computing device; and the first power connector adopts a board-to-board power connection structure, can bear large current, and ensures stable operation of the graphics processor under high load, thereby guaranteeing high performance and reliability of the GPU system in terms of data transmission and power supply.
[0048] According to the connecting device provided in the embodiment of the application, at least one connector assembly is used to realize blind insertion interconnection between the device and the switching board circuit, wherein the connector assembly includes a plug subassembly and a socket subassembly, the socket subassembly is arranged on the device body, one end of the first and second connectors is connected with the third and fourth connectors in the plug subassembly through a cable, and the other end of the first and second connectors is connected with the switching board circuit. When the plug subassembly and the socket subassembly are inserted into each other, the third and fourth connectors are connected with the device body, the interconnection between the connecting device and the switching board circuit is realized, and the downlink of the device body is communicated, the device arrangement on the back of the device is not blocked, the compatibility is better, the space of the device is fully utilized, and the flexibility of the hardware architecture of the device is improved.
[0049] Through the description of the above implementation, those skilled in the art can clearly understand that the method according to the above embodiment can be realized by means of software and the necessary general hardware platform, of course, it can also be realized by hardware, but in many cases, the former is a better implementation.
[0050] The connecting device of the application is further described below through a specific embodiment.
[0051] In this embodiment, the MCIO connector is used to connect the switching board, and the system topology diagram is as shown in Figure 3As shown, in particular:
[0052] The connecting device of the embodiment is a middle backboard, 16 MCIO connectors are used, that is, 8 connector assemblies are used to realize the connection with the switching board and realize the input and interaction of signals; the middle backboard is connected with the graphic processor circuit Hopper-Next through the high-speed backboard connector assembly in the downward direction, wherein the high-speed backboard connector assembly includes 8 high-speed backboard connectors EXAMAX Connector (a special connector name) and 6 power adapters PWR CONN, the power adapter PWR CONN adapts the power input from the power connection piece Power Clip on the middle backboard to provide the required power for the graphic processor circuit Hopper-Next, and at the same time, the high-speed backboard connector EXAMAX Connector receives the high-speed signals from the first connector, such as Figure 3 As shown, including: PEX_REFCLK<0-2>, the reference clock signal of PCIe, PEX_RST<0-2>_N, the reset signal of PCIe, and through the following interfaces: PCIE 5.0X16_GPU1B~8B, an interface with a 16-channel width, designed for high-performance graphic processors, PCIE 3.0 X2_NVS, PCIe 3.0 version, an interface with a 2-channel width, used for NVS (Non-Volatile Storage non-volatile memory) and other devices, HMC_USB2.0, an USB (Universal Serial Bus, Universal Serial Bus) 2.0 interface managed by HMC (High-Speed Memory Controller, Hybrid Memory Cube), and a BMC_I2C BMC (Baseboard Management Controller, Baseboard Management Controller) I2C interface, realizing the downward transmission and interconnection of data. Since the MCIO back can be wired, the card wiring does not need to avoid the position of the blind insertion structure, greatly reducing the wiring difficulty.
[0053] In the embodiment, the application further includes a power supply component arranged on the middle backboard, wherein the power supply component includes a power supply connecting sheet Power Clip and a sideband connector Sideband Connector; the power supply connecting sheet Power Clip is used to supply power for the middle backboard to connect the power input of the 54V power supply board, and provide the power input (i.e. P54V) for the middle backboard; the sideband connector Sideband Connector is connected with the first connector, and is used to receive sideband signals (such as I2C, PSU, etc.), and transfer these signals to the related control circuit of the power supply component, so as to realize the monitoring, management and collaborative control of the power supply state, and ensure the stability and reliability of the system power supply; the embodiment further includes a board-to-board knife connector Connector arranged on the middle backboard, one end of which is electrically connected with the power supply connecting sheet Power Clip and the first connector, and the other end of which is connected with the fan board; through the board-to-board knife connector Connector, the P54V working power supply of the power supply connecting sheet, the fan-related sideband signals from the first connector and the standby voltage signal P3V3_STBY are transferred to the fan board, so as to realize the power supply and control signal transmission of the fan board.
[0054] The embodiment further provides an MBP FRU (Mother Board Field Replaceable Unit, main board field replaceable unit), a middle backboard required by a main board part, a thermal sensor, a thermal sensor, a VR (Voltage Regulator, voltage regulator) and the like which can be replaced and maintained on site, and signals are transmitted to the MBP FRU through a BMC_I2C9 (baseboard management controller I2C interface 9), and the standby voltage signal P3V3_STBY required by the fan board is obtained through VR adjustment.
[0055] The embodiment uses the MCIO connector, and constructs a corresponding blind insertion structure for the MCIO connector, and through special pin setting, the MCIO connector can be used for middle backboard connection, so as to solve the technical problem that the connector limits the hardware architecture of the middle backboard in the related art.
[0056] Blind insertion problem of middle backboard and exchange board: Since the middle backboard is in the chassis in the architecture, it is difficult to directly insert a wire when installing, and blind insertion design is needed. However, the general MCIO connector is difficult to support blind insertion in the chassis. Therefore, the embodiment of the application introduces Surelink connector, that is, the plug and socket mentioned above, on the middle backboard. By using Surelink connector, reliable blind insertion application is ensured through double guidance to realize blind insertion of high-speed interconnection of the exchange board and the middle backboard. The structure of Surelink connector + MCIO connector blind insertion is as shown in Figure 4 .
[0057] MCIO connector power supply design: Since 12V of the middle backboard needs to be powered from the exchange board end (as shown in Figure 3 middle P12V_STBY, +12V standby power supply), compared with the traditional high-density connector, the power supply risk of 12V of the MCIO connector is relatively large. Therefore, special design is made for the power supply of 12V. The power supply of 12V is arranged at the edge band signal position of the MCIO connector. According to the current requirement, two pin pairs are selected to supply 12V to the middle backboard. For the 12V power supply pin, the pins on both sides are left unused to prevent blind insertion from being out of place, causing the MCIO connector to be skewed and causing the 12V pin to be short-circuited to the pins on both sides. Since the same MCIO connector is used, in order to prevent errors during blind insertion, the positions of other MCIO power supply pins and the pins on both sides are also left unused, thereby minimizing the risk of incorrect insertion of 12V damaging other devices.
[0058] The processing method of the edge band signal of the embodiment is as follows:
[0059] Connector in-place setting: Since the connector form of Surelink connector + MCIO connector is used, two MCIO connectors on the middle backboard end are a group, and one shell (that is, Surelink connector) is used for interfacing. Only one in-place pin is reserved on each MCIO connector in each group of connectors, so as to minimize the occupation of the edge band pin of the MCIO connector and increase the number of available pins for interconnection.
[0060] Since the original high-speed pins of the MCIO connector are limited, part of the relatively high-speed signals need to pass through the edge band signal of the MCIO connector. For high-speed signals such as USB, CPU (Central Processing Unit, central processor) Gen3 PCIE, etc., the edge band signal pins of the MCIO connector are connected by adding ground pins on both sides, the ground on both sides is used to shield the high-speed signal, and the signal integrity is ensured. The relatively low-speed I2C signal is also ensured by this method to ensure signal quality. At the same time, this method also ensures the standardization of the cable, and does not need to make a separate MCIO cable for the edge band signal, but only needs a standard cable.
[0061] The embodiment of the present application further provides a server comprising the interconnection system.
[0062] The embodiment of the present application further provides a server comprising the interconnection system.
[0063] Those skilled in the art will further understand that the units and algorithm steps of each example described in connection with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both, and that the above described examples are general descriptions of the components and steps of each example. Whether the functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.
[0064] The above describes in detail the connection device, the interconnection system and the server provided by the present application. The principles and implementation modes of the present application are described by applying specific examples. The above description of the examples is only used to help understand the method and core idea of the present application. It should be pointed out that, for those skilled in the art, some improvements and modifications can be made to the present application without departing from the principles of the present application, and these improvements and modifications also fall within the protection scope of the claims of the present application.
Claims
1. A connection device, characterized in that The device comprises: a device body and at least one connector assembly; the connector assembly comprises a first connector, a second connector, a first cable, a second cable, a socket subassembly and a plug subassembly, wherein the socket subassembly comprises a socket body and a first plug-in part and a second plug-in part formed in the socket body, the socket body is arranged on the device body, the plug subassembly comprises a plug body, a third plug-in part and a fourth plug-in part formed in the plug body, a third connector arranged in the third plug-in part and a fourth connector arranged in the fourth plug-in part, the first connector, the second connector, the third connector and the fourth connector are multi-channel input and output connectors; the first connector is connected with the third connector through the first cable, the second connector is connected with the fourth connector through the second cable, the first connector and the second connector are connected with a switching board circuit, the third connector and the fourth connector are connected with the switching board circuit in uplink, the third connector and the fourth connector are connected with a graphics processor circuit, a power board circuit and a fan board circuit in downlink, the first plug-in part cooperates with the third plug-in part, the second plug-in part cooperates with the fourth plug-in part, the mutual insertion of the plug and the socket is realized, when the plug and the socket are mutually inserted, the connection device is interconnected with the switching board circuit; the graphics processor circuit receives at least one of high-speed signals, reference clock signals and reset signals sent by the connection device, the graphics processor circuit and the connection device transmit data signals of at least one of non-volatile memories, universal serial buses and baseboard management controllers, the connection device and the power board circuit transmit sideband signals, the connection device and the fan board circuit transmit fan-related sideband signals, the connection device and the switching board circuit transmit sideband signals and power signals.
2. The connection device according to claim 1, characterized in that At least one fifth plug-in part is formed on the plug body, at least one sixth plug-in part is formed on the socket body, the fifth plug-in part cooperates with the sixth plug-in part, the mutual insertion of the plug subassembly and the socket subassembly is realized.
3. The connection device of claim 1, wherein The connector assembly is provided with a power supply circuit, the power supply circuit is routed along the signal line of the sideband signals of the first connector, the second connector, the third connector and the fourth connector, and power is taken from the switching board circuit through the power supply circuit.
4. The connection device of claim 1, wherein The first connector, the second connector, the third connector and the fourth connector are provided with power supply pins, and the pins on both sides of the power supply pins are empty.
5. The connection device of claim 1, wherein The first connector, the second connector, the third connector and the fourth connector are provided with at least one sideband signal pin and at least one high-speed signal pin, the sideband signal pin receives the sideband signal, the high-speed signal pin receives the high-speed signal, the high-speed signal pin is provided with a ground pin on both sides, and the ground pin is used to shield the high-speed signal.
6. The connection device of claim 1, wherein The power board circuit comprises a power board body, a power connection sheet and a sideband connector arranged on the power board body, the power connection sheet connects the graphic processor circuit and the fan board circuit, and the sideband connector is connected with the third connector and the fourth connector to transfer a sideband signal to the power board circuit.
7. The connection device of claim 6, wherein The graphic processor circuit comprises a high-density connector and a first power connection sheet, wherein the high-density connector is connected with the third connector and the fourth connector, and the first power connection sheet is connected with the power connection sheet.
8. The connection device of claim 6, wherein, The fan board circuit comprises a fan board body and a second power connection sheet and a signal connection sheet arranged on the fan board body, wherein the second power connection sheet is connected with the power connection sheet, and the signal connection sheet is connected with the third connector and the fourth connector.
9. An interworking system characterized by comprising: The system comprises: a switching board circuit, a graphic processor circuit, a power board circuit and a fan board circuit; The connection device of any one of claims 1-8, wherein the connection device is connected with the switching board circuit, the graphic processor circuit, the power board circuit and the fan board circuit respectively.
10. A server, characterized by The interconnection system of claim 9.
Citation Information
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