Communication method, system, device and equipment of microcomputer interlocking equipment and storage medium

Abstract

The invention provides a communication method, system, device and equipment of microcomputer interlocking equipment and a storage medium, and relates to the technical field of rail transit, the method is applied to a target board card in the communication system of the microcomputer interlocking equipment, the microcomputer interlocking equipment comprises the target board card, at least one IO board card and a communication board, and the target board card comprises two central processing units; the target board card is respectively connected with each IO board card and the communication board; the method comprises the following steps: determining main and standby states of two central processing units; the CAN messages sent by the IO board cards are analyzed and processed through the main system central processing unit, the analyzed CAN messages of the IO board cards are sent to the IO board cards and the communication board, data exchange is carried out after the CAN messages are obtained by the dual central processing units of the IO board cards, and the communication board carries out data packaging and then sends the data to the mainboard. Data voting or state voting can be carried out between the double central processing units of the IO board cards, and the communication safety is high.

Description

Technical Field

[0001] This invention relates to the field of rail transit technology, and in particular to a communication method, system, device, equipment, and storage medium for a microcomputer interlocking device. Background Technology

[0002] The microcomputer interlocking equipment used in the mining area railway includes turnout boards, track circuit boards, signal boards, input boards, output boards, and other input / output (IO) boards. Figure 1 This is a configuration diagram of the input / output card slots in a microcomputer interlocking device provided by existing technology, such as... Figure 1 As shown, the microcomputer interlocking equipment integrates a varying number of I / O boards in its cage compartment. Each compartment contains a communication board that communicates with the main board via a network cable. Instructions issued by the station control console are sent from the main board to the communication board, and then distributed to the I / O boards for execution. The I / O boards execute instructions or periodically upload various collected statuses and data to the communication board. The communication board packages the data and sends it to the main board.

[0003] Figure 2 This is a schematic diagram of the communication between input / output boards and communication boards in a microcomputer interlocking device provided by existing technology, such as... Figure 2 As shown, an I / O board has two independent Central Processing Units (CPUs), each connected to a communication board via two separate paths. However, because the two CPUs on each I / O board cannot communicate with each other, the two CPUs on each I / O board cannot perform data voting or status voting, resulting in weak communication security. Summary of the Invention

[0004] This invention provides a communication method, system, device, equipment, and storage medium for microcomputer interlocking equipment, which addresses the shortcomings of weak communication security in the prior art and improves communication security.

[0005] In a first aspect, the present invention provides a communication method for a microcomputer interlocking device. The method is applied to a target board in the communication system of the microcomputer interlocking device. The microcomputer interlocking device includes the target board, at least one I / O board, and a communication board. The target board includes two central processing units. The target board is connected to each of the I / O boards and the communication board respectively. The method includes the following steps: Determine the primary / standby status of the two central processing units; The main central processing unit receives CAN messages sent by each of the I / O boards. The main CPU parses the CAN messages sent by each of the I / O boards to obtain the parsed CAN messages of each I / O board. The CAN transceiver corresponding to the main CPU then sends the parsed CAN messages of each I / O board to each I / O board and the communication board. The parsed CAN messages of each I / O board are used by the dual CPUs of each I / O board for data exchange, and by the communication board for data packaging and sending to the host board.

[0006] According to a communication method for a microcomputer interlocking device provided by the present invention, the target board further includes an interlocking relay, the two central processing units include a first central processing unit and a second central processing unit, the interlocking relay includes two ends, and the two ends of the interlocking relay are respectively connected to the first central processing unit and the second central processing unit; determining the primary / standby status of the two central processing units includes: The interlocking relay is kept in a target state by using digital XOR logic, wherein one end is engaged and the other end is disengaged. Determine whether one end of the interlock relay corresponding to the first central processing unit is in the energized state; When one end of the interlock relay corresponding to the first central processing unit is in the energized state, the first central processing unit is identified as the primary central processing unit and the second central processing unit is identified as the backup central processing unit. When one end of the interlock relay corresponding to the second central processing unit is in the energized state, the second central processing unit is identified as the primary central processing unit, and the first central processing unit is identified as the backup central processing unit.

[0007] According to a communication method for a microcomputer interlocking device provided by the present invention, the target board further includes a CAN transceiver corresponding to the primary central processing unit (CPU), and the two CPUs are connected via a high-speed serial port; the step of receiving CAN messages sent by each of the I / O boards through the primary CPU, and synchronizing the CAN messages sent by each of the I / O boards to the backup CPU (excluding the primary CPU) through the primary CPU, includes: The CAN transceiver corresponding to the main system central processing unit receives CAN messages sent by each of the IO boards. The CAN messages sent by each of the I / O boards are synchronized via the high-speed serial port to the backup central processor (other than the primary central processor) of the two central processors.

[0008] According to a communication method for a microcomputer interlocking device provided by the present invention, the communication board is compatible with at least two communication protocols, and the CAN message sent by each of the I / O boards includes the communication protocol version; the step of parsing the CAN message sent by each of the I / O boards through the main central processing unit to obtain the parsed CAN message of each of the I / O boards includes: The main central processing unit parses the data and objects in the CAN messages sent by each IO board based on the data format and object format corresponding to the communication protocol version, and obtains the data truth value and object truth value in the CAN messages parsed by each IO board. The main central processing unit selects the corresponding CAN message type based on the data truth value and the object truth value in the CAN message parsed by each IO board; the communication protocol defines a variety of message types, including at least one of the following: data frame and remote frame; Based on the CAN message type, the data truth value and the object truth value are organized into the data field of the CAN message parsed by each IO board, and the identifier of the CAN message parsed by each IO board is set according to the priority of the CAN message sent by each IO board. Based on the data fields of the CAN messages parsed by each IO board and the identifier of the CAN messages parsed by each IO board, the CAN messages parsed by each IO board are determined.

[0009] According to a communication method for a microcomputer interlocking device provided by the present invention, any of the I / O boards includes a first CPU and a second CPU; the method further includes: The main system central processing unit receives the first CAN message sent by the first CPU and the second CAN message sent by the second CPU. The host central processing unit performs data voting based on the first CAN message and the second CAN message to obtain the data voting result.

[0010] According to a communication method for a microcomputer interlocking device provided by the present invention, the method further includes: If the data voting result is successful, the main central processing unit adds a checksum to the first CAN message and the second CAN message, and stores the CAN message with the added checksum to the data storage chip of the target board. If the data voting result fails, the first CAN message and the second CAN message are discarded.

[0011] Secondly, the present invention also provides a communication system for a microcomputer interlocking device. The microcomputer interlocking device includes a target board, at least one I / O board, and a communication board. The target board includes two central processing units. The target board is connected to each of the I / O boards and the communication board respectively. The target board is used to determine the primary / backup status of the two central processing units; receive CAN messages sent by each of the I / O boards through the primary central processing unit; parse and process the CAN messages sent by each of the I / O boards through the primary central processing unit to obtain the parsed CAN messages of each of the I / O boards; and send the parsed CAN messages of each of the I / O boards to each of the I / O boards and the communication board through the CAN transceiver corresponding to the primary central processing unit. Each of the aforementioned I / O boards is used for data exchange after being acquired by the dual central processing units; The communication board is used to package the CAN messages parsed by each of the IO boards and send them to the host board.

[0012] Thirdly, the present invention also provides a communication device for a microcomputer interlocking device. This device is applied to a target board in the communication system of the microcomputer interlocking device. The microcomputer interlocking device includes the target board, at least one I / O board, and a communication board. The target board includes two central processing units. The target board is connected to each of the I / O boards and the communication board respectively. The device includes the following modules: The determination module is used to determine the primary / standby status of the two central processing units; The communication module is used to receive CAN messages sent by each of the I / O boards through the main central processing unit; The main CPU parses the CAN messages sent by each of the I / O boards to obtain the parsed CAN messages of each I / O board. The CAN transceiver corresponding to the main CPU then sends the parsed CAN messages of each I / O board to each I / O board and the communication board. The parsed CAN messages of each I / O board are used by the dual CPUs of each I / O board for data exchange, and by the communication board for data packaging and sending to the host board.

[0013] Fourthly, the present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the communication method of any of the microcomputer interlocking devices described above.

[0014] Fifthly, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the communication method of the microcomputer interlocking device as described above.

[0015] Sixthly, the present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the communication method of any of the microcomputer interlocking devices described above.

[0016] This invention provides a communication method, system, device, equipment, and storage medium for a microcomputer interlocking device. The method is applied to a target board in the communication system of the microcomputer interlocking device. The microcomputer interlocking device includes a target board, at least one I / O board, and a communication board. The target board includes two central processing units (CPUs). The target board is connected to each I / O board and the communication board. First, the master / standby status of the two CPUs is determined. Then, the master CPU receives CAN messages sent by each I / O board. Further, the master CPU parses the CAN messages sent by each I / O board to obtain the parsed CAN messages. Then, the CAN transceiver corresponding to the master CPU sends the parsed CAN messages of each I / O board to each I / O board and the communication board. The parsed CAN messages of each I / O board are used for data exchange by the dual CPUs of each I / O board, and for data packaging and transmission to the host board by the communication board.

[0017] The microcomputer interlocking device of this invention includes a target board, at least one I / O board, and a communication board. The target board includes two central processing units (CPUs). The target board is connected to each I / O board and the communication board respectively. A slot is reserved to add a target board for building a communication data bridge. After receiving CAN messages sent by each I / O board, the target board parses and processes them, and then sends them to each I / O board and the communication board. Each I / O board is used to obtain the parsed message through the dual CPUs and exchange data. This upgrades the original communication method. The dual CPUs of each I / O board can perform data voting or status voting, resulting in higher communication security. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the configuration of input / output interlocking boards in a microcomputer interlocking device provided by existing technology.

[0020] Figure 2 This is a schematic diagram of the communication between the input / output board and the communication board in a microcomputer interlocking device provided by existing technology.

[0021] Figure 3 This is one of the flowcharts illustrating the communication method of the microcomputer interlocking device provided by the present invention.

[0022] Figure 4 This is a schematic diagram of the communication system of the microcomputer interlocking device provided by the present invention.

[0023] Figure 5 This is a schematic diagram of the internal structure of the target board in the microcomputer interlocking device provided by the present invention.

[0024] Figure 6 This is the second flowchart illustrating the communication method of the microcomputer interlocking device provided by the present invention.

[0025] Figure 7 This is the third flowchart illustrating the communication method of the microcomputer interlocking device provided by the present invention.

[0026] Figure 8 This is a schematic diagram of the communication device of the microcomputer interlocking equipment provided by the present invention.

[0027] Figure 9 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0029] To gain a clearer understanding of the various embodiments provided by this invention, the technical content involved in this invention will first be described as follows: Microcomputer interlocking equipment: Railway signaling equipment that uses microcomputers to replace electrical interlocking functions.

[0030] Turnout board: A component of the microcomputer interlocking equipment, belonging to the IO board, whose main function is to control the operation of the switch machine and collect the status of the switch machine.

[0031] Track circuit board: A component of the microcomputer interlocking equipment, belonging to the IO board, whose main function is to collect track voltage and determine the occupancy status of track sections.

[0032] Signal board: A component of microcomputer interlocking equipment, belonging to the IO board, whose main function is to control signal lights.

[0033] Input board: A component of microcomputer interlocking equipment, belonging to the IO board, whose main function is to collect digital quantities.

[0034] Output board: A component of microcomputer interlocking equipment, belonging to the IO board, whose main function is to output digital quantities.

[0035] The following is combined with Figures 3-9 Describe the communication methods, systems, devices, equipment, and storage media of microcomputer interlocking devices.

[0036] Figure 3 This is one of the flowcharts illustrating the communication method of the microcomputer interlocking device provided by the present invention. The method is applied to a target board in the microcomputer interlocking device, which includes a target board, at least one input / output (IO) board, and a communication board. The target board includes two central processing units (CPUs). The target board is connected to each IO board and the communication board respectively. Figure 3 As shown, the method includes the following: Step 301: Determine the primary / standby status of the two central processing units; Specifically, firstly, it should be noted that the execution subject of this invention is the target board in the microcomputer interlocking device, which is used to solve the problem of the two CPUs of the IO board not communicating with each other and to improve communication security.

[0037] Figure 4 This is a schematic diagram of the CAN connection of the target board in the microcomputer interlocking device provided by the present invention, as shown below. Figure 4 As shown, the microcomputer interlocking device includes a target board (e.g., a data bridge board), at least one I / O board (e.g., I / O board 1 and I / O board 2), and a communication board. That is, the present invention adds an additional target board to the chassis of the microcomputer interlocking device. The target board is connected to each I / O board and the communication board, and the target board occupies one I / O slot, for example... Figure 4 The data bridge board enables communication between the two CPUs on the I / O board. The software running on the data bridge board can upgrade the communication architecture and achieve dual-CPU data voting to improve security, without requiring any changes to the original hardware boards.

[0038] The I / O board, or input / output card, is an industrial-grade remote data acquisition and control module used to connect external devices and microprocessors. It primarily handles data input and output, enabling remote monitoring and control of external devices via remote commands.

[0039] In this embodiment, the I / O board types include at least one of the following: turnout board, track circuit board, signal board, input board, and output board. The data types uploaded by different I / O boards are as follows: The data types uploaded by the turnout board are: switch machine operating current and position status; the data types uploaded by the track circuit board are: rail surface voltage; the data types uploaded by the signal board are: signal light relay status; the data types uploaded by the input board are: input; and the data types uploaded by the output board are: output relay status.

[0040] Figure 5 This is a schematic diagram of the internal structure of the target board in the microcomputer interlocking device provided by the present invention, as shown below. Figure 5 As shown, the target board includes two central processing units (CPU 1 and CPU 2). CPU 1 and CPU 2 are two independent CPU data processing units, with a high-speed serial port for data communication between the two CPUs, two independent CAN transceivers, two independent external serial transceivers, and a data memory connected to both CPUs to store data logs. An interlocking relay hardware circuit is designed between the two CPUs. The software part of the data bridge board includes CAN message reception, processing and storage, and CAN message parsing and transmission.

[0041] The method provided in this embodiment can be implemented through the following steps: First, determine the primary and backup status of the two central processing units. The primary state has the authority to receive, store, and send CAN messages, while the backup state does not.

[0042] The mechanism for determining the primary / standby status process is, for example, by designing an interlocking relay hardware circuit between the two CPUs. The data bridge board has dual hardware redundancy, so it can continue to work even if a single failure occurs. The interlocking relay uses two relays, and digital XOR logic is built using the relay nodes to keep one end in the energized state while the other end is in the de-energized state. Only one central processing unit is working at any given time.

[0043] Step 302: Receive CAN messages sent by each IO board through the main system central processing unit; Specifically, after identifying the main central processing unit (CPU) in the target board, the CPU performs subsequent CAN message reception, storage, parsing, and transmission.

[0044] First, the CAN message sent by the IO board is received by the CAN transceiver corresponding to the main central processing unit. For example, if the main central processing unit is central processing unit 1, then the CAN message sent by the IO board is received by CAN transceiver 1.

[0045] Furthermore, it should be noted that although only the primary CPU is performing communication and data processing at any given time, it still needs to synchronize the received data with other backup CPUs. For example, the CAN messages can be synchronized via a high-speed serial port between CPU 1 and CPU 2.

[0046] Step 303: The main system central processing unit parses and processes the CAN messages sent by each IO board to obtain the parsed CAN messages of each IO board; Specifically, after receiving the CAN messages sent by each IO board, the main central processing unit, such as central processing unit 1, further parses and processes them to obtain the parsed CAN messages.

[0047] The communication board is compatible with two communication methods: CAN and CANFD. The initial connection with each I / O board includes the communication protocol version information, either through two bytes of data in the CANFD file or within each subsequent data frame.

[0048] During the parsing process, the CAN messages sent by each IO board are parsed using the version information of the communication protocol to obtain the parsed data, such as the parsed CAN message.

[0049] Step 304: The CAN messages parsed by each IO board are sent to each IO board and the communication board through the CAN transceiver corresponding to the main system's central processing unit; the CAN messages parsed by each IO board are used for data exchange by the dual central processing units of each IO board, and for data packaging and sending to the main board by the communication board.

[0050] Specifically, after parsing, the CAN transceiver corresponding to the main system's central processing unit, such as the central processing unit 1, can further transmit the parsed CAN messages from each IO board to each IO board and the communication board.

[0051] Each I / O board obtains the parsed CAN message through the dual central processing units, and the two central processing units can then exchange data.

[0052] Subsequently, after receiving the CAN messages parsed by each IO board, the communication board packages the CAN messages parsed by each IO board into data packets, and then sends the packaged data to the host board.

[0053] The specific steps for the communication board to package CAN messages into data are as follows: 1. Determine the CAN message format CAN ID: An identifier that identifies a message and is used to distinguish different messages.

[0054] Data length: Determines the data length of the message. The data length of a standard CAN frame is 0 to 8 bytes.

[0055] Data content: Determine the data content and its format that needs to be packaged.

[0056] 2. Data format conversion Data type conversion: Convert the data to be sent into a data type suitable for CAN transmission, such as integer, floating point, etc.

[0057] Byte order conversion: Convert data according to the byte order (big-endian or little-endian) of the CAN bus.

[0058] 3. Data population Determine the start bit: Based on the format of the CAN message, determine the start bit of the data in the message.

[0059] Bit length: Determines the bit length of each signal.

[0060] Data padding: The converted data is filled into the data field of the CAN message according to the start bit and bit length.

[0061] For Intel little-endian mode, processing starts from the least significant byte of the signal and fills in byte by byte.

[0062] For Motorola's big-endian mode, processing starts from the high byte of the signal and fills in byte by byte.

[0063] 4. Calculate the checksum Checksum calculation: According to the requirements of the communication protocol, checksum calculation is performed on the data fields of the CAN message.

[0064] Checksum padding: Fill the calculated checksum into the specified position in the CAN message.

[0065] 5. Send CAN message Encapsulating CAN data frames: Encapsulating information such as CAN ID, data length, and data content into a complete CAN data frame.

[0066] Send to CAN bus: Send the encapsulated CAN data frame to the CAN bus through the CAN transmit port.

[0067] For example, Figure 6 This is a second schematic flowchart of the communication method for the microcomputer interlocking device provided by the present invention, as shown below. Figure 6 As shown, the method includes: First, confirm that the main CPU is functioning correctly and that communication is normal.

[0068] Further, receive message data.

[0069] Further, data parsing and processing.

[0070] Further, send a CAN message.

[0071] The method provided in this embodiment A target board is used in a microcomputer interlocking device. The microcomputer interlocking device includes a target board, at least one I / O board, and a communication board. The target board includes two central processing units (CPUs). The target board is connected to each I / O board and the communication board respectively. First, the master / standby status of the two CPUs is determined. Then, the master CPU receives CAN messages sent by each I / O board. Further, the master CPU parses the CAN messages sent by each I / O board to obtain the parsed CAN messages of each I / O board. Then, the CAN transceiver corresponding to the master CPU sends the parsed CAN messages of each I / O board to each I / O board and the communication board. The parsed CAN messages of each I / O board are used for data exchange by the dual CPUs of each I / O board, and for data packaging and transmission to the host board by the communication board.

[0072] The microcomputer interlocking device of this invention includes a target board, at least one I / O board, and a communication board. The target board includes two central processing units (CPUs). The target board is connected to each I / O board and the communication board respectively. A slot is reserved to add a target board for building a communication data bridge. After receiving CAN messages sent by each I / O board, the target board parses and processes them, and then sends them to each I / O board and the communication board. Each I / O board is used to obtain the parsed message through the dual CPUs and exchange data. This upgrades the original communication method. The dual CPUs of each I / O board can perform data voting or status voting, resulting in higher communication security.

[0073] According to a communication method for a microcomputer interlocking device provided by the present invention, the target board further includes an interlocking relay, and the two central processing units include a first central processing unit and a second central processing unit. The interlocking relay includes two ends, which are respectively connected to the first central processing unit and the second central processing unit. Determining the primary / standby status of the two central processing units includes: The interlocking relay is kept in a target state by using digital XOR logic, where one end is pulled up and the other end is dropped. Determine whether one end of the interlock relay corresponding to the first central processing unit is in the energized state; When one end of the interlock relay corresponding to the first central processing unit is in the energized state, the first central processing unit is determined as the main central processing unit and the second central processing unit is determined as the backup central processing unit. When one end of the interlock relay corresponding to the second central processing unit is in the energized state, the second central processing unit is designated as the primary central processing unit, and the first central processing unit is designated as the backup central processing unit.

[0074] Specifically, such as Figure 5 As shown, the target board also includes an interlocking relay, and two central processing units (CPUs) including a first CPU (CPU 1) and a second CPU (CPU 2). The interlocking relay has two ends, which are respectively connected to the first CPU and the second CPU.

[0075] Step 301 can be achieved through the following steps: First, digital XOR logic is used to keep the two ends of the interlocking relay in a target state, where one end is pulled up and the other end is dropped.

[0076] The interlocking relay system uses two relays. A digital XOR logic is built using the relay nodes to maintain a state where one end is engaged and the other is disengaged. For example, when CPU1 powers on, the relay remains engaged, indicating it is in master mode and has the authority to send messages via the CAN bus. When CPU2 detects that the CPU2 end of the interlocking relay is disengaged, it enters standby mode and does not have the authority to process and send CAN messages. If CPU1 fails and crashes, the interlocking relay cannot remain engaged. Then, when CPU2 detects that the CPU2 end of the interlocking relay is engaged, it becomes master mode and gains the authority to process and send messages.

[0077] Then, it is determined whether one end of the interlock relay containing any central processing unit (CPU) is in the energized state. If one end is in the energized state, the CPU corresponding to that end is the master CPU; otherwise, the CPU at the other end is the master CPU. The following explanation uses the first CPU (CPU 1) as an example: Determine whether one end of the interlock relay corresponding to the first central processing unit (central processing unit 1) is in the energized state; When one end of the interlock relay corresponding to the first central processing unit (central processing unit 1) is in the energized state, the first central processing unit (central processing unit 1) is determined as the main central processing unit and the second central processing unit (central processing unit 2) is determined as the backup central processing unit. Conversely, when one end of the interlock relay corresponding to the first central processing unit (central processing unit 1) is in the energized state, the second central processing unit (central processing unit 2) is determined as the main central processing unit, and the first central processing unit (central processing unit 1) is determined as the backup central processing unit.

[0078] The method provided in this embodiment provides dual hardware redundancy for the target board, including two central processing units (CPUs). Even if a single CPU fails, the board can continue to operate. Furthermore, the two CPUs are connected to interlocking relays. The interlocking relays use two relays and utilize the nodes of the relays to build a digital XOR logic, keeping one end in a state of being engaged while the other end is in a state of being disengaged. This achieves dual hardware redundancy and high reliability.

[0079] According to a communication method for a microcomputer interlocking device provided by the present invention, the target board further includes a CAN transceiver corresponding to the main central processing unit (CPU), and the two CPUs are connected via a high-speed serial port; the main CPU receives CAN messages sent by each I / O board, and synchronizes the CAN messages sent by each I / O board to the backup CPU (excluding the main CPU) through the main CPU, including: The CAN transceiver corresponding to the main central processing unit receives CAN messages sent by each IO board. The CAN messages sent by each I / O board are synchronized to the backup central processor (other than the primary central processor) via a high-speed serial port through the primary central processor.

[0080] Specifically, it should be noted that although only the primary CPU is performing communication and data processing at any given time, it still needs to synchronize the received data with other backup CPUs. For example, the CAN messages can be synchronized via a high-speed serial port between CPU 1 and CPU 2.

[0081] like Figure 5 As shown, the target board also includes CAN transceivers (such as CAN transceiver 1 and CAN transceiver 2) corresponding to the main central processing unit, and the two central processing units are connected via a high-speed serial port.

[0082] In some embodiments, step 302 can be implemented by the following steps: First, the CAN messages sent by each IO board are received through the CAN transceiver corresponding to the main central processing unit.

[0083] Furthermore, the CAN messages sent by each IO board are synchronized to the backup central processor (excluding the primary central processor) via a high-speed serial port between the two central processors.

[0084] The method provided in this embodiment receives CAN messages sent by each IO board through the CAN transceiver corresponding to the main central processing unit, and synchronizes the CAN messages sent by each IO board to the backup central processing unit other than the main central processing unit through a high-speed serial port, thereby achieving data synchronization and improving security.

[0085] According to a communication method for a microcomputer interlocking device provided by the present invention, the communication board is compatible with at least two communication protocols, and the CAN message sent by each IO board includes the communication protocol version; the main central processing unit parses and processes the CAN message sent by each IO board to obtain the parsed CAN message of each IO board, including: The main central processing unit parses and processes the data and objects in the CAN messages sent by each IO board based on the data and object formats corresponding to the communication protocol version, and obtains the data truth value and object truth value in the CAN messages parsed by each IO board. The main CPU selects the corresponding CAN message type based on the data truth value and object truth value in the CAN message parsed by each IO board; the communication protocol defines a variety of message types, including at least one of the following: data frame and remote frame; Based on the CAN message type, the data truth value and object truth value are organized into the data field of the CAN message parsed by each IO board, and the identifier of the CAN message parsed by each IO board is set according to the priority of the CAN message sent by each IO board. Based on the data fields and identifiers of the CAN messages parsed by each IO board, the CAN messages parsed by each IO board are determined.

[0086] Specifically, it should be noted that the communication board is compatible with at least two communication protocols, and the CAN messages sent by each IO board include the communication protocol version. The communication board is compatible with two communication protocols; the first connection established with the IO board includes the communication protocol version information, or two bits in the CANFD contain the protocol version information, or each data frame contains the communication protocol version.

[0087] A communication protocol is a set of rules or standards used to define the methods and formats for data transmission in a communication system, ensuring that different devices can exchange information correctly. Here are some key aspects of a communication protocol: 1. Protocol Level Communication protocols are typically organized in a hierarchical structure, with each layer responsible for different communication functions: Physical Layer: Defines electrical, mechanical, process, and functional standards, such as voltage, connector type, and physical topology; Data Link Layer: Responsible for reliable transmission of data frames between adjacent nodes, including frame synchronization, error control, and flow control; Network Layer: Responsible for the transmission of data packets from source to destination, including routing and congestion control; Transport Layer: Provides end-to-end communication, ensuring correct data transmission, such as TCP and UDP; Session Layer: Manages session establishment, maintenance, and termination; Presentation Layer: Responsible for data representation, security, and compression; Application Layer: Provides network services for applications, such as HTTP, FTP, and SMTP. 2. Protocol Type Network protocols: such as IP, TCP, UDP, HTTP, FTP, etc.; serial communication protocols: such as UART, SPI, I2C, etc.

[0088] 3. Protocol Implementation Hardware implementation: The physical layer and some data link layer functions of the protocol are implemented through dedicated communication chips or modules; Software implementation: The higher-level functions of the protocol are implemented through the protocol stack in the operating system or the protocol library in the application.

[0089] In some embodiments, step 303 can be implemented in the following manner: It should be noted that the functions of a communication protocol are: 1. Data formatting: defining the encoding, format, and structure of data to ensure correct parsing between different devices; 2. Error detection and correction: detecting and correcting errors that may occur during transmission through checksums, retransmission mechanisms, and other means; 3. Flow control: regulating the speed of sending and receiving data to prevent overflow at the receiver; 4. Address allocation: assigning unique addresses to devices and data packets to ensure correct routing and transmission of data; 5. Synchronization mechanism: ensuring that the sender and receiver remain synchronized during data transmission, including clock synchronization and frame synchronization.

[0090] Based on the communication protocol version information, the host central processing unit parses and processes the data and objects in the CAN messages sent by each IO board to obtain the data truth value and object truth value in the parsed CAN messages of each IO board.

[0091] Furthermore, the main central processing unit determines the CAN message parsed by each IO board based on the data truth value and object truth value in the CAN message parsed by each IO board.

[0092] For example, first select the corresponding CAN message type, wherein the communication protocol defines a variety of message types, including at least one of the following: data frame and remote frame.

[0093] Then, the message data is organized: that is, based on the CAN message type, the data truth value and the object truth value are organized into the data fields of the CAN message parsed by each IO board. For example, vehicle speed data and engine status information are placed into the data fields of the data frame.

[0094] Furthermore, based on the priority of the CAN messages sent by each of the IO boards, an identifier is set for the CAN messages parsed by each of the IO boards. The identifier is used to distinguish different messages and determine the transmission priority of the messages in the CAN network.

[0095] Subsequently, based on the data field of the CAN message parsed by each IO board and the identifier of the CAN message parsed by each IO board, the CAN message parsed by each IO board is determined.

[0096] The method provided in this embodiment allows the communication board to be compatible with at least two communication protocols. Each I / O board sends a CAN message containing a communication protocol version. The host CPU parses the data and objects in the CAN messages sent by each I / O board based on the data and object formats corresponding to the communication protocol versions, obtaining the data truth values ​​and object truth values ​​in the parsed CAN messages from each I / O board. Then, the host CPU determines the parsed CAN message from each I / O board based on the data and object truth values ​​in the parsed CAN messages. This invention offers high data communication efficiency.

[0097] According to a communication method for a microcomputer interlocking device provided by the present invention, any IO board includes a first CPU and a second CPU; the method further includes: The main system central processing unit receives the first CAN message sent by the first CPU and the second CAN message sent by the second CPU. The main system's central processing unit performs data voting based on the first and second CAN messages to obtain the data voting results.

[0098] Specifically, it can be understood that any I / O board includes a first CPU and a second CPU, that is, the I / O board includes two independent CPU units.

[0099] In some embodiments, the method further includes: The target board receives a first CAN message sent by the first CPU and a second CAN message sent by the second CPU. For example, ... Figure 4 As shown, the CPU1 of receiving IO board 1 sends the first CAN message to the CAN-A bus, and the CPU2 of receiving IO board 1 sends the second CAN message to the CAN-B bus.

[0100] Furthermore, the main CPU performs data voting based on the first and second CAN messages to obtain the voting result. This dual-CPU data voting process is typically used to improve system reliability and accuracy, especially in applications requiring high reliability, such as rail transportation and aerospace.

[0101] The following is the detailed process of dual-CPU data voting: Voting rules for data voting: Voting rules are set according to the specific needs of the system. Common rules include "majority vote" and "average vote". For example, in a 2x2 voting architecture, one set of data is selected from each of the two sets for voting, ultimately resulting in a reliable set of data.

[0102] Output Results: After a unanimous vote, the final result is output to the system for subsequent processing. For example, the voted data can be uploaded to the main CPU control unit for further processing and control.

[0103] The method provided in this embodiment receives a first CAN message sent by a first CPU and a second CAN message sent by a second CPU through the main CPU. Then, the main CPU performs data voting based on the first and second CAN messages to obtain the data voting result. After adding a target board, the two CPUs can vote on data, which improves security.

[0104] According to the communication method of a microcomputer interlocking device provided by the present invention, the method further includes: If the data voting result is successful, the main central processing unit adds a check code to the first CAN message and the second CAN message, and stores the CAN message with the added check code to the data storage chip of the target board. If the data voting result fails, discard the first CAN message and the second CAN message.

[0105] Specifically, in some embodiments, the method further includes: If the data voting result is successful, that is, if the working status or the acquisition result is consistent, then the main central processing unit can further add a check code to the first CAN message and the second CAN message, and store the CAN message with the added check code to the data storage chip of the target board.

[0106] If the data voting result fails, discard the first and second CAN messages. An external interface has been added, along with data storage and data detection capabilities.

[0107] For example, Figure 7 This is the third flowchart illustrating the communication method of the microcomputer interlocking device provided by the present invention, as shown below. Figure 7 As shown, the method includes: (1) Waiting for CAN data to be received.

[0108] (2) Determine whether CAN data has been received.

[0109] (3) Store CAN data from dual CPUs.

[0110] (4) Perform data interaction voting on the CAN data of the dual CPUs.

[0111] (5) Determine whether the message data was successfully voted.

[0112] (6) If so, add a checksum to the message; store the message data.

[0113] (7) If not, discard the message.

[0114] The method provided in this embodiment receives a first CAN message sent by a first CPU and a second CAN message sent by a second CPU through the main CPU. Then, the main CPU performs data voting based on the first and second CAN messages to obtain the data voting result. After adding a target board, the two CPUs can vote on data, which improves security.

[0115] Figure 4 This is a schematic diagram of the communication system of the microcomputer interlocking device provided by the present invention, as shown below. Figure 4 As shown, the communication system of the microcomputer interlocking device includes a microcomputer interlocking device and a main board. The microcomputer interlocking device includes a target board, at least one I / O board, and a communication board. The target board includes two central processing units. The target board is connected to each of the I / O boards and the communication board respectively. The target board is used to determine the primary / backup status of the two central processing units; receive CAN messages sent by each of the I / O boards through the primary central processing unit; parse and process the CAN messages sent by each of the I / O boards through the primary central processing unit to obtain the parsed CAN messages of each of the I / O boards; and send the parsed CAN messages of each of the I / O boards to each of the I / O boards and the communication board through the CAN transceiver corresponding to the primary central processing unit. Each of the aforementioned I / O boards is used for data exchange after being acquired by the dual central processing units; The communication board is used to package the CAN messages parsed by each IO board and send them to the host board.

[0116] The microcomputer interlocking device of this invention includes a target board, at least one I / O board, and a communication board. The target board includes two central processing units (CPUs). The target board is connected to each I / O board and the communication board respectively. A slot is reserved to add a target board for building a communication data bridge. After receiving CAN messages sent by each I / O board, the target board parses and processes them, and then sends them to each I / O board and the communication board. Each I / O board is used to obtain the parsed message through the dual CPUs and exchange data. This upgrades the original communication method. The dual CPUs of each I / O board can perform data voting or status voting, resulting in higher communication security.

[0117] The communication device of the microcomputer interlocking device provided by the present invention is described below. The communication device of the microcomputer interlocking device described below and the communication method of the microcomputer interlocking device described above can be referred to in correspondence with each other.

[0118] Figure 8 This is a schematic diagram of the communication device of the microcomputer interlocking device provided by the present invention. The communication device 800 is applied to a target board in the communication system of the microcomputer interlocking device. The microcomputer interlocking device includes the target board, at least one I / O board, and a communication board. The target board includes two central processing units. The target board is connected to each of the I / O boards and the communication board respectively. The communication device 800 of the microcomputer interlocking device includes the following modules: The determination module 810 is used to determine the primary / standby status of the two central processing units; The communication module 820 is used to receive CAN messages sent by each of the I / O boards through the main central processing unit; The main CPU parses the CAN messages sent by each of the I / O boards to obtain the parsed CAN messages of each I / O board. The CAN transceiver corresponding to the main CPU then sends the parsed CAN messages of each I / O board to each I / O board and the communication board. The parsed CAN messages of each I / O board are used by the dual CPUs of each I / O board for data exchange, and by the communication board for data packaging and sending to the host board.

[0119] The device provided in this embodiment is applied to a target board in a microcomputer interlocking device. The microcomputer interlocking device includes a target board, at least one I / O board, and a communication board. The target board includes two central processing units (CPUs). The target board is connected to each I / O board and the communication board respectively. First, the determining module 810 determines the master / standby status of the two CPUs. Then, the communication module 820 receives CAN messages sent by each I / O board through the master CPU. Further, the master CPU parses the CAN messages sent by each I / O board to obtain the parsed CAN messages of each I / O board. Then, the CAN transceiver corresponding to the master CPU sends the parsed CAN messages of each I / O board to each I / O board and the communication board. The CAN messages parsed by each I / O board are used for data exchange by the dual CPUs of each I / O board, and for data packaging and transmission to the host board by the communication board.

[0120] The microcomputer interlocking device of this invention includes a target board, at least one I / O board, and a communication board. The target board includes two central processing units (CPUs). The target board is connected to each I / O board and the communication board respectively. A slot is reserved to add a target board for building a communication data bridge. After receiving CAN messages sent by each I / O board, the target board parses and processes them, and then sends them to each I / O board and the communication board. Each I / O board is used to obtain the parsed message through the dual CPUs and exchange data. This upgrades the original communication method. The dual CPUs of each I / O board can perform data voting or status voting, resulting in higher communication security.

[0121] According to the communication device 800 of the microcomputer interlocking device provided by the present invention, the target board further includes an interlocking relay, the two central processing units include a first central processing unit and a second central processing unit, the interlocking relay includes two ends, and the two ends of the interlocking relay are respectively connected to the first central processing unit and the second central processing unit; The determining module 810 is specifically used for: The interlocking relay is kept in a target state by using digital XOR logic, wherein one end is engaged and the other end is disengaged. Determine whether one end of the interlock relay corresponding to the first central processing unit is in the energized state; When one end of the interlock relay corresponding to the first central processing unit is in the energized state, the first central processing unit is identified as the primary central processing unit and the second central processing unit is identified as the backup central processing unit. When one end of the interlock relay corresponding to the second central processing unit is in the energized state, the second central processing unit is identified as the primary central processing unit, and the first central processing unit is identified as the backup central processing unit.

[0122] According to the present invention, a communication device 800 for a microcomputer interlocking device is provided, wherein the target board further includes a CAN transceiver corresponding to the main central processing unit, and the two central processing units are connected through a high-speed serial port. The communication module 820 is specifically used for: The CAN transceiver corresponding to the main central processing unit receives CAN messages sent by each of the IO boards. The CAN messages sent by each of the I / O boards are synchronized via the high-speed serial port to the backup central processor (other than the primary central processor) of the two central processors.

[0123] According to the present invention, a communication device 800 for a microcomputer interlocking device is provided, wherein the communication board is compatible with at least two communication protocols, and the CAN message sent by each of the IO boards includes the communication protocol version; the communication module 820 is further configured to: The main central processing unit parses the data and objects in the CAN messages sent by each IO board based on the data format and object format corresponding to the communication protocol version, and obtains the data truth value and object truth value in the CAN messages parsed by each IO board. The main central processing unit selects the corresponding CAN message type based on the data truth value and the object truth value in the CAN message parsed by each IO board; the communication protocol defines a variety of message types, including at least one of the following: data frame and remote frame; Based on the CAN message type, the data truth value and the object truth value are organized into the data field of the CAN message parsed by each IO board, and the identifier of the CAN message parsed by each IO board is set according to the priority of the CAN message sent by each IO board. Based on the data fields of the CAN messages parsed by each IO board and the identifier of the CAN messages parsed by each IO board, the CAN messages parsed by each IO board are determined.

[0124] According to the communication device 800 of the microcomputer interlocking device provided by the present invention, any of the IO boards includes a first CPU and a second CPU; the device also includes a data voting module. The data voting module is used for: The main system central processing unit receives the first CAN message sent by the first CPU and the second CAN message sent by the second CPU. The host central processing unit performs data voting based on the first CAN message and the second CAN message to obtain the data voting result.

[0125] According to the communication device 800 of the microcomputer interlocking equipment provided by the present invention, the data voting module is further used for: If the data voting result is successful, the main central processing unit adds a checksum to the first CAN message and the second CAN message, and stores the CAN message with the added checksum to the data storage chip of the target board. If the data voting result fails, the first CAN message and the second CAN message are discarded.

[0126] Figure 9 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 9 As shown, the electronic device may include: a processor 910, a communications interface 920, a memory 930, and a communication bus 940, wherein the processor 910, the communications interface 920, and the memory 930 communicate with each other through the communication bus 940. The processor 910 can call logical instructions in the memory 930 to execute a communication method for a microcomputer interlocking device. This method is applied to a target board in the communication system of the microcomputer interlocking device. The microcomputer interlocking device includes the target board, at least one I / O board, and a communication board. The target board includes two central processing units. The target board is connected to each of the I / O boards and the communication board respectively. The method includes: Determine the primary / standby status of the two central processing units; The main central processing unit receives CAN messages sent by each of the I / O boards. The main CPU parses and processes the CAN messages sent by each of the I / O boards to obtain the parsed CAN messages of each I / O board. The CAN transceiver corresponding to the main CPU then sends the parsed CAN messages of each I / O board to each I / O board and the communication board. The parsed CAN messages of each I / O board are used by the dual CPUs of each I / O board for data exchange, and by the communication board for data packaging and sending to the host board.

[0127] Furthermore, the logical instructions in the aforementioned memory 930 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0128] On the other hand, the present invention also provides a computer program product, the computer program product comprising a computer program, the computer program being able to be stored on a non-transitory computer-readable storage medium, the computer program being executed by a processor, the computer being able to execute the communication method of the microcomputer interlocking device provided by the above methods, the method being applied to a target board in the communication system of the microcomputer interlocking device, the microcomputer interlocking device comprising the target board, at least one I / O board and a communication board, the target board comprising two central processing units; the target board being connected to each of the I / O boards and the communication board respectively; the method comprising: Determine the primary / standby status of the two central processing units; The main central processing unit receives CAN messages sent by each of the I / O boards. The main CPU parses and processes the CAN messages sent by each of the I / O boards to obtain the parsed CAN messages of each I / O board. The CAN transceiver corresponding to the main CPU then sends the parsed CAN messages of each I / O board to each I / O board and the communication board. The parsed CAN messages of each I / O board are used by the dual CPUs of each I / O board for data exchange, and by the communication board for data packaging and sending to the host board.

[0129] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements a communication method for a microcomputer interlocking device provided by the methods described above. This method is applied to a target board in the communication system of the microcomputer interlocking device, the microcomputer interlocking device including the target board, at least one I / O board, and a communication board. The target board includes two central processing units; the target board is connected to each of the I / O boards and the communication board respectively; the method includes: Determine the primary / standby status of the two central processing units; The main central processing unit receives CAN messages sent by each of the I / O boards. The main CPU parses and processes the CAN messages sent by each of the I / O boards to obtain the parsed CAN messages of each I / O board. The CAN transceiver corresponding to the main CPU then sends the parsed CAN messages of each I / O board to each I / O board and the communication board. The parsed CAN messages of each I / O board are used by the dual CPUs of each I / O board for data exchange, and by the communication board for data packaging and sending to the host board.

[0130] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0131] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0132] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A communication method for a microcomputer interlocking device, characterized in that, A target board is used in a communication system of a microcomputer interlocking device. The microcomputer interlocking device includes the target board, at least one I / O board, and a communication board. The target board includes two central processing units. The target board is connected to each of the I / O boards and the communication board respectively. The method includes: Determine the primary / standby status of the two central processing units; The main central processing unit receives CAN messages sent by each of the I / O boards. The main CPU parses and processes the CAN messages sent by each of the I / O boards to obtain the parsed CAN messages of each I / O board. The CAN transceiver corresponding to the main CPU then sends the parsed CAN messages of each I / O board to each I / O board and the communication board. The parsed CAN messages of each I / O board are used by the dual CPUs of each I / O board for data exchange, and by the communication board for data packaging and sending to the host board.

2. The communication method of the microcomputer interlocking device according to claim 1, characterized in that, The target board also includes an interlock relay. The two central processing units (CPUs) include a first CPU and a second CPU. The interlock relay has two ends, which are respectively connected to the first CPU and the second CPU. Determining the primary / standby status of the two CPUs includes: The interlocking relay is kept in a target state by using digital XOR logic, wherein one end is engaged and the other end is disengaged. Determine whether one end of the interlock relay corresponding to the first central processing unit is in the energized state; When one end of the interlock relay corresponding to the first central processing unit is in the energized state, the first central processing unit is identified as the primary central processing unit and the second central processing unit is identified as the backup central processing unit. When one end of the interlock relay corresponding to the second central processing unit is in the energized state, the second central processing unit is identified as the primary central processing unit, and the first central processing unit is identified as the backup central processing unit.

3. The communication method of the microcomputer interlocking device according to claim 1, characterized in that, The target board also includes a CAN transceiver corresponding to the main central processing unit (CPU), and the two CPUs are connected via a high-speed serial port; the process of receiving CAN messages sent by each of the I / O boards through the main CPU includes: The CAN transceiver corresponding to the main system central processing unit receives CAN messages sent by each of the IO boards. The CAN messages sent by each of the I / O boards are synchronized via the high-speed serial port to the backup central processor (other than the primary central processor) of the two central processors.

4. The communication method of the microcomputer interlocking device according to claim 1, characterized in that, The communication board is compatible with at least two communication protocols, and the CAN messages sent by each of the I / O boards include the communication protocol version; the main central processing unit parses and processes the CAN messages sent by each of the I / O boards to obtain the parsed CAN messages of each of the I / O boards, including: The main central processing unit parses the data and objects in the CAN messages sent by each IO board based on the data format and object format corresponding to the communication protocol version, and obtains the data truth value and object truth value in the CAN messages parsed by each IO board. The main central processing unit selects the corresponding CAN message type based on the data truth value and the object truth value in the CAN message parsed by each IO board; the communication protocol defines a variety of message types, including at least one of the following: data frame and remote frame; Based on the CAN message type, the data truth value and the object truth value are organized into the data field of the CAN message parsed by each IO board, and the identifier of the CAN message parsed by each IO board is set according to the priority of the CAN message sent by each IO board. Based on the data fields of the CAN messages parsed by each IO board and the identifiers of the CAN messages parsed by each IO board, the CAN messages parsed by each IO board are determined.

5. The communication method of the microcomputer interlocking device according to claim 1, characterized in that, Any of the aforementioned I / O boards includes a first CPU and a second CPU; the method further includes: The main system central processing unit receives the first CAN message sent by the first CPU and the second CAN message sent by the second CPU. The host central processing unit performs data voting based on the first CAN message and the second CAN message to obtain the data voting result.

6. The communication method of the microcomputer interlocking device according to claim 5, characterized in that, The method further includes: If the data voting result is successful, the main central processing unit adds a checksum to the first CAN message and the second CAN message, and stores the CAN message with the added checksum to the data storage chip of the target board. If the data voting result fails, the first CAN message and the second CAN message are discarded.

7. A communication system for a microcomputer interlocking device, characterized in that, The microcomputer interlocking device includes a target board, at least one I / O board, and a communication board. The target board includes two central processing units. The target board is connected to each of the I / O boards and the communication board, respectively. The target board is used to determine the primary / backup status of the two central processing units; receive CAN messages sent by each of the I / O boards through the primary central processing unit; parse and process the CAN messages sent by each of the I / O boards through the primary central processing unit to obtain the parsed CAN messages of each of the I / O boards; and send the parsed CAN messages of each of the I / O boards to each of the I / O boards and the communication board through the CAN transceiver corresponding to the primary central processing unit. Each of the aforementioned I / O boards is used for data exchange after being acquired through dual central processing units; The communication board is used to package the CAN messages parsed by each of the IO boards and send them to the host board.

8. A communication device for a microcomputer interlocking system, characterized in that, A target board is used in a communication system of a microcomputer interlocking device. The microcomputer interlocking device includes the target board, at least one I / O board, and a communication board. The target board includes two central processing units. The target board is connected to each of the I / O boards and the communication board respectively. The device includes: The determination module is used to determine the primary / standby status of the two central processing units; The communication module is used to receive CAN messages sent by each of the I / O boards through the main central processing unit; The main CPU parses the CAN messages sent by each of the I / O boards to obtain the parsed CAN messages of each I / O board. The CAN transceiver corresponding to the main CPU then sends the parsed CAN messages of each I / O board to each I / O board and the communication board. The parsed CAN messages of each I / O board are used by the dual CPUs of each I / O board for data exchange, and by the communication board for data packaging and sending to the host board.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the communication method of the microcomputer interlocking device as described in any one of claims 1 to 6.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the communication method of the microcomputer interlocking device as described in any one of claims 1 to 6.

11. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the communication method of the microcomputer interlocking device as described in any one of claims 1 to 6.

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