Fault protection method and system of motor controller, vehicle, equipment and medium

Abstract

The invention discloses a fault protection method and system for a motor controller, a vehicle, equipment and a medium. The fault protection method of the motor controller comprises the following steps: receiving a hardware overcurrent signal, a power device driving fault signal, a motor rotating speed state signal and a low-voltage power supply abnormal fault signal; determining a fault type according to the hardware overcurrent signal, the power device driving fault signal, the motor rotating speed state signal and the low-voltage power supply abnormal fault signal; and determining a protection action according to the fault type, and outputting a control signal corresponding to the protection action, so that the motor controller performs corresponding fault protection according to the control signal. According to the embodiment of the invention, the fault type of the motor controller can be accurately distinguished according to the real-time signal, and targeted fault protection is realized based on the fault type, so that the accuracy of fault protection is effectively improved, and the safety and reliability of system operation are improved.

Description

Technical Field

[0001] This application relates to the field of fault protection circuits and protection strategies for motor controllers, and more particularly to a fault protection method, system, vehicle, equipment and medium for a motor controller. Background Technology

[0002] As the core power source of electric vehicles, the electric drive system's malfunctions can directly affect the vehicle's operational safety.

[0003] Currently, there are three main fault protection methods for motor controllers: First, all fault signals are uploaded to a DSP microprocessor for judgment. However, the microprocessor chip's processing time is long, making real-time protection difficult, and abnormal power supply or clock may cause protection to fail. Second, the protection relies on the driver chip's own protection function, but this method often cannot cover all fault types, resulting in limited fault protection. Third, protection is achieved by using programmable logic chips to build hardware logic circuits. However, this method not only increases the system's structural complexity and control difficulty but also carries the risk of system failure. Furthermore, existing protection technologies often lack precise differentiation of fault types, making it difficult to provide targeted fault protection based on the motor controller's fault type, thus affecting the safety and reliability of the motor controller system. Summary of the Invention

[0004] Based on this, the present invention provides a fault protection method, system, vehicle, equipment and medium for motor controllers, which can accurately distinguish the fault type of the motor controller based on real-time signals and realize targeted fault protection based on the fault type, thereby effectively improving the accuracy of fault protection and thus improving the safety and reliability of system operation.

[0005] Firstly, a fault protection method for a motor controller is provided, comprising:

[0006] Receives hardware overcurrent signals, power device drive fault signals, motor speed status signals, and low-voltage power supply abnormality fault signals;

[0007] The fault type is determined based on the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low-voltage power supply abnormality fault signal.

[0008] The protection action is determined based on the fault type, and a control signal corresponding to the protection action is output so that the motor controller can perform corresponding fault protection based on the control signal.

[0009] Further, the receiving hardware overcurrent signal includes:

[0010] Obtain the three-phase output current of the motor controller;

[0011] The three-phase output current is passed through a conversion circuit and a comparison circuit to obtain a level signal;

[0012] The hardware overcurrent signal is obtained by latching the level signal through a hardware latching circuit.

[0013] Furthermore, the power device drive fault signal includes an upper bridge drive fault signal and a lower bridge drive fault signal. The determination of the fault type based on the hardware overcurrent signal, the power device drive fault signal, the motor speed status signal, and the low-voltage power supply abnormality fault signal includes:

[0014] Based on the level values ​​of the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low-voltage power supply abnormality fault signal, the protection action truth table is consulted to determine the fault type. The protection action truth table includes different combinations of level values ​​of the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low-voltage power supply abnormality fault signal, as well as the fault type corresponding to each combination. Each fault type corresponds to at least one combination.

[0015] Further, the step of determining the protection action based on the fault type and outputting a control signal corresponding to the protection action, so that the motor controller performs corresponding fault protection according to the control signal, includes:

[0016] When a power device in the lower three-bridge of the power device malfunctions, the upper three-bridge of the power device opens; when the lower three-bridge of the power device closes, it enters the upper bridge ASC state.

[0017] When a power device in the upper three-bridge circuit of the power device experiences an abnormal fault, the lower three-bridge circuit of the power device shuts down, the upper three-bridge circuit of the power device opens, and the lower bridge enters the ASC state.

[0018] Furthermore, the step of determining the protection action based on the fault type and outputting a control signal corresponding to the protection action, so that the motor controller performs corresponding fault protection according to the control signal, further includes:

[0019] When the motor speed is determined to be in the high-speed range by the motor speed status signal, the motor controller enters the 0-torque state, and enters the ASC state when the motor speed drops to the low-speed range.

[0020] When both the upper and lower bridge drive faults exist, all control power devices enter the open-circuit (OC) state.

[0021] Furthermore, the step of determining the protection action based on the fault type and outputting a control signal corresponding to the protection action, so that the motor controller performs corresponding fault protection according to the control signal, further includes:

[0022] When the bus voltage is greater than the preset value, it enters the open circuit protection OC working state. Otherwise, when there is a back EMF exceeding the bus voltage, it enters the open circuit protection OC working state when the motor speed drops to the low speed range, and enters the active short circuit protection ASC working state when the motor speed is in the high speed range.

[0023] Secondly, a fault protection system for a motor controller is provided, comprising:

[0024] The receiving circuit is used to receive hardware overcurrent signals, power device drive fault signals, motor speed status signals, and low-voltage power supply abnormality fault signals.

[0025] The processing circuit is used to determine the fault type based on the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low voltage power supply abnormality fault signal.

[0026] The output circuit is used to determine the protection action according to the fault type and output a control signal corresponding to the protection action so that the motor controller can perform corresponding fault protection according to the control signal.

[0027] Thirdly, a vehicle is provided, including: a fault protection system for a motor controller according to the second aspect described above.

[0028] Fourthly, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, it implements the fault protection method for the motor controller according to the first aspect described above.

[0029] Fifthly, a computer-readable storage medium is provided, including a memory and a computer program stored on the memory and executable on a processor, which, when executed by the processor, implements the fault protection method for the motor controller according to the first aspect above.

[0030] The embodiments of this application first receive hardware overcurrent signals, power device drive fault signals, motor speed status signals, and low-voltage power supply abnormality fault signals. Then, based on these signals, the fault type is determined. Finally, the protection action is determined according to the fault type, and a corresponding control signal is output, enabling the motor controller to perform appropriate fault protection. Therefore, the fault type of the motor controller can be accurately distinguished based on real-time signals, and targeted fault protection can be implemented based on the fault type, thereby effectively improving the accuracy of fault protection and ultimately enhancing the safety and reliability of system operation. Attached Figure Description

[0031] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0032] Figure 1 A flowchart illustrating the fault protection method for a motor controller provided in this application embodiment;

[0033] Figure 2 A hardware overcurrent signal latching circuit diagram provided for embodiments of this application;

[0034] Figure 3 A logic circuit diagram for motor controller fault protection provided in the embodiments of this application;

[0035] Figure 4 A truth table diagram of the protection action of the motor controller fault protection circuit provided in the embodiments of this application;

[0036] Figure 5 This application provides a drive processing circuit diagram for motor controller fault protection in an embodiment.

[0037] Figure 6 The circuit diagram of the DSP microprocessor provided in the embodiments of this application;

[0038] Figure 7 This is a structural block diagram of a fault protection system for a motor controller provided in an embodiment of this application;

[0039] Figure 8 This is a structural block diagram of a computer device provided in an embodiment of this application. Detailed Implementation

[0040] The present application will now be described in further detail with reference to the embodiments and accompanying drawings. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the application. Furthermore, it should be noted that, for ease of description, only the parts relevant to the application are shown in the accompanying drawings.

[0041] It should be noted that, unless otherwise specified, the embodiments and features of the embodiments in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0042] The following describes in detail, with reference to the accompanying drawings, a fault protection method, system, vehicle, device, and medium for a motor controller according to embodiments of this application.

[0043] Figure 1 This is a flowchart of a fault protection method for a motor controller according to an embodiment of this application. Figure 1 As shown, a fault protection method for a motor controller according to an embodiment of this application includes the following steps:

[0044] S101: Receives hardware overcurrent signals, power device drive fault signals, motor speed status signals, and low-voltage power supply abnormality fault signals.

[0045] In one embodiment of this application, receiving the hardware overcurrent signal includes: obtaining the three-phase output current of the motor controller; obtaining a level signal by passing the three-phase output current through a conversion circuit and a comparison circuit; and obtaining the hardware overcurrent signal by latching the level signal through a hardware latching circuit.

[0046] Specifically, the motor controller system collects the three-phase output current through a current sensor. The collected current is a continuously changing analog quantity, so it is input into the conversion circuit and the comparison circuit to obtain discrete level signals.

[0047] Furthermore, since overcurrent signals typically exhibit repeated transitions and recovery cycles, in actual operation, to prevent the controller system from repeatedly triggering protection and causing inadequate protection, it is necessary to latch the system upon the first triggering of an overcurrent fault. The specific latching circuit is as follows: Figure 2 As shown, when a front-end overcurrent signal occurs, the fault is indicated by the change in the level of the hardware overcurrent signal. At the same time, the latch records the fault state. Even if the front-end overcurrent signal is briefly restored, the latch circuit will still output the level representing the fault until the system performs a reset operation.

[0048] In one embodiment of this application, the power device drive fault signal includes an upper bridge drive fault signal and a lower bridge drive fault signal.

[0049] Among them, the upper bridge drive fault signal and the lower bridge drive fault signal are used to detect the fault status of the upper bridge drive and the lower bridge drive in the system, respectively. They are usually obtained by parallel connection of fault signals such as drive undervoltage fault, drive overvoltage fault, warranty failure and fault, and drive retrieval abnormal fault of the upper bridge drive unit and the lower bridge drive unit.

[0050] In addition, the motor speed status signal is collected by the motor speed sensor and transmitted to the controller microprocessor. The microprocessor judges the speed range and outputs the corresponding level; the low voltage power supply abnormality fault signal is provided by the detection controller.

[0051] S102: Determine the fault type based on the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low-voltage power supply abnormality fault signal.

[0052] In one embodiment of this application, determining the fault type based on the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low-voltage power supply abnormality fault signal includes: querying a protection action truth table based on the level values ​​of the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low-voltage power supply abnormality fault signal to determine the fault type. The protection action truth table includes combinations of different level values ​​of the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low-voltage power supply abnormality fault signal, as well as the fault type corresponding to each combination. Each fault type corresponds to at least one combination.

[0053] The fault protection logic circuit is as follows: Figure 3 As shown, the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low-voltage power supply abnormality fault signal obtained in the above steps are input into the fault protection circuit, which outputs the corresponding protection action control signal. The specific protection action truth table is as follows: Figure 4 As shown: After inputting the corresponding fault signal combination, the output levels of the upper bridge drive control signal, the lower bridge drive control signal, and the zero torque control state are displayed. Each fault combination corresponds to one output, which is a protection action for one fault.

[0054] For example, when the hardware overcurrent signal and the drive upper bridge fault signal are at a high level, and the other signals are at a low level, the drive upper bridge control signal and the no-load torque control status signal in the output control signals are at a high level, while the drive lower bridge control signal is at a low level.

[0055] S103: Determine the protection action based on the fault type and output a control signal corresponding to the protection action so that the motor controller can perform corresponding fault protection based on the control signal.

[0056] like Figure 3 As shown, after inputting a combination of fault signals, the corresponding protection action can be determined, and a control signal can be output. Furthermore, combined with... Figure 5 and Figure 6As shown, by inputting the control signal obtained above and the status signal output by the DSP microprocessor into the drive processing circuit, the corresponding drive action can be output, thereby controlling the corresponding unit to complete the corresponding fault protection. The specific fault protection action settings are as follows:

[0057] In one embodiment of this application, determining the protection action based on the fault type and outputting a control signal corresponding to the protection action so that the motor controller performs corresponding fault protection according to the control signal includes: when an abnormal fault occurs in the power device of the lower three-bridge of the power device, the upper three-bridge of the power device is turned on and the lower three-bridge of the power device is turned off, entering the upper bridge ASC state; when an abnormal fault occurs in the power device of the upper three-bridge of the power device, the lower three-bridge of the power device is turned off and the upper three-bridge of the power device is turned on, entering the lower bridge ASC state.

[0058] Among them, ASC state refers to active short circuit state; OC state refers to open circuit state; 0-torque state refers to zero torque state.

[0059] Specifically, when the system enters the upper bridge ASC state, the motor windings are shorted together through the power devices of the upper three bridges to form a loop, so that the motor's back force generates braking torque; similarly, when the system enters the lower bridge ASC state, the motor windings are shorted together through the power devices of the lower three bridges to form a loop, so that the motor's back force generates braking torque.

[0060] In one embodiment of this application, the step of determining the protection action based on the fault type and outputting a control signal corresponding to the protection action so that the motor controller can perform corresponding fault protection based on the control signal further includes: when the motor speed is determined to be in the high-speed range by the motor speed status signal, the motor controller enters the 0-torque state, and enters the ASC state when the motor speed drops to the low-speed range; when both the upper drive bridge fault and the lower drive bridge fault exist, all control power devices enter the open circuit OC state.

[0061] Specifically, since the ASC state can easily cause the motor or inverter to overheat, a combination of ASC state and 0-torque control is used in the high-speed range to regulate the safe operating state. When the motor speed is detected to be in the high-speed range, the 0-torque state is entered first, and when the motor speed drops to the low-speed range, the ASC state is entered again.

[0062] In one embodiment of this application, the step of determining the protection action according to the fault type and outputting a control signal corresponding to the protection action so that the motor controller can perform corresponding fault protection according to the control signal further includes: when the bus voltage is greater than a preset value, entering the open circuit protection OC working state; otherwise, when there is a back EMF exceeding the bus voltage, entering the open circuit protection working state OC when the motor speed drops to the low speed range, and entering the active short circuit protection working state ASC when the motor speed is in the high speed range.

[0063] Specifically, using OC in the low-speed range can avoid ASC from generating large braking force, which would cause a large impact on vehicle operation and thus affect driving comfort; while using ASC in the high-speed range is to avoid OC generating large counterforce, which would cause impact damage to components on the bus.

[0064] According to the fault protection method for a motor controller of the present invention, the method first receives a hardware overcurrent signal, a power device drive fault signal, a motor speed status signal, and a low-voltage power supply abnormality fault signal; then, based on the hardware overcurrent signal, the power device drive fault signal, the motor speed status signal, and the low-voltage power supply abnormality fault signal, the fault type is determined; finally, a protection action is determined based on the fault type, and a control signal corresponding to the protection action is output, so that the motor controller can perform corresponding fault protection according to the control signal. Therefore, the fault type of the motor controller can be accurately distinguished based on real-time signals, and targeted fault protection can be implemented based on the fault type, thereby effectively improving the accuracy of fault protection and thus improving the safety and reliability of system operation.

[0065] Figure 7 This is a structural block diagram of a fault protection system for a motor controller according to an embodiment of this application. Figure 7 As shown, a fault protection system for a motor controller according to an embodiment of this application includes: a receiving circuit 710, a processing circuit 720, and an output circuit 730, wherein:

[0066] The receiving circuit 710 is used to receive hardware overcurrent signals, power device drive fault signals, motor speed status signals, and low-voltage power supply abnormality fault signals.

[0067] The processing circuit 720 is used to determine the fault type based on the hardware overcurrent signal, the power device drive fault signal, the motor speed status signal, and the low voltage power supply abnormality fault signal.

[0068] The output circuit 730 is used to determine the protection action according to the fault type and output a control signal corresponding to the protection action so that the motor controller can perform corresponding fault protection according to the control signal.

[0069] The fault protection system for a motor controller according to an embodiment of this application first receives a hardware overcurrent signal, a power device drive fault signal, a motor speed status signal, and a low-voltage power supply abnormality fault signal. Then, based on these signals, the fault type is determined. Finally, a protection action is determined based on the fault type, and a corresponding control signal is output, allowing the motor controller to perform appropriate fault protection. Therefore, the fault type of the motor controller can be accurately distinguished based on real-time signals, and targeted fault protection can be implemented based on the fault type, thereby effectively improving the accuracy of fault protection and enhancing the safety and reliability of system operation.

[0070] Specific limitations regarding the fault protection system for motor controllers can be found in the above description of the fault protection methods for motor controllers, and will not be repeated here. Each module of the aforementioned fault protection system for motor controllers can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of the computer device in software form, so that the processor can call and execute the corresponding operations of each module.

[0071] Furthermore, embodiments of this application provide a vehicle, including a fault protection system for a motor controller according to any of the above embodiments. The vehicle can first receive a hardware overcurrent signal, a power device drive fault signal, a motor speed status signal, and a low-voltage power supply abnormality fault signal; then, based on these signals, determine the fault type; finally, determine the protection action based on the fault type and output a corresponding control signal for the protection action, so that the motor controller can perform corresponding fault protection according to the control signal. Therefore, the fault type of the motor controller can be accurately distinguished based on real-time signals, and targeted fault protection can be implemented based on the fault type, thereby effectively improving the accuracy of fault protection and thus enhancing the safety and reliability of system operation.

[0072] Furthermore, other components and functions of the vehicle according to the embodiments of this application are known to those skilled in the art and will not be described in detail here.

[0073] The following is for reference. Figure 8 , Figure 8 A schematic diagram of a computer device structure suitable for implementing embodiments of this application is shown.

[0074] like Figure 8As shown, the computer system 1000 includes a central processing unit (CPU) 1001, which can perform various appropriate actions and processes based on programs stored in read-only memory (ROM) 1002 or programs loaded from storage section 1008 into random access memory (RAM) 1003. The RAM 1003 also stores various programs and data required for the system's operating instructions. The CPU 1001, ROM 1002, and RAM 1003 are interconnected via a bus 1004. An input / output (I / O) interface 1005 is also connected to the bus 1004.

[0075] The following components are connected to I / O interface 1005: an input section 1006 including a keyboard, mouse, etc.; an output section 1007 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and speakers, etc.; a storage section 1008 including a hard disk, etc.; and a communication section 1009 including a network interface card such as a LAN card, modem, etc. The communication section 1009 performs communication processing via a network such as the Internet. A drive 1010 is also connected to I / O interface 1005 as needed. A removable medium 1011, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on drive 1010 as needed so that computer programs read from it can be installed into storage section 1008 as needed.

[0076] Specifically, according to embodiments of this application, the flowchart above refers to... Figure 1 The described process can be implemented as a computer-readable storage medium. For example, embodiments of this application include a computer-readable storage medium comprising a computer program containing program code for performing the method shown in the flowchart, such as performing: receiving a hardware overcurrent signal, a power device drive fault signal, a motor speed status signal, and a low-voltage power supply abnormality fault signal; determining a fault type based on the hardware overcurrent signal, the power device drive fault signal, the motor speed status signal, and the low-voltage power supply abnormality fault signal; determining a protection action based on the fault type, and outputting a control signal corresponding to the protection action, so that the motor controller performs corresponding fault protection based on the control signal.

[0077] Specifically, according to embodiments of this application, the flowchart above refers to... Figure 1The described process can be implemented as a computer software program. For example, embodiments of this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowchart, such as performing: receiving a hardware overcurrent signal, a power device drive fault signal, a motor speed status signal, and a low-voltage power supply abnormality fault signal; determining a fault type based on the hardware overcurrent signal, the power device drive fault signal, the motor speed status signal, and the low-voltage power supply abnormality fault signal; determining a protection action based on the fault type, and outputting a control signal corresponding to the protection action, so that the motor controller performs corresponding fault protection based on the control signal.

[0078] In such an embodiment, the computer program includes program code for performing the methods shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network via communication section 1009, and / or installed from removable media 1011. When the computer program is executed by central processing unit (CPU) 1001, it performs the functions defined in the system of this application.

[0079] It should be noted that the computer-readable medium shown in this application can be a computer-readable signal medium or a computer-readable storage medium, or any combination of the two. A computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this application, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In this application, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media can also be any computer-readable medium other than computer-readable storage media, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0080] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operational instructions of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two connected blocks may actually be executed substantially in parallel, or they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified functions or operational instructions, or using a combination of dedicated hardware and computer instructions.

[0081] The units or modules described in the embodiments of this application can be implemented in software or hardware. The described units or modules can also be located in a processor. The names of these units or modules do not, in certain circumstances, constitute a limitation on the unit or module itself.

[0082] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0083] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A fault protection method for a motor controller, characterized in that, include: Receives hardware overcurrent signals, power device drive fault signals, motor speed status signals, and low-voltage power supply abnormality fault signals; The fault type is determined based on the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low-voltage power supply abnormality fault signal. The protection action is determined based on the fault type, and a control signal corresponding to the protection action is output so that the motor controller can perform corresponding fault protection based on the control signal.

2. The fault protection method for a motor controller according to claim 1, characterized in that, The received hardware overcurrent signal includes: Obtain the three-phase output current of the motor controller; The three-phase output current is passed through a conversion circuit and a comparison circuit to obtain a level signal; The hardware overcurrent signal is obtained by latching the level signal through a hardware latching circuit.

3. The fault protection method for a motor controller according to claim 1, characterized in that, The power device drive fault signal includes an upper bridge drive fault signal and a lower bridge drive fault signal. The fault type is determined based on the hardware overcurrent signal, the power device drive fault signal, the motor speed status signal, and the low-voltage power supply abnormality fault signal, including: Based on the level values ​​of the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low-voltage power supply abnormality fault signal, the protection action truth table is queried to determine the fault type. The protection action truth table includes different combinations of level values ​​of the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low-voltage power supply abnormality fault signal, as well as the fault type corresponding to each combination. Each fault type corresponds to at least one combination.

4. The fault protection method for a motor controller according to claim 1, characterized in that, The step of determining a protection action based on the fault type and outputting a control signal corresponding to the protection action, so that the motor controller performs corresponding fault protection based on the control signal, includes: When a power device in the lower three-bridge of the power device malfunctions, the upper three-bridge of the power device opens; when the lower three-bridge of the power device closes, it enters the upper bridge ASC state. When a power device in the upper three-bridge circuit of the power device experiences an abnormal fault, the lower three-bridge circuit of the power device shuts down, the upper three-bridge circuit of the power device opens, and the lower bridge enters the ASC state.

5. The fault protection method for a motor controller according to claim 1, characterized in that, The step of determining the protection action based on the fault type and outputting a control signal corresponding to the protection action, so that the motor controller performs corresponding fault protection according to the control signal, further includes: When the motor speed is determined to be in the high-speed range by the motor speed status signal, the motor controller enters the 0-torque state, and enters the ASC state when the motor speed drops to the low-speed range. When both the upper and lower bridge drive faults exist, all control power devices enter the open-circuit (OC) state.

6. The fault protection method for a motor controller according to claim 1, characterized in that, The step of determining the protection action based on the fault type and outputting a control signal corresponding to the protection action, so that the motor controller performs corresponding fault protection according to the control signal, further includes: When the bus voltage is greater than the preset value, it enters the open circuit protection OC working state. Otherwise, when there is a back EMF exceeding the bus voltage, it enters the open circuit protection OC working state when the motor speed drops to the low speed range, and enters the active short circuit protection ASC working state when the motor speed is in the high speed range.

7. A fault protection system for a motor controller, characterized in that, include: The receiving circuit is used to receive hardware overcurrent signals, power device drive fault signals, motor speed status signals, and low-voltage power supply abnormality fault signals. The processing circuit is used to determine the fault type based on the hardware overcurrent signal, power device drive fault signal, motor speed status signal, and low voltage power supply abnormality fault signal. The output circuit is used to determine the protection action according to the fault type and output a control signal corresponding to the protection action so that the motor controller can perform corresponding fault protection according to the control signal.

8. A vehicle, characterized in that, include: The fault protection system for the motor controller according to claim 7.

9. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the fault protection method for the motor controller according to any one of claims 1-6.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the fault protection method for the motor controller according to any one of claims 1-6.

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