Method for calculating transient temperature of three-dimensional microsystem under transient chip power
By using a transient thermal analysis model, the problem of heat accumulation in three-dimensional microsystems was solved, achieving efficient and accurate temperature prediction and breaking through the computational bottleneck of traditional simulation methods.
Patent Information
- Application Number
- CN202511468126.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-15
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2045-10-15
AI Technical Summary
In existing technologies, the problem of heat accumulation inside three-dimensional microsystems leads to performance limitations, and traditional simulation methods have low computational efficiency, making it difficult to perform thermal design quickly and efficiently.
A transient thermal analysis model is adopted, taking into account the change of chip power over time. The transient temperature field of the three-dimensional microsystem is calculated by Fourier series expansion and equivalent thermal conductivity. The transient thermal analysis model is constructed and the chip power is updated successively to calculate the temperature field of the three-dimensional microsystem at multiple time points.
It improves computational accuracy and efficiency, breaks through the limitations of traditional models, and achieves higher-precision temperature prediction and rapid thermal design.
Smart Images

Figure CN120974770A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of microelectronics technology, specifically relating to a method for calculating the transient temperature of a three-dimensional microsystem under transient chip power. Background Technology
[0002] In today's rapidly developing microelectronics technology, three-dimensional microsystems, by integrating and packaging multiple chips within a three-dimensional space, can significantly improve integration density and reduce size, providing strong support for the development of miniaturized electronic devices. However, with the continuous increase in integration density, the chips inside three-dimensional microsystems generate a large amount of heat, which is difficult to dissipate quickly within the limited space, leading to serious heat accumulation problems. This has become a key factor restricting the performance of three-dimensional microsystems.
[0003] Currently, existing technologies mainly utilize simulation methods such as finite element analysis for the thermal design of three-dimensional microsystems to predict and optimize their temperature distribution. However, this method is computationally inefficient and cannot complete thermal design quickly and efficiently. Summary of the Invention
[0004] To address the aforementioned problems in the prior art, this invention provides a method for calculating the transient temperature of a three-dimensional microsystem under transient chip power. The technical problem to be solved by this invention is achieved through the following technical solution: A method for calculating the transient temperature of a three-dimensional microsystem under transient chip power, characterized in that the three-dimensional microsystem includes multiple functional layers, the multiple functional layers include at least one set of substrate layers and micro pad layers stacked alternately, wherein each substrate layer includes multiple chips and a uniformly distributed through-silicon via (TSV) array, and adjacent substrate layers are interconnected through the TSV array and the micro pad layer. The method includes: Determine the anisotropic equivalent thermal conductivity of the substrate layer and the micropad layer; Using the chip as a heat source, the heat flux density generated by each chip is expanded using Fourier series to obtain the total heat flux density generated by the chip on the upper surface of each substrate layer. Based on the total heat flux density, a transient thermal analysis model under fixed chip power is constructed. The chip power of each chip in the transient thermal analysis model is updated successively over multiple consecutive time periods to obtain the transient temperature field of the three-dimensional microsystem at all time points.
[0005] Compared with the prior art, the beneficial effects of the present invention are as follows: This invention provides a method for calculating the transient temperature of a three-dimensional microsystem under transient chip power. It can be applied to three-dimensional microsystems containing one or more sets of alternately stacked substrate layers and micropad layers. When establishing a transient thermal analysis model under a fixed chip power, this invention considers the situation where the chip power in the three-dimensional microsystem changes over time, breaking through the limitation of traditional transient thermal analysis models that only consider constant chip power and do not consider the presence of chips between layers. Therefore, the temperature calculated by this invention using the transient thermal analysis model has higher accuracy and significantly improves computational efficiency.
[0006] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description
[0007] Figure 1 This is a flowchart illustrating a method for calculating the transient temperature of a three-dimensional microsystem under transient chip power, provided in an embodiment of the present invention. Figure 2 This is a schematic diagram of a three-dimensional microsystem provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of a TSV unit provided in an embodiment of the present invention; Figure 4 This is a cross-sectional view of a TSV unit provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of a micro pad unit provided in an embodiment of the present invention; Figure 6 The thickness of the micro pad unit provided in this embodiment of the invention is A schematic diagram of a thin sheet; Figure 7 This is a schematic diagram of calculating the transient temperature field of a three-dimensional microsystem at all time points, provided by an embodiment of the present invention. Figure 8 This is a comparison chart of the results of calculating the transient junction temperature of the C51 chip; Figure 9 This is a schematic diagram illustrating the absolute error in calculating the transient junction temperature of the C51 chip; Figure 10 This is the transient temperature field on the surface of the fifth functional layer in HBM at 100 ms; Figure 11 It is the absolute error of the transient temperature field on the surface of the fifth functional layer in HBM at 100 ms. Detailed Implementation
[0008] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.
[0009] Figure 1This is a schematic flowchart of a method for calculating the transient temperature of a three-dimensional microsystem under transient chip power, provided in an embodiment of the present invention. Figure 2 This is a schematic diagram of a three-dimensional microsystem provided in an embodiment of the present invention. For example... Figures 1-2 As shown, this embodiment of the invention provides a method for calculating the transient temperature of a three-dimensional microsystem under transient chip power. The three-dimensional microsystem includes multiple functional layers, each of which includes at least one set of substrate layers and micropad layers stacked alternately. Each substrate layer includes multiple chips and a uniformly distributed TSV (Through Silicon Via) array. Adjacent substrate layers are interconnected through the TSV array and the micropad layer.
[0010] Figure 2 The three-dimensional microsystem shown is HBM (High Bandwidth Memory). Taking HBM as an example, layers 1, 3, 5, and 7 are substrate layers, and layers 2, 4, and 6 are micropad layers. Each substrate layer has four chips on its surface. Of course, Figure 2 This is only for illustrating the structure of a three-dimensional microsystem and does not limit its size or the number of substrate layers, micropad layers or chips in the three-dimensional microsystem.
[0011] The above methods include: S1. Determine the anisotropic equivalent thermal conductivity of the substrate layer and the micropad layer.
[0012] Figure 3 This is a schematic diagram of a TSV unit provided in an embodiment of the present invention. Figure 4 This is a cross-sectional view of a TSV unit provided in an embodiment of the present invention, typically obtained by cutting along a plane perpendicular to the TSV axis. For example... Figures 2-4 As shown, the substrate layer also includes a silicon substrate, and the TSV includes copper pillars and surrounding copper pillars. In this embodiment, a TSV cell is defined as: the smallest repeating cell containing a TSV and a specific region of silicon substrate around it. Specifically, the anisotropic equivalent thermal conductivity of the substrate layer is: ; ; in,
[0013] ; In the formula, Indicates the substrate layer in direction or Equivalent thermal conductivity in the direction, Indicates the substrate layer in Equivalent thermal conductivity in the direction, Indicates the substrate layer in direction or The equivalent thermal conductivity generated by the first part of the TSV unit in the direction. For the substrate layer in direction or The equivalent thermal conductivity generated by the second part of the TSV unit in the directional direction. For the substrate layer in direction or The equivalent thermal conductivity generated by the third part of the TSV unit in the directional direction. , Indicates the thermal conductivity of copper. express thermal conductivity, Indicates the thermal conductivity of the silicon substrate. Indicates the radius of the copper pillar. express and The sum of layer thicknesses This indicates the spacing between adjacent TSVs in the same substrate layer. This indicates the volume fraction of copper pillars in the TSV element. express Volume fraction of layers in TSV cells This indicates the volume fraction of the silicon substrate in the TSV cell. express The coordinate variables in the direction, where, direction and The directions are perpendicular and the plane formed by the two is parallel to the plane where each functional layer is located.
[0014] Please continue reading Figure 4 To illustrate the aforementioned "Part One," "Part Two," and "Part Three," a parallel line is introduced into the TSV unit. The first plane, the second plane, and the third plane of the plane. The direction is defined as perpendicular to the plane containing each functional layer. Considering the symmetrical distribution of TSV elements about the central axis, this explanation only uses one side of the central axis of the TSV element as an example. Figure 4 From the top-view angle shown, the orthographic projection of the first plane is a line along... A line segment extending in the direction coincides with the central axis of the TSV unit, and the second plane is tangent to the outer surface of the copper pillar. In terms of direction, the third plane is located on the side of the second plane away from the first plane, and is aligned with the TSV. The layers are tangent. Accordingly, the TSV element is divided into three parts: the first part is the region between the first plane and the second plane, the second part is the region between the second plane and the third plane, and the third part is the region extending from the third plane to the edge of the TSV element.
[0015] The structure on the other side of the central axis of the TSV unit is also divided according to the above rules, so it will not be repeated here.
[0016] Figure 5 This is a schematic diagram of a micro pad unit provided in an embodiment of the present invention. Further, please refer to... Figure 2 and Figure 5 The micropad layer consists of multiple solder balls and filler material arranged in an array. A micropad unit is defined as: the smallest repeating unit containing a solder ball and a specific area of filler material around it.
[0017] The anisotropic equivalent thermal conductivity of the micropad layer is expressed as follows: ; ; ; In the formula, Indicates the micro pad layer in direction or Equivalent thermal conductivity in the direction, Indicates the micro pad layer in Equivalent thermal conductivity in the direction, h Indicates the thickness of the micro pads. This indicates the spacing between adjacent solder balls within the same micropad layer. Indicates the thermal conductivity of the solder ball. Indicates the thermal conductivity of the filler material. Indicating micropad cells, in Thickness in the direction The preset part of the thin sheet along Equivalent thermal conductivity in the direction, , R Indicates the radius of the solder ball. express The coordinate variable in the direction.
[0018] Figure 6 This is a preset part in the micro pad unit provided in the embodiments of the present invention. A schematic diagram. For in Thickness in the direction Thin slices, introduced parallel to Regarding the fourth and fifth planes of the sheet, considering the symmetrical distribution of the sheet along the central axis, this embodiment will only illustrate one side of the central axis of the sheet. Figure 6 As shown, from a top-down perspective, the orthographic projection of the fourth plane is a line along... The line segment extending in the direction coincides with the central axis of the micropad unit, and the fifth plane is tangent to the solder balls in the micropad unit. The area between the fourth and fifth planes is the preset area. .
[0019] Preset area on the other side of the central axis of the thin sheet The division rules are completely consistent with the above-mentioned one-sided division, that is, by parallel to The planes that pass through the centerline and the planes that are tangent to the solder ball are defined and will not be described again.
[0020] S2. Using the chip as a heat source, perform a Fourier series expansion on the heat flux density generated by each chip to obtain the total heat flux density generated by the chip on the upper surface of each substrate layer.
[0021] To simplify the calculation, the heat flux density generated by each substrate layer chip is first expanded into a Fourier series, and this Fourier series is used as an approximation of the chip's heat source. Assume the... The upper surface of the first substrate layer has a chip, then for the second... On the first substrate layer The heat flux density generated by each chip is expanded into a Fourier series: ; In the formula, Indicates the first On the first substrate layer The heat flux density generated by each chip Indicates the first On the first substrate layer The chip power of each chip, Indicates the first On the first substrate layer Each chip Length in the direction, Indicates the first On the first substrate layer Each chip Width in the direction, , By utilizing the orthogonality of the characteristic functions, the Fourier coefficients can be solved. , , , : ; ; ;
[0022] In the formula, , They represent the first On the first substrate layer The center of each chip is direction and Coordinates in the direction. Therefore, the first Heat flux density on the upper surface of each substrate layer This is the sum of the heat flux densities of all chips in this layer: ; In the formula, Indicates the first Number of chips on each substrate layer , , , .
[0023] S3. Based on the total heat flux density, construct a transient thermal analysis model under fixed chip power.
[0024] In this embodiment, step S3 includes: S31. Based on the total heat flux density, the anisotropic equivalent thermal conductivity of the substrate layer, and the anisotropic equivalent thermal conductivity of the micropad layer, determine the governing equations, boundary conditions, and initial conditions for each functional layer in the three-dimensional microsystem.
[0025] S32. Based on the governing equations, boundary conditions, and initial conditions, determine the first governing equation, first initial condition, and first boundary condition for each functional layer corresponding to the transient temperature rise, and the second governing equation and second boundary condition for each functional layer corresponding to the steady-state temperature rise.
[0026] In this embodiment, the transient thermal analysis model needs to consider both the steady-state temperature rise and the transient temperature rise. There may be chip heat sources at the interface between two adjacent functional layers. ; In the formula, Indicates the first The total heat flux density generated by the chip's heat source on the upper surface of each functional layer Indicates the first The thickness of each functional layer. It should be noted that the total heat flux density of the micropad layer is 0.
[0027] S33. Determine the steady-state temperature rise of each functional layer based on the second governing equation and the second boundary conditions corresponding to each functional layer in the steady-state temperature rise section.
[0028] Among them, the The steady-state temperature rise of each functional layer is expressed as: In the formula, , , , , , , and All are Fourier coefficients for the steady-state temperature rise. Indicates the first The zero-order Fourier coefficients of each functional layer Indicates the first Each functional layer regarding coordinate variables The zeroth Fourier coefficients, , They represent the first Each functional layer regarding coordinate variables of Fourier hyperbolic cosine coefficients sum The coefficients of the hyperbolic sine term in the Fourier transform are... , They represent the first Each functional layer regarding coordinate variables of Fourier hyperbolic cosine coefficients sum The coefficients of the hyperbolic sine term in the Fourier transform are... Represents coordinate variables and of Rank and The coefficients of the joint Fourier hyperbolic cosine term, Represents coordinate variables and of Rank and Coefficients of the joint Fourier hyperbolic sine term, intermediate variables , , , , , , , They represent the first Each functional layer in , , Equivalent thermal conductivity in the direction, Indicates the functional layer in Length in the direction, Indicates the functional layer in Width in the direction.
[0029] S34. Determine the transient temperature rise of each functional layer based on the first governing equation, first initial condition, and first boundary condition corresponding to each functional layer in the transient temperature rise section.
[0030] No. The transient temperature rise of each functional layer is represented as follows: ; In the formula, , They represent the first Each functional layer in , Equivalent thermal diffusivity in the direction, Indicates the first Each functional layer in Characteristic functions in the direction, , and Characteristic function The coefficients in Indicates the first 1 eigenvalue, Indicates the first Each functional layer in Equivalent thermal diffusivity in the direction of , , , All are Fourier coefficients for the transient temperature rise component. , , and They respectively represent based on The calculated zeroth-order Fourier coefficients, with respect to coordinate variables of Fourier coefficients, with respect to coordinate variables of Fourier coefficients and their relationship with coordinate variables and of Rank and The joint Fourier coefficients of order, where, , , , Indicates the first Average density of each functional layer Indicates the first Average heat capacity of each functional layer.
[0031] S35. Construct a transient thermal analysis model under fixed chip power based on the steady-state temperature rise, transient temperature rise, and ambient temperature of each functional layer: ; In the formula, , In a three-dimensional microsystem, the first... The total temperature rise of each functional layer Indicates the first Transient temperature rise of each functional layer Indicates the first Steady-state temperature rise of each functional layer Indicates ambient temperature. Indicates the first chip with fixed power The transient temperature of each functional layer.
[0032] S4. The chip power of each chip in the transient thermal analysis model is updated successively in multiple consecutive time periods to obtain the transient temperature field of the three-dimensional microsystem at all time nodes.
[0033] Figure 7 This is a schematic diagram illustrating the calculation of the transient temperature field of a three-dimensional microsystem at all time points, provided by an embodiment of the present invention. Specifically, as shown... Figure 7 As shown, step S4 includes: S401. Divide the simulation time into multiple time periods, each of which includes multiple time nodes evenly distributed. For example, Figure 7 The middle division is formed Time period: , , ... , , .
[0034] S402, Calculate the initial time node based on ambient temperature The chip power , Indicates the first On the first substrate layer Each chip at the initial time point The chip power at that point.
[0035] S403, chip power Substitute the transient thermal analysis model under fixed chip power to calculate the junction temperature of each chip at all time points.
[0036] S404, Order .
[0037] S405, Time period Using the current time period as a reference, and leveraging the junction temperatures of each chip at the last two time points of the previous time period, the estimated junction temperatures of each chip at the center time point of the current time period are predicted; among which, They represent the first The start and end times of each time period. , Indicates the number of time periods.
[0038] S406. Calculate the chip power of each chip within the current time period using the estimated junction temperature.
[0039] S407. Calculate the difference between the chip power of each chip in the current time period and the chip power of each chip in the previous time period.
[0040] S408. Substitute this difference as the chip power into the transient thermal analysis model under fixed chip power to calculate the transient temperature rise at each subsequent time point from the current time period.
[0041] S409. Accumulate the transient temperature rise at each subsequent time point starting from the current time period to obtain the... Each functional layer at the termination time node Transient temperature field under transient chip power at all previous time points .
[0042] S410, Based on transient temperature field By inputting the center coordinates of each chip, we can obtain the position of each chip at the termination time node. The junction temperature at all previous time points.
[0043] S411, Order and return the time period As a step in the current time period, the transient temperature field of the three-dimensional microsystem at all time points is obtained after traversing all time periods.
[0044] In this embodiment, the estimated junction temperature of each chip at the center time node of the current time period is expressed as: ; In the formula, Indicates the current time period Estimated junction temperature of each chip at the central time node. , They represent the first On the first substrate layer The chip in the previous time period The last two time nodes , The junction temperature below, This indicates the interval between two adjacent time points. Indicates the length of each time period. Each chip at the termination time node The transient temperature field under transient chip power at all previous time points is expressed as follows:
[0045] In the formula, Indicates ambient temperature. Indicates the first Time period In the middle, the first The temperature rise of each functional layer is caused by the power increase of each chip on each substrate layer. Indicates the first On the first substrate layer Power increase per chip , , Indicates the number of substrate layers. This indicates the number of chips on the substrate layer. Indicates the 0th time period In the middle, the first The temperature rise of each functional layer is caused by the power increase of each chip on each substrate layer. It should be noted that the time point... Previously, the power of each chip was 0. The following simulation experiment further illustrates the method provided by this invention for calculating the transient temperature of a three-dimensional microsystem under transient chip power.
[0046] Specifically, the junction temperature of the C51 chip is calculated using the method provided in this invention and the simulation software COMSOL. Figure 8 This is a comparison graph showing the results of calculating the transient junction temperature of the C51 chip. The horizontal axis represents time (in milliseconds, ms), and the vertical axis represents temperature (in Kelvin, K). The absolute error of the calculation results relative to the COMSOL simulation results is calculated. Figure 9 This is a schematic diagram illustrating the absolute error in calculating the transient junction temperature of the C51 chip. The horizontal axis represents time (milliseconds, ms), and the vertical axis represents the absolute error (Kelvin, K). As can be seen, the average absolute error of the calculation results obtained by this invention is 0.29K, and the maximum absolute error is 0.90K, both below 1K. This indicates that the calculation accuracy of this invention meets the requirements. Furthermore, the calculation time of this invention is 0.37s, while the simulation software COMSOL requires 530s to complete the calculation. This demonstrates that the calculation efficiency of this invention is far superior to COMSOL, being 1432 times faster.
[0047] Furthermore, still based on Figure 2 Taking the HBM shown as an example, calculate the transient temperature field on the upper surface of the 5th functional layer at 100ms. Figure 10 This is the transient temperature field of the upper surface of the 5th functional layer in HBM at 100 ms. Figure 10As can be seen, the four chips on the upper surface of this layer cause a temperature rise, and the central thermal coupling is also successfully calculated. Similarly, based on the COMSOL simulation results, the absolute error of the calculation results of this invention is calculated. Figure 11 It is the absolute error of the transient temperature field on the upper surface of the 5th functional layer in HBM at 100ms. Obviously, the average absolute error of the calculation results of this invention is 0.68K and the maximum absolute error is 0.77K, both of which are less than 1K, which meets the calculation accuracy requirements.
[0048] As can be seen from the above embodiments, the beneficial effects of the present invention are as follows: This invention provides a method for calculating the transient temperature of a three-dimensional microsystem under transient chip power. It can be applied to three-dimensional microsystems containing one or more sets of alternately stacked substrate layers and micropad layers. When establishing a transient thermal analysis model under a fixed chip power, this invention considers the situation where the chip power in the three-dimensional microsystem changes over time, breaking through the limitation of traditional transient thermal analysis models that only consider constant chip power and do not consider the presence of chips between layers. Therefore, the temperature calculated by this invention using the transient thermal analysis model has higher accuracy and significantly improves computational efficiency.
[0049] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.
[0050] The use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples" indicates that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.
[0051] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.
Claims
1. A method for calculating the transient temperature of a three-dimensional microsystem under transient chip power, characterized in that, The three-dimensional microsystem includes multiple functional layers, each of which includes at least one set of alternately stacked substrate layers and micro pad layers. Each substrate layer includes multiple chips and a uniformly distributed array of through-silicon vias (TSVs). Adjacent substrate layers are interconnected through the TSV array and the micro pad layer. The method includes: Determine the anisotropic equivalent thermal conductivity of the substrate layer and the micropad layer; Using the chip as a heat source, the heat flux density generated by each chip is expanded using Fourier series to obtain the total heat flux density generated by the chip on the upper surface of each substrate layer. Based on the total heat flux density, a transient thermal analysis model under fixed chip power is constructed. The chip power of each chip in the transient thermal analysis model is updated successively over multiple consecutive time periods to obtain the transient temperature field of the three-dimensional microsystem at all time points.
2. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 1, characterized in that, The substrate layer further includes a silicon substrate, and the TSV unit is: a minimum repeating unit comprising a TSV and a specific region of silicon substrate surrounding it; the TSV includes a copper pillar and surrounding the copper pillar. layer; The anisotropic equivalent thermal conductivity of the substrate layer is: ; ; in, ; In the formula, Indicates that the substrate layer is in direction or Equivalent thermal conductivity in the direction, Indicates that the substrate layer is in Equivalent thermal conductivity in the direction, Indicates that the substrate layer is in direction or The equivalent thermal conductivity generated by the first part of the TSV unit in the direction. For the substrate layer in direction or The equivalent thermal conductivity generated in the direction by the second part of the TSV unit. For the substrate layer in direction or The equivalent thermal conductivity generated in the direction by the third part of the TSV unit. , Indicates the thermal conductivity of copper. express thermal conductivity, Indicates the thermal conductivity of the silicon substrate. Indicates the radius of the copper pillar. express and The sum of layer thicknesses This indicates the spacing between adjacent TSVs in the same substrate layer. This indicates the volume fraction of copper pillars in the TSV cell. express The volume fraction of the layer in the TSV cell. This indicates the volume fraction of the silicon substrate in the TSV cell. express The coordinate variables in the direction, where, direction and The directions are perpendicular and the plane formed by the two is parallel to the plane where each functional layer is located.
3. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 2, characterized in that, The micro pad layer includes multiple solder balls and filler material arranged in an array. The micro pad unit is: the smallest repeating unit containing a solder ball and a specific area of filler material around it. The anisotropic equivalent thermal conductivity of the micropad layer is expressed as follows: ; ; ; In the formula, This indicates that the micropad layer is in direction or Equivalent thermal conductivity in the direction, This indicates that the micropad layer is in Equivalent thermal conductivity in the direction, This indicates the thickness of the micropad layer. This indicates the spacing between adjacent solder balls within the same micropad layer. Indicates the thermal conductivity of the solder ball. This indicates the thermal conductivity of the filling material. This indicates that in the micro pad unit, in Thickness in the direction The preset part of the thin sheet along Equivalent thermal conductivity in the direction, , R Indicates the radius of the solder ball. express The coordinate variable in the direction.
4. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 3, characterized in that, The steps for constructing a transient thermal analysis model under fixed chip power based on the total heat flux density include: Based on the total heat flux density, the anisotropic equivalent thermal conductivity of the substrate layer, and the anisotropic equivalent thermal conductivity of the micropad layer, the governing equations, boundary conditions, and initial conditions of each functional layer in the three-dimensional microsystem are determined. Based on the control equations, boundary conditions, and initial conditions, determine the first control equation and first boundary conditions for each functional layer corresponding to the steady-state temperature rise portion, and the second control equation, first initial conditions, and second boundary conditions for each functional layer corresponding to the transient temperature rise portion. The steady-state temperature rise of each functional layer is determined based on the first governing equation and the first boundary condition of each functional layer corresponding to the steady-state temperature rise portion. The transient temperature rise of each functional layer is determined based on the second governing equation, the first initial condition, and the second boundary condition corresponding to each functional layer of the transient temperature rise portion. A transient thermal analysis model under fixed chip power is constructed based on the steady-state temperature rise, transient temperature rise, and ambient temperature of each functional layer: ; In the formula, , In the three-dimensional microsystem, the first The total temperature rise of each functional layer Indicates the first Transient temperature rise of each functional layer Indicates the first Steady-state temperature rise of each functional layer Indicates ambient temperature. The first one, under fixed chip power The transient temperature of each functional layer.
5. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 4, characterized in that, The first The steady-state temperature rise of each functional layer is expressed as: In the formula, , , , , , , and All are Fourier coefficients for the steady-state temperature rise. Indicates the first The zero-order Fourier coefficients of each functional layer Indicates the first Each functional layer regarding coordinate variables The zeroth Fourier coefficients, , Respectively represent the first Each functional layer regarding coordinate variables of Fourier hyperbolic cosine coefficients sum The coefficients of the hyperbolic sine term in the Fourier transform are... , Respectively represent the first Each functional layer regarding coordinate variables of Fourier hyperbolic cosine coefficients sum The coefficients of the hyperbolic sine term in the Fourier transform are... Represents coordinate variables and of Rank and The coefficients of the joint Fourier hyperbolic cosine term, Represents coordinate variables and of Rank and Coefficients of the joint Fourier hyperbolic sine term, intermediate variables , , , , , , , Respectively represent the first Each functional layer in , , Equivalent thermal conductivity in the direction, This indicates that the functional layer is in Length in the direction, This indicates that the functional layer is in Width in the direction.
6. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 5, characterized in that, The first The transient temperature rise of each functional layer is represented as follows: In the formula, , Respectively represent the first Each functional layer in , Equivalent thermal diffusivity in the direction of Indicates the first Each functional layer in Characteristic functions in the direction, , and Characteristic function The coefficients in Indicates the first 1 eigenvalue, Indicates the first Each functional layer in Equivalent thermal diffusivity in the direction of , , , All are Fourier coefficients for the transient temperature rise component. , , and They respectively represent based on The calculated zeroth-order Fourier coefficients, with respect to coordinate variables of Fourier coefficients, with respect to coordinate variables of Fourier coefficients and their relationship with coordinate variables and of Rank and Joint Fourier coefficients of order, Indicates time.
7. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 6, characterized in that, The steps of successively updating the chip power of each chip in the transient thermal analysis model over multiple consecutive time periods to obtain the transient temperature field of the three-dimensional microsystem at all time points include: The simulation time is divided into multiple time periods, each of which includes multiple time nodes that are evenly distributed. Initial time node calculated based on ambient temperature. The chip power , Indicates the first On the first substrate layer Each chip at the initial time point The chip power at the lower level; The chip power Substitute the transient thermal analysis model under the fixed chip power into the calculation of the junction temperature of each chip at all time points; make ; Time period Using the current time period as a reference, and leveraging the junction temperatures of each chip at the last two time points of the previous time period, the estimated junction temperatures of each chip at the center time point of the current time period are predicted; among which, They represent the first The start and end times of each time period. , Indicates the number of time periods; The chip power of each chip in the current time period is calculated using the estimated junction temperature; Calculate the difference between the chip power of each chip in the current time period and the chip power of each chip in the previous time period; The difference is substituted into the transient thermal analysis model under the fixed chip power as the chip power to calculate the transient temperature rise at each subsequent time point from the current time period. The transient temperature rise at each subsequent time point from the current time period is accumulated to obtain the first... Each functional layer at the termination time node Transient temperature field under transient chip power at all previous time points ; Based on the transient temperature field By inputting the center coordinates of each chip, we can obtain the position of each chip at the termination time node. Junction temperature at all previous time points; make and return the time period. As a step in the current time period, the transient temperature field of the three-dimensional microsystem at all time points is obtained after traversing all time periods.
8. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 7, characterized in that, The estimated junction temperature of each chip at the current time point is expressed as follows: ; In the formula, Indicates the current time period Estimated junction temperature of each chip at the central time node. , They represent the first On the first substrate layer The chip in the previous time period The last two time nodes , The junction temperature below, This indicates the interval between two adjacent time points. Indicates the length of each time period.
9. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 8, characterized in that, Each chip at the termination time node The transient temperature field under transient chip power at all previous time points is expressed as follows: In the formula, Indicates ambient temperature. Indicates the first Time period In the middle, the first The temperature rise of each functional layer is caused by the power increase of each chip on each substrate layer. Indicates the first On the first substrate layer Power increase per chip , , Indicates the number of substrate layers. This indicates the number of chips on the substrate layer. Indicates the 0th time period In the middle, the first The temperature rise of each functional layer is caused by the power increase of each chip on each substrate layer.
Citation Information
Patent Citations
Three-dimensional microsystem temperature calculation method considering thermal capacity change of transient thermal analysis model
CN119538685A
Method for constructing unsteady thermal stress analytical model of through silicon via
CN120197405A
System and method for across-chip thermal and power management in stacked IC designs
US20140096102A1
Heat transfer enhancement for three-dimensional integrated circuit chips
US20250155943A1