Solar cell and method of manufacturing the same, stacked cell, and photovoltaic module
By using chain lithography and photolithography to process the glass layer, the problems of complex Topcon battery manufacturing and heat loss were solved, improving battery efficiency and reducing costs.
Patent Information
- Application Number
- CN202511496688.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-16
- Publication Date
- 2026-02-24
- Estimated Expiration
- 2045-10-16
AI Technical Summary
Topcon batteries have a complex manufacturing process and suffer from heat loss, which affects battery conversion efficiency.
Chain lithography is used to replace laser for patterning, removing some of the doped conductive layer and tunneling layer, and then the glass layer is patterned using lithography.
It reduces thermal damage, simplifies the process, lowers battery manufacturing costs, and improves battery conversion and efficiency.
Smart Images

Figure CN120981023B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of solar cell technology, and in particular to a solar cell and its preparation method, a tandem cell and a photovoltaic module. Background Technology
[0002] Topcon (Tunnel Oxide Passivated Contact) cells are a type of tunnel oxide passivated contact solar cell with silicon as the substrate. Because it uses tunnel oxide with excellent charge transport characteristics as the charge transport layer on the back of the cell, and then deposits a layer of doped polycrystalline silicon to form a back passivated contact structure, it can effectively reduce surface recombination and metal contact recombination, and improve turn-on voltage and energy conversion efficiency.
[0003] However, the manufacturing process of Topcon batteries is quite complex, and the process generates high temperatures that lead to heat loss, which affects the battery's conversion efficiency. Summary of the Invention
[0004] Therefore, it is necessary to address the complex manufacturing process and heat loss issues of Topcon cells by providing a solar cell, its preparation method, a tandem cell, and a photovoltaic module.
[0005] A method for fabricating a solar cell, comprising:
[0006] A substrate is provided; the substrate has a first surface and a second surface disposed opposite to each other along its own thickness direction, the first surface having a first region and a second region, and the second surface having a third region and a fourth region;
[0007] An initial diffusion layer and a first glass layer are stacked on the first surface, and an initial tunneling layer, an initial doped conductive layer, and a second glass layer are stacked on the second surface; the first glass layer is located on the side of the initial diffusion layer away from the substrate, and the second glass layer is located on the side of the initial doped conductive layer away from the initial tunneling layer.
[0008] A chain-link photolithography process is used to remove the portion of the first glass layer located in the second region and the portion of the second glass layer located in the fourth region;
[0009] The portion of the initial diffusion layer located in the second region, and the portions of the initial tunneling layer and the initial doped conductive layer located in the fourth region are removed to form a diffusion layer, a tunneling layer, and a doped conductive layer;
[0010] Remove the portion of the first glass layer located in the first region and the portion of the second glass layer located in the third region.
[0011] In one embodiment, the step of removing the portion of the initial diffusion layer located in the second region, and the portions of the initial tunneling layer and the initial doped conductive layer located in the fourth region, to form the diffusion layer, the tunneling layer, and the doped conductive layer includes:
[0012] An alkaline texturing solution is used to remove the portion of the initial diffusion layer located in the second region, as well as the portions of the initial tunneling layer and the initial doped conductive layer located in the fourth region, and a texturized structure is formed in the second region and the fourth region.
[0013] In one embodiment, the alkaline texturing solution is a NaOH solution, and the concentration of the alkaline texturing solution is 0.5%-5%.
[0014] In one embodiment, the step of removing the portion of the first glass layer located in the first region and the portion of the second glass layer located in the third region includes:
[0015] An acidic solution is used to remove the portion of the first glass layer located in the first region and the portion of the second glass layer located in the third region.
[0016] In one embodiment, the acidic solution is an HF solution, and the concentration of the acidic solution is 10%-70%.
[0017] In one embodiment, the step of removing the portion of the first glass layer located in the second region and the portion of the second glass layer located in the fourth region using a chain lithography process includes:
[0018] A first mask is formed on the first glass layer, and a second mask is formed on the second glass layer; the orthographic projection of the first mask onto the substrate coincides with the first region, and the orthographic projection of the second mask onto the substrate coincides with the third region.
[0019] Remove the portion of the first glass layer located in the second region and the portion of the second glass layer located in the fourth region to expose the portion of the initial diffusion layer located in the second region and the portion of the initial doped conductive layer located in the fourth region.
[0020] In one embodiment, the step of removing the portion of the first glass layer located in the second region and the portion of the second glass layer located in the fourth region to expose the portion of the initial diffusion layer located in the second region and the portion of the initial doped conductive layer located in the fourth region includes:
[0021] An acidic solution is used to remove portions of the first glass layer located in the second region and portions of the second glass layer located in the fourth region, to expose portions of the initial diffusion layer located in the second region and portions of the initial doped conductive layer located in the fourth region.
[0022] In one embodiment, the acidic solution is an HF solution, and the concentration of the acidic solution is 10%-70%.
[0023] In one embodiment, the step of forming a first mask on the first glass layer includes:
[0024] Photoresist is applied to the first glass layer;
[0025] A first photomask is placed on the first glass layer coated with the photoresist. The first photomask has a first cutout portion, which is disposed corresponding to the first region.
[0026] The photoresist is irradiated, causing the portion of the photoresist located in the first region to deform and form the first mask.
[0027] Remove the first mask;
[0028] Remove the portion of the photoresist located in the second region.
[0029] In one embodiment, the step of forming a second mask on the second glass layer includes:
[0030] Photoresist is applied to the second glass layer;
[0031] A second photomask is placed on the second glass layer coated with the photoresist. The second photomask has a second cutout portion, which is correspondingly disposed to the third region.
[0032] The photoresist is irradiated, causing a portion of the photoresist located in the third region to deform and form the second mask.
[0033] Remove the second mask;
[0034] Remove the portion of the photoresist located in the fourth region.
[0035] In one embodiment, the step of forming a stacked initial diffusion layer and a first glass layer on the first surface, and forming a stacked initial tunneling layer, an initial doped conductive layer, and a second glass layer on the second surface includes:
[0036] The initial diffusion layer, the first glass layer, the doped conductive layer and the glass layer are sequentially formed on the first surface, and the initial tunneling layer, the initial doped conductive layer and the second glass layer are sequentially formed on the second surface.
[0037] An alkaline solution is used to remove the doped conductive layer and the glass layer.
[0038] A solar cell, wherein the solar cell is prepared using the above-described method for preparing a solar cell.
[0039] A tandem battery includes a top battery and a bottom battery, wherein the bottom battery is the aforementioned solar cell.
[0040] A photovoltaic module includes the aforementioned solar cell or the aforementioned tandem cell.
[0041] The aforementioned method for fabricating solar cells, by employing photolithography to pattern the first and second glass layers, effectively mitigates thermal damage compared to laser-based patterning, thereby significantly improving conversion efficiency. Furthermore, the simultaneous patterning of both layers simplifies the process and reduces manufacturing costs. Additionally, the removal of some doped conductive and tunneling layers helps reduce parasitic light absorption, further enhancing conversion efficiency. Attached Figure Description
[0042] The accompanying drawings, which form part of this application, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.
[0043] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0044] Figure 1 This is a schematic flowchart illustrating a method for fabricating a solar cell according to an embodiment of this application.
[0045] Figure 2 This is a schematic diagram of step S110 of a method for fabricating a solar cell according to an embodiment of this application.
[0046] Figure 3 This is a schematic diagram of step S121 of a method for preparing a solar cell according to an embodiment of this application.
[0047] Figure 4This is a schematic diagram of step S122 of a method for preparing a solar cell according to an embodiment of this application.
[0048] Figure 5 This is a schematic diagram of step S123 of a method for preparing a solar cell according to an embodiment of this application.
[0049] Figure 6 This is a schematic diagram of step S124 of a method for preparing a solar cell according to an embodiment of this application.
[0050] Figure 7 This is a schematic diagram of step S125 of a method for fabricating a solar cell according to an embodiment of this application.
[0051] Figure 8 This is a schematic diagram of step S126 of a method for fabricating a solar cell according to an embodiment of this application.
[0052] Figure 9 This is a schematic diagram of step S127 of a method for fabricating a solar cell according to an embodiment of this application.
[0053] Figure 10 This is a schematic diagram of step S131 of a method for preparing a solar cell according to an embodiment of this application.
[0054] Figure 11 This is a schematic diagram of step S132 of a method for preparing a solar cell according to an embodiment of this application.
[0055] Figure 12 This is a schematic diagram of step S140 of a method for fabricating a solar cell according to an embodiment of this application.
[0056] Figure 13 This is a schematic diagram of step S150 of a method for fabricating a solar cell according to an embodiment of this application.
[0057] Explanation of reference numerals in the attached figures:
[0058] 11. Substrate; 11a. First surface; 11b. Second surface; 12. Initial diffusion layer; 121. Diffusion layer; 13. First glass layer; 14. Initial tunneling layer; 141. Tunneling layer; 15. Initial silicon layer; 152. Initial doped conductive layer; 1521. Doped conductive layer; 154. Doped conductive layer around the substrate; 16. Second glass layer; 17. Glass layer around the substrate; 20. First mask; 30. Second mask. Detailed Implementation
[0059] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.
[0060] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.
[0061] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0062] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0063] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.
[0064] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.
[0065] See Figure 1 This application provides a method for fabricating a solar cell, specifically a Topcon (Tunnel Oxide Passivated Contact) cell. It is understood that this method can also be used to fabricate other types of solar cells, and is not specifically limited herein.
[0066] As described in the background section, lasers are typically used to pattern the Topcon battery during the manufacturing process. However, the high temperatures generated by laser processing can cause irreversible thermal damage to the battery, affecting the passivation effect and reducing the battery's photoelectric conversion efficiency. Furthermore, the laser processing is time-consuming, thus impacting battery production efficiency and creating a capacity bottleneck.
[0067] Based on the above technical issues, such as Figure 1 As shown, this application provides a method for preparing a solar cell, comprising the following steps:
[0068] Step S110: Provide a substrate; the substrate has a first surface and a second surface disposed opposite to each other along its own thickness direction, the first surface has a first region and a second region, and the second surface has a third region and a fourth region.
[0069] Combination Figure 2As shown, the substrate 11 can be an N-type semiconductor substrate or a P-type semiconductor substrate. Specifically, the N-type semiconductor substrate is doped with an N-type dopant element, which can be at least one of group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As). The P-type semiconductor substrate is doped with a P-type dopant element, which can be at least one of group III elements such as boron (B), aluminum (Al), gallium (Ga), or indium (In).
[0070] The substrate 11 has a rectangular flat plate structure and has a first surface 11a and a second surface 11b that are horizontally arranged opposite to each other along the thickness direction of the substrate 11. The first surface 11a is the surface of the substrate 11 facing the light-receiving side of the solar cell, and the second surface 11b is the surface of the substrate 11 facing the back-light side of the solar cell.
[0071] Furthermore, the first surface 11a has a first region and a second region. The first region is the region where the electrode is located, and the second region is the region of the first surface 11a excluding the first region. The shape and size of the first and second regions can be set as needed. The second surface 11b has a third region and a fourth region. The third region is the region where the electrode is located, and the fourth region is the region of the second surface 11b excluding the third region. The shape and size of the third and fourth regions can be set as needed. It can be understood that the positions of the first and third regions, and the second and fourth regions, can be completely corresponding in the thickness direction of the substrate 11, or they can be staggered. This is not limited here.
[0072] In some embodiments, step S110 may specifically include the following steps: providing an N-type silicon wafer, firstly removing oil stains from the surface of the silicon wafer through pre-cleaning, then using an alkaline solution to remove the mechanical damage layer generated during the cutting process of the silicon wafer and performing texturing treatment, so that the surface of the silicon wafer forms an uneven textured surface structure as a substrate.
[0073] Among them, the textured surface not only helps to increase the light-receiving area, but also helps to reduce the reflection of sunlight on the surface of the solar cell, thereby increasing the absorption rate of sunlight on the surface of the solar cell and ultimately improving the photoelectric conversion efficiency of the solar cell.
[0074] After step S110, step S120 is further included: forming an initial diffusion layer and a first glass layer stacked on the first surface, and forming an initial tunneling layer, an initial doped conductive layer and a second glass layer stacked on the second surface; wherein the first glass layer is located on the side of the initial diffusion layer away from the substrate, and the second glass layer is located on the side of the initial doped conductive layer away from the initial tunneling layer.
[0075] In some embodiments, step S120 specifically includes the following steps:
[0076] Step S121: An initial diffusion layer and a first glass layer are formed on the first and second surfaces of the substrate, respectively; the first glass layer is located on the side of the initial diffusion layer away from the substrate.
[0077] Please combine Figure 1 , Figure 2 as well as Figure 3 As shown, in some specific embodiments, the first surface 11a and the second surface 11b of the substrate 11 are subjected to boron diffusion treatment. The substrate 11 is placed in a diffusion furnace, and the boron source (e.g., boron tribromide (BBr3) or boron trichloride (BCl3)) is evaporated or sublimated by heating. The generated boron atoms are heated to a certain temperature by the diffusion source and diffuse into the substrate 11, so that the first surface 11a and the second surface 11b of the substrate 11 respectively form an initial diffusion layer 12. The initial diffusion layer 12 and the substrate 11 form a PN junction structure. At the same time, the boron atoms react chemically with the silicon atoms on the surface of the substrate 11 to form borosilicate compounds. These compounds melt at high temperature on the side of the initial diffusion layer 12 away from the substrate 11 to form a first glass layer 13.
[0078] In the above boron diffusion process, the heating temperature is 800℃-1200℃, the diffusion time is 2h-5h, and the thickness of the first glass layer 13 is 100nm-200nm. It can be understood that the boron diffusion process and its parameters are not limited to these and can be set as needed to meet different requirements.
[0079] Step S122: Remove the first glass layer located on one side of the second surface of the substrate.
[0080] Combination Figure 4 As shown, in some embodiments, an acidic solution is used to clean and remove the first glass layer 13 located on one side of the second surface 11b of the substrate 11 to expose the initial diffusion layer 12. Specifically, the acidic solution may be a hydrofluoric acid (HF) solution with a concentration of 10%-70%, and the reaction time may be 60 seconds.
[0081] It is understood that the method and process parameters for removing the first glass layer 13 are not limited to this and can be set as needed to meet different requirements.
[0082] Step S123: Remove the initial diffusion layer located on the second surface of the substrate.
[0083] Combination Figure 5 As shown, in some embodiments, an alkaline solution is used to remove the initial diffusion layer 12 located on the second surface 11b of the substrate 11 to expose the second surface 11b of the substrate 11. Specifically, the alkaline solution may be a potassium hydroxide (KOH) solution with a concentration of 0.5%-5%, a polishing temperature of 60℃-80℃, and a reaction time of 100s-900s.
[0084] It is understood that the method and process parameters for removing the initial diffusion layer 12 are not limited to this and can be set as needed to meet different requirements.
[0085] Combination Figure 6 As shown, step S124: an initial tunneling layer is formed on the second surface of the substrate.
[0086] Specifically, in some embodiments, a substrate 11 is placed in a deposition furnace, and at least one of silicon oxide, titanium oxide, silicon nitride, aluminum oxide, and hafnium oxide is deposited on the second surface 11b of the substrate 11 to form an initial tunneling layer 14, which is used to reduce the surface recombination rate. The heating temperature of the deposition furnace is 400℃-1000℃, and the thickness of the initial tunneling layer 14 is 1nm-10nm.
[0087] It is understood that the formation method and process parameters of the initial tunnel layer 14 are not limited to this, and can be set as needed to meet different requirements.
[0088] Step S125: Initial silicon layers are formed on one side of the first surface and one side of the second surface of the substrate, respectively.
[0089] Combination Figure 7 As shown, in some embodiments, the substrate 11 is placed in a deposition furnace, and at least one of amorphous silicon or microcrystalline silicon is deposited on the initial tunneling layer 14 of the substrate 11 and the first glass layer 13 of the substrate 11 to form an initial silicon layer 15, which provides a basis for subsequent phosphorus diffusion processes and forms good field-effect passivation and contact.
[0090] The heating temperature of the deposition furnace is 400℃-1000℃, and the thickness of the initial silicon layer 15 is 50nm-400nm. It is understood that the formation method of the initial silicon layer 15 is not limited to this and can be set as needed to meet different requirements.
[0091] Step S126: The initial silicon layer on one side of the second surface of the substrate is doped to form an initial doped conductive layer and a phosphorus silicate glass layer.
[0092] Combination Figure 8 As shown, in some embodiments, the substrate 11 is placed in a diffusion furnace, utilizing a phosphorus source (such as POC). l3 The phosphorus atoms react with the surface of the initial silicon layer 15 to form phosphorus atoms, which diffuse into the interior of the initial silicon layer 15 on the side of the second surface 11b of the substrate 11. The high temperature during the diffusion process can transform amorphous silicon into polycrystalline silicon, thereby transforming the initial silicon layer 15 into the initial doped conductive layer 152. At the same time, the phosphorus atoms react chemically with the silicon atoms on the surface of the substrate 11 to form phosphorus silicon compounds. These compounds melt at high temperature on the surface of the initial doped conductive layer 152 on the side away from the substrate 11 to form the second glass layer 16.
[0093] The diffusion furnace temperature is 700-1000℃, the diffusion time is 1-3 hours, and the thickness of the second glass layer 16 is 20nm-100nm. It is understood that the doping treatment method and process parameters are not limited to these and can be set as needed to meet different requirements.
[0094] Furthermore, while an initial doped conductive layer 152 and a second glass layer 16 are formed on one side of the second surface 11b of the substrate 11, a doped conductive layer 154 and a glass layer 17 stacked on the first glass layer 13 are also formed on one side of the first surface 11a of the substrate 11.
[0095] Therefore, step S120 also includes step S127: removing the doped conductive layer and the glass layer located on one side of the first surface of the substrate.
[0096] Please combine Figure 9 As shown, in some embodiments, an alkaline solution is used to first etch the wire-wound glass layer 17 located on one side of the first surface 11a to expose the underlying wire-wound doped conductive layer 154, and then the silicon surface is further etched to remove the wire-wound doped conductive layer 154.
[0097] The alkaline solution is a sodium hydroxide (NaOH) solution with a concentration of 0.5%-5%, the reaction temperature is 60℃-80℃, and the reaction time is 100s-1000s. It is understood that the method for removing the doped conductive layer 154 and the glass layer 17 is not limited to this and can be set as needed to meet different requirements.
[0098] Thus, after the above step S120, the first surface 11a of the substrate 11 forms an initial diffusion layer 12 and a first glass layer 13 stacked together, and the second surface 11b of the substrate 11 forms an initial tunneling layer 14, an initial doped conductive layer 152 and a second glass layer 16 stacked together in sequence.
[0099] like Figure 1 As shown, after step S120, step S130 is also included: using a chain photolithography process to remove the portion of the first glass layer located in the second region and the portion of the second glass layer located in the fourth region.
[0100] In some embodiments, step S130 specifically includes the following steps:
[0101] Step S131: A first mask is formed on the first glass layer, and a second mask is formed on the second glass layer; the orthographic projection of the first mask onto the substrate coincides with the first region, and the orthographic projection of the second mask onto the substrate coincides with the third region.
[0102] Please combine Figure 10As shown, the first mask 20 has the same shape as the first region, thereby covering the portion of the first glass layer 13 located in the first region and exposing the portion of the first glass layer 13 located in the second region, thus protecting the portion of the first glass layer 13 located in the first region and exposing the portion of the first glass layer 13 located in the second region in subsequent processes. The second mask 30 has the same shape as the third region, thereby covering the portion of the second glass layer 16 located in the third region and exposing the portion of the second glass layer 16 located in the fourth region, thus protecting the portion of the second glass layer 16 located in the third region and exposing the portion of the second glass layer 16 located in the fourth region in subsequent processes.
[0103] In some embodiments, the step of forming a first mask on the first glass layer in step S131 includes:
[0104] S1310: Photoresist is applied to the first glass layer.
[0105] Specifically, the photoresist covers the entire surface of the first glass layer 13 on the side away from the substrate 11. Photoresist, also known as photoresist, is a thin film etching material whose solubility changes upon irradiation or radiation such as ultraviolet light, electron beams, ion beams, and X-rays.
[0106] S1311: A first photomask is placed on a first glass layer coated with photoresist. The first photomask has a first cutout portion, which is correspondingly arranged with a first region.
[0107] Specifically, the first photomask has a flat plate structure. A first cutout portion of the first photomask extends through the upper and lower surfaces along its thickness direction. The shape of the first cutout portion is the same as the shape of the first region, and the edge of the orthographic projection of the first cutout portion onto the substrate 11 coincides with the edge of the first region. Therefore, the first photomask covers the portion of the photoresist located in the second region, while the portion of the photoresist located in the first region is exposed.
[0108] S1312: Irradiate the photoresist to cause partial deformation of the photoresist in the first region to form the first mask.
[0109] Specifically, the photoresist can be irradiated with ultraviolet light, electron beam, ion beam, X-ray, etc. Since the portion of the photoresist corresponding to the first cutout (i.e., the portion corresponding to the first region) is exposed, it undergoes denaturation and curing under irradiation to form the first mask 20. The orthographic projection of the first mask 20 onto the substrate 11 coincides with the first region. The portion of the photoresist covered by the first mask (i.e., the portion corresponding to the second region) is not irradiated and remains in its initial state.
[0110] S1313: Remove the first mask.
[0111] Specifically, the first mask is removed from the first glass layer 13.
[0112] S1314: Remove the portion of the photoresist located in the second region.
[0113] Specifically, since the portion of the photoresist covered by the first mask (i.e. the portion located in the second region) has not been denatured and cured, it can be cleaned and removed, leaving only the first mask 20 covering the first glass layer 13 located in the first region.
[0114] In some embodiments, the step of forming a second mask on the second glass layer in step S131 includes:
[0115] Step S1315: Apply photoresist to the second glass layer.
[0116] Specifically, photoresist covers the entire surface of the second glass layer 16 on the side away from the substrate 11.
[0117] Step S1316: Place a second photomask on the second glass layer coated with photoresist. The second photomask has a second cutout portion, which is correspondingly set with the third region.
[0118] Specifically, the second photomask has a flat plate structure. A second cutout portion of the second photomask extends through the upper and lower surfaces along its thickness direction. The shape of the second cutout portion is the same as the shape of the third region, and the edge of the orthographic projection of the second cutout portion onto the substrate 11 coincides with the edge of the third region. Therefore, the second photomask covers the portion of the photoresist located in the fourth region, while the portion of the photoresist located in the third region is exposed.
[0119] Step S1317: Irradiate the photoresist to partially deform the photoresist in the third region to form a second mask.
[0120] Specifically, the photoresist can be irradiated with ultraviolet light, electron beams, ion beams, X-rays, etc. Since the portion of the photoresist corresponding to the second cutout (i.e., the portion corresponding to the third region) is exposed, it undergoes denaturation and curing under irradiation to form the second mask 30. The orthogonal projection of the second mask 30 onto the substrate 11 coincides with the third region. The portion of the photoresist covered by the second mask (i.e., the portion corresponding to the fourth region) is not irradiated and remains in its initial state.
[0121] Step S1318: Remove the second mask.
[0122] Specifically, the first mask is removed from the first glass layer 13.
[0123] Step S1319: Remove the portion of the photoresist located in the fourth region.
[0124] Specifically, since the portion of the photoresist covered by the second mask (i.e. the portion located in the fourth region) has not been denatured and cured, it can be cleaned and removed, leaving only the second mask 30 covering the second glass layer 16 located in the third region.
[0125] After step S131, step S132 is also included: using an acidic solution to remove the portion of the first glass layer located in the second region and the portion of the second glass layer located in the fourth region, so as to expose the portion of the initial diffusion layer located in the second region and the portion of the initial doped conductive layer located in the fourth region.
[0126] Please combine Figure 11 As shown, specifically, since the portion of the first glass layer 13 located in the first region is covered and protected by the first mask 20, and the portion of the second glass layer 16 located in the third region is covered and protected by the second mask 30, an acidic solution can be used to accurately remove the portion of the first glass layer 13 located in the second region and the portion of the second glass layer 16 located in the fourth region, thereby exposing the portion of the initial diffusion layer 12 located in the second region and the portion of the initial doped conductive layer 152 located in the fourth region.
[0127] Specifically, the acidic solution can be a hydrofluoric acid (HF) solution with a concentration of 10%-70%, and the reaction time can be 60 seconds. It is understood that the removal methods and process parameters for the portion of the first glass layer 13 located in the second region and the portion of the second glass layer 16 located in the fourth region are not limited to this and can be set as needed to meet different requirements.
[0128] After step S130, step S140 is further included: removing the portion of the initial diffusion layer located in the second region, and the portions of the initial tunneling layer and the initial doped conductive layer located in the fourth region, to form the diffusion layer, the tunneling layer, and the doped conductive layer.
[0129] In some embodiments, step S140 specifically includes the following steps: using an alkaline texturing solution to remove the portion of the initial diffusion layer located in the second region, and the portions of the initial tunneling layer and the initial doped conductive layer located in the fourth region, and forming a textured structure in the second region and the fourth region.
[0130] Please combine Figure 12 As shown, since the portion of the initial diffusion layer 12 located in the first region is covered by the first mask 20 and the first glass layer 13, and the portion of the initial doped conductive layer 152 located in the third region is covered by the second mask 30 and the second glass layer 16, an alkaline solution can accurately remove the portion of the initial diffusion layer 12 located in the second region, as well as the portions of the initial tunneling layer 14 and the initial doped conductive layer 152 located in the fourth region, and form a textured structure in the second and fourth regions to significantly reduce surface reflectivity.
[0131] In some embodiments, the alkaline solution is a sodium hydroxide (NaOH) solution with a concentration of 0.5%-5%, a reaction temperature of 60℃-80℃, a reaction time of 100s-1000s, and a texturing depth of 1µm-10µm.
[0132] After step S140, step S150 is also included: removing the portion of the first glass layer located in the first region and the portion of the second glass layer located in the third region.
[0133] In some embodiments, step S150 specifically includes the following steps: using an acidic solution to remove the portion of the first glass layer located in the first region and the portion of the second glass layer located in the third region.
[0134] Please combine Figure 13 As shown, an acidic solution is used to remove the portion of the first mask 20 and the first glass layer 13 located in the first region, the portion of the second mask 30 and the portion of the second glass layer 16 located in the third region. Therefore, only the diffusion layer 121 located in the first region remains on the first surface 11a of the substrate 11, and only the tunneling layer 141 and the doped conductive layer 1521 located in the third region remain on the second surface 11b of the substrate 11.
[0135] Specifically, the acidic solution can be a hydrofluoric acid (HF) solution with a concentration of 10%-70%, and the reaction time can be 60 seconds. It is understood that the removal methods and process parameters for the portions of the first mask 20 and the first glass layer 13 located in the first region, and the portions of the second mask 30 and the second glass layer 16 located in the third region are not limited to this and can be set as needed to meet different requirements.
[0136] The aforementioned method for fabricating solar cells utilizes photolithography to pattern the first glass layer 13 and the second glass layer 16. Compared to patterning with lasers, this method effectively mitigates thermal damage and thus significantly improves the cell's conversion efficiency. Furthermore, simultaneously patterning both the first and second glass layers simplifies the process and reduces manufacturing costs. Additionally, removing some of the doped conductive layer 1521 and tunneling layer 141 helps reduce parasitic light absorption, further enhancing the cell's conversion efficiency.
[0137] In one specific embodiment, the method for fabricating a solar cell includes the following steps:
[0138] First, an N-type silicon wafer is provided, and the N-type silicon wafer is textured on both sides to form a substrate 11. Then, the substrate 11 is subjected to boron diffusion treatment, and an initial diffusion layer 12 and a first glass layer 13 are formed on both sides of the substrate 11, respectively. After that, the first glass layer 13 and the initial diffusion layer 12 located on the second surface 11b of the substrate 11 are removed.
[0139] Then, an initial tunneling layer 14 is formed on the second surface 11b of the substrate 11. After that, an initial silicon layer 15 is formed on the first glass layer 13 and the initial tunneling layer 14, respectively. The initial silicon layer 15 is then subjected to phosphorus diffusion treatment to form an initial doped conductive layer 152 and a second glass layer 16 on one side of the first surface 11a of the substrate 11.
[0140] Finally, the substrate 11 is patterned using a chain lithography process. First, the portion of the first glass layer 13 located in the second region and the portion of the second glass layer 16 located in the fourth region are removed. Then, the portion of the initial diffusion layer 12 located in the second region is removed to form the diffusion layer 121. Finally, the portion of the initial tunneling layer 14 located in the fourth region is removed to form the tunneling layer 141. The portion of the initial doped conductive layer 152 located in the fourth region is removed to form the doped conductive layer 1521.
[0141] Please combine Figure 13 As shown, this application also provides a solar cell prepared by the above-described preparation method. The solar cell includes a substrate 11, a diffusion layer 121, a tunneling layer 141, a doped conductive layer 1521, a first electrode, and a second electrode.
[0142] The substrate 11 has a rectangular flat plate structure and has a first surface 11a and a second surface 11b that are horizontally arranged opposite to each other along the thickness direction of the substrate 11. The first surface 11a is the surface of the substrate 11 facing the back light side of the solar cell, and the second surface 11b is the surface of the substrate 11 facing the light-receiving side of the solar cell.
[0143] The first surface 11a has a first region and a second region. The first region is the region where the first electrode is located, and the second region is the region of the first surface 11a other than the first region. The second surface 11b has a third region and a fourth region. The third region is the region where the second electrode is located, and the fourth region is the region of the second surface 11b other than the third region. The positions of the first and third regions, and the second and fourth regions, can correspond completely or be offset in the thickness direction of the substrate 11, and are not limited here.
[0144] A diffusion layer 121 is disposed on the first surface 11a of the substrate 11 and located in the first region, and a first electrode is disposed on the first surface 11a of the substrate 11 and located in the second region. A tunneling layer 141 and a doped conductive layer 1521 are disposed on the second surface 11b of the substrate 11 and located in the third region, and a second electrode is disposed on the second surface 11b of the substrate 11 and located in the fourth region.
[0145] The aforementioned solar cell, by using photolithography instead of laser for patterning during processing, reduces thermal damage and achieves higher conversion efficiency. Furthermore, the removal of part of the doped conductive layer 1521 and tunneling layer 141 helps reduce parasitic light absorption, further improving conversion efficiency.
[0146] This application also provides a tandem solar cell, including a top cell, an intermediate connecting layer, and a bottom cell, with the intermediate connecting layer connecting the bottom cell and the top cell. The top cell is one of a perovskite solar cell, a cadmium telluride solar cell, a copper indium gallium selenide solar cell, or a gallium arsenide solar cell, and the bottom cell is one of the aforementioned solar cells. The intermediate connecting layer is typically selected from a transparent material with a high refractive index, such as a transparent conductive metal oxide thin film (ITO).
[0147] This application also provides a photovoltaic module, including the aforementioned solar cell or tandem cell. In some embodiments, the photovoltaic module includes a laminate and a frame covering the laminate. Along the light illumination direction, the laminate includes a front panel, a first encapsulating film, a solar cell, a second encapsulating film, and a back panel arranged sequentially.
[0148] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0149] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.
Claims
1. A method for preparing a solar cell, characterized in that, include: Provide a base; The substrate has a first surface and a second surface disposed opposite to each other along its own thickness direction. The first surface has a first region and a second region, and the second surface has a third region and a fourth region. An initial diffusion layer and a first glass layer are stacked on the first surface, and an initial tunneling layer, an initial doped conductive layer, and a second glass layer are stacked on the second surface; the first glass layer is located on the side of the initial diffusion layer away from the substrate, and the second glass layer is located on the side of the initial doped conductive layer away from the initial tunneling layer. A chain-link photolithography process is used to remove the portion of the first glass layer located in the second region and the portion of the second glass layer located in the fourth region; The portion of the initial diffusion layer located in the second region, and the portions of the initial tunneling layer and the initial doped conductive layer located in the fourth region are removed to form a diffusion layer, a tunneling layer, and a doped conductive layer; Remove the portion of the first glass layer located in the first region and the portion of the second glass layer located in the third region.
2. The method for preparing a solar cell according to claim 1, characterized in that, The step of removing the portion of the initial diffusion layer located in the second region, and the portions of the initial tunneling layer and the initial doped conductive layer located in the fourth region, to form the diffusion layer, the tunneling layer, and the doped conductive layer, includes: An alkaline texturing solution is used to remove the portion of the initial diffusion layer located in the second region, as well as the portions of the initial tunneling layer and the initial doped conductive layer located in the fourth region, and a texturized structure is formed in the second region and the fourth region.
3. The method for preparing a solar cell according to claim 2, characterized in that, The alkaline texturing solution is a NaOH solution, and the concentration of the alkaline texturing solution is 0.5%-5%.
4. The method for preparing a solar cell according to claim 1, characterized in that, The step of removing the portion of the first glass layer located in the first region and the portion of the second glass layer located in the third region includes: An acidic solution is used to remove the portion of the first glass layer located in the first region and the portion of the second glass layer located in the third region.
5. The method for preparing a solar cell according to claim 4, characterized in that, The acidic solution is an HF solution, and the concentration of the acidic solution is 10%-70%.
6. The method for preparing a solar cell according to claim 1, characterized in that, The step of removing the portion of the first glass layer located in the second region and the portion of the second glass layer located in the fourth region using a chain photolithography process includes: A first mask is formed on the first glass layer, and a second mask is formed on the second glass layer; the orthographic projection of the first mask onto the substrate coincides with the first region, and the orthographic projection of the second mask onto the substrate coincides with the third region. Remove the portion of the first glass layer located in the second region and the portion of the second glass layer located in the fourth region to expose the portion of the initial diffusion layer located in the second region and the portion of the initial doped conductive layer located in the fourth region.
7. The method for preparing a solar cell according to claim 6, characterized in that, The step of removing the portion of the first glass layer located in the second region and the portion of the second glass layer located in the fourth region to expose the portion of the initial diffusion layer located in the second region and the portion of the initial doped conductive layer located in the fourth region includes: An acidic solution is used to remove portions of the first glass layer located in the second region and portions of the second glass layer located in the fourth region, to expose portions of the initial diffusion layer located in the second region and portions of the initial doped conductive layer located in the fourth region.
8. The method for preparing a solar cell according to claim 7, characterized in that, The acidic solution is an HF solution, and the concentration of the acidic solution is 10%-70%.
9. The method for preparing a solar cell according to claim 6, characterized in that, The step of forming the first mask on the first glass layer includes: Photoresist is applied to the first glass layer; A first photomask is placed on the first glass layer coated with the photoresist. The first photomask has a first cutout portion, which is disposed corresponding to the first region. The photoresist is irradiated, causing the portion of the photoresist located in the first region to deform and form the first mask. Remove the first mask; Remove the portion of the photoresist located in the second region.
10. The method for preparing a solar cell according to claim 6, characterized in that, The step of forming the second mask on the second glass layer includes: Photoresist is applied to the second glass layer; A second photomask is placed on the second glass layer coated with the photoresist. The second photomask has a second cutout portion, which is correspondingly disposed to the third region. The photoresist is irradiated, causing a portion of the photoresist located in the third region to deform and form the second mask. Remove the second mask; Remove the portion of the photoresist located in the fourth region.
11. The method for preparing a solar cell according to claim 1, characterized in that, The steps of forming an initial diffusion layer and a first glass layer stacked on the first surface, and forming an initial tunneling layer, an initial doped conductive layer, and a second glass layer stacked on the second surface include: The initial diffusion layer, the first glass layer, the doped conductive layer and the glass layer are sequentially formed on the first surface, and the initial tunneling layer, the initial doped conductive layer and the second glass layer are sequentially formed on the second surface. An alkaline solution is used to remove the doped conductive layer and the glass layer.
12. A solar cell, characterized in that, The solar cell is prepared using the solar cell preparation method as described in any one of claims 1 to 11.
13. A stacked battery, comprising a top battery and a bottom battery, characterized in that, The bottom cell is the solar cell according to claim 12.
14. A photovoltaic module, characterized in that, This includes the solar cell as described in claim 12, or the tandem cell as described in claim 13.
Citation Information
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