Solar cell manufacturing method, solar cell, stacked cell, and photovoltaic module

Abstract

The application relates to the technical field of solar cells, in particular to a solar cell preparation method, a solar cell, a laminated cell and a photovoltaic module. The preparation method comprises the following steps: preparing a tunneling oxide layer on a first surface of a substrate; depositing polycrystalline silicon on the surface of the tunneling oxide layer along the thickness direction under a first deposition condition, and gradually reducing the first deposition condition to a second deposition condition; and performing phosphorus diffusion doping on the polycrystalline silicon layer under a first doping condition, and converting the polycrystalline silicon layer into a doped polycrystalline silicon layer. The application gradually reduces the deposition condition to form a polycrystalline silicon layer with gradually changed crystallization rate, thereby forming a doped polycrystalline silicon layer with gradually changed doping concentration during phosphorus diffusion, making the side of the doped polycrystalline silicon layer close to the substrate have low doping concentration, effectively blocking the diffusion of phosphorus atoms, reducing the risk of phosphorus atom diffusion through the substrate, and improving the passivation level. Meanwhile, the side of the doped polycrystalline silicon layer away from the substrate has high doping concentration, which is beneficial to metal contact and improves the conversion efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of solar cells, in particular to a solar cell preparation method, a solar cell, a stacked cell and a photovoltaic module. BACKGROUND

[0002] A solar cell (or a photoelectric cell, a photovoltaic cell) is a kind of photoelectric semiconductor wafer that directly generates electricity by using sunlight. When sunlight shines on the surface of the solar cell, photons are absorbed and electrons are excited to form an electric current, generating electric energy. Among them, the TOPCon (Tunnel Oxide Passivated Contact) cell is a kind of high-efficiency solar cell that has attracted much attention in the photovoltaic field in recent years.

[0003] The TOPCon cell is a kind of tunnel oxide passivation contact solar cell based on the principle of selective carrier. The cell structure is generally an N-type silicon substrate cell, a layer of tunnel oxide layer is prepared on the back surface of the cell, and then a layer of doped polysilicon layer is deposited, and the two together form a passivation contact structure. This structure can selectively allow the majority carriers to pass through the back surface and block the minority carriers, thereby effectively reducing surface recombination and metal contact recombination, thereby achieving higher photoelectric conversion efficiency.

[0004] At present, the crystallization rate and doping concentration of the doped polysilicon layer are low. Directly increasing the crystallization rate is easy to cause the problem of film explosion, which affects the passivation level. Directly increasing the doping concentration is easy to cause the substrate doping concentration to be too high, resulting in serious internal expansion and even expansion through phenomenon, thereby reducing the open-circuit voltage, fill factor and conversion rate of the cell. SUMMARY

[0005] The present application provides a solar cell preparation method, a solar cell, a stacked cell and a photovoltaic module, aiming to.

[0006] In a first aspect, the present application provides a solar cell preparation method, which comprises:

[0007] Preparation of a tunnel oxide layer on the first surface of the substrate;

[0008] Depositing polysilicon on the surface of the tunnel oxide layer along the thickness direction under a first deposition condition, and gradually reducing the first deposition condition to a second deposition condition;

[0009] Phosphorus diffusion doping the polysilicon layer under a first doping condition, so as to convert the polysilicon layer into a doped polysilicon layer.

[0010] In a possible design, the first deposition condition is linearly reduced to the second deposition condition.

[0011] In a possible design, in the first deposition condition, the deposition temperature is 580-630 ℃, the silane flow rate is 1000-1800 sccm, and the deposition pressure is 300-400 mTorr.

[0012] In the second deposition condition, the deposition temperature is 530-580 ℃, the silane flow rate is 600-1000 sccm, and the deposition pressure is 200-300 mTorr.

[0013] In a possible design, when the polycrystalline silicon is deposited along the surface of the tunneling oxide layer in the thickness direction, the deposition time from the first deposition condition to the second deposition condition is 850-1700 s.

[0014] In a possible design, in the step of performing phosphorus diffusion doping on the polycrystalline silicon layer in the first doping condition, the preparation method further includes:

[0015] The polycrystalline silicon layer is subjected to phosphorus diffusion by using phosphorus oxychloride as a phosphorus source, and the phosphorus oxychloride is carried by nitrogen.

[0016] In a possible design, in the first doping condition, the diffusion temperature is 800-850 ℃, the diffusion time is 15-30 min, and the nitrogen flow rate is 1200-1800 sccm.

[0017] In a possible design, after the step of performing phosphorus diffusion doping on the polycrystalline silicon layer in the first doping condition, the preparation method further includes:

[0018] The elevated diffusion temperature is 880-930 ℃, and the diffusion time is 30-50 min.

[0019] Embodiments of the present application provide, in a second aspect, a solar cell, which is manufactured by using the solar cell preparation method described above, and the solar cell includes:

[0020] A substrate, which has a first surface;

[0021] A tunneling oxide layer, which is arranged on the first surface;

[0022] A doped polycrystalline silicon layer, which is arranged on a side of the tunneling oxide layer away from the first surface, and the crystallization rate of the doped polycrystalline silicon layer on a side away from the substrate is greater than the crystallization rate on a side close to the substrate, and the doping concentration of the doped polycrystalline silicon layer on the side away from the substrate is greater than the doping concentration on the side close to the substrate.

[0023] In a possible design, the doping concentration of the doped polycrystalline silicon layer on the side away from the substrate is 3×1020 atoms / cm 3 -5x10 20 atoms / cm 3 .

[0024] In one possible design, the doping concentration of the doped polysilicon layer near the side of the substrate is 1x10 20 atoms / cm 3 -2x10 20 atoms / cm 3 .

[0025] In one possible design, the crystallization rate of the doped polysilicon layer away from the side of the substrate is 90%-95%.

[0026] In one possible design, the crystallization rate of the doped polysilicon layer near the side of the substrate is 85%-90%.

[0027] In one possible design, the doping concentration of the tunneling oxide layer is 1x10 19 atoms / cm 3 -2x10 19 atoms / cm 3 .

[0028] In one possible design, the thickness of the polysilicon layer is 85 nm-170 nm.

[0029] Embodiments of the present application provide, in a third aspect, a stacked battery, which includes a top battery, an intermediate connecting layer, and a bottom battery, the intermediate connecting layer being connected between the top battery and the bottom battery.

[0030] The top battery is one of a perovskite battery, a cadmium telluride solar cell, a copper indium gallium selenide solar cell, or a gallium arsenide solar cell, and the bottom battery is the solar cell described above.

[0031] Embodiments of the present application provide, in a fourth aspect, a photovoltaic module, which includes a first cover plate, a first adhesive film, a battery string, a second adhesive film, and a second cover plate arranged in layers.

[0032] The battery string includes a plurality of electrically connected solar cells or stacked batteries, the solar cells being the solar cell described above, and the stacked batteries being the stacked battery described above.

[0033] The embodiment of the present application has the beneficial effects that by adjusting the deposition conditions, the doped polysilicon layer has a low crystallization rate on the side close to the substrate, which can effectively block the diffusion of phosphorus atoms, reduce the risk of phosphorus atoms destroying the tunneling oxide layer, thereby reducing the risk of phosphorus atoms penetrating the substrate, thereby facilitating the improvement of the passivation level. At the same time, the doped polysilicon layer prepared away from the substrate has a high crystallization rate and a high phosphorus doping concentration, which is beneficial to metal contact and reduces the risk of metal recombination, thereby facilitating the improvement of the photoelectric conversion efficiency of the solar cell.

[0034] It should be understood that the above general description and the following detailed description are only exemplary and cannot limit the present application. BRIEF DESCRIPTION OF DRAWINGS

[0035] Figure 1 A cross-sectional schematic diagram of a photovoltaic module provided by the present application is shown;

[0036] Figure 2 A cross-sectional schematic diagram of a solar cell provided by the present application is shown;

[0037] Figure 3 A curve diagram showing that the deposition conditions gradually decrease in one embodiment of the solar cell preparation method provided by the present application is shown;

[0038] Figure 4 A curve diagram showing that the deposition conditions gradually decrease in another embodiment of the solar cell preparation method provided by the present application is shown;

[0039] Figure 5 A 3D microscope diagram showing the doped polysilicon layer in the solar cell of Comparative Group 2 is shown;

[0040] Figure 6 A 3D microscope diagram showing the doped polysilicon layer in the solar cell of Example 1 is shown;

[0041] Figure 7 A curve diagram showing the doping concentration content distribution in the doped polysilicon layer in the solar cell of Comparative Group 3 is shown;

[0042] Figure 8 A curve diagram showing the doping concentration content distribution in the doped polysilicon layer in the solar cell of Example 1 is shown.

[0043] REFERENCE SIGNS:

[0044] 100-photovoltaic module;

[0045] 101-first cover plate;

[0046] 102-first adhesive film;

[0047] 103-cell string;

[0048] 104 - second adhesive film;

[0049] 105 - second cover plate;

[0050] 10 - solar cell;

[0051] 11 - substrate;

[0052] 11a - first side;

[0053] 11b - second side;

[0054] 12 - tunnel oxide layer;

[0055] 13 - doped polysilicon layer;

[0056] 14 - backside anti-reflective layer;

[0057] 15 - backside electrode;

[0058] 16 - emitter;

[0059] 17 - passivation layer;

[0060] 18 - frontside anti-reflective layer;

[0061] 19 - frontside electrode.

[0062] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments consistent with the present application and, together with the description, further serve to explain the principles of the application. DETAILED DESCRIPTION

[0063] For a better understanding of the technical solutions of the present application, the embodiments of the present application are described in detail below with reference to the drawings.

[0064] It should be clear that the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of protection of the present application.

[0065] The terms used in the embodiments of the present application are only for the purpose of describing the specific embodiments, and are not intended to limit the present application. The singular forms "a", "an" and "the" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0066] It should be understood that the term "and / or" as used herein merely describes an associated relationship, that is, there can be three relationships, for example, A and / or B, which can represent three cases: A exists alone, A and B exist together, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the front and rear associated objects.

[0067] It should be noted that the terms "upper", "lower", "left", "right", and the like described in the embodiments of the present application are described from the angle shown in the drawings, and should not be understood as a limitation on the embodiments of the present application. In addition, in the context, it should also be understood that when referring to an element connected to another element "on" or "under", it can be directly connected to another element "on" or "under" or indirectly connected to another element "on" or "under" through an intermediate element.

[0068] The embodiments of the present application are in the field of photovoltaic power generation technology, and the photovoltaic module is the core element for converting solar energy into electric energy. Figure 1 The structure of the photovoltaic module 100 is shown in the figure, and the photovoltaic module 100 includes a first cover plate 101, a first adhesive film 102, a cell string 103, a second adhesive film 104, and a second cover plate 105 stacked along the thickness direction Z of the photovoltaic module 100. The first cover plate 101 and the cell string 103 are fixed by the first adhesive film 102, and the second cover plate 105 and the cell string 103 are fixed by the second adhesive film 104.

[0069] Specifically, the first cover plate 101 and / or the second cover plate 105 can be photovoltaic glass with high light transmittance, such as double-coated glass. The first cover plate 101 and the second cover plate 105 are used to protect the internal encapsulation material and the cell string 103 from mechanical damage and external environmental erosion, and have waterproof and moisture-proof ability. In the lamination process of the photovoltaic module 100, the first adhesive film 102 and the second adhesive film 104 are used to encapsulate the cell string 103, prevent the external environment from affecting the performance of the cell string 103, and also bond the first cover plate 101, the cell string 103, and the second cover plate 105 into a whole.

[0070] Among them, the cell string 103 can be one or multiple, if the cell string 103 is multiple, the multiple cell strings 103 can be connected in series or parallel or mixed. Mixed connection means that there are series and parallel connections in the multiple cell strings 103, which can provide higher voltage and capacity. One end of the bus bar is connected to the cell string 103, and the other end is connected to the junction box, so as to lead out the electric energy generated by the photovoltaic module 100 through the junction box and connect it to the external load.

[0071] The material of the first adhesive film 102 and the second adhesive film 104 can be one of Ethylene-Vinyl Acetate Copolymer (EVA), Polyolefin Elastomer (POE), Polyvinyl Butyral (PVB), and the like, and can also be an EPE adhesive film (EVA-POE-EVA co-extrusion structure) or an EP adhesive film (EVA-EP co-extrusion structure).

[0072] It can be understood that other layers can also be arranged between the first cover plate 101 and the first adhesive film 102, between the first adhesive film 102 and the battery string 103, between the battery string 103 and the second adhesive film 104, and between the second adhesive film 104 and the second cover plate 105. The specific number of layers of the photovoltaic module 100 can be set according to actual conditions, and is not limited in the present embodiment.

[0073] In the present embodiment, the photovoltaic module 100 connects the monomer solar cells 10 in series and parallel, and encapsulates and connects the external wires, thereby becoming a solar cell 10 module that can be used independently as a photovoltaic power supply. The photovoltaic module 100 absorbs sunlight, converts solar radiation energy into electrical energy output through the photovoltaic effect, and meets the needs of users.

[0074] Figure 2 The cross-sectional view of the solar cell is shown in FIG. 1C. Along the thickness direction Z of the solar cell 10, the substrate 11 has a first surface 11a and a second surface 11b arranged oppositely.

[0075] In some embodiments, the material of the substrate 11 can be an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, for example, silicon. The elemental semiconductor material can be in a single crystal state, a polycrystalline state, an amorphous state, or a microcrystalline state (a state having both single crystal and amorphous states, which is a microcrystalline state), for example, silicon can be at least one of single crystal silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

[0076] In some embodiments, the substrate 11 can be an N-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type element, which can be at least one of a group V element such as phosphorus (P) element, bismuth (Bi) element, antimony (Sb) element, or arsenic (As) element.

[0077] In some embodiments, the first surface 11a of the substrate 11 can be a back surface, and the second surface 11b can be a front surface. When the solar cell 10 is a single-sided cell, the second surface 11b can be a light-receiving surface for receiving incident light, and the first surface 11a can be a back surface. When the solar cell 10 is a double-sided cell, both the first surface 11a and the second surface 11b of the substrate 11 can be light-receiving surfaces for receiving incident light. In this case, the first surface 11a can also receive incident light, but the efficiency of receiving incident light is lower than that of the second surface 11b.

[0078] The second surface 11b has a textured structure, which is a regular-shaped pyramidal textured structure. The inclined surface of the textured structure can increase the internal reflection of incident light, thereby improving the absorption and utilization of incident light by the substrate 11, and further improving the cell efficiency of the solar cell 10.

[0079] The first surface 11a of the substrate 11 is sequentially formed with a tunneling oxide layer 12, a doped polysilicon layer 13, a back surface anti-reflection layer 14, and a back surface electrode 15. The second surface 11b of the substrate 11 is sequentially formed with an emitter 16, a passivation layer 17, a front surface anti-reflection layer 18, and a front surface electrode 19.

[0080] The tunneling oxide layer 12 and the doped polysilicon layer 13 of the first surface 11a of the substrate 11 form a passivation contact structure. The passivation contact structure can avoid direct contact between the substrate 11 and the back surface electrode 15. The passivation contact structure can selectively allow majority carriers to pass through the back surface and block minority carriers, thereby reducing the risk of back surface recombination. As a result, the solar cell 10 can maintain a high open-circuit voltage while achieving a higher short-circuit current density and a fill factor, thereby improving the efficiency of the solar cell 10.

[0081] As the crystallization rate and the doping concentration of the doped polysilicon layer 13 increase, the passivation level and the fill factor of the solar cell 10 can be further improved, thereby improving the photoelectric conversion efficiency of the solar cell 10.

[0082] However, directly increasing the crystallization rate of the doped polysilicon layer 13 can easily cause a doping explosion phenomenon. Directly increasing the doping concentration can cause serious diffusion of the doping element, which affects the passivation effect and the cell conversion efficiency.

[0083] It should be noted that the crystallization rate refers to the volume fraction of crystal grains in the doped polysilicon layer 13, and the crystallization rate reflects the proportion of crystalline and non-crystalline states in the film layer. Increasing the crystallization rate can improve the carrier mobility and reduce crystal defects. Increasing the doping concentration can reduce the contact resistance of the metal electrode, thereby improving the open-circuit voltage and the fill factor of the solar cell 10, and improving the photoelectric conversion efficiency of the solar cell 10. The crystallization rate of the doped polysilicon layer 13 can be tested by Raman spectroscopy.

[0084] Therefore, the application provides a preparation method of a solar cell 10. By optimizing a polysilicon deposition process and a doping element diffusion process, the crystallization rate and the doping concentration are improved, the internal diffusion depth is reduced, the problem of film explosion is solved, and the fill factor and the photoelectric conversion efficiency of the solar cell 10 are improved.

[0085] Specifically, the preparation method of the solar cell 10 can include the following steps.

[0086] S1: Texturing the first surface 11a and the second surface 11b of the substrate 11 to form a first tower base on the first surface 11a and a second tower base on the second surface 11b, reduce the reflectivity of the first surface 11a and the second surface 11b, and remove mechanical damage of the first surface 11a and the second surface 11b of the substrate 11.

[0087] It can be understood that the first surface 11a of the substrate 11 is a back light surface, and the second surface of the substrate 11 is a light receiving surface. The second surface 11b of the substrate 11 can also be textured alone. Figure 2 The second surface of the substrate is taken as an example for description.

[0088] S2: Boron diffusion is performed on the substrate 11 to form a PN junction to realize conversion of light energy into electrical energy.

[0089] S3: Alkali polishing treatment is performed to remove the excessive PN junction on the first surface 11a to avoid short circuit of the diffusion layer formed around the first surface 11a.

[0090] S4: SiO2 is continuously deposited on the first surface 11a to form a tunneling oxide layer 12 to provide good interface passivation.

[0091] S5: Polysilicon is deposited on the surface of the tunneling oxide layer 12 in the thickness direction Z under a first deposition condition, and the first deposition condition is gradually reduced to a second deposition condition to form a polysilicon layer. The crystallization rate of the polysilicon layer gradually decreases in the direction close to the substrate 11.

[0092] S6: Phosphorus diffusion doping is performed on the polysilicon layer under a first doping condition to convert the polysilicon layer into a doped polysilicon layer 13.

[0093] S7: Al2O3 electrode is deposited on the emitter 16 of the second surface 11b to form a passivation layer 17.

[0094] S8: SiNx is deposited on the passivation layer 17 to form a front anti-reflection layer 18. By using the thin film interference principle, the reflection of light is reduced, the surface light reflection of the first surface 11a is reduced, and the conversion efficiency of the solar cell 10 is improved.

[0095] S9: SiNx is deposited on the doped polysilicon layer 13 to form a back anti-reflection layer 14.

[0096] S10: Screen printing and sintering are performed on the back surface anti-reflection layer 14 to form the back surface electrode 15. Screen printing and sintering are performed on the front surface anti-reflection layer 18 to form the front surface electrode 19. The front surface electrode 19 and the back surface electrode 15 can collect the current generated by the solar cell 10 due to the light irradiation in the PN junction and transmit it to the external load.

[0097] In other embodiments, other preparation procedures can also be used to prepare the solar cell 10, which are not limited in the present embodiment.

[0098] In step S5, a low pressure chemical vapor deposition (LPCVD) process can be used to deposit the polysilicon to form a polysilicon layer on the surface of the tunnel oxide layer 12.

[0099] It can be understood that a higher deposition temperature can prepare a polysilicon layer with a lower crystallization rate, and a larger silane flow and deposition pressure can increase the formation rate of the polysilicon layer, and the prepared polysilicon layer has a lower crystallization rate. That is, during the deposition of the polysilicon layer in step S5, the deposition conditions are gradually reduced, and a polysilicon layer with a gradually changing crystallization rate can be formed. That is, the crystallization rate of the polysilicon layer away from the substrate 11 is higher than that close to the substrate 11.

[0100] In the phosphorus diffusion process in step S6, due to the higher crystallization rate of the polysilicon layer away from the substrate 11 than that close to the substrate 11, the phosphorus atoms have a faster diffusion speed in the high-crystallization-rate side of the polysilicon layer, and the diffusion speed of the phosphorus atoms in the low-crystallization-rate side of the polysilicon layer is slower, so that the polysilicon layer forms a doped polysilicon layer 13 with a gradually changing doping concentration after phosphorus diffusion. That is, the doping concentration of the doped polysilicon layer away from the substrate 11 is higher than that close to the substrate 11.

[0101] In the present embodiment, by adjusting the deposition conditions, the side of the doped polysilicon layer 13 close to the substrate 11 has a low crystallization rate, which can effectively block the diffusion of phosphorus atoms, reduce the doping concentration of the tunnel oxide layer 12, and reduce the risk of phosphorus atoms damaging the tunnel oxide layer 12, thereby reducing the risk of phosphorus atoms diffusing through the substrate 11, thereby facilitating the improvement of the passivation level. At the same time, the side of the prepared doped polysilicon layer 13 away from the substrate 11 has a high crystallization rate, has a higher phosphorus doping concentration, is conducive to metal contact, and reduces the risk of metal recombination, thereby facilitating the improvement of the photoelectric conversion efficiency of the solar cell 10.

[0102] It should be noted that metal contact refers to a TOPCon (Tunnel Oxide Passivated Contact)

[0103] In the battery preparation process, the connection between the metal electrode and the semiconductor material, the metal recombination refers to the recombination of electrons and holes occurring at the contact interface between the metal electrode and the semiconductor material and the related area during the battery working process.

[0104] In some embodiments, in the solar cell 10 prepared according to the preparation method of the present embodiment, the crystallization rate of the doped polysilicon layer 13 on the side away from the substrate 11 is 90%-95%. The crystallization rate of the doped polysilicon layer 13 on the side close to the substrate 11 is 85%-90%.

[0105] Exemplarily, the crystallization rate of the doped polysilicon layer 13 on the side away from the substrate 11 can be 91%, 92%, 93%, 93%, 94%, 95%, etc. The crystallization rate of the doped polysilicon layer 13 on the side close to the substrate 11 can be 85%, 86%, 87%, 88%, 89%, 90%, etc.

[0106] In some embodiments, in the solar cell 10 prepared according to the preparation method of the present embodiment, the doping concentration of the doped polysilicon layer 13 on the side away from the substrate 11 is 3×10 20 atom / cm 3 -5×10 20 atom / cm 3 . The doping concentration of the doped polysilicon layer 13 on the side close to the substrate 11 is 1×10 20 atom / cm 3 -2×10 20 atom / cm 3 .

[0107] Exemplarily, the doping concentration of the doped polysilicon layer 13 on the side away from the substrate 11 can be 3×10 20 atom / cm 3 , 4×10 20 atom / cm 3 , 5×10 20 atom / cm 3 , etc. The doping concentration of the doped polysilicon layer 13 on the side close to the substrate 11 can be 1×10 20 atom / cm 3 , 2×10 20 atom / cm 3 , etc.

[0108] In some embodiments, in step S5, in the first deposition condition, the deposition temperature can be 580-630℃, the silane flow rate can be 1000-1800sccm, and the deposition pressure can be 300-400mTorr. In the second deposition condition, the deposition temperature can be 530-580℃, the silane flow rate can be 600-1000sccm, and the deposition pressure can be 200-300mTorr.

[0109] Exemplarily, in the first deposition condition, the deposition temperature can be 580℃, 585℃, 590℃, 595℃, 600℃, 605℃, 610℃, 615℃, 620℃, 625℃, 630℃. It can be set according to actual conditions, which is not limited in the embodiment.

[0110] In the first deposition condition, the silane flow rate can be 1000sccm, 1100sccm, 1200sccm, 1300sccm, 1400sccm, 1500sccm, 1600sccm, 1700sccm, 1800sccm. It can be set according to actual conditions, which is not limited in the embodiment.

[0111] In the first deposition condition, the deposition pressure can be 300mTorr, 310mTorr, 320mTorr, 330mTorr, 340mTorr, 350mTorr, 360mTorr, 370mTorr, 380mTorr, 390mTorr, 400mTorr. It can be set according to actual conditions, which is not limited in the embodiment.

[0112] In the second deposition condition, the deposition temperature can be 530℃, 540℃, 550℃, 560℃, 570℃, 580℃. It can be set according to actual conditions, which is not limited in the embodiment.

[0113] In the second deposition condition, the silane flow rate can be 600sccm, 700sccm, 800sccm, 900sccm, 1000sccm. It can be set according to actual conditions, which is not limited in the embodiment.

[0114] In the second deposition condition, the deposition pressure can be 200mTorr, 210mTorr, 220mTorr, 230mTorr, 240mTorr, 250mTorr, 260mTorr, 270mTorr, 280mTorr, 290mTorr, 300mTorr. It can be set according to actual conditions, which is not limited in the embodiment.

[0115] In this embodiment, the first deposition condition and the second deposition condition are in a low pressure environment, which helps to reduce the by-products of gas phase reaction and optimize the grain structure in the polysilicon layer.

[0116] In this embodiment, by gradually reducing the deposition temperature from 580°C-630°C to 530°C-580°C, gradually reducing the silane flow from 1000sccm-1800sccm to 600sccm-1000sccm, and gradually reducing the deposition pressure from 300mTorr-400mTorr to 200mTorr-300mTorr when depositing the polysilicon layer, a polysilicon layer with a gradually changing crystallization rate is formed on the surface of the tunneling oxide layer 12, so that a doped polysilicon layer 13 with a gradually changing doping concentration can be formed during phosphorus diffusion. That is, in the direction close to the substrate 11, the crystallization rate of the doped polysilicon layer 13 gradually decreases, and the doping concentration of the doped polysilicon layer 13 gradually decreases, so as to reduce the doped polysilicon layer 13.

[0117] The risk of damaging the tunneling oxide layer 12 is reduced, while the metal contact between the back electrode 15 and the doped polysilicon layer 13 is facilitated, the internal defects of the crystal are reduced, the carrier lifetime is improved, and the performance of the solar cell 10 is improved.

[0118] In some embodiments, the deposition conditions gradually decrease from the start of deposition (i.e., from the first deposition condition) to the end of deposition (i.e., to the second deposition condition). The first deposition condition can be linearly decreased to the second deposition condition.

[0119] Exemplarily, with reference to Figure 3 , Figure 3 A curve graph showing the gradual changes of the deposition temperature, the silane flow and the deposition pressure in an embodiment, wherein the change lines of the deposition temperature, the silane flow and the deposition pressure are linear changes. In the graph, the total deposition time is 1400s when depositing the polysilicon on the surface of the tunneling oxide layer 12, the deposition temperature is linearly decreased from 610°C to 570°C, the silane flow is linearly decreased from 1500sccm to 1000sccm, and the deposition pressure is linearly decreased from 350mTorr to 280mTorr.

[0120] Figure 4A graph in which the deposition temperature, the silane flow rate, and the deposition pressure are gradually changed in another embodiment, in which the change lines of the deposition temperature, the silane flow rate, and the deposition pressure are all linear changes. The graph shows that when the polycrystalline silicon is deposited on the surface of the tunneling oxide layer 12, the total deposition time is 1520s, the deposition temperature is linearly gradually reduced from 600℃ to 560℃, the silane flow rate is linearly gradually reduced from 1600sccm to 1000sccm, and the deposition pressure is linearly gradually reduced from 330mTorr to 300mTorr.

[0121] Alternatively, in other embodiments, the total deposition time, the starting temperature and the ending temperature of the deposition temperature, the starting flow rate and the ending flow rate of the silane flow rate, and the starting pressure and the ending pressure of the deposition pressure can also be set to other values, which can be set according to actual conditions, and the embodiments are not limited herein.

[0122] Alternatively, in other embodiments, the deposition temperature, the silane flow rate, and the deposition pressure can be gradually changed in a curve. The specific setting can be set according to actual conditions, and the embodiments are not limited herein.

[0123] In some embodiments, in step S6, the preparation method can further include phosphorus diffusion of the polycrystalline silicon layer with phosphorus trichloride as a phosphorus source, and the phosphorus trichloride is carried by nitrogen. Alternatively, in other embodiments, the phosphorus trichloride can also be carried by other gases, which can be set according to actual conditions, and the embodiments are not limited herein.

[0124] In some embodiments, in the first doping condition, the diffusion temperature is 800℃-850℃, the diffusion time is 15min-30min, and the nitrogen flow rate is 1200sccm-1800sccm.

[0125] For example, in the first doping condition, the diffusion temperature can be 800℃, 810℃, 820℃, 830℃, 840℃, 850℃, etc. The specific setting can be set according to actual conditions, and the embodiments are not limited herein.

[0126] In the first doping condition, the diffusion time can be 15min, 16min, 17min, 18min, 19min, 20min, 21min, 22min, 23min, 24min, 25min, 26min, 27min, 28min, 29min, 30min, etc. The specific setting can be set according to actual conditions, and the embodiments are not limited herein.

[0127] In the first doping condition, the nitrogen flow rate can be 1200sccm, 1300sccm, 1400sccm, 1500sccm, 1600sccm, 1700sccm, 1800sccm, etc. The specific setting can be set according to actual conditions, and the embodiments are not limited herein.

[0128] In this embodiment, the nitrogen flow is set to 1200-1800sccm, and by increasing the nitrogen flow, the amount of phosphorus diffusion source is increased, which is conducive to the sufficient diffusion of the phosphorus source, thereby improving the overall doping concentration of the doped polysilicon layer 13.

[0129] In some embodiments, after the step of phosphorus diffusion doping of the polysilicon layer under the first doping condition in step S6, the preparation method further comprises: increasing the diffusion temperature to 880-930°C and the diffusion time to 30-50min. That is, after the phosphorus diffusion doping of the polysilicon layer under the first doping condition, high temperature promotion is used with a temperature of 880-930°C and a promotion time of 30-50min.

[0130] Illustratively, the high temperature promotion temperature can be 880°C, 890°C, 900°C, 910°C, 920°C, 930°C. The high temperature promotion time can be 30min, 32min, 34min, 36min, 38min, 40min, 42min, 44min, 46min, 48min, 50min, etc., which can be set according to actual conditions, and this embodiment does not limit it.

[0131] In this embodiment, by setting the high temperature promotion temperature to 880-930°C, the diffusion speed of the doping element inward is increased, so that the overall doping concentration of the doped polysilicon layer 13 is increased. The phosphorus doping forms a substitutional defect, which allows the gas in the polysilicon layer to be released from the defect, can destroy the continuity of the polysilicon layer, release the stress of the polysilicon layer, inhibit the film explosion, increase the doping concentration to a certain extent, form a better contact, reduce the contact resistance, and improve the cell conversion efficiency.

[0132] In summary, in this embodiment, by gradually reducing the deposition temperature, silane flow and deposition pressure during deposition, the polysilicon layer forms fewer thin film nuclei, and the subsequent phosphorus expansion has more space for grain growth. At this time, the crystal nucleus and grain of the polysilicon layer have a gradient change, and the number of crystal nucleus and grain near the substrate 11 is small (i.e. the crystallization rate of the polysilicon layer gradually decreases along the direction close to the substrate 11). Increasing the phosphorus expansion concentration and the promotion temperature can increase the size of the grains, but the number of grains changes little, thereby improving the overall crystallization rate and doping concentration of the doped polysilicon layer 13, forming a better contact, and improving the conversion efficiency.

[0133] The embodiment of the present application also provides a solar cell 10 prepared by the preparation method. The solar cell 10 comprises a substrate 11, a tunneling oxide layer 12 and a doped polysilicon layer 13. The substrate 11 has a first surface 11a. The tunneling oxide layer 12 is arranged on the first surface 11a, and the doped polysilicon layer 13 is arranged on a side of the tunneling oxide layer 12 away from the first surface 11a. In a direction close to the substrate 11, the crystallization rate of the doped polysilicon layer 13 gradually decreases, and the doping concentration of the doped polysilicon layer 13 gradually decreases.

[0134] In the embodiment, the preparation method is used to form the doped polysilicon layer 13 with a gradually changing crystallization rate and a gradually changing doping concentration, so that the doping concentration of the side of the doped polysilicon layer 13 close to the substrate 11 is less than the doping concentration of the side of the doped polysilicon layer 13 away from the substrate 11, the risk of phosphorus element diffusion into the crystalline silicon substrate 11 is reduced, the risk of metal recombination is reduced, and thus the photoelectric conversion efficiency of the solar cell 10 is improved.

[0135] In some embodiments, the crystallization rate of the side of the doped polysilicon layer 13 away from the substrate 11 is 90%-95%. The crystallization rate of the side of the doped polysilicon layer 13 close to the substrate 11 is 85%-90%.

[0136] For example, the crystallization rate of the side of the doped polysilicon layer 13 away from the substrate 11 can be 91%, 92%, 93%, 93%, 94%, or 95%. The crystallization rate of the side of the doped polysilicon layer 13 close to the substrate 11 can be 85%, 86%, 87%, 88%, 89%, or 90%.

[0137] In some embodiments, the doping concentration of the side of the doped polysilicon layer 13 away from the substrate 11 in the solar cell 10 prepared by the preparation method is 3×10 20 atom / cm 3 -5×10 20 atom / cm 3 . The doping concentration of the side of the doped polysilicon layer 13 close to the substrate 11 is 1×10 20 atom / cm 3 -2×10 20 atom / cm 3 .

[0138] For example, the doping concentration of the side of the doped polysilicon layer 13 away from the substrate 11 can be 3×10 20 atom / cm 3 , 4×10 20 atom / cm 3 , 5×10 20 atom / cm 3etc. The doping concentration of the doped polysilicon layer 13 on the side close to the substrate 11 can be 1 x 1019atom / cm3, 2 x 1019atom / cm3, etc. 20 atom / cm3 3 , 2 x 1019atom / cm3 20 atom / cm3 3 , etc.

[0139] In some embodiments, the doping concentration of the tunneling oxide layer 12 in the solar cell 10 prepared according to the preparation method of the present embodiment is 1 x 1019atom / cm3 19 atom / cm3 3 - 2 x 1019atom / cm3 19 atom / cm3 3 .

[0140] Exemplarily, the doping concentration of the tunneling oxide layer 12 can be 1 x 1019atom / cm3 19 atom / cm3 3 , 2 x 1019atom / cm3 19 atom / cm3 3 , etc.

[0141] At present, the doping concentration of the tunneling oxide layer 12 in the solar cell prepared by using the conventional preparation method is generally 2 x 1019atom / cm3 19 atom / cm3 3 - 3 x 1019atom / cm3 19 atom / cm3 3 . In the present embodiment, by adjusting the deposition conditions, the side of the doped polysilicon layer 13 close to the substrate 11 has a low crystallization rate, which can effectively block the diffusion of phosphorus atoms to the tunneling oxide layer 12, thereby reducing the doping concentration of the tunneling oxide layer 12. Thus, the doping concentration of the tunneling oxide layer 12 in the solar cell 10 prepared by using the preparation method of the present embodiment is 1 x 1019atom / cm3 19 atom / cm3 3 - 2 x 1019atom / cm3 19 atom / cm3 3 . In addition, by reducing the doping concentration of the tunneling oxide layer 12, the risk of phosphorus atoms diffusing through the substrate 11 is reduced, thereby facilitating the improvement of the passivation level. In some embodiments, the thickness of the doped polysilicon layer 13 is 85 nm-170 nm.

[0142] Exemplarily, the thickness of the doped polysilicon layer 13 can be 85 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, etc. The thickness can be set according to actual conditions, which is not limited in the present embodiment.

[0143] In this embodiment, the thickness of the doped polysilicon layer 13 is set to 85-170 nm, so that the thickness of the doped polysilicon layer 13 is moderate, the risk of parasitic absorption is reduced, the risk of energy loss is reduced, and the photoelectric efficiency is improved.

[0144] Table 1 below is a comparison of some performance data of the solar cell 10 prepared by the preparation method provided in this embodiment and the solar cell 10 prepared by a conventional preparation method. Among them, 3 groups of comparative groups of solar cells 10 prepared by a conventional preparation method are set, and 2 groups of examples of solar cells 10 prepared by the preparation method of this embodiment. It should be noted that the deposition process and diffusion process in the preparation process of the comparative group and the example are different, and the remaining process steps are the same, which will not be described herein again.

[0145] In the preparation process of the comparative group 1, when depositing polysilicon, the deposition time is 1500s, the deposition temperature is 600℃, the silane flow rate is 1400sccm, and the deposition pressure is 300 mTorr. When phosphorus is expanded, the diffusion temperature is 800℃, the diffusion time is 20min, the nitrogen flow rate is 1400sccm, the high-temperature propulsion temperature is 880℃, and the high-temperature propulsion time is 30min.

[0146] In the preparation process of the comparative group 2, when depositing polysilicon, the deposition time is 1500s, the deposition temperature is 580℃, the silane flow rate is 1200sccm, and the deposition pressure is 300 mTorr. When phosphorus is expanded, the diffusion temperature is 800℃, the diffusion time is 20min, the nitrogen flow rate is 1400sccm, the high-temperature propulsion temperature is 880℃, and the high-temperature propulsion time is 30min.

[0147] In the preparation process of the comparative group 3, when depositing polysilicon, the deposition time is 1500s, the deposition temperature is 580℃, the silane flow rate is 1200sccm, and the deposition pressure is 300 mTorr. When phosphorus is expanded, the diffusion temperature is 800℃, the diffusion time is 20min, the nitrogen flow rate is 1400sccm, the high-temperature propulsion temperature is 920℃, and the high-temperature propulsion time is 30min.

[0148] In the preparation process of the comparative group 3, when depositing polysilicon, the deposition time is 1500s, the deposition temperature is 580℃, the silane flow rate is 1200sccm, and the deposition pressure is 300 mTorr. When phosphorus is expanded, the diffusion temperature is 800℃, the diffusion time is 20min, the nitrogen flow rate is 1400sccm, the high-temperature propulsion temperature is 920℃, and the high-temperature propulsion time is 30min.

[0149] In the preparation process of Example 2, the deposition time was 1520 s, the deposition temperature was gradually reduced from 600 °C to 560 °C, the silane flow was gradually reduced from 1600 seem to 1000 seem, and the deposition pressure was gradually reduced from 330 mTorr to 300 mTorr during the deposition of polysilicon. The diffusion temperature was 800 °C, the diffusion time was 20 min, the nitrogen flow was 1500 seem, and the high-temperature propulsion temperature was 915 °C, and the high-temperature propulsion time was 30 min during the phosphorus diffusion.

[0150] Table 1

[0151]

[0152] As shown in Table 1, the crystallization rate of the solar cell 10 in Comparative Group 1 was 90%, the doping concentration of the doped polysilicon layer 13 was 3.1 x 10 20 atom / cm 3 , the conversion rate was 26.40%, the open circuit voltage was 0.7416V, the short circuit current was 14.147A, the fill factor was 84.25%, and the series resistance was 0.00081Ω.

[0153] The crystallization rate of the solar cell 10 in Comparative Group 2 was 93%, the doping concentration of the doped polysilicon layer 13 was 3.0 x 10 20 atom / cm 3 , the conversion rate was 26.31%, the open circuit voltage was 0.7420V, the short circuit current was 14.139A, the fill factor was 83.98%, and the series resistance was 0.00088Ω.

[0154] The crystallization rate of the solar cell 10 in Comparative Group 3 was 90%, the doping concentration of the doped polysilicon layer 13 was 3.9 x 10 20 atom / cm 3 , the conversion rate was 26.13%, the open circuit voltage was 0.7398V, the short circuit current was 14.132A, the fill factor was 84.69%, and the series resistance was 0.00121Ω.

[0155] The crystallization rate of the solar cell 10 in Example 1 was 93%, the doping concentration of the doped polysilicon layer 13 was 3.8 x 10 20 atom / cm 3 , the conversion rate was 26.45%, the open circuit voltage was 0.7421V, the short circuit current was 14.136A, the fill factor was 84.41%, and the series resistance was 0.00077Ω.

[0156] The crystallization rate of the solar cell 10 in Example 2 was 94%, the doping concentration of the doped polysilicon layer 13 was 3.9 x 10 20 atom / cm 3The conversion rate is 26.47%, the open circuit voltage is 0.7425V, the short circuit current is 14.133A, the fill factor is 84.46%, and the series resistance is 0.00075Ω.

[0157] Therefore, as can be seen from Table 1, the crystallization rate, conversion rate, open circuit voltage, fill factor and series resistance of the solar cell 10 of Example 1 are all superior to those of Comparative Group 1, Comparative Group 2 and Comparative Group 3. The crystallization rate, doping concentration, conversion rate, open circuit voltage, fill factor and series resistance of the solar cell 10 of Example 2 are all superior to those of Comparative Group 1, Comparative Group 2 and Comparative Group 3. Therefore, the performance of the solar cell 10 prepared by the preparation method provided in the present embodiment is superior to that of the solar cell 10 prepared by the conventional preparation method of Comparative Group 1, Comparative Group 2 and Comparative Group 3.

[0158] In addition, Figure 5 The 3D microscope image of the doped polysilicon layer 13 in the solar cell 10 of Comparative Group 2 is shown in the graph. The deposition temperature of Comparative Group 2 is adjusted to 580°C compared with Comparative Group 1, and the silane flow value is 1200sccm, forming a solar cell 10 with a higher crystallization rate. It is found that Comparative Group 2 has a more serious film explosion phenomenon, which affects the fill factor, and the conversion rate of Comparative Group 2 is reduced by 0.09% compared with Comparative Group 1.

[0159] Figure 6 The 3D microscope image of the doped polysilicon layer 13 in the solar cell 10 of Example 1 is shown in the graph. The graph shows that Example 1 has a high crystallization rate and a high doping concentration away from the substrate 11, and the doped polysilicon layer 13 does not have a film explosion phenomenon. The open circuit voltage and fill factor of Example 1 are superior to those of Comparative Group 1, and the conversion rate of Example 1 is improved by 0.05% compared with Comparative Group 1.

[0160] Figure 7 The graph showing the doping concentration distribution in Comparative Group 3 is shown in the graph. Comparative Group 3 adjusts the phosphorus extension high temperature to 920°C, and obtains a doped polysilicon layer 13 with a higher doping concentration, but the conversion rate is reduced by 0.27% compared with Comparative Group 1, and Figure 7 The ECV test in Example 1 shows that the extension phenomenon occurs.

[0161] Figure 8 The graph showing the doping concentration distribution in Example 1 is shown in the graph. The graph shows that the doped polysilicon layer 13 forms a gradient structure with a low doping concentration close to the substrate 11 and a high doping concentration away from the substrate 11, and does not have an extension phenomenon.

[0162] Therefore, the preparation method of the present embodiment adjusts the polysilicon deposition process and the phosphorus extension process, which improves the crystallization rate and the doping concentration as a whole, reduces the internal extension depth, solves the film explosion problem, and improves the fill factor and the cell efficiency.

[0163] The embodiment of the present application further provides a laminated battery, which comprises a top battery, an intermediate connecting layer and a bottom battery, and the intermediate connecting layer is connected between the bottom battery and the top battery. The top battery is one of a perovskite battery, a cadmium telluride solar cell 10, a copper indium gallium selenide solar cell 10 or a gallium arsenide solar cell 10, and the bottom battery is the solar cell 10.

[0164] For the selection of the intermediate connecting layer, the transparent material with high refractive index is generally selected. The effective intermediate connecting layer needs to have high light transmittance to reduce the reflection and absorption of light at the connecting layer interface, and good electrical conductivity to reduce the influence of series resistance on the performance of the device. Exemplarily, a transparent conductive metal oxide film (ITO) can be used as the intermediate connecting layer.

[0165] The above merely provides the preferred embodiments of the present application but is not intended to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for preparing a solar cell, characterized in that, The preparation method includes: A tunneling oxide layer (12) is prepared on the first surface (11a) of the substrate (11). Polycrystalline silicon is deposited on the surface of the tunneling oxide layer (12) along the thickness direction (Z) under a first deposition condition, and the first deposition condition is gradually reduced to a second deposition condition; The polycrystalline silicon layer is subjected to phosphorus diffusion doping under a first doping condition to transform the polycrystalline silicon layer into a doped polycrystalline silicon layer (13), wherein the diffusion temperature is 800℃-850℃ and the diffusion time is 15min-30min. After the step of performing phosphorus diffusion doping on the polycrystalline silicon layer under the first doping condition, the preparation method further includes: The diffusion temperature was increased to 880℃-930℃, and the diffusion time was 30min-50min.

2. The method for preparing a solar cell according to claim 1, characterized in that, The first deposition conditions decrease linearly to the second deposition conditions.

3. The method for preparing a solar cell according to claim 1, characterized in that, In the first deposition conditions, the deposition temperature is 580℃-630℃, the silane flow rate is 1000sccm-1800sccm, and the deposition pressure is 300mTorr-400mTorr; In the second deposition conditions, the deposition temperature is 530℃-580℃, the silane flow rate is 600sccm-1000sccm, and the deposition pressure is 200mTorr-300mTorr; When polycrystalline silicon is deposited on the surface of the tunneling oxide layer (12) along the thickness direction (Z), the deposition time from the first deposition condition to the second deposition condition is 850s-1700s.

4. The method for preparing a solar cell according to claim 1, characterized in that, In the step of performing phosphorus diffusion doping on the polycrystalline silicon layer under the first doping condition, the preparation method further includes: The polycrystalline silicon layer is subjected to phosphorus diffusion using phosphorus oxychloride as the phosphorus source, and the phosphorus oxychloride is carried by nitrogen gas.

5. The method for preparing a solar cell according to claim 1, characterized in that, In the first doping condition, the nitrogen flow rate is 1200 sccm-1800 sccm.

6. A solar cell, said solar cell (10) being manufactured using the solar cell (10) preparation method according to any one of claims 1 to 5, characterized in that, The solar cell (10) includes: A substrate (11) having a first surface (11a); A tunneling oxide layer (12) is disposed on the first surface (11a). A doped polysilicon layer (13) is disposed on the side of the tunneling oxide layer (12) away from the first surface (11a). The crystallinity of the doped polysilicon layer (13) on the side away from the substrate (11) is greater than that on the side closer to the substrate (11). The doping concentration of the doped polysilicon layer (13) on the side away from the substrate (11) is greater than that on the side closer to the substrate (11).

7. The solar cell according to claim 6, characterized in that, The doping concentration of the doped polycrystalline silicon layer (13) on the side away from the substrate (11) is 3 × 10⁻⁶. 20 atom / cm 3 -5×10 20 atom / cm 3 .

8. The solar cell according to claim 6, characterized in that, The doping concentration of the doped polycrystalline silicon layer (13) on the side closest to the substrate (11) is 1×10⁻⁶. 20 atom / cm 3 -2×10 20 atom / cm 3 .

9. The solar cell according to claim 6, characterized in that, The crystallinity of the doped polycrystalline silicon layer (13) on the side away from the substrate (11) is 90%-95%.

10. The solar cell according to claim 6, characterized in that, The crystallinity of the doped polycrystalline silicon layer (13) on the side closest to the substrate (11) is 85%-90%.

11. The solar cell according to claim 6, characterized in that, The doping concentration of the tunneling oxide layer (12) is 1×10⁻⁶. 19 atom / cm 3 -2×10 19 atom / cm 3 .

12. The solar cell according to claim 6, characterized in that, The thickness of the doped polycrystalline silicon layer (13) is 85nm-170nm.

13. A stacked battery, characterized in that, The stacked battery includes a top battery, an intermediate connecting layer, and a bottom battery, wherein the intermediate connecting layer connects the top battery and the bottom battery. The top cell is one of a perovskite cell, a cadmium telluride solar cell, a copper indium gallium selenide solar cell, or a gallium arsenide solar cell, and the bottom cell is the solar cell (10) according to any one of claims 6 to 12.

14. A photovoltaic module, characterized in that, The photovoltaic module (100) includes a first cover plate (101), a first encapsulant film (102), a battery string (103), a second encapsulant film (104), and a second cover plate (105) stacked together. The battery string (103) includes a plurality of electrically connected solar cells (10) or tandem cells, wherein the solar cells (10) are the solar cells (10) according to any one of claims 6 to 12, and the tandem cells are the tandem cells according to claim 13.

Images