A high-rejection band switch chip based on electromagnetic coupling cancellation technology
By using electromagnetic coupling cancellation technology, an additional zero is generated in the RF switch using cross-coupled inductors and main coupling capacitors. Combined with transistor resonators to adjust the pole positions, the stopband rejection and isolation of the RF switch are improved, solving the problem of insufficient stopband rejection capability in existing technologies.
Patent Information
- Application Number
- CN202511508953.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-22
- Publication Date
- 2026-02-13
- Estimated Expiration
- 2045-10-22
AI Technical Summary
Existing RF switches are deficient in stopband rejection capability, especially in the low-frequency band.
Electromagnetic coupling cancellation technology is adopted. By introducing cross-coupled inductors and main coupling capacitors, electromagnetic coupling cancellation is achieved, generating additional zeros at low frequencies. The pole positions and passband bandwidth are adjusted by regulating the size of the main coupling capacitors between transistor resonators. Combined with the transistor conduction inductor and series capacitor, isolated transmission zeros are formed.
It achieves RF switch performance with low loss, high stopband rejection and high isolation, improving the switch's stopband rejection capability and isolation.
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Figure CN121000210B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of radio frequency integrated circuit design, in particular to a high-stop-band rejection switch chip based on electromagnetic coupling cancellation technology. BACKGROUND
[0002] With the rapid development of communication technology and integrated circuits, the importance of radio frequency switches in radio frequency front-end systems is increasingly prominent. Realizing a switch chip with low insertion loss, ultra-wideband and high-stop-band rejection has become a key challenge and development direction of current research. According to the differences in circuit structure and working principle, the currently disclosed radio frequency switches have the following types:
[0003] The Chinese patent with application number CN202010281247.0 discloses a wideband single-pole single-throw switch based on a transformer. The switch forms a wideband matching network with a transformer and an off-capacitor, and uses a quarter-wave transmission line for impedance transformation, realizing wideband performance and DC isolation function. However, this structure uses a quarter-wave transmission line, which is large in size and low in integration at the millimeter wave frequency band.
[0004] The Chinese patent with application number CN202110430364.3 discloses a semiconductor radio frequency single-pole single-throw switch based on coupled resonance. The switch realizes wideband matching and miniaturization through multiple resonance units (each consisting of a transistor and a compensation inductor in parallel) and a coupling inductor, is particularly suitable for the millimeter wave frequency band, and removes the quarter-wave transmission line to realize miniaturization. However, the low-frequency stop-band rejection capability of this structure is poor.
[0005] The Chinese patent with application number CN202211471519.9 discloses a miniaturized filter switch. The switch realizes integrated design of filtering and switching functions through two transistors, two magnetically coupled inductors and one capacitor. By electrically and magnetically coupling each other to cancel out at a certain frequency point outside the band, a transmission zero point is formed to suppress interference signals. This structure produces a zero point at low frequency, which is an improvement over the Chinese patent with application number CN202110430364.3, but the rejection degree is still poor.
[0006] In summary, the disclosed radio frequency switches have certain shortcomings in stop-band rejection capability. SUMMARY
[0007] In view of the above problems, the application provides a high-rejection-band suppression switch chip based on electromagnetic coupling cancellation technology, which realizes electromagnetic coupling cancellation through the introduction of cross-coupling inductance and main coupling capacitor, generates additional zero points at low frequencies which can be flexibly controlled, adjusts the pole position and passband bandwidth of the switch by adjusting the size of the main coupling capacitor between the two transistor resonators, and finally generates a new transmission zero point in the isolation state by the resonance of the transistor on inductance and the series capacitor; through these means, low loss, high rejection band suppression and high isolation can be obtained between the loops of the radio frequency port.
[0008] A high-rejection-band suppression switch chip based on electromagnetic coupling cancellation technology, a first radio frequency port, an input matching network, a main coupling capacitor, an output matching network and a second radio frequency port are connected in series; one end of a first transistor resonator is connected to the connection between the input matching network and the main coupling capacitor, and the other end is grounded; one end of a second transistor resonator is connected to the connection between the main coupling capacitor and the output matching network, and the other end is grounded; one end of a cross-coupling inductance is located at the connection between the input port and the input matching network or the connection between the first transistor resonator and the main coupling capacitor; the other end of the cross-coupling inductance is located at the connection between the output port and the output matching network or the connection between the second transistor resonator and the main coupling capacitor.
[0009] The first transistor resonator comprises a first transistor group and a first ground inductance, wherein the first transistor group and the first ground inductance are connected in parallel; the second transistor resonator comprises a second transistor group and a second ground inductance, wherein the second transistor resonator is formed by the parallel connection of the second transistor group and the second ground inductance.
[0010] The first transistor group and the second transistor group are formed by the series connection of n transistors through drain-source, wherein n is an integer satisfying n>=1.
[0011] Preferably, the first transistor resonator and the second transistor resonator each further comprise a series capacitor, which is located at any position of the branch formed by the series connection of the drain and source of the transistors in the first transistor group and the second transistor group; one end of the series capacitor is electrically connected to the main coupling capacitor, and the other end is grounded.
[0012] Preferably, the gate of each transistor in the first transistor group and the second transistor group is connected to a bias voltage through a large resistance in series; the on-off switching of the transistors is realized by controlling the bias voltage; and the bias voltages of all the transistors are the same.
[0013] Preferably, the capacitor used in the circuit is a metal-insulator-metal capacitor, a metal-oxide-metal capacitor, a flat plate capacitor or an interdigital capacitor.
[0014] Preferably, when the transistors in the first transistor group and the second transistor group are in the on state, the input signal is isolated, and the switch is in the off state; when the transistors in the first transistor group and the second transistor group are in the off state, the input signal is transmitted from the input port to the output port, and the switch is in the on state.
[0015] Preferably, the input matching network and the output matching network are in the form of a transmission line, a capacitor, an inductor, or any combination of the three.
[0016] A single-pole double-throw switch includes the high-rejection-band switch chip based on the electromagnetic coupling cancellation technology described above.
[0017] A radio frequency front end includes the high-rejection-band switch chip based on the electromagnetic coupling cancellation technology described above.
[0018] Compared with the prior art, the present application has the following beneficial effects:
[0019] First, the present application first introduces cross-coupling in a radio frequency switch chip to improve the rejection band, wherein the magnetic coupling is not generated by mutual coupling of two inductors, but by cross-coupling inductors. By introducing cross-coupling inductors, electromagnetic coupling cancellation is achieved with main coupling capacitors, additional out-of-band zeros are generated, and the rejection band is improved in the on and off states. The position of the cross-coupling inductor has high freedom, and the number and position of the generated zeros are controlled.
[0020] Second, the transistor resonator of the present application is composed of a transistor group and a grounding inductor in parallel. The off-capacitance of the transistor group resonates with the grounding inductor to form a filter network, generating transmission poles. The main coupling between the two transistor resonators is capacitive coupling. By adjusting the size of the main coupling capacitor, the pole position and passband bandwidth of the switch can be adjusted to achieve wideband performance.
[0021] Third, the present application uses the series resonance formed by the transistor on inductance and the series capacitor to generate an isolation state transmission zero, improving the isolation of the switch. BRIEF DESCRIPTION OF DRAWINGS
[0022] The accompanying drawings are included to provide a further understanding of the present application, and constitute a part of the specification, together with the embodiments of the present application, to explain the present application, and do not constitute a limitation on the present application. In the drawings:
[0023] Figure 1 is a general form circuit structure schematic diagram proposed by the present application;
[0024] Figure 2 is a structure schematic diagram of the switch chip of embodiment 1 of the present application;
[0025] Figure 3 is a structural schematic diagram of a switch chip of the embodiment 2 of the present application;
[0026] Figure 4 is a structural schematic diagram of a switch chip of the embodiment 3 of the present application;
[0027] Figure 5 is the S parameter simulation result of the switch chip of the embodiment 1 of the present application. DETAILED DESCRIPTION
[0028] The technical solutions in the embodiments of the present application will be apparently and completely described below with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the present application.
[0029] A high-rejection band switch chip based on electromagnetic coupling cancellation technology, which has a general form circuit as shown in Figure 1 To make the above-mentioned purposes, features and effects of the present application more obvious and easy to understand, the present application will be further described in detail below with the accompanying drawings and specific embodiments. Figures 2-4
[0030] The structural schematic diagram of the embodiment 1 of the present application is as shown in Figure 2 which comprises a first radio frequency port RF1 (as an input port), a second radio frequency port RF2 (as an output port), a direct current port V DC , an input matching network IMN, an output matching network OMN, a first transistor resonator 2, a second transistor resonator 4, a main coupling capacitor Cs and a cross-coupling inductor Ls. One end of the input matching network IMN is connected with the first radio frequency port RF1, and the other end is connected with one end of the main coupling capacitor Cs. The other end of the main coupling capacitor Cs is connected with one end of the output matching network OMN. The other end of the output matching network OMN is connected with the second radio frequency port RF2.
[0031] The input end of the first transistor resonator 2 is connected with the connection place of the input matching network and the main coupling capacitor, and the other end is grounded. The first transistor resonator 2 comprises a first transistor group 1, a first series capacitor Cz1 and a first ground inductor Lg1. The first transistor group 1 is composed of n transistors (F1~Fn) connected in series through drain-source. The drain of the transistor is connected with n resistors (R1~Rn) connected in series, and the source of the transistor is connected with the first series capacitor Cz1. The first ground inductor Lg1 is connected with the first series capacitor Cz1 and the ground. n n The first series capacitor Cz1 is located at any position in the branch formed by the series connection of the drain and source of the transistors in the transistor group (in this embodiment, Cz1 is located at the end close to ground). The first series capacitor Cz1 is connected to the input terminal of the first transistor resonator 2 at one end of the first transistor group 1 and grounded at the other end. The first grounding inductor Lg1 is connected to the input terminal of the first transistor resonator 2 at one end and grounded at the other end.
[0032] The input terminal of the second transistor resonator 4 is connected to the connection point of the output matching network and the main coupling capacitor, and the other end is grounded. The second transistor resonator 4 includes a second transistor group 3, a second series capacitor Cz2, and a second grounding inductor Lg2. The second transistor group 3 consists of n transistors (F1'~F...). n The transistor is constructed by connecting its drain and source in series, with the drain connected to n resistors (R). 11 ~R nn The second series capacitor Cz2 is located at any position in the branch formed by the series connection of the drain and source of the transistors in the transistor group (in this embodiment, Cz2 is located at the end close to ground). One end of the second series capacitor Cz2 and the second transistor group 3 are connected to the input terminal of the second transistor resonator 4, and the other end is grounded. One end of the second grounding inductor Lg2 is connected to the input terminal of the second transistor resonator 4, and the other end is grounded.
[0033] The transistors in the first and second transistor groups are connected to the DC port V via resistors. DC The connection is achieved by controlling the bias voltage to switch the transistor on and off.
[0034] One end of the cross-coupled inductor Ls is located at the connection between the first RF port RF1 and the input matching network IMN; the other end of the cross-coupled inductor Ls is located at the connection between the main coupling capacitor Cs and the output matching network OMN.
[0035] The simulation results of the S-parameters of the switching chip in Embodiment 1 of the present invention are as follows: Figure 5 As shown, when the switch is in the off state, a transmission zero is generated in the band, improving the switch isolation; when the switch is in the on state, two transmission zeros are generated at low frequencies, improving the switch out-of-band rejection level, and two transmission poles are generated in the band, improving the switch insertion loss.
[0036] The structural schematic diagram of Embodiment 2 of the present invention is shown below. Figure 3 As shown, it includes a first radio frequency port RF1, a second radio frequency port RF2, and a DC port V. DC, input matching network IMN, output matching network OMN, first transistor resonator 2, second transistor resonator 4, main coupling capacitor Cs, cross coupling inductor Ls. The overall structure is similar to that of embodiment 1, the difference is that one end of the cross coupling inductor Ls is located at the connection between the first radio frequency port RF1 and the input matching network IMN; the other end of the cross coupling inductor Ls is located at the connection between the second radio frequency port RF2 and the output matching network OMN.
[0037] In addition, since the first series capacitor Cz1 and the second series capacitor Cz2 can be located at any position of the branch formed by the series connection of the drain and source of the transistor in the transistor group, in embodiment 2, the first series capacitor Cz1 and the second series capacitor Cz2 are located close to the input end of the first transistor resonator 2 and the second transistor resonator 4.
[0038] The structural schematic diagram of embodiment 3 of the application is shown in Figure 4 As shown in the figure, it comprises a first radio frequency port RF1, a second radio frequency port RF2, a direct current port V DC , an input matching network IMN, an output matching network OMN, a first transistor resonator 2, a second transistor resonator 4, a main coupling capacitor Cs, a cross coupling inductor Ls. The overall structure is similar to that of embodiment 1, the difference is that one end of the cross coupling inductor Ls is located at the connection between the main coupling capacitor Cs and the input matching network IMN; the other end of the cross coupling inductor Ls is located at the connection between the main coupling capacitor Cs and the output matching network OMN.
[0039] The capacitor used in the circuit in the application is a metal-insulator-metal capacitor or a metal-oxide-metal capacitor or a flat plate capacitor or an interdigital capacitor. When the transistors in the first transistor group 1 and the second transistor group 3 are in the on state, the input signal is isolated, and the switch is in the off state; when the transistors in the first transistor group 1 and the second transistor group 3 are in the off state, the input signal is transmitted from the input port to the output port, and the switch is in the on state.
[0040] The input matching network IMN and the output matching network OMN are in the form of a transmission line, a capacitor, an inductor or any combination of the above three.
[0041] The high rejection band switch chip based on the electromagnetic coupling cancellation technology designed in the application can obtain low loss, high rejection band and high isolation through resonance between the loops of the first radio frequency port and the second radio frequency port.
[0042] The above merely describes the preferred embodiments of the present application and is not used to limit the present application, and although the present application is described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions recorded in the foregoing embodiments, or equivalently replace some technical features thereof. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A high-resistance band suppression switch chip based on electromagnetic coupling cancellation technology, characterized in that, The system comprises a first RF port, an input matching network, a main coupling capacitor, an output matching network, and a second RF port. One end of the first transistor resonator is connected to the connection between the input matching network and the main coupling capacitor, and the other end is grounded. One end of the second transistor resonator is connected to the connection between the main coupling capacitor and the output matching network, and the other end is grounded. One end of the cross-coupled inductor is located at either the connection between the input port and the input matching network or the connection between the first transistor resonator and the main coupling capacitor. The other end of the cross-coupled inductor is located at: the connection between the output port and the output matching network, or the connection between the second transistor resonator and the main coupling capacitor; The first transistor resonator includes a first transistor group and a first ground inductor, wherein the first transistor group and the first ground inductor are connected in parallel; the second transistor resonator includes a second transistor group and a second ground inductor, wherein the second transistor resonator is composed of the second transistor group and the second ground inductor connected in parallel. The first transistor group and the second transistor group are composed of n transistors connected in series through the drain and source, where n is an integer greater than or equal to 1; The first transistor resonator and the second transistor resonator also each include a series capacitor. The series capacitor is located at any position on the branch formed by the drain and source of the transistors in the first transistor group and the second transistor group. One end of the series capacitor and the transistor group are electrically connected to the main coupling capacitor, and the other end is grounded. The gates of the transistors in the first and second transistor groups are connected to a bias voltage through a series large resistor. The switching of the transistors is achieved by controlling the bias voltage, and all transistors have the same bias voltage.
2. The high-resistance band suppression switch chip based on electromagnetic coupling cancellation technology according to claim 1, characterized in that, The capacitors used in the circuit are metal-insulator-metal capacitors, metal-oxide-metal capacitors, parallel plate capacitors, or interdigital capacitors.
3. A high-resistance band suppression switch chip based on electromagnetic coupling cancellation technology according to claim 1, characterized in that, When the transistors in the first and second transistor groups are in the on state, the input signal is isolated and the switch is in the off state; when the transistors in the first and second transistor groups are in the off state, the input signal is transmitted from the input port to the output port and the switch is in the on state.
4. A high-resistance band suppression switch chip based on electromagnetic coupling cancellation technology according to claim 1, characterized in that, The input matching network and output matching network can be in the form of transmission lines, capacitors, inductors, or any combination of the above three.
5. A single-pole double-throw switch, characterized in that, Includes a high-stopband suppression switch chip based on electromagnetic coupling cancellation technology as described in any one of claims 1-4.
6. A radio frequency front end, characterized in that, Includes a high-stopband suppression switch chip based on electromagnetic coupling cancellation technology as described in any one of claims 1-4.
Citation Information
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