Memristor and preparation method and application thereof
By employing a resistive switching functional layer with an Al2O3/Ti/Al2O3 three-layer composite structure in the memristor, the high-to-low resistance state switching of the memristor is achieved by utilizing the combined effect of oxygen vacancies in the electric field and Joule heating. This solves the stability and power consumption problems of Ti/TaOx memristors, and realizes a memristor design with high durability and low power consumption.
Patent Information
- Application Number
- CN202510936664.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-08
- Publication Date
- 2025-11-21
AI Technical Summary
Existing Ti/TaOx memristors exhibit stability degradation during long-term, high-intensity cyclic operation, and bipolar memristors require bidirectional power supplies, increasing the complexity and power consumption of the drive circuit.
The resistive switching functional layer consists of two Al2O3 layers and one Ti layer. The high and low resistance states of the memristor are achieved through the combined effect of oxygen vacancies in the electric field and Joule heating, requiring only a forward power supply.
This improves the durability and stability of memristors, reduces the complexity and power consumption of external drive circuits, and simplifies circuit design.
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Figure CN121001561A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to memristors, and more particularly to a memristor, its fabrication method, and its applications. Background Technology
[0002] In recent years, with the rapid development of artificial intelligence, neuromorphic computing has attracted much attention due to its potential in processing complex information and low-power intelligence. Artificial synapses, as the core of neuromorphic computing hardware, directly affect the performance of that hardware. Memristors, due to their simple structure, tunability, and ability to simulate the plasticity of biological synapses, have been widely studied as candidate devices for constructing artificial synapses.
[0003] A typical memristor is usually a two-terminal device, constructed by sandwiching a resistive switching functional layer between a top electrode and a bottom electrode. The memristor's operating principle is primarily based on the formation and breakage of conductive filaments within the resistive switching layer. Initially, the memristor is in a high-resistance state. When a preset set voltage is applied to the top electrode, the conductive filaments in the resistive switching layer form, causing the memristor to switch from a high-resistance state to a low-resistance state. Subsequently, if a preset reset voltage is applied to the top electrode, the conductive filaments in the resistive switching layer break, restoring the memristor to a high-resistance state. Because the polarity of the voltages required for the set and reset operations differs, memristors typically operate in two modes: bipolar and unipolar. For bipolar memristors, the set and reset voltages have opposite polarities, and the physical process relies on opposite electric fields to drive the bidirectional migration of ions. For unipolar memristors, both set and reset operations are performed at voltages of the same polarity. Typically, the reset voltage is smaller than the set voltage, but it relies on the Joule heating effect generated by a large, unrestricted current to break the filament. It is precisely this dynamically adjustable resistance state that provides the ideal hardware foundation for simulating artificial synapses in biological nervous systems.
[0004] For example, the Ti / TaO-based patent disclosed in Chinese patent application CN 119486582 A x In the artificial synaptic devices of memristors and their fabrication methods, Ti / TaO x Memristors using Ti / TiO x The double-layer resistive switching structure serves as the resistive switching functional layer. Due to the strong oxygen affinity of Ti material, it is suitable for use in Ti / TaO. x During long-term, high-intensity cyclic operation of a memristor, Ti will continuously decompose from TaO. x Oxygen atoms are drawn from the layer, thereby interacting with TaO. x TiO generated at the contact interface x A stable TiO layer is formed. x Layer, generated TiO xThis obstructs the oxygen vacancy return path, making it difficult for the conductive filaments in the resistive switching functional layer to break, thus making the Ti / TaO... x Memristors struggle to return to a high-resistivity state, leading to decreased stability and reduced overall stability. Additionally, Ti / TaO... x Memristors are bipolar memristors that operate based on the bidirectional migration of oxygen vacancies. The transition between high and low resistance states requires the application of opposite electric fields to their top electrode, which necessitates an external driving circuit to provide bidirectional power, increasing the complexity and power consumption of the driving circuit. Summary of the Invention
[0005] The technical problem to be solved by the present invention is to provide a memristor with high durability and high stability, which can realize the switching between high and low resistance states by only applying a positive power supply to the top electrode, thereby reducing the complexity and power consumption of the external driving circuit and its preparation method.
[0006] The technical solution adopted by the present invention to solve the above-mentioned technical problems is as follows: a memristor, comprising a bottom electrode, a resistive switching functional layer and a top electrode stacked from bottom to top, wherein the resistive switching functional layer is composed of two Al2O3 layers and one Ti layer stacked together, and the Ti layer is disposed between the two Al2O3 layers.
[0007] Compared with the prior art, the advantage of this invention lies in the fact that a resistive switching functional layer is constructed by two Al2O3 layers and one Ti layer. A scanning voltage of 0-1V is applied to the top electrode. When the voltage rises to a preset set voltage, due to the obstruction of the Ti layer and the primary effect of the electric field acting on the upper Al2O3 layer (the Al2O3 layer closest to the top electrode), oxygen vacancies form a high-concentration region at the contact between the upper Al2O3 layer and the Ti layer. Subsequently, these oxygen vacancies migrate towards the bottom electrode under the combined drive of electric field drift and Joule heating-enhanced concentration gradient diffusion, thereby gradually increasing the conductance of the memristor and promoting the initial formation of conductive filaments in the resistive switching functional layer. This causes the memristor to enter a low-resistance state. When the voltage continues to rise... The electric field drives oxygen vacancies to continue drifting downwards, while the accumulation of Joule heat promotes the downward diffusion of oxygen vacancies along the concentration gradient, gradually achieving an equilibrium of oxygen vacancy concentrations between the upper and lower Al2O3 layers (the Al2O3 layer near the bottom electrode). With a significant increase in the local temperature of the conductive filament, the oxygen vacancy diffusion rate accelerates, the conductive filament structure becomes more stable, and the memristor maintains a low-resistance state. As Joule heat continues to accumulate, the local temperature of the conductive filament further increases, significantly accelerating the oxygen vacancy diffusion rate. Driven by the electric field, oxygen vacancies continue to migrate downwards, leading to the formation of new high-concentration oxygen vacancy regions in the lower Al2O3 layer. At this point, the direction of the oxygen vacancy concentration gradient and the direction of oxygen vacancy drift driven by the electric field... Conversely, diffusion and drift compete with each other, increasing the likelihood of the conductive filament breaking. To switch to a high-resistivity state, the scanning voltage is reduced. When the voltage decreases to a preset reset voltage, the electric field strength decreases, weakening oxygen vacancy drift. Diffusion driven by the oxygen vacancy concentration gradient gradually becomes dominant. Previously accumulated Joule heating continues to promote oxygen vacancy diffusion, leading to a large number of oxygen vacancies migrating upwards. This migration exacerbates the instability of the conductive filament, ultimately causing it to break, and the memristor returns to a high-resistivity state. Therefore, this invention only requires applying forward voltages with different parameters to achieve the memristor's resistance state transformation, thereby reducing the complexity and power consumption of its external driving circuit. This invention introduces Al2O... The 3 / Ti / Al2O3 three-layer composite structure serves as the resistive switching layer. The middle Ti layer can supply or recover oxygen vacancies from the Al2O3 layers on both sides according to the resistance state of the memristor, effectively stabilizing the oxygen vacancy concentration of the memristor and giving it better stability and durability. In addition, the Ti layer can optimize the electric field at the interface between the Al2O3 layer and the Ti layer by virtue of its inherent conductivity, creating favorable conditions for more uniform conductive filaments, which reduces the operating voltage of the memristor and further reduces power consumption. Thus, this invention has high durability and high stability, and only requires a positive power supply to the top electrode to achieve the switching between high and low resistance states, thereby reducing the complexity and power consumption of the external driving circuit.
[0008] Furthermore, the Ti layer is adhered between the two Al2O3 layers in the form of a nano-scale thin film.
[0009] Furthermore, the bottom electrode is made of ITO conductive glass or FTO conductive glass.
[0010] Furthermore, the material of the top electrode is Ag.
[0011] Furthermore, the thickness of each Al2O3 layer is 40-70 nm, and the thickness of the Ti layer is 4-7 nm.
[0012] Furthermore, the thickness of the top electrode is 80-120 nm, and the thickness of the bottom electrode is 80-120 nm.
[0013] Furthermore, it is used for heterogeneous synaptic biomimicry of the behavior of the spotted butterfly.
[0014] A method for fabricating a memristor includes the following steps:
[0015] Step 1: The bottom electrode is prepared using ITO conductive glass and pretreated to ensure its cleanliness.
[0016] Step 2: The first Al2O3 layer is generated on the upper surface of the bottom electrode using an evaporation coating method;
[0017] Step 3: A Ti layer is generated on the surface of the first Al2O3 layer using an evaporation deposition method;
[0018] Step 4: A second Al2O3 layer is formed on the upper surface of the Ti layer using an evaporation deposition method;
[0019] Step 5: The top electrode is generated on the surface of the second Al2O3 layer using an evaporation coating method.
[0020] Furthermore, the pretreatment in step 1 is as follows: the bottom electrode is first ultrasonically cleaned with acetone, deionized water and anhydrous ethanol in sequence, and then dried.
[0021] Furthermore, the evaporation coating method in steps 2 and 4 is performed at a vacuum level below 6.6 × 10⁻⁶. -4 The deposition was carried out under Pa conditions, with a deposition rate of [missing value]. The deposition time is 5-15 minutes; the evaporation coating method in step 3 is performed under a vacuum degree lower than 6.6 × 10⁻⁶. -4 The deposition was carried out under Pa conditions, with a deposition rate of [missing value]. The deposition time is 1-7 minutes; the evaporation coating method in step 5 is performed under a vacuum degree lower than 6.6 × 10⁻⁶. -4 The deposition was carried out under Pa conditions, with a deposition rate of [missing value]. The deposition time is 5-15 minutes. Attached Figure Description
[0022] Figure 1 This is a model diagram of the memristor of the present invention;
[0023] Figure 2 The current-voltage characteristic curve of the memristor of the present invention under cyclic voltage scanning from 0V to 1V to -0.5V to 0V is shown.
[0024] Figure 3 The diagram shows the high and low resistance states of the memristor of the present invention under 50 DC cycles under two different sets of positive pulse conditions.
[0025] Figure 4 A schematic diagram of the behavior of the spotted butterfly;
[0026] Figure 5 Experimental results of heterogeneous synaptic biomimetic experiments for the memristor of this invention Figure 1 ;
[0027] Figure 6 Experimental results of heterogeneous synaptic biomimetic experiments for the memristor of this invention Figure 2 . Detailed Implementation
[0028] The present invention provides a memristor, and the memristor of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.
[0029] Example 1: As Figure 1 As shown, a memristor includes a bottom electrode 1, a resistive switching layer, and a top electrode 2 stacked from bottom to top. The resistive switching layer is composed of two Al2O3 layers 3 and 4 and a Ti layer 5 stacked together, with the Ti layer 5 disposed between the two Al2O3 layers 3 and 4.
[0030] In this embodiment, Ti layer 5 is adhered as a nano-scale thin film between two Al2O3 layers 3 and 4. The bottom electrode 1 is made of ITO conductive glass. The top electrode 2 is made of Ag. The thickness of each Al2O3 layer is 50 nm, and the thickness of Ti layer 5 is 5 nm. The thickness of the top electrode 2 is 100 nm, and the thickness of the bottom electrode 1 is 100 nm.
[0031] In this embodiment, a resistive switching functional layer is constructed using two Al2O3 layers and one Ti layer 5. A scanning voltage of 0-1V is applied to the top electrode 2. When the voltage rises to the preset set voltage, due to the obstruction of the Ti layer 5 and the primary effect of the electric field acting on the upper Al2O3 layer 3 (the Al2O3 layer near the top electrode 2), oxygen vacancies form a high-concentration region at the contact between the upper Al2O3 layer 3 and the Ti layer 5. Subsequently, these oxygen vacancies migrate towards the bottom electrode under the combined drive of electric field drift and Joule heating-enhanced concentration gradient diffusion, thereby gradually increasing the conductance of the memristor and promoting the initial formation of conductive filaments in the resistive switching functional layer, thus changing the state of the memristor to low resistance. As the voltage continues to increase, the electric field drives oxygen vacancies to continue drifting downwards. Simultaneously, the accumulation of Joule heat promotes the downward diffusion of oxygen vacancies along the concentration gradient, gradually achieving an equilibrium of oxygen vacancy concentrations between the upper Al2O3 layer 3 and the lower Al2O3 layer 4 (the Al2O3 layer near the bottom electrode). With a significant increase in the local temperature of the conductive filament, the oxygen vacancy diffusion rate accelerates, the conductive filament structure becomes more stable, and the memristor maintains a low-resistance state. As Joule heat continues to accumulate, the local temperature of the conductive filament further increases, significantly accelerating the oxygen vacancy diffusion rate. Driven by the electric field, oxygen vacancies continue to migrate downwards, leading to the formation of new high-concentration oxygen vacancies in the lower Al2O3 layer 4. In the memristor region, because the direction of the oxygen vacancy concentration gradient is opposite to the direction of oxygen vacancy drift driven by the electric field, diffusion and drift compete with each other, increasing the possibility of breakage of the conductive filament. To switch to a high-resistivity state, the scanning voltage is reduced. When the voltage decreases to the preset reset voltage, the electric field strength decreases, weakening oxygen vacancy drift. Diffusion driven by the oxygen vacancy concentration gradient gradually becomes dominant. The previously accumulated Joule heat continues to promote oxygen vacancy diffusion, causing a large number of oxygen vacancies to migrate upwards. This migration exacerbates the instability of the conductive filament, ultimately leading to its breakage. The memristor then returns to the high-resistivity state. Therefore, this invention only requires loading different parameters... A forward voltage can achieve the switching of the resistance state of a memristor, thereby reducing the complexity and power consumption of its external driving circuit. This invention introduces an Al2O3 / Ti / Al2O3 three-layer composite structure as the resistive switching functional layer. The middle metal Ti layer 5 can supply or recover oxygen vacancies from the Al2O3 layers on both sides according to the resistance state of the memristor, effectively stabilizing the oxygen vacancy concentration of the memristor, resulting in better stability and durability. In addition, the Ti layer 5 can optimize the electric field at the interface between the Al2O3 layer and the Ti layer 5 due to its inherent conductivity, creating favorable conditions for more uniform conductive filaments, thus reducing the operating voltage of the memristor and further reducing power consumption. Since this invention only needs to apply a forward power supply to the top electrode 2 to achieve the switching of high and low resistance states, it can reduce the complexity and power consumption of the external driving circuit.
[0032] Example 2: This example is basically the same as Example 1, except that: in this example, the thickness of each Al2O3 layer is 70nm, the thickness of Ti layer 5 is 7nm, the thickness of top electrode 2 is 120nm, and the thickness of bottom electrode 1 is 120nm.
[0033] Example 3: This example is basically the same as Example 1, except that: in this example, the bottom electrode 1 is made of FTO conductive glass, each Al2O3 layer is 40nm thick, and the Ti layer 5 is 3nm thick. The top electrode 2 is 70nm thick, and the bottom electrode 1 is 70nm thick.
[0034] To verify the performance of the memristor of the present invention, we prepared the memristor of Example 1 as a sample and tested the sample.
[0035] A scan voltage of 0V to 1V to 0V is applied to the top electrode 2 of the memristor to obtain the following result: Figure 2 The diagram shows the current-voltage characteristic curve of the memristor of the present invention under a cyclic voltage scan of 0V to 1V to 0V. Figure 2 In this context, "1" refers to the scanning process with a scanning voltage ranging from 0V to 1V, and "2" refers to the scanning process with a scanning voltage ranging from 1V to 0V. (Analysis) Figure 2 It can be seen that the memristor completes the transformation from a high resistance state to a low resistance state during the forward scan from 0V to 1V, and completes the transformation from a low resistance state to a high resistance state during the forward scan from 1V to 0V. This proves that the memristor of the present invention can complete the transformation from a high resistance state to a low resistance state by applying a positive voltage with different parameters to the top electrode.
[0036] Fifty high-amplitude forward DC cycles (amplitude: 0.7V, width: 90ms, interval: 10ms) and fifty low-amplitude forward DC cycles (amplitude: 0.3V, width: 10ms, interval: 10ms) were applied to the top electrode of the memristor, respectively, yielding the following results: Figure 3 The high and low resistance test results are shown below. Analysis. Figure 3 It can be seen that, during 50 consecutive pulse cycles, the high-resistance state of the memristor (shown by the black square) can be stably maintained at close to 10. 5 The level of Ω, while the low-resistivity state (shown by gray dots) is also stably maintained at around 10. 2 Ω, and neither showed significant decay or fluctuation. That is, the memristor maintains a clear and stable storage window of more than two orders of magnitude between its high and low resistance states, ensuring reliable differentiation between them. Therefore, the memristor of this invention exhibits excellent cycle stability and high / low resistance state control capability under both conditions.
[0037] The biological process of Pavlovian conditioning is broken down and conceptually analogized using the scenario of a spotted butterfly. Figure 4The diagram shows a biomimetic schematic of a heterologous synapse in a spotted butterfly. Figure 4 In the diagram, CS represents pollen simulating a conditioned stimulus, and US represents nectar simulating an unconditioned stimulus. For example... Figure 4 As shown in (I), the spotted butterfly does not respond to CS, as Figure 4 As shown in (II), the spotted butterfly responds to US as follows: Figure 4 As shown in (III) and (IV), when the CS and US stimuli are applied to the jacana butterfly simultaneously, and then the CS is applied to the jacana butterfly, the jacana butterfly responds to the CS.
[0038] A biomimetic experiment on heterogeneous synapses of the spotted butterfly was conducted using the memristor of this invention, and the results are shown in the figure below. Figure 5 and Figure 6 As shown, applying 20 cycles of 0.5V voltage pulses (pulse interval 50ms, pulse delay 50ms) to the top electrode of the memristor yields the following result: Figure 5 Figure (I) shows 20 cycles of 0.6V voltage pulses (pulse interval 50ms, pulse delay 50ms). Figure 5 Figure (II) shows the results obtained by alternately applying 10 cycles of 0.6V voltage pulses (pulse interval 50ms, pulse delay 50ms) and 0.5V voltage pulses (pulse interval 50ms, pulse delay 50ms) to the top electrode. Figure 5 In Figure (III), 20 cycles of 0.5V voltage pulses (pulse interval 50ms, pulse delay 50ms) were applied to the top electrode to obtain... Figure 5 Figure (Ⅳ) shows the result of applying 20 cycles of voltage pulses (0.5V amplitude, 50ms pulse delay) with a pulse interval of 50ms to the top electrode of the memristor. Figure 6 Figure (I) shows the result obtained by applying 20 cycles of voltage pulses with a pulse interval of 5ms (voltage amplitude of 0.5V and pulse delay of 50ms) to the top electrode. Figure 6 Figure (II) shows the results obtained by alternately applying voltage pulses with a pulse interval of 5ms (voltage amplitude of 0.5V and pulse delay of 50ms) and voltage pulses with a pulse interval of 50ms (voltage amplitude of 0.5V and pulse delay of 50ms) to the top electrode. Figure 6 In Figure (III), apply 20 cycles of voltage pulses with a 50ms interval to the top electrode (voltage amplitude 0.5V, pulse delay 50ms) to obtain... Figure 6 Figure (Ⅳ) in the middle.
[0039] analyze Figure 5 It can be seen that applying a 0.5V voltage pulse (pulse interval 50ms, pulse delay 50ms) to the top electrode serves as the conditioned stimulus (CS), and applying a 0.6V voltage (pulse interval 50ms, pulse delay 50ms) serves as the unconditioned stimulus (US). Figure 5As shown in (Ⅰ), the current caused solely by CS is 73.4 μA, and this value is set as the set current; Figure 5 As shown in (II), the current changes significantly due to US. Figure 5 As shown in (III) and 5(IV), during the training phase, applying CS and US simultaneously causes a significant change in current. After the training is completed, the current induced by CS stimulation alone exceeds the set current.
[0040] analyze Figure 6 It can be seen that applying a voltage pulse with a pulse interval of 50ms (voltage amplitude of 0.5V and pulse delay of 50ms) to the top electrode serves as the conditioned stimulus (CS), while applying a voltage pulse with a pulse interval of 5ms (voltage amplitude of 0.5V and pulse delay of 50ms) to the top electrode serves as the unconditioned stimulus (US). Figure 6 As shown in (Ⅰ), the current caused solely by CS is 4μA, and this value is set as the set current; as Figure 6 As shown in (II), the current changes significantly due to US. Figure 6 As shown in (III) and 6(IV), during the training phase, applying CS and US simultaneously causes a significant change in current. After the training is completed, the current induced by CS stimulation alone exceeds the set current.
[0041] Depend on Figure 4 , Figure 5 and Figure 6 It is evident that the memristor of this invention effectively simulates the Pavlovian classical conditioning process in the behavioral learning of the spotted butterfly and achieves biomimetic plasticity of heterologous synapses. The memristor of this invention provides important experimental evidence and potential application prospects for developing novel neuromorphic computing units and biomimetic sensing systems based on finely controlled voltage parameters, particularly in simulating the adaptive learning and memory of biological signals in response to complex environments.
[0042] The present invention also provides a method for preparing the above-mentioned memristor. The preparation method of the memristor of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.
[0043] Example 1: As Figure 1 As shown, a method for fabricating a memristor includes the following steps:
[0044] Step 1: The bottom electrode 1 is prepared using ITO conductive glass and pretreated to ensure the cleanliness of the bottom electrode 1; the dimensions (length × width) of the ITO conductive glass are 1 × 1 cm.
[0045] Step 2: The first Al2O3 layer, i.e. the lower Al2O3 layer 4, is generated on the upper surface of the bottom electrode 1 by evaporation coating method;
[0046] Step 3: A Ti layer 5 is generated on the surface of the first Al2O3 layer 4 using an evaporation deposition method;
[0047] Step 4: A second Al2O3 layer, namely the upper Al2O3 layer 3, is generated on the upper surface of Ti layer 5 using the evaporation deposition method.
[0048] Step 5: The top electrode 2 is generated on the surface of the second Al2O3 layer using an evaporation coating method.
[0049] In this embodiment, the pretreatment in step 1 is as follows: the bottom electrode 1 is first ultrasonically cleaned with acetone, deionized water and anhydrous ethanol in sequence for 10 minutes, and then dried at a temperature of 65°C for 1 hour.
[0050] In this embodiment, the evaporation coating method in steps 2 and 4 is performed at a vacuum level below 6.6 × 10⁻⁶. -4 The deposition was carried out under Pa conditions, with a deposition rate of [missing value]. The deposition time was 8 minutes, the target material was Al2O3 with a purity greater than 99.99%, and a tungsten crucible was used as the support.
[0051] The evaporation coating method in step 3 is used when the vacuum level is below 6.6 × 10⁻⁶. -4 The deposition was carried out under Pa conditions, with a deposition rate of [missing value]. The deposition time was 2 minutes; the target material was Ti with a purity greater than 99.99%, and a graphite crucible was used as the support.
[0052] The evaporation coating method in step 5 is used when the vacuum level is below 6.6 × 10⁻⁶. -4 The deposition was carried out under Pa conditions, with a deposition rate of [missing value]. The deposition time was 7 minutes; the target material was Ag with a purity greater than 99.99%, and a tungsten crucible was used as the carrier.
[0053] In this embodiment, the thickness of each alumina layer is 50 nm, the thickness of Ti layer 5 is 5 nm, the thickness of top electrode 2 is 100 nm, and the thickness of bottom electrode 1 is 100 nm. Embodiment Two: This embodiment is basically the same as Embodiment One, except that: in this embodiment, the thickness of each Al2O3 layer is 70 nm, the thickness of Ti layer 5 is 7 nm, the thickness of top electrode 2 is 120 nm, and the thickness of bottom electrode 1 is 120 nm; the deposition time for steps 2 and 4 is 10 min, the deposition time for step 3 is 3 min, and the deposition time for step 5 is 8 min.
[0054] Example 3: This example is basically the same as Example 1, except that: in this example, the material of the bottom electrode 1 is FTO conductive glass, the thickness of each Al2O3 layer is 40nm, and the thickness of the Ti layer 5 is 3nm. The thickness of the top electrode 2 is 70nm, and the thickness of the bottom electrode 1 is 70nm; the deposition time for steps 2 and 4 is 7min, the deposition time for step 3 is 1min, and the deposition time for step 5 is 6min.
[0055] The memristor fabrication method of the present invention completes the memristor fabrication using only the evaporation coating method, which is simple and low in cost.
[0056] In summary, the memristor of this invention can be effectively used for heterogeneous synaptic biomimicry of the behavior of the spotted butterfly. It is constructed by stacking two Al2O3 layers 3 and 4 and a Ti layer 5 to form a resistive switching functional layer. It not only has high durability and high stability, but also can achieve the switching between high and low resistance states by only applying a positive power supply to the top electrode. This can effectively reduce the complexity and power consumption of the external driving circuit. At the same time, the fabrication method of the memristor is simple and suitable for large-scale promotion, and can be widely used in information technology.
Claims
1. A memristor, comprising a bottom electrode, a resistive switching layer, and a top electrode stacked from bottom to top, characterized in that... The resistive switching functional layer is composed of two Al2O3 layers and one Ti layer stacked together, with the Ti layer disposed between the two Al2O3 layers.
2. A memristor according to claim 1, characterized in that... The Ti layer is adhered between two Al2O3 layers in the form of a nano-scale thin film.
3. A memristor according to claim 1, characterized in that... The bottom electrode is made of ITO conductive glass or FTO conductive glass.
4. A memristor according to claim 1, characterized in that... The material of the top electrode is Ag.
5. A memristor according to claim 1, characterized in that... The thickness of each Al2O3 layer is 40-70 nm, and the thickness of the Ti layer is 4-7 nm.
6. A memristor according to claim 1, characterized in that... The thickness of the top electrode is 80-120 nm, and the thickness of the bottom electrode is 80-120 nm.
7. The application of a memristor according to any one of claims 1-6, characterized in that... Used for heterogeneous synaptic biomimicry of the behavior of the spotted butterfly.
8. A method for fabricating a memristor according to any one of claims 1-6, characterized in that... Includes the following steps: Step 1: The bottom electrode is prepared using ITO conductive glass and pretreated to ensure its cleanliness. Step 2: The first Al2O3 layer is generated on the upper surface of the bottom electrode using an evaporation deposition method; Step 3: A Ti layer is generated on the surface of the first Al2O3 layer using an evaporation deposition method; Step 4: A second Al2O3 layer is formed on the upper surface of the Ti layer using an evaporation deposition method; Step 5: The top electrode is generated on the surface of the second Al2O3 layer using an evaporation coating method.
9. The method for fabricating a memristor according to claim 8, characterized in that... The pretreatment in step 1 is as follows: the bottom electrode is first ultrasonically cleaned with acetone, deionized water and anhydrous ethanol in sequence, and then dried.
10. The method for fabricating a memristor according to claim 8, characterized in that... The evaporation coating method in steps 2 and 4 is performed at a vacuum level below 6.6 × 10⁻⁶. -4 The deposition was carried out under Pa conditions, with a deposition rate of [missing value]. The deposition time is 5-15 minutes; the evaporation coating method in step 3 is performed under a vacuum degree lower than 6.6 × 10⁻⁶. -4 The deposition was carried out under Pa conditions, with a deposition rate of [missing value]. The deposition time is 1-7 minutes; the evaporation coating method in step 5 is performed under a vacuum degree lower than 6.6 × 10⁻⁶. -4 The deposition was carried out under Pa conditions, with a deposition rate of [missing value]. The deposition time is 5-15 minutes.
Citation Information
Patent Citations
Artificial synaptic device based on Ti / TaOx memristor and preparation method of artificial synaptic device
CN119486582A