Zero-power-consumption DC-DC power supply bleeder circuit and power supply system
By designing a zero-power DC-DC power discharge circuit and using a PMOS transistor to control charge discharge, the problem of high power consumption in the standby or STR state of the vehicle system by traditional discharge circuits is solved, and fast power-down and low power consumption design are achieved.
Patent Information
- Application Number
- CN202511199021.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-26
- Publication Date
- 2025-11-25
AI Technical Summary
Traditional conventional discharge circuits cannot meet the low power consumption requirements of vehicle systems in standby or STR states, and require a large current consumption.
Design a zero-power DC-DC power supply discharge circuit. The PMOS transistor Q41 is turned off when the DC-DC power supply is working normally, so it does not consume current. When the cockpit-driver integrated system is turned off in the vehicle system, the discharge circuit is turned on instantly. The conduction of the PMOS transistor is controlled by the status pin to achieve rapid discharge of charge.
It achieves zero current consumption when the DC-DC power supply is working normally, and rapid power-off when the vehicle system is in standby or STR state, meeting the low power consumption design requirements.
Smart Images
Figure CN121012333A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of integrated circuit technology, in particular to a zero-power DC-DC power discharge circuit and a power supply system. BACKGROUND
[0002] The discharge circuit is used to discharge the residual charge in the discharge circuit, so as to improve the safety and reliability of the circuit in actual circuit application.
[0003] The conventional discharge circuit is directly connected to the ground and has a small resistance when in use, and thus a large current is often consumed. For a circuit that still needs to keep the power supply circuit working in standby or STR state, the whole machine current is required to be less than 1 mA or several mA, and the conventional discharge circuit cannot meet the requirement.
[0004] Therefore, the present application is proposed. SUMMARY
[0005] The technical problem to be solved by the present application is that the conventional discharge circuit cannot meet the low-power requirement of the vehicle-mounted system in standby or STR state. The present application aims to provide a zero-power DC-DC power discharge circuit and a power supply system, i.e. a brand-new discharge circuit. The discharge circuit is in a closed state when the DC-DC power supply is working normally, and the discharge circuit itself does not consume current. Only when the vehicle-mounted system is turned off, the discharge circuit is opened instantaneously to achieve the discharge function. Thus, the low-power design requirement of the vehicle-mounted system in standby or STR state is ensured.
[0006] The present application is realized by the following technical scheme: In a first aspect, the present application provides a zero-power DC-DC power discharge circuit, which comprises a PMOS tube Q41. The first end of the discharge circuit is connected to the output pin of the DC-DC power supply module, for supplying power to the PMOS tube Q41. The second end of the discharge circuit is connected to the state pin of the DC-DC power supply module, for controlling the closing or conduction of the PMOS tube Q41. When the state pin is at high level, the output voltage of the DC-DC power supply module is normal, and the PMOS tube Q41 of the discharge circuit is closed, without discharge current to the ground. When the state pin is at low level, the output voltage of the DC-DC power supply module is in power-off state, and the PMOS tube Q41 of the discharge circuit is conducted, so as to discharge the residual charge on the DC-DC power supply module circuit to the ground rapidly, thereby ensuring rapid power-off.
[0007] Further, the source S of the PMOS Q41 is connected to the output pin of the DC-DC power module, for powering the PMOS Q41; The gate G of the PMOS Q41 is connected to the state pin of the DC-DC power module, for controlling the PMOS Q41 to be off or on; The drain D of the PMOS Q41 is connected to the ground through a resistor.
[0008] Further, the bleeder circuit further comprises a resistor R635, a resistor R636, a resistor R634 and a capacitor C632; The drain D of the PMOS Q41 is connected to one end of the resistor R635, and the other end of the resistor R635 is connected to the ground; one end of the resistor R636 is connected to the drain D of the PMOS Q41, and the other end of the resistor R636 is connected to the ground; One end of the resistor R634 is connected to the gate G of the PMOS Q41, and the other end of the resistor R634 is connected to the source S of the PMOS Q41; the capacitor C632 is connected in parallel to the resistor R634.
[0009] Further, the resistor R635 and the resistor R636 are used to control the current during bleeder, and prevent the DC-DC power module from being directly short-circuited to the ground; The resistor R634 is used to keep consistent with the PMOS Q41 and in the off state; The capacitor C632 is used to absorb the pulse of the DC-DC power module at the power-on moment, and protect the PMOS Q41 from being damaged by the sharp pulse.
[0010] Further, the resistor R635, the resistor R636, the resistor R634 and the capacitor C632 are matched in different resistance and capacitance values according to the output voltage of the DC-DC power module and the bleeder time required by the bleeder circuit.
[0011] Further, the resistance of the resistor R635 and the resistor R636 is 100R, i.e. the resistance is 100 ohms (Ω); the resistance of the resistor R634 is 100K, i.e. the resistance is 100 kilo-ohms (KΩ); and the capacitance of the capacitor C632 is 100nF.
[0012] Further, the bleeder circuit further comprises a resistor R633, one end of the resistor R633 is connected to the drain D of the PMOS Q41, and the other end of the resistor R633 is connected to the source S of the PMOS Q41.
[0013] Further, the resistor R633 is an NC resistor, which is used to paste when the low current is not required. The NC resistor and the PMOS can save the cost.
[0014] In a second aspect, the application further provides a DC-DC power supply system, which comprises a DC-DC power supply module and a discharge circuit. The DC-DC power supply module is used to provide a preset required DC voltage conversion power supply and power supply for the discharge circuit; and the discharge circuit is controlled to be closed or turned on through the state pin of the DC-DC power supply module. The discharge circuit adopts the zero-power-consumption DC-DC power supply discharge circuit, and realizes current discharge in cooperation with the high and low levels of the state pin of the DC-DC power supply module; when the state pin is at a high level, the PMOS tube Q41 of the discharge circuit is closed, and there is no discharge current to the ground; when the state pin is at a low level, the PMOS tube Q41 of the discharge circuit is turned on, and the residual charge on the DC-DC power supply module circuit is rapidly discharged to the ground, so as to ensure rapid power-off.
[0015] Further, the chip model of the DC-DC power supply module is LM25143QRHARQ1.
[0016] Compared with the prior art, the application has the following advantages and beneficial effects: The zero-power-consumption DC-DC power supply discharge circuit and the power supply system provide a brand-new discharge circuit, the discharge circuit is in a closed state when the DC-DC power supply normally works, and the discharge circuit itself does not consume current; only when the cabin and driver integrated machine in the vehicle-mounted system is turned off, the discharge circuit is instantaneously opened, and the discharge function is achieved. The application is suitable for the vehicle-mounted system, and ensures the design requirement of low power consumption of the cabin and driver integrated machine in the standby or STR state in the vehicle-mounted system. BRIEF DESCRIPTION OF DRAWINGS
[0017] The accompanying drawings, which are included to provide a further understanding of the embodiments of the application and constitute a part of this application, do not constitute a limitation to the embodiments of the application. In the drawings: Figure 1 It is a structure schematic diagram of the DC-DC power supply system of the application; Figure 2 It is a schematic diagram of the zero-power-consumption DC-DC power supply discharge circuit of the application; Figure 3 It is a complete circuit schematic diagram of the DC-DC power supply system of the application. DETAILED DESCRIPTION
[0018] In the following, the terms “comprising” or “may include” as used in various embodiments of the invention indicate the presence of an inventive function, operation, or element, and do not limit the addition of one or more functions, operations, or elements. Furthermore, as used in various embodiments of the invention, the terms “comprising,” “having,” and their cognates are intended only to indicate a specific feature, number, step, operation, element, component, or combination of the foregoing, and should not be construed as primarily excluding the presence of one or more other features, numbers, steps, operations, elements, components, or combinations of the foregoing, or adding one or more combinations of the foregoing.
[0019] In various embodiments of the invention, the expression "or" or "at least one of A and / or B" includes any combination or all combinations of the words listed simultaneously. For example, the expression "A or B" or "at least one of A and / or B" may include A, may include B, or may include both A and B.
[0020] The expressions used in the various embodiments of the present invention (such as "first," "second," etc.) may modify various constituent elements in the various embodiments, but do not limit the corresponding constituent elements. For example, the above expressions do not limit the order and / or importance of the elements. The above expressions are only used for the purpose of distinguishing one element from other elements. For example, a first user device and a second user device refer to different user devices, although both are user devices. For example, a first element may be referred to as a second element without departing from the scope of the various embodiments of the present invention, and similarly, a second element may also be referred to as a first element.
[0021] It should be noted that if a description is made of "connecting" one component to another, then the first component can be directly connected to the second component, and a third component can be "connected" between the first and second components. Conversely, when a component is "directly connected" to another component, it can be understood that there is no third component between the first and second components.
[0022] The terminology used in the various embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to limit the various embodiments of the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the various embodiments of the invention pertain. The terms (such as those defined in a generally used dictionary) are to be interpreted as having the same meaning as in the context of the relevant technical field and are not to be interpreted as having an idealized or overly formal meaning, unless clearly defined in the various embodiments of the invention.
[0023] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of the present invention are only used to explain the present invention and are not intended to limit the present invention.
[0024] Traditional bleeder circuits, being directly connected to ground and having low resistance, often consume a significant amount of current. This is insufficient for circuits that need to maintain power supply operation in standby or STR states, where the total current draw must be less than 1mA or a few mA.
[0025] To address the above issues, this invention provides a novel discharge circuit. This discharge circuit is in a closed state when the DC-DC power supply is operating normally and does not consume current. It only momentarily opens when the cockpit-driver integrated unit in the vehicle system is shut down, thus achieving the discharge function. This ensures the low power consumption design requirements of the cockpit-driver integrated unit in the vehicle system during standby or STR (Standard Operating Mode) states.
[0026] like Figure 1 As shown, Figure 1 This is a schematic diagram of a DC-DC power supply system according to the present invention; the DC-DC power supply system of the present invention, including the above-mentioned novel discharge circuit, comprises: (1) DC-DC power supply module ( Figure 1 The DC-DC converter is used to provide a DC voltage conversion power supply with preset requirements. In conjunction with this bleeder circuit, it is required to output a status pin with PGOOD to control the switching of the bleeder circuit, that is, to control the PMOS transistor in the bleeder circuit to turn off or on.
[0027] (2) The discharge circuit includes a PMOS transistor, a resistor, and a capacitor. When the status pin (i.e., the DC-DC_PGOOD pin) is high, the DC-DC power module output voltage is normal, the PMOS transistor of the discharge circuit is turned off, and there is no discharge current to ground; when the status pin (DC-DC_PGOOD pin) is low, the DC-DC power module output voltage is in a power-down state, the PMOS transistor of the discharge circuit is turned on, the discharge circuit works, and the residual charge on the output circuit can be quickly discharged to ground, thereby ensuring rapid power-down.
[0028] Example 1 like Figure 2 As shown, Figure 2 This is a schematic diagram of a zero-power DC-DC power supply discharge circuit according to the present invention; the zero-power DC-DC power supply discharge circuit of the present invention includes a PMOS transistor Q41; The first end of the bleeder circuit is connected to the output pin of the DC-DC power module to power the PMOS transistor Q41. The second end of the discharge circuit is connected to the status pin of the DC-DC power module, which is responsible for turning the PMOS transistor Q41 on or off. When the status pin is high, the DC-DC power module output voltage is normal, and the PMOS transistor Q41 of the discharge circuit is turned off, with no discharge current to ground. When the status pin is low, the DC-DC power module output voltage is in a power-down state, and the PMOS transistor Q41 of the discharge circuit is turned on, quickly discharging the residual charge on the DC-DC power module circuit to ground, thereby ensuring rapid power-down.
[0029] In this embodiment, the source S of PMOS transistor Q41 is connected to the output pin of the DC-DC power supply module. Figure 2 VREG_SIP_3P3 in the code is used to power PMOS transistor Q41; The gate G of PMOS transistor Q41 is connected to the status pin of the DC-DC power supply module, namely the DC-DC_PGOOD pin. Figure 2 The LM25143_PG_3P3 in the diagram is used to control the switching on or off of PMOS transistor Q41. The drain D of PMOS transistor Q41 is grounded through a resistor.
[0030] In this embodiment, the discharge circuit further includes resistors R635, R636, R634, and capacitor C632; The drain D of PMOS transistor Q41 is connected to one end of resistor R635, and the other end of resistor R635 is grounded; one end of resistor R636 is connected to the drain D of PMOS transistor Q41, and the other end of resistor R636 is grounded. One end of resistor R634 is connected to the gate G of PMOS transistor Q41, and the other end of resistor R634 is connected to the source S of PMOS transistor Q41; capacitor C632 is connected in parallel across resistor R634.
[0031] Specifically, resistors R635 and R636 are used to control the current during discharge and also to prevent the DC-DC power module from being directly short-circuited to ground. Resistor R634 is used to keep it in the same off state as PMOS transistor Q41; Capacitor C632 is used to absorb the DC-DC power module pulse at the moment of power-on, protecting PMOS transistor Q41 from damage by the spike pulse.
[0032] In this embodiment, resistors R635, R636, R634, and capacitor C632 are matched with different resistance and capacitance values according to the output voltage of the DC-DC power module and the discharge time required by the discharge circuit.
[0033] In practice, the resistance values of resistors R635 and R636 are both 100R, which means 100 ohms (Ω); the resistance value of resistor R634 is 100K, which means 100 kiloohms (Ω). (Ohms); the capacitance of capacitor C632 is 100nF.
[0034] Example 2 like Figure 2 As shown, the present invention provides a zero-power DC-DC power supply discharge circuit, which includes a PMOS transistor Q41; The first end of the bleeder circuit is connected to the output pin of the DC-DC power module to power the PMOS transistor Q41. The second end of the discharge circuit is connected to the status pin of the DC-DC power module, which is responsible for turning the PMOS transistor Q41 on or off. When the status pin is high, the DC-DC power module output voltage is normal, and the PMOS transistor Q41 of the discharge circuit is turned off, with no discharge current to ground. When the status pin is low, the DC-DC power module output voltage is in a power-down state, and the PMOS transistor Q41 of the discharge circuit is turned on, quickly discharging the residual charge on the DC-DC power module circuit to ground, thereby ensuring rapid power-down.
[0035] In this embodiment, the source S of PMOS transistor Q41 is connected to the output pin of the DC-DC power supply module. Figure 2 VREG_SIP_3P3 in the code is used to power PMOS transistor Q41; The gate G of PMOS transistor Q41 is connected to the status pin of the DC-DC power supply module, namely the DC-DC_PGOOD pin. Figure 2 The LM25143_PG_3P3 in the diagram is used to control the switching on or off of PMOS transistor Q41. The drain D of PMOS transistor Q41 is grounded through a resistor.
[0036] In this embodiment, the discharge circuit further includes resistors R635, R636, R634, and capacitor C632; The drain D of PMOS transistor Q41 is connected to one end of resistor R635, and the other end of resistor R635 is grounded; one end of resistor R636 is connected to the drain D of PMOS transistor Q41, and the other end of resistor R636 is grounded. One end of resistor R634 is connected to the gate G of PMOS transistor Q41, and the other end of resistor R634 is connected to the source S of PMOS transistor Q41; capacitor C632 is connected in parallel across resistor R634.
[0037] Specifically, resistors R635 and R636 are used to control the current during discharge and also to prevent the DC-DC power module from being directly short-circuited to ground. Resistor R634 is used to keep it in the same off state as PMOS transistor Q41; Capacitor C632 is used to absorb the DC-DC power module pulse at the moment of power-on, protecting PMOS transistor Q41 from damage by the spike pulse.
[0038] In this embodiment, the discharge circuit further includes a resistor R633, one end of which is connected to the drain D of the PMOS transistor Q41, and the other end of which is connected to the source S of the PMOS transistor Q41.
[0039] Specifically, resistor R633 is an NC resistor, used in projects where low current is not required, i.e. when power consumption is not a concern. By attaching this NC resistor and removing PMOS transistor Q41, resistor R634, and capacitor C632, costs can be saved.
[0040] In specific implementation, the resistance values of each resistor and the capacitance values of the capacitor are set as in Example 1.
[0041] Example 3 like Figure 3 As shown, Figure 3 This is a complete circuit diagram of a DC-DC power supply system, including a DC-DC power module and peripheral circuits, and a discharge circuit. The difference between this embodiment and Embodiments 1 and 2 is that this embodiment provides a DC-DC power supply system, which includes a DC-DC power module and a discharge circuit. The DC-DC power module is used to provide a preset DC voltage conversion power supply and power the bleeder circuit; and to control the bleeder circuit to turn on or off through its own status pins. The discharge circuit adopts a zero-power DC-DC power discharge circuit of Embodiment 1, which works with the high and low levels of the status pin of the DC-DC power module to achieve current discharge. When the status pin is high, the PMOS transistor Q41 of the discharge circuit is turned off, and there is no discharge current to ground. When the status pin is low, the PMOS transistor Q41 of the discharge circuit is turned on, and the residual charge on the DC-DC power module circuit is quickly discharged to ground, thereby ensuring rapid power-off.
[0042] In this embodiment, the DC-DC power module uses the LM25143QRHARQ1 chip. The connections between the pins of the LM25143QRHARQ1 and the peripheral circuits are shown below. Figure 3 As shown, I will not go into detail here.
[0043] It should be noted that the chip model of the DC-DC power module is not limited to the above models. Any power chip that meets the requirements of any DC-DC power module and has a status pin can be used.
[0044] This invention achieves its discharge function by keeping the discharge circuit off during normal operation of the DC-DC power supply, as the discharge circuit itself does not consume current. It only momentarily opens when the cockpit-driver integrated unit in the vehicle system is shut down, thus ensuring the low power consumption design requirements of the cockpit-driver integrated unit in standby or STR states.
[0045] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A zero-power DC-DC power supply discharge circuit, characterized in that, The discharge circuit includes a PMOS transistor Q41; The first end of the bleeder circuit is connected to the output pin of the DC-DC power module to power the PMOS transistor Q41. The second end of the discharge circuit is connected to the status pin of the DC-DC power module, which is responsible for turning the PMOS transistor Q41 on or off. When the status pin is high, the DC-DC power module output voltage is normal, and the PMOS transistor Q41 of the discharge circuit is turned off, with no discharge current to ground; when the status pin is low, the DC-DC power module output voltage is in a power-down state, and the PMOS transistor Q41 of the discharge circuit is turned on, discharging the charge on the DC-DC power module circuit to ground.
2. The zero-power DC-DC power supply discharge circuit according to claim 1, characterized in that, The source S of the PMOS transistor Q41 is connected to the output pin of the DC-DC power module to supply power to the PMOS transistor Q41. The gate G of the PMOS transistor Q41 is connected to the status pin of the DC-DC power module and is responsible for turning the PMOS transistor Q41 off or on. The drain D of the PMOS transistor Q41 is grounded through a resistor.
3. The zero-power DC-DC power supply discharge circuit according to claim 2, characterized in that, The discharge circuit also includes resistors R635, R636, R634, and capacitor C632; The drain D of the PMOS transistor Q41 is connected to one end of the resistor R635, and the other end of the resistor R635 is grounded; one end of the resistor R636 is connected to the drain D of the PMOS transistor Q41, and the other end of the resistor R636 is grounded. One end of the resistor R634 is connected to the gate G of the PMOS transistor Q41, and the other end of the resistor R634 is connected to the source S of the PMOS transistor Q41. The capacitor C632 is connected in parallel across the resistor R634.
4. The zero-power DC-DC power supply discharge circuit according to claim 3, characterized in that, The resistors R635 and R636 are used to control the current during discharge and to prevent the DC-DC power module from being directly short-circuited to ground. The resistor R634 is used to keep it in the same off state as the PMOS transistor Q41. The capacitor C632 is used to absorb the DC-DC power module pulse at the moment of power-on, protecting the PMOS transistor Q41 from damage by the spike pulse.
5. A zero-power DC-DC power supply discharge circuit according to claim 3, characterized in that, The resistors R635, R636, R634, and capacitor C632 are matched with different resistance and capacitance values according to the output voltage of the DC-DC power module and the discharge time required by the discharge circuit.
6. A zero-power DC-DC power supply discharge circuit according to claim 5, characterized in that, The resistance values of resistors R635 and R636 are both 100Ω; the resistance value of resistor R634 is 100KΩ; and the capacitance value of capacitor C632 is 100nF.
7. The zero-power DC-DC power supply discharge circuit according to claim 1, characterized in that, The discharge circuit also includes a resistor R633, one end of which is connected to the drain D of the PMOS transistor Q41, and the other end of which is connected to the source S of the PMOS transistor Q41.
8. A zero-power DC-DC power supply discharge circuit according to claim 7, characterized in that, The resistor R633 is an NC resistor.
9. A DC-DC power supply system, characterized in that, The DC-DC power system includes a DC-DC power module and a discharge circuit; The DC-DC power module is used to provide a DC voltage conversion power supply with preset requirements and to power the discharge circuit; and to control the closing or opening of the discharge circuit through its own status pin; The discharge circuit adopts a zero-power DC-DC power discharge circuit as described in any one of claims 1 to 8, and uses the high and low levels of the status pin of the DC-DC power module to achieve current discharge; when the status pin is high, the PMOS transistor Q41 of the discharge circuit is turned off, and there is no discharge current to ground; when the status pin is low, the PMOS transistor Q41 of the discharge circuit is turned on, and the charge on the DC-DC power module circuit is discharged to ground.
10. A DC-DC power supply system according to claim 9, characterized in that, The chip model of the DC-DC power module is LM25143QRHARQ1.