A gallium nitride device and electronic device

Abstract

This disclosure provides a gallium nitride device and electronic device. By setting a back barrier layer with uneven thickness along the direction from the source to the drain in the channel layer below the P-GaN layer, with a thicker layer near the source and a thinner layer near the drain, the thicker region can improve the confinement of the 2DEG, and the thinner region can reduce the channel resistance. Therefore, by adjusting the thickness of the back barrier layer below the P-GaN layer, this disclosure can avoid the problems of large channel resistance or obvious short-channel effect caused by using a back barrier layer of only a single thickness in traditional designs. This disclosure can effectively balance the trade-off between short-channel effect and conduction characteristics.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and more particularly to a gallium nitride device and electronic device. Background Technology

[0002] As the global energy structure accelerates its transformation towards cleaner and smarter energy sources, the demand for energy efficiency and power density in power electronic systems is growing exponentially. Next-generation electronic systems, represented by 5G communications, new energy vehicles, and data center power supplies, place higher demands on the performance of low-voltage (5-20V) power devices: achieving high-frequency switching, low conduction losses, and high integration within limited voltage margins. Traditional silicon-based MOSFET devices are limited by material physics; their on-resistance Ron,sp and breakdown voltage BV exhibit a "silicon limit" relationship, making it difficult to meet the high-efficiency energy conversion requirements in low-voltage scenarios. Gallium nitride (GaN) high electron mobility transistors (HEMTs), with their wide bandgap, high two-dimensional electron gas (2DEG) concentration, and excellent electron mobility, offer a better solution to overcome the performance bottlenecks of silicon-based devices.

[0003] However, as the feature size of GaN HEMT devices continues to shrink, problems such as threshold voltage drift and drain-induced barrier reduction (DIBL) caused by short-channel effects (SCE) severely restrict the practical application of low-voltage GaNHEMTs, especially in low-voltage (15-40V) applications. Devices need to achieve high frequency, low power consumption, and high reliability with submicron-level channel lengths, but the physical laws of traditional long-channel models gradually fail at this scale. This is because the gate edge electric field is significantly weakened by the distortion of the two-dimensional / three-dimensional electrostatic potential distribution, thus weakening the gate control capability. Short-channel effects not only lead to the degradation of static parameters such as threshold voltage drift and drain-induced barrier reduction (DIBL), but also cause dynamic reliability problems such as hot carrier injection (HCI) and current collapse.

[0004] Therefore, in GaN-based HEMT devices, improving the confinement of the 2DEG in the gate channel is an important optimization direction for addressing the threshold voltage drift and drain-induced barrier reduction caused by the short-channel effect. Summary of the Invention

[0005] This disclosure provides a gallium nitride device and electronic device for improving the confinement of 2DEGs in a down-gate channel. The specific solution is as follows:

[0006] On one hand, embodiments of this disclosure provide a gallium nitride device, comprising: a substrate, a nucleation layer, a buffer layer, a channel layer, and a barrier layer sequentially stacked along the epitaxial direction; and including:

[0007] The source and drain are located on both sides of the barrier layer, and the source and drain are electrically connected to the channel layer respectively;

[0008] A P-GaN layer is located on the side of the barrier layer away from the substrate, and between the source and the drain.

[0009] The gate is located on the side of the P-GaN layer away from the substrate;

[0010] A back barrier layer is located within the buffer layer, or within the channel layer, or between the buffer layer and the channel layer; along the direction from the source to the drain, the back barrier layer includes at least two regions of different thicknesses, the direction from the source to the drain is perpendicular to the epitaxial direction, the thickness of the region of the back barrier layer near the source is greater than the thickness of the region of the drain, and the orthogonal projection of the P-GaN layer on the substrate covers the orthogonal projection of the different thickness regions of the back barrier layer on the substrate.

[0011] In some embodiments, in the gallium nitride device provided in the present disclosure, the back barrier layer includes a first region and a second region connected together, the first region being close to the source electrode and the second region being close to the drain electrode, and the thickness of the first region being greater than the thickness of the second region.

[0012] In some embodiments, in the gallium nitride device provided in the present disclosure, the thickness of the first region is the same at each location, or the thickness of the first region gradually decreases along the direction from the source to the drain.

[0013] In some embodiments, in the gallium nitride device provided in the present disclosure, the thickness of the second region is the same at each location, or the thickness of the second region gradually decreases along the direction from the source to the drain.

[0014] In some embodiments, the gallium nitride device provided in the present disclosure further includes: a third region located between the first region and the second region, wherein the thickness of the first region is greater than the thickness of the third region, and the thickness of the third region is greater than the thickness of the second region.

[0015] In some embodiments, in the gallium nitride device provided in the present disclosure, the thickness of the third region is the same at each location, or the thickness of the third region gradually decreases along the direction from the source to the drain.

[0016] In some embodiments, in the gallium nitride device provided in the present disclosure, the orthogonal projection of the P-GaN layer on the substrate covers the orthogonal projections of at least two adjacent regions of the first region, the third region, and the second region on the substrate.

[0017] In some embodiments, in the gallium nitride device provided in the present disclosure, the surfaces of the regions with gradually decreasing thickness that are away from the substrate are curved.

[0018] In some embodiments, in the gallium nitride device provided in this disclosure, the back barrier layer faces the bottom surface of the substrate and contacts the buffer layer, the back barrier layer is embedded in the channel layer, the thickness of the back barrier layer is less than the thickness of the channel layer, and the material of the back barrier layer is In. x Al y Ga (1-x-y) N, where x≥0, y>0.

[0019] On the other hand, this disclosure also provides an electronic device, including the gallium nitride device described above in this disclosure.

[0020] The beneficial effects of this disclosure are as follows:

[0021] This disclosure provides a gallium nitride (GaN) device and electronic device. By setting a back barrier layer with uneven thickness along the direction from the source to the drain in the channel layer below the P-GaN layer, and with a thicker layer near the source and a thinner layer near the drain, the thicker region can improve the confinement of the 2DEG, while the thinner region can reduce the channel resistance. Therefore, by adjusting the thickness of the back barrier layer below the P-GaN layer, this disclosure can avoid the problems of large channel resistance or significant short-channel effect caused by using a single-thickness back barrier layer in traditional designs. This disclosure can effectively balance the trade-off between short-channel effect and conduction characteristics. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of a gallium nitride device provided in an embodiment of the present disclosure;

[0023] Figure 2 This is another schematic diagram of the structure of a gallium nitride device provided in the embodiments of this disclosure;

[0024] Figure 3 This is another schematic diagram of the structure of a gallium nitride device provided in the embodiments of this disclosure;

[0025] Figure 4 This is another schematic diagram of the structure of a gallium nitride device provided in the embodiments of this disclosure;

[0026] Figure 5 for Figure 1 The diagram shows a structural schematic of a gallium nitride device during its fabrication process.

[0027] Figure 6 for Figure 1 The diagram shows another structural schematic of a gallium nitride device during its fabrication process.

[0028] Figure 7 for Figure 1 The diagram shows another structural schematic of a gallium nitride device during its fabrication process.

[0029] Figure 8 for Figure 1 The diagram shows another structural schematic of a gallium nitride device during its fabrication process.

[0030] Figure 9 for Figure 1 The diagram shows another structural schematic of a gallium nitride device during its fabrication process. Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. It should be noted that, for clarity, the thickness of layers, films, panels, regions, etc., is enlarged in the drawings. Exemplary embodiments are described in this disclosure with reference to cross-sectional views as schematic diagrams of idealized embodiments. Thus, deviations from the shape of the figures will be expected as a result of, for example, manufacturing techniques and / or tolerances. Therefore, the embodiments described in this disclosure should not be construed as limited to the specific shape of the regions shown in this disclosure, but rather include deviations in shape caused, for example, by manufacturing processes. For example, a region illustrated or described as flat may typically have rough and / or non-linear characteristics; a sharp corner illustrated may be rounded, etc. Therefore, the regions shown in the figures are schematic in nature, and their dimensions and shapes do not represent the precise shape of the illustrated regions or reflect true proportions; they are only intended to illustrate the content of this disclosure. And throughout, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. To keep the following description of the embodiments of this disclosure clear and concise, detailed descriptions of known functions and known components are omitted.

[0032] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure and the claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that the element or object preceding the word covers the element or object listed following the word and its equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as “inner,” “outer,” “upper,” and “lower” are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described object changes.

[0033] In the following description, when an element or layer is referred to as "on" or "connected to" another element or layer, the element or layer may be directly on or directly connected to the other element or layer, or there may be intermediate elements or intermediate layers. When an element or layer is referred to as "located on one side of" another element or layer, the element or layer may be directly on or directly connected to the other element or layer, or there may be intermediate elements or intermediate layers. However, when an element or layer is referred to as "directly on" or "directly connected to" another element or layer, no intermediate elements or intermediate layers are present. The term "and / or" includes any and all combinations of one or more of the related listed items.

[0034] Currently, in traditional GaN HEMT devices, introducing an AlGaN back barrier layer beneath the channel can effectively improve the energy band near the channel, thereby enhancing the confinement of the 2DEG in the under-gate channel and strengthening the gate's control over the channel. For example, when the drain voltage is high, the back barrier layer not only prevents the 2DEG from extending downwards, thus blocking current flow in the region beneath the channel, but the raised energy band also mitigates the drain-induced barrier reduction effect.

[0035] However, traditional back barrier layer structures also lead to the following two problems: 1. The elevated energy band results in a decrease in 2DEG concentration, leading to an increase in drift region and channel resistance, which degrades the device's on-resistance and is detrimental to the device's on-state characteristics. 2. Typically, to enhance its influence on the heterojunction channel, the back barrier layer is placed closer to the channel, which degrades the device's dynamic characteristics.

[0036] To address the two problems mentioned above caused by traditional back barrier layer structures, this disclosure provides a gallium nitride device, such as... Figure 1As shown, it includes: a substrate 100, a nucleation layer 109, a buffer layer 101, a channel layer 102, and a barrier layer 103 sequentially stacked along the epitaxial direction X; the channel layer 102 and the barrier layer 103 form a heterojunction, and a high-concentration, high-mobility two-dimensional electron gas (2DEG) can be induced on the side of the channel layer 102 near the barrier layer 103; the dashed lines in the channel layer 102 represent the 2DEG.

[0037] This gallium nitride device also includes:

[0038] Source 105 and drain 106 are located on both sides of barrier layer 103. Source 105 and drain 106 are electrically connected to channel layer 102 respectively. Source 105 and drain 106 form ohmic contacts with two-dimensional electron gas respectively.

[0039] The P-GaN layer 104 is located on the side of the barrier layer 103 away from the substrate 100, and is located between the source 105 and the drain 106.

[0040] Gate 107 is located on the side of P-GaN layer 104 away from substrate 100;

[0041] The back barrier layer 108 is located within the buffer layer 101, or within the channel layer 102, or between the buffer layer 101 and the channel layer 102. Along the direction Y from the source 105 to the drain 106, the back barrier layer 108 includes at least two regions of different thicknesses. The direction Y from the source 105 to the drain 106 is perpendicular to the epitaxial direction X. The thickness of the region in the back barrier layer 108 near the source 105 is greater than the thickness of the region near the drain 106. The orthographic projection of the P-GaN layer 104 on the substrate 100 covers the orthographic projection of the different thickness regions of the back barrier layer 108 on the substrate 100.

[0042] The gallium nitride device provided in this disclosure has a non-uniform back barrier layer with varying thickness along the direction from the source to the drain in the channel layer below the P-GaN layer. The thickness is greater near the source and less near the drain. This allows the thicker region to improve the confinement of the 2DEG and the thinner region to reduce the channel resistance. Therefore, by adjusting the thickness of the back barrier layer below the P-GaN layer, this disclosure avoids the problems of high channel resistance or significant short-channel effect caused by using a single-thickness back barrier layer in traditional designs. This disclosure can effectively balance the trade-off between short-channel effect and conduction characteristics.

[0043] In some embodiments, the substrate 100 may be a substrate such as Si, SiC, GaN, or sapphire, and this disclosure does not limit it.

[0044] In some embodiments, in the gallium nitride devices provided in the present disclosure, such as Figure 1As shown, the material of the nucleation layer 109 can be one or more combinations of AlN, GaN, and AlGaN.

[0045] In some embodiments, in the gallium nitride devices provided in the present disclosure, such as Figure 1 As shown, the material of the buffer layer 101 can be Al. x Ga 1-x N, where 0 ≤ x ≤ 1, and the buffer layer 101 can be a gradient Al. x Ga 1-x The N-layer combination can also be a superlattice structure with alternating x values; the thickness of the buffer layer 101 can be 0-8μm, which means it does not include 0μm.

[0046] In some embodiments, the channel layer 102 may be made of GaN, the thickness of the channel layer 102 may be 10~500 nm, and the C doping concentration of the channel layer 102 may be <1×10⁻⁶. 17 cm -3 .

[0047] In some embodiments, the barrier layer 103 may be a group III nitride layer, such as In x Al y Ga (1-x-y) N, where x≥0, y>0, for example, the material of barrier layer 103 can be one or a combination of AlN and AlGaN; the band gap of barrier layer 103 is greater than the band gap of channel layer 102; the thickness of barrier layer 103 can be 5~30 nm.

[0048] In some embodiments, the P-GaN layer 104 can be Mg-doped GaN with a doping concentration of 1×10⁻⁶. 17 ~1×10 20 cm -3 The thickness of the P-GaN layer 104 can be 30~200 nm.

[0049] In some embodiments, the material of the source 105 includes, but is not limited to, one or more combinations of Ti, TiN, Al, Ni, Pt, Pd, Si, and Au; the material of the drain 106 includes, but is not limited to, one or more combinations of Ti, TiN, Al, Ni, Pt, Pd, Si, and Au; and the material of the gate 107 includes, but is not limited to, one or more combinations of Ti, TiN, Al, Ni, Pt, Pd, Si, and Au.

[0050] In some embodiments, in the gallium nitride device provided in this disclosure, the bottom surface of the back barrier layer 108 facing the substrate 100 contacts the buffer layer 101. The back barrier layer 108 is embedded within the channel layer 102. This allows the back barrier layer 108 to be epitaxially grown and etched on the buffer layer 101, followed by secondary epitaxial growth to form the channel layer 102 and barrier layer 103, etc. That is, the back barrier layer 108 is located between the buffer layer 101 and the channel layer 102. The thickness of the back barrier layer 108 is less than the thickness of the channel layer 102. The material of the back barrier layer 108 can be a group III nitride layer, such as In... x Al y Ga (1-x-y) N, where x≥0, y>0, for example, the material of barrier layer 103 can be one or a combination of AlN and AlGaN; the band gap of barrier layer 103 is greater than the band gap of channel layer 102.

[0051] It should be noted that the back barrier layer 108 in this embodiment is not limited to being epitaxially grown and etched after the buffer layer 101. Alternatively, a buffer layer 101 of a certain thickness can be epitaxially grown first, and the back barrier layer 108 can be epitaxially grown and etched on the buffer layer 101. Then, a buffer layer 101, a channel layer 102, a barrier layer 103, etc. of a certain thickness can be epitaxially grown, that is, the back barrier layer 108 is located inside the buffer layer 101. Alternatively, a channel layer 102 of a certain thickness can be epitaxially grown on the buffer layer 101 first, and then the back barrier layer 108 can be epitaxially grown and etched on the channel layer 102. Then, a channel layer 102, a barrier layer 103, etc. of a certain thickness can be epitaxially grown, that is, the back barrier layer 108 is located inside the channel layer 102.

[0052] In some embodiments, in the gallium nitride devices provided in the present disclosure, such as Figure 1 As shown, the back barrier layer 108 includes a first region 1081 and a second region 1082 connected together. The first region 1081 is close to the source 105, and the second region 1082 is close to the drain 106. The thickness of the first region 1081 is greater than the thickness of the second region 1082. For example, the thickness of the first region 1081 is the same at all positions, and the thickness of the second region 1082 is the same at all positions. That is, the back barrier layer 108 is a stepped structure with two horizontal platforms. The orthographic projection of the P-GaN layer 104 on the substrate 100 simultaneously covers at least part of the orthographic projection of the first region 1081 and at least part of the second region 1082 on the substrate 100, so that a back barrier layer 108 with uneven thickness is provided in the channel layer 102 below the P-GaN layer 104, and the thickness is greater near the source 105 and less near the drain 106.

[0053] In some embodiments, in the gallium nitride devices provided in the present disclosure, such as Figure 1As shown, the distance between the gate 107 and the source 105 can be smaller than the distance between the gate 107 and the drain 106, and the distance between the first region 1081 and the source 105 can be smaller than the distance between the second region 1082 and the drain 106.

[0054] In some embodiments, in the gallium nitride devices provided in the present disclosure, such as Figure 2 As shown, Figure 2 This is yet another structure of a gallium nitride device provided in the embodiments of this disclosure. Figure 2 and Figure 1 The difference is: Figure 2 Along the direction from the source 105 to the drain 106, the second region 1082 of the back barrier layer 108 can extend to the vicinity of the drain 106. For example, the distance between the first region 1081 and the source 105 can be greater than the distance between the second region 1082 and the drain 106. Figure 2 It can have the same Figure 1 The same technical effect.

[0055] In some embodiments, the structures of the first region 1081 and the second region 1082 in the gallium nitride device provided in the embodiments of this disclosure are not limited to... Figure 1 The platform surface in the middle can also have a first region 1081 with the same thickness at all locations, and a second region 1082 with gradually decreasing thickness, for example... Figure 3 As shown, Figure 3 This is yet another structure of a gallium nitride device provided in the embodiments of this disclosure. Figure 3 and Figure 1 The difference is: Figure 3 Along the direction from the source 105 to the drain 106, the thickness of the second region 1082 gradually decreases. For example, the surface of the second region 1082 away from the substrate 100 is curved, meaning the change in thickness of the second region 1082 is a change in curvature. Figure 3 It can have the same Figure 1 The same technical effect.

[0056] In some embodiments, in the gallium nitride device provided in the present disclosure, when the thickness of the first region 1081 gradually decreases, the surface of the first region 1081 away from the substrate 100 can be curved, that is, the change in thickness of the first region 1081 is a change in curvature.

[0057] In some embodiments, in the gallium nitride device provided in the present disclosure, the structure of the first region 1081 and the second region 1082 may be such that, along the direction from the source 105 to the drain 106, the thickness of the first region 1081 can be gradually reduced, and the thickness of the second region 1082 can also be gradually reduced; or the thickness of the first region 1081 can be gradually reduced, while the thickness of each position of the second region 1082 is the same.

[0058] In some embodiments, in the gallium nitride devices provided in the present disclosure, such as Figure 4 As shown, Figure 4 This is yet another structure of a gallium nitride device provided in the embodiments of this disclosure. Figure 4 and Figure 1 The difference is: Figure 4 The back barrier layer 1088 also includes a third region 1083 located between the first region 1081 and the second region 1082. The thickness of the first region 1081 is greater than the thickness of the third region 1083, and the thickness of the third region 1083 is greater than the thickness of the second region 1082. That is, along the direction from the source 105 to the drain 106, the thickness of the first region 1081, the third region 1083, and the second region 1082 decrease sequentially. Specifically, the thickness of the first region 1081 is the same at all locations, the thickness of the third region 1083 is the same at all locations, and the thickness of the second region 1082 is the same at all locations. That is, the back barrier layer 108 has multiple horizontal plateaus in terms of thickness variation.

[0059] In some embodiments, in the gallium nitride devices provided in the present disclosure, such as Figure 4 As shown, the orthographic projection of the P-GaN layer 104 onto the substrate 100 covers the orthographic projections of at least two adjacent regions of the first region 1081, the third region 1083, and the second region 1082 onto the substrate 100. This embodiment of the present disclosure uses the example of the orthographic projection of the P-GaN layer 104 onto the substrate 100 covering the orthographic projections of the first region 1081, the third region 1083, and part of the second region 1082 onto the substrate 100. This allows for the formation of a non-uniformly thick back barrier layer 108 within the channel layer 102 below the P-GaN layer 104, with a greater thickness near the source 105 and a smaller thickness near the drain 106. Figure 4 It can have the same Figure 1 The same technical effect.

[0060] In some embodiments, such as Figure 4 As shown, the orthographic projection of the P-GaN layer 104 on the substrate 100 can cover only the orthographic projections of the first region 1081 and the third region 1083 on the substrate 100, or the orthographic projection of the P-GaN layer 104 on the substrate 100 can cover the orthographic projections of the third region 1083 and the second region 1082 on the substrate 100.

[0061] In some embodiments, in the gallium nitride device provided in the present disclosure, Figure 4The structure of the first region 1081, the third region 1083, and the second region 1082 can also be such that, along the direction from the source 105 to the drain 106, the thickness of the first region 1081, the third region 1083, and the second region 1082 gradually decreases; or one of the first region 1081, the third region 1083, and the second region 1082 has the same thickness at each position, while the thickness of the other two gradually decreases; or two of the first region 1081, the third region 1083, and the second region 1082 have the same thickness at each position, while the thickness of the other one gradually decreases.

[0062] In some embodiments, in the gallium nitride device provided in the present disclosure, when the thickness of the third region 1083 gradually decreases, the surface of the third region 1083 away from the substrate 100 can be curved, that is, the change in thickness of the third region 1083 is a change in curvature.

[0063] In some embodiments of the gallium nitride device provided in this disclosure, the back barrier layer 108, along the direction from the source 105 to the drain 106, is not limited to including... Figure 1 The two horizontal platform surfaces shown and Figure 4 The three water level platforms shown can also include more water level platforms, as long as a non-uniform back barrier layer 108 is provided in the channel layer 102 below the P-GaN layer 104, with a greater thickness near the source 105 and a smaller thickness near the drain 106.

[0064] To better understand the gallium nitride devices provided in the embodiments of this disclosure, this disclosure uses... Figure 1 Taking the gallium nitride device shown as an example, the fabrication process of the gallium nitride device will be explained in detail.

[0065] In some embodiments, Figure 1 The fabrication process of the gallium nitride device shown may specifically include the following steps:

[0066] (1) such as Figure 5 As shown, a nucleation layer 109, a buffer layer 101, and a back barrier layer 108 are epitaxially grown on one side of a substrate 100 using methods such as MOCVD.

[0067] (2) such as Figure 6 As shown, the back barrier layer 108 corresponding to the area outside the gate region is etched, and only the back barrier layer 108 under the gate near the source end is left unetched, forming etching steps of different thicknesses.

[0068] (3) such as Figure 7 As shown, the back barrier layer 108 is further partially etched so that except for the back barrier layer 108 under the gate, the remaining positions are completely etched to form a back barrier layer 108 with a stepped structure including two horizontal platform surfaces.

[0069] (4) such as Figure 8 As shown, a secondary epitaxial layer 102 is formed and polished with CMP to make the surface of the secondary epitaxial layer 102 smooth.

[0070] (5) such as Figure 9 As shown, a secondary epitaxial growth process is continued to form a barrier layer 103 and a P-GaN layer 104. A gate metal is deposited on the side of the P-GaN layer 104 away from the substrate 100 to form a gate 107. Using the gate 107 as a mask, the P-GaN layer 104 outside the gate 107 is etched away. Then, ohmic metal is deposited on both sides of the barrier layer 103 to form a source 105 and a drain 106. The source 105 and the drain 106 form ohmic contacts with the two-dimensional electron gas (2DEG) at the heterojunction interface of the channel layer 102 and the barrier layer 103, respectively.

[0071] Therefore, through the above steps (1)-(5), a process is formed. Figure 1 The gallium nitride device shown.

[0072] Based on the same inventive concept, this disclosure provides an electronic device including the gallium nitride device described above. Since the principle by which this electronic device solves the problem is similar to that of the gallium nitride device, the implementation of the electronic device provided in this disclosure can refer to the implementation of the gallium nitride device described above, and repeated details will not be elaborated further.

[0073] In some embodiments, the electronic devices provided in this disclosure may include, but are not limited to, radio frequency amplifiers, mixers, radar, satellites, power supplies, automotive electronics, energy-saving lamps, and home appliances. Of course, the electronic devices provided in this disclosure may include other structures besides gallium nitride devices. For example, when the electronic device is a radar, it may also include structures such as transmitters, antennas, and receivers; when the electronic device is a mixer, it may also include structures such as input ports and output ports.

[0074] Although preferred embodiments of this disclosure have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this disclosure.

[0075] Obviously, those skilled in the art can make various modifications and variations to this disclosure without departing from its spirit and scope. Therefore, if such modifications and variations fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include such modifications and variations.

Claims

1. A gallium nitride device, characterized by, The gallium nitride device comprises: a substrate, a nucleation layer, a buffer layer, a channel layer and a barrier layer which are sequentially stacked in an epitaxial direction; and a source electrode and a drain electrode which are located on two sides of the barrier layer and are electrically connected to the channel layer, respectively; a P-GaN layer which is located on a side of the barrier layer away from the substrate and between the source electrode and the drain electrode; a gate electrode which is located on a side of the P-GaN layer away from the substrate; a back barrier layer which is located in the buffer layer, in the channel layer or between the buffer layer and the channel layer; the back barrier layer comprises at least two regions with different thicknesses in a direction from the source electrode to the drain electrode, the direction from the source electrode to the drain electrode is perpendicular to the epitaxial direction, a region of the back barrier layer close to the source electrode has a greater thickness than a region of the back barrier layer close to the drain electrode, and a projection of the P-GaN layer on the substrate covers projections of the regions of the back barrier layer with different thicknesses on the substrate; a surface of the channel layer away from the substrate is a flat surface; a projection of the source electrode on the substrate does not overlap with a projection of the back barrier layer on the substrate, and a projection of the drain electrode on the substrate does not overlap with a projection of the back barrier layer on the substrate.

2. The gallium nitride device of claim 1, wherein, The back barrier layer comprises a first region and a second region which are connected, the first region is close to the source electrode, the second region is close to the drain electrode, and the first region has a greater thickness than the second region.

3. The gallium nitride device of claim 2, wherein, The thickness of the first region is the same at different positions, or gradually decreases in the direction from the source electrode to the drain electrode.

4. The gallium nitride device of claim 2, wherein, The thickness of the second region is the same at different positions, or gradually decreases in the direction from the source electrode to the drain electrode.

5. The gallium nitride device of any one of claims 2-4, wherein, Further comprising: a third region between the first region and the second region, the first region has a greater thickness than the third region, and the third region has a greater thickness than the second region.

6. The gallium nitride device of claim 5, wherein, The thickness of the third region is the same at different positions, or gradually decreases in the direction from the source electrode to the drain electrode.

7. The gallium nitride device of claim 5, wherein the gallium nitride device is a light emitting diode. A projection of the P-GaN layer on the substrate covers projections of at least two adjacent regions of the first region, the third region and the second region on the substrate.

8. The gallium nitride device of any of claims 3-4, 6, wherein, Each region with gradually decreasing thickness has a curved surface away from the substrate.

9. The gallium nitride device of claim 1 wherein, The bottom surface of the back barrier layer facing the substrate is in contact with the buffer layer, the back barrier layer is embedded in the channel layer, the thickness of the back barrier layer is less than the thickness of the channel layer, and the material of the back barrier layer is In x Al y Ga (1-x-y) N, wherein x≥0, y>0.

10. An electronic device, comprising: The gallium nitride device comprises: a substrate, a nucleation layer, a buffer layer, a channel layer and a barrier layer which are sequentially stacked in an epitaxial direction; and a source electrode and a drain electrode which are located on two sides of the barrier layer and are electrically connected to the channel layer, respectively; a P-GaN layer which is located on a side of the barrier layer away from the substrate and between the source electrode and the drain electrode; a gate electrode which is located on a side of the P-GaN layer away from the substrate; a back barrier layer which is located in the buffer layer, in the channel layer or between the buffer layer and the channel layer; the back barrier layer comprises at least two regions with different thicknesses in a direction from the source electrode to the drain electrode, the direction from the source electrode to the drain electrode is perpendicular to the epitaxial direction, a region of the back barrier layer close to the source electrode has a greater thickness than a region of the back barrier layer close to the drain electrode, and a projection of the P-GaN layer on the substrate covers projections of the regions of the back barrier layer with different thicknesses on the substrate; a surface of the channel layer away from the substrate is a flat surface; a projection of the source electrode on the substrate does not overlap with a projection of the back barrier layer on the substrate, and a projection of the drain electrode on the substrate does not overlap with a projection of the back barrier layer on the substrate. The back barrier layer comprises a first region and a second region which are connected, the first region is close to the source electrode, the second region is close to the drain electrode, and the first region has a greater thickness than the second region. The thickness of the first region is the same at different positions, or gradually decreases in the direction from the source electrode to the drain electrode. The thickness of the second region is the same at different positions, or gradually decreases in the direction from the source electrode to the drain electrode. Further comprising: a third region between the first region and the second region, the first region has a greater thickness than the third region, and the third region has a greater thickness than the second region. The thickness of the third region is the same at different positions, or gradually decreases in the direction from the source electrode to the drain electrode. A projection of the P-GaN layer on the substrate covers projections of at least two adjacent regions of the first region, the third region and the second region on the substrate. Each region with gradually decreasing thickness has a curved surface away from the substrate. The gallium nitride device comprises: a substrate, a nucleation layer, a buffer layer, a channel layer and a barrier layer which are sequentially stacked in an epitaxial direction; and a source electrode and a drain electrode which are located on two sides of the barrier layer and are electrically connected to the channel layer, respectively; a P-GaN layer which is located on a side of the barrier layer away from the substrate and between the source electrode and the drain electrode; a gate electrode which is located on a side of the P-GaN layer away from the substrate; a back barrier layer which is located in the buffer layer, in the channel layer or between the buffer layer and the channel layer; the back barrier layer comprises at least two regions with different thicknesses in a direction from the source electrode to the drain electrode, the direction from the source electrode to the drain electrode is perpendicular to the epitaxial direction, a region of the back barrier layer close to the source electrode has a greater thickness than a region of the back barrier layer close to the drain electrode, and a projection of the P-GaN layer on the substrate covers projections of the regions of the back barrier layer with different thicknesses on the substrate; a surface of the channel layer away from the substrate is a flat surface; a projection of the source electrode on the substrate does not overlap with a projection of the back barrier layer on the substrate, and a projection of the drain electrode on the substrate does not overlap with a projection of the back barrier layer on the substrate.

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