Heterogeneous wafer bonding method and device based on doped and amorphous transition layers

Abstract

The invention discloses a heterogeneous wafer bonding method and device based on doped and amorphous transition layers, relates to the technical field of semiconductor manufacturing, and aims to solve the problems of low heat conductivity and electric leakage of a heterogeneous wafer interface caused by a bonding process in the prior art. The method comprises the following steps: providing a first wafer and a second wafer with different thermal conductivities, and firstly cleaning the surfaces of the first wafer and the second wafer; respectively forming a wafer doping layer and / or an amorphous transition layer on the cleaned first wafer and second wafer to obtain a first target wafer and a second target wafer; and finally, performing contact bonding on the first target wafer and the second target wafer to obtain a target heterogeneous wafer. The heat conductivity of the bonding interface is improved while the electric leakage rate of the heterogeneous wafer bonding interface is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor manufacturing, and in particular to a hetero wafer bonding method and device based on a doped and amorphous transition layer. BACKGROUND

[0002] With the miniaturization of devices and the increase in integration density, silicon-based devices face severe thermal management problems. How to improve the heat dissipation capacity of chips is a key problem that needs to be solved in the field of advanced manufacturing. Wafer bonding technology is a key process technology in the field of microelectronics. Different types of wafer materials can be bonded together using this technology to form a hetero wafer material. Therefore, introducing high-thermal-conductivity substrates such as SiC and diamond into traditional silicon-based devices to replace traditional low-thermal-conductivity substrates is a promising technical solution to improve the heat dissipation capacity of chips.

[0003] The existing bonding process of high-thermal-conductivity wafers such as SiC and diamond and low-thermal-conductivity wafers such as Si and TeO2 uses a direct bonding process. That is, the high-thermal-conductivity wafers such as SiC and diamond are aligned with the low-thermal-conductivity materials such as Si and TeO2 and then directly bonded. Due to problems such as lattice mismatch, interface defects, and stress between different materials, the direct bonding method used in the current direct bonding process can result in poor bonding interface quality, low interface thermal conductivity, and electrical leakage, which seriously affects the performance of the device and the heat dissipation performance and reliability of the internal heat transfer to the high-thermal-conductivity substrate.

[0004] Therefore, there is an urgent need for a more advanced hetero wafer bonding method to solve the problem of low bonding interface thermal conductivity and electrical leakage caused by the existing bonding process. SUMMARY

[0005] The present application aims to provide a hetero wafer bonding method and device based on a doped and amorphous transition layer. By providing first and second wafers with different thermal conductivities, the first and second wafers are first surface cleaned. Then, wafer doping layers and / or amorphous transition layers are formed on the cleaned first and second wafers to obtain first and second target wafers. Finally, the first and second target wafers are contact bonded to obtain a target hetero wafer. The amorphous transition layer at the bonding interface of the hetero wafer can reduce the electrical leakage rate, and the wafer doping layer at the bonding interface of the hetero wafer can optimize the phonon transport characteristics, thereby also improving the thermal conductivity of the bonding interface. Thus, the problem of low bonding interface thermal conductivity and electrical leakage caused by the existing bonding process is solved.

[0006] To achieve the above-mentioned purpose, the present application provides the following technical solutions:

[0007] In a first aspect, the present application provides a method for hetero wafer bonding based on doping and amorphous transition layer, which can include:

[0008] providing a first wafer and a second wafer, the first wafer and the second wafer having different thermal conductivities;

[0009] cleaning surfaces of the first wafer and the second wafer;

[0010] forming a wafer doping layer and / or an amorphous transition layer on the cleaned first wafer and the cleaned second wafer respectively to obtain a first target wafer and a second target wafer; the wafer doping layer is a doping layer obtained by doping a wafer with an intrinsic element or an isotopic element corresponding to the wafer as a doping element according to a target doping concentration, a target doping thickness and a target doping width;

[0011] contact bonding the first target wafer and the second target wafer to obtain a target hetero wafer.

[0012] Preferably, the forming a wafer doping layer and / or an amorphous transition layer on the cleaned first wafer and the cleaned second wafer respectively to obtain a first target wafer and a second target wafer can include:

[0013] forming a first wafer doping layer on the first wafer and a second amorphous transition layer on the second wafer to obtain the first target wafer and the second target wafer;

[0014] or, forming a first amorphous transition layer on the first wafer and a second wafer doping layer on the second wafer to obtain the first target wafer and the second target wafer;

[0015] or, forming a first wafer doping layer and a first amorphous transition layer on the first wafer, and forming a second wafer doping layer and a second amorphous transition layer on the second wafer to obtain the first target wafer and the second target wafer.

[0016] Preferably, when the first wafer is a wafer of high thermal conductivity material, the high thermal conductivity material includes silicon carbide or diamond;

[0017] The forming a first wafer doping layer on the first wafer can include:

[0018] selecting a first target intrinsic element or a first target isotopic element as a doping element, and doping the first wafer according to a target doping concentration, a target doping thickness and a target doping width to obtain the first wafer doping layer; the first target intrinsic element includes silicon or carbon; the first target isotopic element includes 29 Si, 30 Si or13 C.

[0019] Preferably, when the second wafer is a wafer of low thermal conductivity material, the low thermal conductivity material comprises silicon or tellurium dioxide;

[0020] The forming of the second wafer doped layer on the second wafer can comprise:

[0021] The second target intrinsic element or the second target isotope element is selected as a doping element, and wafer doping is performed on the second wafer according to a target doping concentration, a target doping thickness, and a target doping width, to obtain the second wafer doped layer; the second target intrinsic element comprises silicon, oxygen, or tellurium; and the second target isotope element comprises 29 Si or 30 Si.

[0022] Preferably, the target doping concentration corresponds to an atomic percentage of less than or equal to 80%; the target doping thickness corresponds to a distance of a doped region from the bonding interface of less than or equal to 1 micrometer; and the target doping width corresponds to a width of the doped region of less than or equal to 1 micrometer.

[0023] Preferably, the forming of the first amorphous transition layer on the first wafer can comprise:

[0024] A preset deposition method is used to form the first amorphous transition layer on the first wafer; the preset deposition method comprises an atomic layer deposition method or a magnetron sputtering method; and the amorphous transition layer comprises amorphous silicon oxide or amorphous aluminum oxide.

[0025] The forming of the second amorphous transition layer on the second wafer can comprise:

[0026] The preset deposition method is used to form the second amorphous transition layer on the second wafer.

[0027] Preferably, the forming of the first wafer doped layer and the second amorphous transition layer on the first wafer can comprise:

[0028] The first wafer doped layer is formed on the first wafer first, and then the first amorphous transition layer is formed on the first wafer doped layer of the first wafer;

[0029] Alternatively, the first amorphous transition layer is formed on the first wafer first, and then the first wafer doped layer is formed on the first amorphous transition layer of the first wafer;

[0030] The forming of the second wafer doped layer and the second amorphous transition layer on the second wafer can comprise:

[0031] forming a second wafer doping layer on the second wafer first, and then forming a second amorphous transition layer on the second wafer doping layer of the second wafer;

[0032] Alternatively, forming a second amorphous transition layer on the second wafer first, and then forming a second wafer doping layer on the second amorphous transition layer of the second wafer.

[0033] Preferably, the contacting bonding of the first target wafer and the second target wafer to obtain a target hetero wafer can include:

[0034] aligning and contacting the pretreatment layer on the first target wafer with the pretreatment layer of the second target wafer, and applying a target pressure for contact bonding to obtain a target hetero wafer; the pretreatment layer refers to the wafer doping layer and / or amorphous transition layer formed on the first wafer and the second wafer.

[0035] Preferably, after forming the wafer doping layer and / or amorphous transition layer on the cleaned first wafer and the cleaned second wafer respectively to obtain the first target wafer and the second target wafer, and before the contact bonding of the first target wafer and the second target wafer, can include:

[0036] when plasma activated bonding is used, plasma is used to remove residues on the first target wafer and the second target wafer;

[0037] when hydrophilic bonding is used, the first target wafer and the second target wafer are chemically treated;

[0038] when hydrophobic bonding is used, the first target wafer and the second target wafer are surface treated to reduce the hydroxyl group on the wafer surface.

[0039] In a second aspect, the present application provides a hetero wafer bonding device based on doping and amorphous transition layer, which can include:

[0040] a wafer providing module, which is used to provide a first wafer and a second wafer, the first wafer and the second wafer having different thermal conductivities;

[0041] a surface cleaning module, which is used to clean the surface of the first wafer and the second wafer;

[0042] A wafer surface pretreatment module is configured to form a wafer doping layer and / or an amorphous transition layer on the cleaned first wafer and the cleaned second wafer respectively, to obtain a first target wafer and a second target wafer; the wafer doping layer is a doping layer obtained by doping a wafer with an intrinsic element or an isotope element corresponding to the wafer as a doping element according to a target doping concentration, a target doping thickness and a target doping width;

[0043] A bonding module is configured to contact bond the first target wafer and the second target wafer to obtain a target hetero-wafer.

[0044] Compared with the prior art, the hetero-wafer bonding method based on doping and amorphous transition layer provided by the application can form a disordered structure at the interface by using the amorphous transition layer, buffer the discontinuity of phonons, reduce interface scattering, and reduce the probability of bonding interface leakage; at the same time, the amorphous transition layer can also relieve lattice mismatch stress, reduce the risk of cracking, and improve bonding strength, thermal conductivity and long-term stability; and the doping layer can also regulate the phonon mode of the bonding interface, improve the phonon transmission efficiency, and improve the thermal conductivity of the bonding interface of the hetero-wafer; thereby, the thermal conductivity of the bonding interface is improved while the probability of bonding interface leakage is reduced, and the problem of low thermal conductivity and leakage of the hetero-wafer interface caused by the bonding process in the prior art is solved. BRIEF DESCRIPTION OF DRAWINGS

[0045] The accompanying drawings, which are included to provide a further understanding of the application, constitute a part of this application and illustrate exemplary embodiments of the application and together with the description serve to explain the application. In the drawings:

[0046] Figure 1 A main flowchart of the hetero-wafer bonding method based on doping and amorphous transition layer provided by the application is shown in the figure;

[0047] Figure 2 A first bonding flowchart of the hetero-wafer bonding method based on doping and amorphous transition layer provided by the application is shown in the figure;

[0048] Figure 3A second bonding process schematic diagram in a hetero wafer bonding method based on doping and amorphous transition layer provided by the present application;

[0049] Figure 4 A third bonding process schematic diagram in a hetero wafer bonding method based on doping and amorphous transition layer provided by the present application;

[0050] Figure 5 A relationship between doping concentration and thermal conductivity schematic diagram in a hetero wafer bonding method based on doping and amorphous transition layer provided by the present application;

[0051] Figure 6 A main structure schematic diagram of a hetero wafer bonding device based on doping and amorphous transition layer provided by the present application.

[0052] The figure mark: 10-first wafer, 20-second wafer, 31-first wafer doping layer, 32-first amorphous transition layer, 41-second wafer doping layer, 42-second amorphous transition layer, 30-first target wafer, 40-second target wafer, 50-bonding interface. DETAILED DESCRIPTION

[0053] In order to clearly describe the technical scheme of the embodiments of the present application, in the embodiments of the present application, the same items or similar items with basically the same function and role are distinguished by using "first", "second" and the like. For example, the first threshold and the second threshold are only used to distinguish different thresholds, and the first and the second are not limited in time sequence. Those skilled in the art can understand that "first", "second" and the like do not limit the quantity and execution sequence, and "first", "second" and the like do not necessarily mean different.

[0054] It should be noted that in the present application, the words "exemplary" or "for example" are used to mean serving as an example, instance, or illustration. Any embodiment or design presented as "exemplary" or "for example" in the present application should not be interpreted as being more preferred or advantageous than other embodiments or design solutions. Rather, the use of "exemplary" or "for example" is intended to present relevant concepts in a concrete manner.

[0055] In the present application, "at least one" means one or more, and "multiple" means two or more. The association relationship of "and / or" describing the associated objects means that there can be three kinds of relationships, for example, A and / or B can represent the following three cases: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The character " / " generally represents that the associated objects are in an "or" relationship. "At least one of the following" or similar expressions means any combination of these items, including any combination of single or multiple items. For example, at least one of a, b, or c can represent a, b, c, the combination of a and b, the combination of a and c, the combination of b and c, or the combination of a, b, and c, where a, b, and c can be single or multiple.

[0056] Firstly, the main English abbreviations involved in the present application are explained as follows:

[0057]

[0058] Lattice mismatch refers to the stress and interface defects near the bonding interface due to the difference in lattice constants and atomic coordination numbers of two substances, i.e. mismatch dislocations. The effects of lattice mismatch mainly include the following aspects:

[0059] (1) Stress concentration: Lattice mismatch leads to lattice distortion, resulting in additional stress, which is concentrated near the grain boundary, which may cause material rupture, cracking or reduce the strength and toughness of the material.

[0060] (2) Performance degradation: Lattice mismatch may affect the electrical, thermal and mechanical properties of the material. For example, lattice mismatch may cause the resistivity of the material to increase, the thermal conductivity to decrease, or the mechanical properties (such as elastic modulus, fracture toughness) to decrease.

[0061] (3) Interface defects: Lattice mismatch may cause defects such as dislocations, vacancies, interstitial atoms, etc. at the interface, which will affect the overall performance of the material.

[0062] (4) Corrosion and oxidation: Lattice mismatch may cause defects at the interface, which may become the starting point of corrosion and oxidation, thereby accelerating the corrosion and oxidation process of the material.

[0063] (5) Reducing the interface bonding strength: Lattice mismatch may reduce the interface bonding strength, thereby affecting the overall performance and service life of the material.

[0064] (6) Reducing thermal stability: Lattice mismatch may reduce the thermal stability of the material, which is prone to phase transition or decomposition in high temperature environment.

[0065] In recent years, some studies have proposed the introduction of a buffer layer at the wafer bonding interface to reduce interface stress and improve bonding quality. For example, Mu et al. (2016) proposed a method based on improved surface activated bonding (SAB) to introduce a sputter-deposited Si nanolayer (thickness of about 10 nm) at the bonding interface between SiC and Si to improve the interface bonding strength. In this study, the SiC surface was activated by Ar-FAB (argon atomic beam) to remove contaminants and oxide layers, and then a Si layer was deposited by sputtering to form a uniform intermediate layer (thickness of about 15 nm) between SiC and Si, which contains a SiC surface layer, a sputtered Si layer, and a Si surface layer. This method achieved room-temperature SiC-Si wafer bonding and tested the interface bonding strength and thermal stability.

[0066] Test studies have shown that high-temperature annealing (>1273K, 1-40h) can enhance bonding strength, but may cause damage to low-melting-point materials and lead to increased doping diffusion. In addition, low-temperature annealing (423-773K) can cause the formation of an oxide layer at the interface, which is undesirable in some applications. Removing the oxide layer usually requires annealing in an inert atmosphere or high vacuum environment above 1273K for about 2 hours; and the bonding strength of the oxidized interface is not sufficient to withstand rapid thermal annealing (RTA) during the electrode preparation process of some SiC devices. Therefore, while introducing a sputtered Si layer at the SiC-Si interface can improve the interface bonding strength, this method mainly focuses on mechanical bonding performance and does not optimize the interface phonon transmission characteristics and thermal conductivity; and this method may still cause doping diffusion or oxide layer formation under high-temperature annealing conditions, affecting the long-term stability of some high-precision semiconductor devices.

[0067] Therefore, there is currently no better technology to solve the problems of low thermal conductivity and electrical leakage at the hetero-wafer bonding interface; there is an urgent need for a more advanced hetero-wafer bonding method to solve the problem of low thermal conductivity and electrical leakage at the bonding interface caused by the bonding process in the prior art. Based on this, the present application provides a hetero-wafer bonding method and device based on doping and amorphous transition layer, which uses the intrinsic element or isotope element corresponding to the wafer as the doping element for wafer doping based on doping concentration, doping thickness, and doping width, and / or forms an amorphous transition layer on the wafer before contact bonding, achieving a reduction in the electrical leakage rate of the hetero-wafer bonding interface while improving the interface thermal conductivity; solving the problem of low thermal conductivity and electrical leakage at the bonding interface caused by the bonding process in the prior art.

[0068] The technical solutions of the present application will be described in detail below in conjunction with the drawings:

[0069] In a first aspect, the present application provides a hetero-wafer bonding method based on doping and amorphous transition layer; please refer toFigure 1 , Figure 1 A main flowchart of a hetero-wafer bonding method based on doping and amorphous transition layer provided by the present application; the main body of the method is a bonding process platform or simulation platform equipped with the hetero-wafer bonding method provided by the present application, such as a plasma-activated room-temperature bonding process platform, a hydrophobic bonding process platform, a hydrophilic bonding process platform, or a cross-scale thermal property simulation platform, etc.

[0070] In Figure 1 , the method can include:

[0071] Step 110: providing a first wafer 10 and a second wafer 20, the first wafer 10 and the second wafer 20 having different thermal conductivities.

[0072] In step 110, the first wafer 10 can be a high-thermal-conductivity wafer or a low-thermal-conductivity wafer, and the second wafer 20 can be a high-thermal-conductivity wafer or a low-thermal-conductivity wafer; when the first wafer 10 is a high-thermal-conductivity wafer, the second wafer 20 is a low-thermal-conductivity wafer; when the first wafer 10 is a low-thermal-conductivity wafer, the second wafer 20 is a high-thermal-conductivity wafer; thereby obtaining bonding raw materials of two different thermal conductivities of hetero-wafers. The high-thermal-conductivity wafer can be a wafer of high-thermal-conductivity materials such as SiC and diamond, and the low-thermal-conductivity wafer can be a wafer of low-thermal-conductivity materials such as Si and TeO2.

[0073] Step 120: surface cleaning of the first wafer 10 and the second wafer 20.

[0074] In step 120, the main way of surface cleaning is to use a combination of chemical cleaning and ultrasonic cleaning to remove organic contaminants, oxide layers, and particulate matter on the wafer surface, and to improve the surface cleanliness; however, for different bonding processes, the way of surface cleaning of the wafer is different. For example: when hydrophilic bonding is used, the present application preferably uses a chemical solution to clean the surface of the first wafer 10 and the second wafer 20; when hydrophobic bonding is used, the present application preferably uses a hydrophobic silane compound to clean the surface of the first wafer 10 and the second wafer 20; when plasma-activated room-temperature bonding is used, the present application preferably uses an acid or alkaline solution to clean the surface of the first wafer 10 and the second wafer 20; thereby improving the surface cleanliness of the wafer, and better adapting to different bonding methods, which helps to improve the bonding quality of the hetero-wafer.

[0075] Step 130: forming a wafer doping layer and / or an amorphous transition layer on the first wafer 10 and the second wafer 20 respectively after cleaning, to obtain a first target wafer 30 and a second target wafer 40; the wafer doping layer is a doping layer obtained by doping a wafer with an intrinsic element or an isotope element corresponding to the wafer as a doping element according to a target doping concentration, a target doping thickness and a target doping width.

[0076] In step 130, the process of forming a wafer doping layer and / or an amorphous transition layer on a wafer is suitable for different bonding processes such as plasma activated bonding, hydrophilic bonding and hydrophobic bonding; the present application provides that in the formation of a wafer doping layer and / or an amorphous transition layer on a wafer, the amorphous transition layer can significantly improve the electron field emission performance of the material and also affect the heat conduction efficiency, so the amorphous transition layer can at least reduce the leakage probability of the bonding interface while improving the thermal conductivity; since the wafer is doped with an intrinsic element or an isotope element corresponding to the wafer as a doping element according to a target doping concentration, a target doping thickness and a target doping width, a doping layer is obtained, so the doping layer can be used to regulate the phonon mode of the bonding interface, improve the phonon transmission efficiency, and improve the thermal conductivity of the hetero-wafer bonding interface.

[0077] Step 140: contact bonding of the first target wafer 30 and the second target wafer 40 to obtain a target hetero-wafer.

[0078] In step 140, the contact bonding method can adopt the bonding method in the prior art, which is not limited in the present application.

[0079] Based on this, the present application provides a hetero-wafer bonding method based on doping and amorphous transition layer, which can form a disordered structure at the interface by using the amorphous transition layer, buffer the phonon discontinuity, reduce the interface scattering, and reduce the leakage probability of the bonding interface; at the same time, the amorphous transition layer can also relieve the lattice mismatch stress, reduce the risk of cracking, improve the bonding strength, thermal conductivity and long-term stability; and based on the doping layer, the phonon mode of the bonding interface can be regulated to improve the phonon transmission efficiency and improve the thermal conductivity of the hetero-wafer bonding interface; thereby the thermal conductivity of the bonding interface is improved while the leakage probability of the bonding interface is reduced, and the problem of low thermal conductivity and leakage of the hetero-wafer interface caused by the bonding process in the prior art is solved.

[0080] As an optional embodiment, after step 130 and before step 140, for the three different bonding processes in the prior art, the preferred wafer surface activation method in the present application is as follows:

[0081] 1. When the plasma activated bonding process is used, Ar or O2 plasma is used to remove the residual substances on the wafer surface to enhance the interface reactivity.

[0082] 2、When hydrophilic bonding process is adopted, then chemical treatment (such as acid or alkaline solution) is used to enhance the hydrophilicity of wafer surface and improve the bonding strength.

[0083] 3、When hydrophobic bonding process is adopted, then specific process (such as Si-H terminal treatment) is used to reduce the hydroxyl group on wafer surface, so as to be more suitable for high-temperature bonding scenarios.

[0084] Specifically, after the first wafer 10 and the second wafer 20 are cleaned, the wafer doping layer and / or the amorphous transition layer are formed on the first wafer 10 and the second wafer 20 respectively to obtain the first target wafer 30 and the second target wafer 40, and before the first target wafer 30 and the second target wafer 40 are contact bonded, the following steps are included: when plasma activation bonding is adopted, the plasma is used to remove the residues on the first target wafer 30 and the second target wafer 40; when hydrophilic bonding is adopted, the first target wafer 30 and the second target wafer 40 are subjected to chemical treatment; when hydrophobic bonding is adopted, the first target wafer 30 and the second target wafer 40 are subjected to surface treatment to reduce the hydroxyl group on the wafer surface. In this way, better bonding can be achieved and the bonding quality can be improved.

[0085] As an optional embodiment, in step 130, the wafer doping layer and / or the amorphous transition layer are formed on the first wafer 10 and the second wafer 20 respectively after cleaning to obtain the first target wafer 30 and the second target wafer 40. The following three ways can be used for the pretreatment of the wafer doping layer and / or the amorphous transition layer.

[0086] Way one: the first wafer doping layer 31 is formed on the first wafer 10 and the second amorphous transition layer 42 is formed on the second wafer 20 to obtain the first target wafer 30 and the second target wafer 40. Please refer to Figure 2 , Figure 2 A first bonding process schematic diagram of a hetero-wafer bonding method based on doping and amorphous transition layer provided by the present application; Figure 2 The three groups of pictures from left to right in the figure correspond to the steps 110, 130 and 140 of the method provided by the present application.

[0087] Specifically, in Figure 2In the intermediate group of pictures, when the first wafer 10 is a wafer of high-thermal-conductivity material, then the second wafer 20 is a wafer of low-thermal-conductivity material; the high-thermal-conductivity material can include silicon carbide or diamond, and the low-thermal-conductivity material can include silicon or tellurium dioxide; forming the first wafer doped layer 31 on the first wafer 10 can include: selecting a first target intrinsic element or a first target isotope element as a doping element, wafer doping the first wafer according to a target doping concentration, a target doping thickness, and a target doping width to obtain the first wafer doped layer 31; the first target intrinsic element includes silicon or carbon; and the first target isotope element includes 29 Si, 30 Si or 13 C.

[0088] Forming the second amorphous transition layer 42 on the second wafer 20 includes:

[0089] forming the second amorphous transition layer 42 on the second wafer 20 by using a preset deposition method; the preset deposition method includes atomic layer deposition or magnetron sputtering; and the amorphous transition layer includes amorphous silicon oxide or amorphous aluminum oxide. For example, atomic layer deposition (ALD) or magnetron sputtering (PVD) can be used to grow an amorphous transition layer such as amorphous silicon oxide (a-SiO2) or amorphous aluminum oxide (a-Al2O3) on the wafer surface. The thickness of the amorphous transition layer is preferably controlled to be 0.3 nm to 20 nm, so as to optimize heat transfer while ensuring interface bonding, and improve electromagnetic emission performance to reduce the probability of bonding interface leakage.

[0090] Method two: forming the first amorphous transition layer 32 on the first wafer 10 and forming the second wafer doped layer 41 on the second wafer 20 to obtain the first target wafer 30 and the second target wafer 40. Please refer to Figure 3 , Figure 3 a second bonding process schematic diagram of a hetero-wafer bonding method based on doping and amorphous transition layer provided by the present application; Figure 3 The three groups of pictures from left to right in the figure correspond to steps 110, 130, and 140 of the method provided by the present application.

[0091] forming the first amorphous transition layer 32 on the first wafer 10 can include: forming the first amorphous transition layer 32 on the first wafer 10 by using a preset deposition method; the preset deposition method can include atomic layer deposition or magnetron sputtering; and the amorphous transition layer includes amorphous silicon oxide or amorphous aluminum oxide. It should be noted that the method of forming the amorphous transition layer in method two is the same as that in method one, and will not be repeated here.

[0092] Forming the second wafer doping layer 41 on the second wafer 20 can include: selecting a second target intrinsic element or a second target isotope element as a doping element, wafer doping the second wafer according to a target doping concentration, a target doping thickness, and a target doping width, to obtain the second wafer doping layer 41; the second target intrinsic element includes silicon, oxygen, or tellurium; and the second target isotope element includes 29 Si or 30 Si.

[0093] In the first and second manners, the atomic percentage corresponding to the target doping concentration can be any value in an interval less than or equal to 80%; the distance of the doping region from the bonding interface corresponding to the target doping thickness can be any value in an interval less than or equal to 1 micrometer; and the doping region width corresponding to the target doping width can be any value in an interval less than or equal to 1 micrometer; the data can be set according to actual application scenarios.

[0094] For example, when wafer doping is performed on a first wafer 10 of a high-thermal-conductivity material such as SiC or diamond, the doping element can be selected as an intrinsic element or an isotope element of the material. For example, in a SiC wafer (substrate), Si, C, and isotopes 29 Si, 30 Si and 13 C can be selected as the doping element; in diamond, C and isotopes 13 C, etc. can be selected as the doping element; by optimizing the doping concentration (atomic percentage f: 0% < f < 80%) and the doping region (distance Ld from the interface: 0 nm < Ld < 1 micrometer) and the width Ls of the doping region (0 nm < Ls < 1 micrometer), the target doping concentration, the target doping thickness, and the target doping width are obtained, and wafer doping is performed, to obtain a doping technology process that can improve the interface thermal conductivity. The target doping concentration, the target doping thickness, and the target doping width can be set according to actual requirements.

[0095] Manner three: forming a first wafer doping layer 31 and a first amorphous transition layer 32 on the first wafer 10, and forming a second wafer doping layer 41 and a second amorphous transition layer 42 on the second wafer 20, to obtain a first target wafer 30 and a second target wafer 40. Please refer to Figure 4 , Figure 4 for a third bonding process schematic diagram of a heterogeneous wafer bonding method based on doping and amorphous transition layers provided by the present application; Figure 4 The three groups of pictures from left to right in the figure show steps 110, 130, and 140 of the method provided by the present application.

[0096] Specifically, forming the first wafer doped layer 31 and the first amorphous transition layer 32 on the first wafer 10 can include: first forming the first wafer doped layer 31 on the first wafer 10, and then forming the first amorphous transition layer 32 on the doped layer of the first wafer 10. Forming the second wafer doped layer 41 and the second amorphous transition layer 42 on the second wafer 20 can include: first forming the second wafer doped layer 41 on the second wafer 20, and then forming the second amorphous transition layer 42 on the second wafer doped layer 41 of the second wafer 20. Thus, the thermal conductivity of the bonding interface is better improved and the probability of leakage of the bonding interface is reduced.

[0097] In an alternative embodiment, the order of the doped layer and the amorphous transition layer on the wafer can also be adjusted according to actual needs, that is, forming the first wafer doped layer 31 and the first amorphous transition layer 32 on the first wafer 10 can also include: first forming the first amorphous transition layer 32 on the first wafer 10, and then forming the first wafer doped layer 31 on the first amorphous transition layer 32 of the first wafer 10. Forming the second wafer doped layer 41 and the second amorphous transition layer 42 on the second wafer 20 can also include: first forming the second amorphous transition layer 42 on the second wafer 20, and then forming the second wafer doped layer 41 on the second amorphous transition layer 42 of the second wafer 20; the thermal conductivity of the bonding interface can also be improved and the probability of leakage of the bonding interface can also be reduced.

[0098] It should be noted that in mode three, the first wafer doped layer 31 and the first amorphous transition layer 32 are formed on the first wafer 10, and the second wafer doped layer 41 and the second amorphous transition layer 42 are formed on the second wafer 20, and after the first target wafer 30 and the second target wafer 40 are obtained, the first target wafer 30 and the second target wafer 40 are subjected to a bonding operation; since the wafer doped layer and the amorphous transition layer exist on the first target wafer 30 and the second target wafer 40 to be subjected to hetero-bonding, the hetero-wafer obtained has higher bonding strength and better thermal conductivity, and test results show that there is no leakage phenomenon; in this mode, the way of forming the wafer doped layer and the amorphous transition layer can be the same as the way of forming the wafer doped layer or the amorphous transition layer in mode one and two, and details are not described herein.

[0099] Further, to verify the beneficial effect of the wafer obtained by the doping process provided by the present application on the improvement of thermal conductivity, please refer to Figure 5 , Figure 5 The relationship between the doping concentration and the thermal conductivity in the hetero-wafer bonding method based on the doping and the amorphous transition layer provided by the present application is shown in the schematic diagram.

[0100] In Figure 5 , the horizontal axis represents the doping concentration, and the unit is percent; the vertical axis represents the interface thermal conductivity, and the unit is GW / m 2 K; byFigure 5 It can be concluded without doubt that, when the isotopic element for the Si wafer is used as a doping element, the interface thermal conductivity is obviously improved when the doping concentration is between 20% and 30%; the interface thermal conductivity is best improved when the doping concentration is about 40%; and the interface thermal conductivity is in a downward trend when the doping concentration is between 45% and 50% compared with the interface thermal conductivity when the doping concentration is about 40%. Based on this, the application realizes the regulation of the phonon transmission mode at the interface by using the doping layer, enhances the phonon transmission probability of the bonding interface, and improves the bonding interface thermal conductivity of the hetero-wafer.

[0101] As an optional embodiment, in step 140, the contact bonding of the first target wafer 30 and the second target wafer 40 to obtain the target hetero-wafer can include: aligning and contacting the pretreatment layer on the first target wafer 30 with the pretreatment layer of the second target wafer 40, applying a target pressure for contact bonding to obtain the target hetero-wafer; the pretreatment layer represents the wafer doping layer and / or amorphous transition layer formed on the first wafer 10 and the second wafer 20. Please refer to Figures 2 to 4 , Figures 2 to 4 The bonded hetero-wafer shown in the rightmost group of pictures has a bonding interface 50 that is the interface after the pressure bonding of the pretreatment layers of the two target wafers.

[0102] For example, when contact bonding is performed, the high-thermal-conductivity wafer such as a treated SiC or diamond and the Si wafer can be aligned under clean room conditions, the wafer positioning grooves or positioning flat edges are aligned, and then pressure is applied to ensure good contact between the two, so that wafer bonding is completed, thereby obtaining a hetero-wafer as shown in Figures 2 to 4 The hetero-wafer shown in the rightmost group of pictures. The contact bonding mode can also use the bonding mode in the prior art, which is not specifically limited in the application.

[0103] As an optional embodiment, after step 140, the hetero-wafer can be subjected to an annealing process, which includes: controlling the annealing temperature to be 100-400℃ to promote interface atomic diffusion and improve bonding strength, while avoiding high-temperature doping diffusion or interface oxidation. In addition, low-temperature annealing can also be used to grow an amorphous oxide layer at the interface to optimize the interface bonding characteristics. Of course, for the three different bonding processes of plasma-activated bonding, hydrophilic bonding and hydrophobic bonding, the annealing process of the hetero-wafer can also use the annealing mode in the prior art.

[0104] Based on this, the hetero wafer bonding method based on the doped and amorphous transition layer provided by the application can form an amorphous transition layer on the wafer, which can form a disordered structure at the interface, buffer phonon discontinuity, reduce interface scattering, and reduce the probability of bonding interface leakage; and the amorphous material has continuous phonon state density, can play a role of a “bridge” between high-thermal-conductivity materials (such as SiC and diamond) and low-thermal-conductivity materials (such as Si, Ga2O3 and TeO2), and improve the phonon transmission probability; meanwhile, the doped layer can introduce a local phonon mode, reduce long-wave phonon scattering, and improve the transport capacity of short-wave phonons, further optimizing the interface thermal conductivity; the bonding interface leakage probability is reduced while the bonding interface thermal conductivity is improved, and the problems of low bonding interface thermal conductivity and leakage caused by the bonding process in the prior art are solved.

[0105] In a second aspect, the application provides a hetero wafer bonding device based on a doped and amorphous transition layer; please refer to Figure 6 , Figure 6 The main structure diagram of the hetero wafer bonding device based on the doped and amorphous transition layer provided by the application is shown.

[0106] In Figure 6 , the device can include:

[0107] The wafer providing module 610 is configured to provide a first wafer and a second wafer, and the first wafer and the second wafer have different thermal conductivities.

[0108] The surface cleaning module 620 is configured to clean the surfaces of the first wafer and the second wafer.

[0109] The wafer surface pretreatment module 630 is configured to form a wafer doped layer and / or an amorphous transition layer on the cleaned first wafer and the cleaned second wafer, respectively, to obtain a first target wafer and a second target wafer; the wafer doped layer is a doped layer obtained by doping a wafer with an intrinsic element or an isotope element corresponding to the wafer as a doping element according to a target doping concentration, a target doping thickness and a target doping width.

[0110] The bonding module 640 is configured to contact bond the first target wafer and the second target wafer to obtain a target hetero wafer.

[0111] Based on this, the application provides a hetero wafer bonding device based on doping and amorphous transition layer, a first wafer and a second wafer are provided by using a wafer providing module 610, the first wafer and the second wafer have different thermal conductivities; first, the first wafer and the second wafer are surface cleaned by using a surface cleaning module 620, then a wafer doping layer and / or an amorphous transition layer are formed on the cleaned first wafer and the cleaned second wafer respectively by using a wafer surface pretreatment module 630, to obtain a first target wafer and a second target wafer; wherein the wafer doping layer is a doping layer obtained by doping a wafer with an intrinsic element or an isotope element corresponding to the wafer as a doping element according to a target doping concentration, a target doping thickness and a target doping width; finally, the first target wafer and the second target wafer are contact bonded by using a bonding module 640, to obtain a target hetero wafer; so that the amorphous transition layer can be used to form a disordered structure at the interface, buffer the discontinuity of phonons, reduce interface scattering and reduce the probability of bonding interface leakage; at the same time, the amorphous transition layer can also relieve lattice mismatch stress, reduce the risk of cracking and improve bonding strength, thermal conductivity and long-term stability; and the doping layer can also regulate the phonon mode of the bonding interface, improve the phonon transmission efficiency and improve the thermal conductivity of the bonding interface of the hetero wafer; so that the thermal conductivity of the bonding interface is improved while the probability of bonding interface leakage is reduced, and the problems of low thermal conductivity and leakage at the interface of the hetero wafer caused by the bonding process in the prior art are solved.

[0112] Although the application has been described in connection with specific embodiments thereof, it will be understood that it is capable of further modifications and this application is intended to cover any variations, uses or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the application pertains. It is intended to cover and invoke the full spirit and scope of the appended claims.

[0113] Although the application has been described in connection with specific embodiments thereof, it will be understood that it is capable of further modifications and this application is intended to cover any variations, uses or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the application pertains. It is intended to cover and invoke the full spirit and scope of the appended claims.

Claims

1. A method for hetero wafer bonding based on doping and amorphous transition layer, characterized in that, The application relates to a method for preparing a target hetero wafer. The method comprises the following steps: providing a first wafer and a second wafer, wherein the first wafer and the second wafer have different thermal conductivities; performing surface cleaning on the first wafer and the second wafer; forming a wafer doped layer and / or an amorphous transition layer on the cleaned first wafer and the cleaned second wafer respectively to obtain a first target wafer and a second target wafer; the wafer doped layer is a doped layer obtained by wafer doping with an intrinsic element or an isotope element corresponding to the wafer as a doping element according to a target doping concentration, a target doping thickness and a target doping width; 2. The method of claim 1, wherein the doped and amorphous transition layer is formed by a process selected from the group consisting of plasma enhanced chemical vapor deposition, plasma enhanced atomic layer deposition, and plasma enhanced molecular layer deposition. performing contact bonding on the first target wafer and the second target wafer to obtain a target hetero wafer. The method for preparing a target hetero wafer comprises the following steps: forming a first wafer doped layer on the first wafer and a second amorphous transition layer on the second wafer to obtain the first target wafer and the second target wafer; or forming a first amorphous transition layer on the first wafer and a second wafer doped layer on the second wafer to obtain the first target wafer and the second target wafer; 3. The method of claim 2, wherein the non-doped amorphous transition layer is formed by a process selected from the group consisting of plasma enhanced chemical vapor deposition, plasma enhanced atomic layer deposition, and plasma enhanced atomic layer epitaxy. or forming a first wafer doped layer and a first amorphous transition layer on the first wafer and forming a second wafer doped layer and a second amorphous transition layer on the second wafer to obtain the first target wafer and the second target wafer. When the first wafer is a wafer of a high-thermal-conductivity material, the high-thermal-conductivity material comprises silicon carbide or diamond; The method for forming a first wafer doped layer on the first wafer comprises the following steps: The first target intrinsic element includes silicon or carbon; the first target isotopic element includes 29 Si, 30 Si or 13 C.

4. The method of claim 2, wherein the non-doped amorphous transition layer is formed by a process selected from the group consisting of plasma enhanced chemical vapor deposition, plasma enhanced atomic layer deposition, and plasma enhanced molecular layer deposition. selecting a first target intrinsic element or a first target isotope element as a doping element, and performing wafer doping on the first wafer according to a target doping concentration, a target doping thickness and a target doping width to obtain the first wafer doped layer; When the second wafer is a wafer of a low-thermal-conductivity material, the low-thermal-conductivity material comprises silicon or tellurium dioxide; The method for forming a second wafer doped layer on the second wafer comprises the following steps: The second target intrinsic element includes silicon, oxygen, or tellurium; and the second target isotopic element includes 29 Si or 30 Si.

5. The method of claim 3 or 4, wherein the non-doped amorphous transition layer has a thickness of 0.5 to 5 nm. selecting a second target intrinsic element or a second target isotope element as a doping element, and performing wafer doping on the second wafer according to a target doping concentration, a target doping thickness and a target doping width to obtain the second wafer doped layer; 6. The method of claim 2, wherein the doped and amorphous transition layer is formed by a process selected from the group consisting of plasma enhanced chemical vapor deposition, plasma enhanced atomic layer deposition, and plasma enhanced molecular layer deposition. The atomic percentage corresponding to the target doping concentration is less than or equal to 80%; the distance of a doped region corresponding to the target doping thickness from a bonding interface is less than or equal to 1 micron; and the width of a doped region corresponding to the target doping width is less than or equal to 1 micron. The method for forming a first amorphous transition layer on the first wafer comprises the following steps: adopting a preset deposition method to form a first amorphous transition layer on the first wafer; the preset deposition method comprises an atomic layer deposition method or a magnetron sputtering method; and the amorphous transition layer comprises amorphous silicon oxide or amorphous aluminum oxide; The method for forming a second amorphous transition layer on the second wafer comprises the following steps: adopting the preset deposition method to form a second amorphous transition layer on the second wafer.

7. The method of claim 2, wherein the non-doped amorphous transition layer is formed by a process selected from the group consisting of plasma enhanced chemical vapor deposition, plasma enhanced atomic layer deposition, and plasma enhanced molecular layer deposition. The forming a first wafer doped layer and a second amorphous transition layer on the first wafer comprises: forming a first wafer doped layer on the first wafer first, and then forming a first amorphous transition layer on the first wafer doped layer of the first wafer; or, forming a first amorphous transition layer on the first wafer first, and then forming a first wafer doped layer on the first amorphous transition layer of the first wafer; The forming a second wafer doped layer and a second amorphous transition layer on the second wafer comprises: forming a second wafer doped layer on the second wafer first, and then forming a second amorphous transition layer on the second wafer doped layer of the second wafer; or, forming a second amorphous transition layer on the second wafer first, and then forming a second wafer doped layer on the second amorphous transition layer of the second wafer.

8. The method of claim 1, wherein the doped and amorphous transition layer is formed by a process selected from the group consisting of plasma enhanced chemical vapor deposition, plasma enhanced atomic layer deposition, and plasma enhanced molecular layer deposition. The contact bonding of the first target wafer and the second target wafer to obtain a target hetero wafer comprises: aligning and contacting the pretreatment layer on the first target wafer with the pretreatment layer on the second target wafer, and applying a target pressure for contact bonding to obtain a target hetero wafer; the pretreatment layer represents the wafer doped layer and / or the amorphous transition layer formed on the first wafer and the second wafer.

9. The method of claim 1, wherein the doped and amorphous transition layer is formed by a process selected from the group consisting of plasma enhanced chemical vapor deposition, plasma enhanced atomic layer deposition, and plasma enhanced molecular layer deposition. After forming the wafer doped layer and / or the amorphous transition layer on the cleaned first wafer and the cleaned second wafer respectively to obtain the first target wafer and the second target wafer, and before the contact bonding of the first target wafer and the second target wafer, it comprises: when plasma activated bonding is adopted, plasma is used to remove the residues on the first target wafer and the second target wafer; when hydrophilic bonding is adopted, the first target wafer and the second target wafer are subjected to chemical treatment; when hydrophobic bonding is adopted, the first target wafer and the second target wafer are subjected to surface treatment to reduce the hydroxyl group on the wafer surface.

10. A hetero wafer bonding apparatus based on doping and amorphous transition layer, characterized by, It comprises: a wafer providing module for providing a first wafer and a second wafer, the first wafer and the second wafer having different thermal conductivities; a surface cleaning module for cleaning the surfaces of the first wafer and the second wafer; a wafer surface pretreatment module for forming a wafer doped layer and / or an amorphous transition layer on the cleaned first wafer and the cleaned second wafer respectively to obtain a first target wafer and a second target wafer; the wafer doped layer is a doped layer obtained by doping a wafer with an intrinsic element or an isotope element corresponding to the wafer as a doping element according to a target doping concentration, a target doping thickness and a target doping width; a bonding module for contact bonding of the first target wafer and the second target wafer to obtain a target hetero wafer.

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