Silicon carbide substrate, silicon carbide epitaxial substrate, and method for manufacturing silicon carbide semiconductor device

Abstract

When the intensity of the Raman spectrum when the Raman shift is 1300 cm <-1 > is defined as a first intensity and the intensity of the maximum peak of the Raman spectrum when the Raman shift is 1300 cm <-1 > or more and 1800 cm <-1 > or less is defined as a second intensity, the ratio of the second intensity to the first intensity is 1.03 or more and 1.12 or less.

Description

Technical Field

[0001] This disclosure relates to a silicon carbide substrate, a silicon carbide epitaxial substrate, and a method for manufacturing a silicon carbide semiconductor device. This application claims priority to Japanese Patent Application No. 2023-083127, filed May 19, 2023. The entire contents of that Japanese patent application are incorporated herein by reference. Background Technology

[0002] Japanese Patent Application Publication No. 2011-178622 (Patent Document 1) describes a manufacturing apparatus for silicon carbide crystallization, which includes a crucible and a heat-insulating material.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2011-178622 Summary of the Invention

[0006] The silicon carbide substrate involved in this disclosure, with a Raman shift of 1300 cm⁻¹ -1 The intensity of the Raman spectrum at that time was taken as the first intensity, and the Raman shift was set to 1300 cm⁻¹. -1 Above and 1800cm -1 When the intensity of the maximum peak in the Raman spectrum within the following range is taken as the second intensity, the ratio of the second intensity to the first intensity is 1.03 or more and 1.12 or less. Attached Figure Description

[0007] Figure 1 This is a planar schematic diagram showing the structure of the silicon carbide substrate involved in this embodiment.

[0008] Figure 2 It is along Figure 1 A schematic diagram of the cross section of line II-II.

[0009] Figure 3 This is a schematic diagram showing the structure of a Raman spectrometer.

[0010] Figure 4 This is a schematic diagram illustrating an example of the Raman spectrum of a silicon carbide substrate.

[0011] Figure 5 This is a schematic diagram showing the shape near the first peak of the Raman spectrum of the silicon carbide substrate involved in this embodiment.

[0012] Figure 6 This is a schematic diagram showing the shape of the second peak and the area near the third peak of the Raman spectrum of the silicon carbide substrate involved in this embodiment.

[0013] Figure 7A is a schematic view showing the shape of a Raman spectrum of a silicon carbide substrate according to a first modification of the present embodiment.

[0014] Figure 7B is a schematic view showing the shape of a Raman spectrum of a silicon carbide substrate according to a second modification of the present embodiment.

[0015] Figure 8 is a partial cross-sectional schematic view showing the structure of a first example of a manufacturing apparatus for a silicon carbide ingot.

[0016] Figure 9 is a partial cross-sectional schematic view showing the structure of a second example of a manufacturing apparatus for a silicon carbide ingot.

[0017] Figure 10 is a schematic view showing a process of performing chemical mechanical polishing on a silicon carbide substrate.

[0018] Figure 11 is a flowchart schematically showing a manufacturing method for a silicon carbide semiconductor device according to the present embodiment.

[0019] Figure 12 is a cross-sectional schematic view showing the structure of a silicon carbide epitaxial substrate according to the present embodiment.

[0020] Figure 13 is a cross-sectional schematic view showing a process of forming a body region.

[0021] Figure 14 is a cross-sectional schematic view showing a process of forming a source region.

[0022] Figure 15 is a cross-sectional schematic view showing a process of forming a trench on a third main surface of a silicon carbide epitaxial layer.

[0023] Figure 16 is a cross-sectional schematic view showing a process of forming a gate insulating film.

[0024] Figure 17 is a cross-sectional schematic view showing a process of forming a gate electrode and an interlayer insulating film.

[0025] Figure 18 is a cross-sectional schematic view showing the structure of a silicon carbide semiconductor device according to the present embodiment. DETAILED DESCRIPTION

[0026] [Technical Problem to be Solved by the Present Disclosure]

[0027] The present application is to provide a silicon carbide substrate, a silicon carbide epitaxial substrate, and a manufacturing method for a silicon carbide semiconductor device, which can suppress the mixing of carbon-based impurities.

[0028] [The Effects of This Disclosure]

[0029] According to one aspect of this disclosure, a method for manufacturing a silicon carbide substrate, a silicon carbide epitaxial substrate, and a silicon carbide semiconductor device is provided that can suppress the incorporation of carbon-based impurities.

[0030] [Description of embodiments of this disclosure]

[0031] (1) The silicon carbide substrate 100 involved in this disclosure, when Raman shifted to 1300 cm⁻¹ -1 The intensity of the Raman spectrum at that time was taken as the first intensity, and the Raman shift was set to 1300 cm⁻¹. -1 Above and 1800cm -1 When the intensity of the maximum peak in the Raman spectrum within the following range is taken as the second intensity, the ratio of the second intensity to the first intensity is 1.03 or more and 1.12 or less.

[0032] (2) The silicon carbide substrate 100 involved in this disclosure has a Raman shift of 1300 cm⁻¹. -1 Above and 1800cm -1 Within the following range, if the Raman shift with the maximum Raman spectrum intensity is taken as the first wavenumber, the distance will be 30 cm to the side with a wavenumber lower than the first wavenumber. -1 The Raman shift is taken as the second wavenumber. The intensity ratio of the Raman spectrum at the first wavenumber is taken as the first intensity ratio. The intensity ratio of the Raman spectrum at the second wavenumber is taken as the second intensity ratio. The value obtained by subtracting the second intensity ratio from the first intensity ratio is taken as the first intensity ratio difference. The value obtained by subtracting 1 from the first intensity ratio is taken as the second intensity ratio difference. Then the first intensity ratio is less than 1.03, or the first intensity ratio difference is less than 50% of the second intensity ratio difference.

[0033] (3) Alternatively, based on the silicon carbide substrate 100 mentioned in (1) or (2) above, the Raman shift is 964 cm. -1 ±50cm -1 The half-width of the Raman spectrum peaks within the range is 50 cm⁻¹. -1 the following.

[0034] (4) Alternatively, based on the silicon carbide substrate 100 involved in any of (1) to (3) above, if the Raman shift is at 964 cm⁻¹ -1 ±50cm -1 The peak of the Raman spectrum within the range of [insert value here] is taken as the first peak. The Raman shift of the first peak is taken as the third wavenumber. The Raman shift of the Raman spectrum with half the intensity of the first peak and located on the wavenumber side higher than the third wavenumber is taken as the fourth wavenumber. The value obtained by subtracting the third wavenumber from the fourth wavenumber is 20 cm⁻¹. -1 the following.

[0035] (5) Also, the silicon carbide substrate 100 according to any one of (1) to (4) described above can have a maximum diameter of 150 mm or more.

[0036] (6) A silicon carbide epitaxial substrate 200 according to the present disclosure includes the silicon carbide substrate 100 according to any one of (1) to (5) described above, and a silicon carbide epitaxial layer 20 provided on the silicon carbide substrate 100.

[0037] (7) A method of manufacturing a silicon carbide semiconductor device 400 according to the present disclosure includes a step of preparing the silicon carbide epitaxial substrate 200 according to (6) described above, and a step of forming an electrode on the silicon carbide epitaxial layer 20.

[0038] [Details of Embodiments of the Present Disclosure]

[0039] Hereinafter, embodiments of the present disclosure will be described based on the drawings. Note that, in the drawings below, the same reference numerals are assigned to the same or equivalent portions, and the description thereof will not be repeated. In the description of crystallography in the present specification, individual crystal orientations are indicated by [], group crystal orientations are indicated by <>, individual faces are indicated by ( ), and group faces are indicated by {}. In addition, regarding a negative index, a “—” (bar) is added above the number in crystallography, but in the present specification, a negative sign is added in front of the number.

[0040] First, the structure of the silicon carbide substrate 100 according to the present embodiment will be described. Figure 1 is a plan view schematically showing the structure of the silicon carbide substrate 100 according to the present embodiment. Figure 2 is a cross-sectional view schematically showing the structure of the silicon carbide substrate 100 according to the present embodiment. Figure 1

[0041] As shown in Figure 1 and Figure 2 , the silicon carbide substrate 100 according to the present embodiment mainly has a first main surface 1, a second main surface 2, and an outer peripheral surface 9. As shown in Figure 2 , the second main surface 2 is located on the side opposite to the first main surface 1. The outer peripheral surface 9 is connected to the first main surface and the second main surface, respectively.

[0042] The polytype of the silicon carbide constituting the silicon carbide substrate 100 is, for example, 4H. The polytype of the silicon carbide constituting the silicon carbide substrate 100 can also be, for example, 6H. The silicon carbide substrate 100 contains, for example, an n-type impurity such as nitrogen (N). The conductivity type of the silicon carbide substrate 100 is, for example, n-type. The concentration of the n-type impurity of the silicon carbide substrate 100 is, for example, 1 x 1018cm-3 or more and 1 x 1020cm-3 or less. 17 cm -3 cm 20 cm -3 ​the following.

[0043] The maximum diameter W1 of the silicon carbide substrate 100 is, for example, 150 mm or more. The maximum diameter W1 of the silicon carbide substrate 100 can be, for example, 200 mm or more, or 250 mm or more. The maximum diameter W1 of the silicon carbide substrate 100 can also be, for example, 300 mm or less. It should be noted that the maximum diameter W1 of the silicon carbide substrate 100 is the longest straight-line distance between two different points on the outer peripheral surface 9 when viewed along a straight line perpendicular to the first main surface 1.

[0044] The first principal surface 1 is, for example, the {0001} surface or a surface tilted relative to the {0001} surface at an angle greater than 0° and less than 8°. The angle of tilt can be, for example, greater than 1° or greater than 2°. The angle of tilt can be less than 7° or less than 6°. Specifically, the first principal surface 1 can be the (0001) surface or a surface tilted relative to the (0001) surface at an angle of tilt greater than 0° and less than 8°. The first principal surface 1 can also be the (000-1) surface or a surface tilted relative to the (000-1) surface at an angle of tilt greater than 0° and less than 8°. The tilting direction of the first principal surface 1 is, for example, the <11-20> direction.

[0045] like Figure 1 As shown, the outer peripheral surface 9 may also have an oriented plane 7 and an arcuate portion 8. The oriented plane 7 extends, for example, along a first direction 101. The arcuate portion 8 is connected to the oriented plane 7.

[0046] The first direction 101 is parallel to the first principal surface 1. The first direction 101 is, for example, the <11-20> direction. The first direction 101 can also be a direction that includes a component of the <11-20> direction. The second direction 102 is perpendicular to the first direction 101. The second direction 102 is parallel to the first principal surface 1. The second direction 102 is, for example, the <1-100> direction. The second direction 102 can also be a direction that includes a component of the <1-100> direction. The third direction 103 is perpendicular to both the first direction 101 and the second direction 102.

[0047] Next, the structure of the Raman spectrometer used for measuring Raman spectra will be described. Figure 3 This is a schematic diagram showing the structure of a Raman spectrometer.

[0048] like Figure 3As shown, the Raman spectrometer 30 mainly includes, for example, a light source 32, an objective lens 31, a beam splitter 33, a stage 34, a beam splitter 35, and a detector 38. The Raman spectrometer 30 can use a LabRAMHR-800 manufactured by HORIBA JOBIN YVON. The light source 32 is a YAG (Yttrium Aluminum Garnet) laser. The excitation wavelength of the light source 32 is 532 nm. The laser irradiation intensity is 0.5 mW. The measurement method is backscattering. The magnification of the objective lens 31 is 100x. The diameter of the measurement area is 1 μm. The laser irradiation time is 20 to 180 seconds. The number of irradiations is 2. The filter is D1. The grating is 300 gr / mm. The aperture is 100.

[0049] Next, the method for measuring Raman spectra will be explained.

[0050] First, incident light 36 is emitted from the YAG laser at light source 32. For example... Figure 3 As indicated by the first arrow F1, the incident light 36 is reflected by the beam splitter 35 and incident on the first principal surface 1 of the silicon carbide substrate 100. The Raman beam splitter 30 employs, for example, a confocal optical system. In a confocal optical system, a confocal aperture (not shown) with a circular opening is disposed at a position conjugate to the focal point of the objective lens 31. This allows light to be detected only at the focal point.

[0051] like Figure 3 As shown by the second arrow F2, the Raman scattered light scattered by the silicon carbide substrate 100 is guided into the beam splitter 33 via the beam splitter 35. In the beam splitter 33, the Raman scattered light is decomposed according to each wavenumber. The decomposed Raman scattered light is detected by the detector 38. Thus, a Raman spectrum can be obtained with the Raman shift (wavenumber) on the horizontal axis and the intensity of the Raman scattered light on the vertical axis. The stage 34 can move in a direction parallel to the first principal surface 1 of the silicon carbide substrate 100 (the direction of the third arrow F3). Figure 3 As shown, the Raman spectrum was measured at the center of the first principal plane 1.

[0052] Figure 4 This is a schematic diagram showing an example of the Raman spectrum of a silicon carbide substrate 100. Figure 4 The horizontal axis represents the Raman displacement (wavenumber). Figure 4 The vertical axis represents the intensity of the Raman scattered light (Raman intensity). Raman shift refers to the difference between the wavenumber of the excitation light and the wavenumber of the Raman scattered light from the sample. For example... Figure 4 As shown, multiple peaks were observed in Raman spectrum 5.

[0053] The first peak, P1, is Raman scattered light caused by the foldback mode of the longitudinal wave (LO) branch. For example, the first peak P1 appears at a Raman shift of 964 cm⁻¹.-1 Specifically, the first peak PI appears in a range of 964 cm -1 ± 50 cm -1 The first peak PI can appear in a range of 964 cm -1 ± 40 cm -1 The first peak PI can appear in a range of 964 cm -1 ± 30 cm -1 The first peak PI can appear in a range of 964 cm -1 ± 20 cm -1 The first peak PI can appear in a range of 964 cm

[0054] The fourth peak P4 is Raman scattered light caused by a turning-back mode of a transverse optical (TO) branch. The fourth peak P4 appears, for example, near 776 cm -1 The fifth peak P5 is Raman scattered light caused by a turning-back mode of a longitudinal acoustic (LA) branch. The fifth peak P5 appears, for example, near 610 cm -1

[0055] In a case where the silicon carbide substrate 100 contains a carbon-based impurity such as graphite, a peak of a Raman spectrum caused by the carbon-based impurity is observed. Specifically, the Raman spectrum of the silicon carbide substrate 100 can have a second peak P2 and a third peak P3. If the amount of the graphite mixed in the silicon carbide substrate 100 becomes larger, the intensity of each of the second peak P2 and the third peak P3 becomes higher.

[0056] The second peak P2 is Raman scattered light caused by graphite. The second peak P2 appears, for example, near 1500 cm -1 Specifically, the second peak P2 appears in a range of 1500 cm -1 ± 30 cm -1 The second peak P2 can appear in a range of 1500 cm -1 ± 20 cm -1 The second peak P2 can appear in a range of 1500 cm -1 ± 10 cm -1 The second peak P2 can appear in a range of 1500 cm

[0057] The third peak P3 is Raman scattered light caused by graphite. The third peak P3 appears, for example, near 1700 cm -1 Specifically, the third peak P3 appears in a range of 1700 cm -1 ± 30 cm -1 The third peak P3 can appear in a range of 1700 cm -1 ± 20 cm -1 ​within a range of 1700 cm -1 ±10 cm -1 within a range of 1700 cm

[0058] The intensity of the first peak P1 is a first peak intensity A1. The intensity of the second peak P2 is a second peak intensity A2. The intensity of the third peak P3 is a third peak intensity A3. As shown in Figure 4 , the second peak intensity A2 can be higher than the third peak intensity A3. The first peak intensity A1 can be lower than the second peak intensity A2 and higher than the third peak intensity A3. The intensity of the fifth peak can be higher than the intensity of the first peak P1. The intensity of the fourth peak can be higher than the intensity of the fifth peak.

[0059] Figure 5 is a schematic view showing the shape in the vicinity of the first peak P1 of the Raman spectrum of the silicon carbide substrate 100 according to the present embodiment. Figure 5 The horizontal axis of is the Raman shift. Figure 5 The vertical axis of is the Raman intensity.

[0060] If the amount of the carbon-based impurities contained in the silicon carbide substrate 100 increases, the first peak becomes wide. In particular, the length of the first peak P1 on the high wave number side tends to be longer than the length of the first peak P1 on the low wave number side.

[0061] As shown in Figure 5 , the intensity in the vicinity of the first peak P1 of the Raman spectrum 5 can sharply increase from the low wave number side to the maximum value and slowly decrease from the maximum value to the high wave number side. From another viewpoint, the length of the tail on the high wave number side of the first peak P1 can be longer than the length of the tail on the low wave number side of the first peak P1.

[0062] The Raman shift of the first peak P1 is a third wave number B3. The intensity of the first peak P1 is a first peak intensity A1. The intensity of half of the first peak P1 is a fourth intensity A4. The Raman shift of the Raman spectrum having the fourth intensity A4 and located on the wave number side higher than the third wave number B3 is a fourth wave number B4. The Raman shift of the Raman spectrum having the fourth intensity A4 and located on the wave number side lower than the third wave number B3 is a fifth wave number B5.

[0063] The value obtained by subtracting the fifth wave number B5 from the fourth wave number B4 is a half-value width D3 of the first peak P1. The half-value width D3 of the first peak P1 is, for example, 50 cm -1 or less. The half-value width D3 of the first peak P1 can be, for example, 45 cm -1 or less. The half-value width D3 of the first peak P1 can be, for example, 40 cm -1 or less. The half-value width D3 of the first peak P1 can also be 35 cm -1 or less. The half-value width D3 of the first peak P1 can also be 30 cm -1 or less. The half-value width D3 of the first peak P1 can also be 25 cm -1The following, for example, can be 20 cm -1 The following, for example, can be 20 cm -1 The following, for example, can be 20 cm -1 The following, for example, can be 20 cm

[0064] The value obtained by subtracting the third wave number B3 from the fourth wave number B4 is the length of the tail on the high wave number side of the first peak P1 (first length D1). The first length D1 is, for example, 20 cm -1 The following, for example, can be 20 cm -1 The following, for example, can be 20 cm -1 The following, for example, can be 20 cm -1 The following, for example, can be 20 cm -1 The following, for example, can be 20 cm

[0065] The value obtained by subtracting the fifth wave number B5 from the third wave number B3 is the length of the tail on the low wave number side of the first peak P1 (second length D2). The second length D2 is smaller than the first length D1. The value obtained by subtracting the second length D2 from the first length D1 is, for example, 1 cm -1 The following, for example, can be 20 cm -1 The following, for example, can be 20 cm -1 The following, for example, can be 20 cm -1 The following, for example, can be 20 cm

[0066] Figure 6 is a schematic view showing the shape in the vicinity of the second peak P2 and the third peak P3 of the Raman spectrum of the silicon carbide substrate 100 according to the present embodiment. Figure 6 The horizontal axis of is the Raman shift. Figure 6 The vertical axis of is the intensity ratio of the Raman spectrum. Specifically, the intensity ratio of the Raman spectrum is the value obtained by dividing the intensity of the Raman spectrum by the intensity of the Raman spectrum when the Raman shift is 1300 cm -1 The following, for example, can be 20 cm -1 The following, for example, can be 20 cm

[0067] As shown in Figure 6 , the intensity ratio of the Raman spectrum of the second peak P2 can be larger than the intensity ratio of the Raman spectrum of the third peak P3. The intensity ratio of the Raman spectrum of the second peak P2 is, for example, greater than 1 and 1.12 or less. The intensity ratio of the Raman spectrum of the second peak P2 can also be 1.10 or less, 1.08 or less, or 1.06 or less. The intensity ratio of the Raman spectrum of the second peak P2 can also be 1.04 or more, or 1.05 or more.

[0068] According to the silicon carbide substrate 100 according to the present embodiment, the intensity of the Raman spectrum at a Raman shift of 1300 cm -1 or more and 1800 cm -1 or less is taken as a first intensity, and the intensity of the Raman spectrum at a Raman shift of 1300 cm -1 or more and 1800 cm -1 or less is taken as a second intensity. The ratio of the second intensity to the first intensity is greater than 1 and is 1.12 or less. The Raman spectrum at a Raman shift of 1300 cm -1 or more and 1800 cm -1 or less has a maximum peak corresponding to a second peak P2. Note that in a case where the intensity of a third peak P3 is higher than the intensity of the second peak P2, the Raman spectrum at a Raman shift of 1300 cm -1 or more and 1800 cm -1 or less has a maximum peak that is the third peak P3.

[0069] As shown in FIG. 8, in a range of a Raman shift of 1300 cm -1 or more and 1800 cm -1 or less, the intensity of the Raman spectrum is the greatest at a first wave number B1. A Raman shift of 30 cm -1 or less from the first wave number B1 is a second wave number B2. The intensity ratio of the Raman spectrum at the first wave number B1 is a first intensity ratio C1. The intensity ratio of the Raman spectrum at the second wave number B2 is a second intensity ratio C2. A value obtained by subtracting the second intensity ratio C2 from the first intensity ratio C1 is a first intensity ratio difference E1. A value obtained by subtracting 1 from the first intensity ratio C1 is a second intensity ratio difference E2. Figure 6 In a range of a Raman shift of 1300 cm -1 or more and 1800 cm -1 or less, in a case where the first intensity ratio C1 is 1.03 or more and the first intensity ratio difference E1 is 50% or more of the second intensity ratio difference E2, it is determined that the Raman spectrum has a peak. In other words, in a case where the first intensity ratio C1 is less than 1.03, it is determined that the Raman spectrum does not have a peak. Even in a case where the first intensity ratio C1 is 1.03 or more, in a case where the first intensity ratio difference E1 is less than 50% of the second intensity ratio difference E2, in a range of a Raman shift of 1300 cm -1 or more and 1800 cm -1 or less, it is determined that the Raman spectrum does not have a peak.

[0070]

[0071] Figure 7A is a schematic view showing the shape of a Raman spectrum of a silicon carbide substrate 100 according to a first modified example of the present embodiment. Figure 7A The horizontal axis of FIG. 10 is a Raman shift. Figure 7AThe vertical axis represents the intensity ratio of the Raman spectrum.

[0072] like Figure 7A As shown, at a Raman displacement of 1300 cm -1 Above and 1800cm -1 Within the following range, relative to a Raman displacement of 1300 cm -1 The intensity ratio of the Raman spectrum at a given Raman shift of 1300 cm⁻¹ can be less than 1.03. That is, at a Raman shift of 1300 cm⁻¹... -1 Above and 1800cm -1 Within the following range, the first strength ratio C1 is less than 1.03. In this case, the Raman displacement is 1300 cm⁻¹. -1 Above and 1800cm -1 The following ranges are considered to have no peaks in the Raman spectrum.

[0073] Figure 7B This is a schematic diagram showing the shape of the Raman spectrum of the silicon carbide substrate 100 involved in the second variation of this embodiment. Figure 7B The horizontal axis represents the Raman displacement. Figure 7B The vertical axis represents the intensity ratio of the Raman spectrum.

[0074] like Figure 7B As shown, the Raman displacement is 1300 cm. -1 The intensity ratio of the Raman spectrum at a given time sometimes increases with vibration towards higher wavenumbers. In this case, at a Raman shift of 1300 cm⁻¹... -1 Above and 1800cm -1 Within the following range, the first wavenumber B1 of the Raman shift, which represents the maximum intensity of the Raman spectrum, is at 1800 cm⁻¹. -1 Nearby. For example, Figure 7B As shown, the first intensity ratio C1, which is the intensity ratio of the Raman spectrum at the first wavenumber B1, can be 1.03 or higher.

[0075] Move 30cm away from the wave number side that is lower than the first wave number B1. -1 The Raman shift is the second wavenumber B2. The intensity ratio of the Raman spectrum at the first wavenumber B1 is the first intensity ratio C1. The intensity ratio of the Raman spectrum at the second wavenumber B2 is the second intensity ratio C2. The value obtained by subtracting the second intensity ratio C2 from the first intensity ratio C1 is the first intensity ratio difference E1. The value obtained by subtracting 1 from the first intensity ratio C1 is the second intensity ratio difference E2.

[0076] exist Figure 7BIn the illustrated Raman spectrum 5, the first intensity ratio difference E1 is less than 50% of the second intensity ratio difference E2. Thus, even if the first intensity ratio C1 is 1.03 or more, in the case where the first intensity ratio difference E1 is less than 50% of the second intensity ratio difference E2, the Raman shift is 1300 cm -1 above and 1800 cm -1 In the following range, it is determined that the Raman spectrum does not have a peak.

[0077] Next, a manufacturing apparatus of the silicon carbide ingot 110 according to the present embodiment will be described. Figure 8 is a partial cross-sectional schematic view showing the structure of a first example of a manufacturing apparatus of the silicon carbide ingot 110. As shown in the drawing, the manufacturing apparatus 500 of the silicon carbide ingot 110 mainly has a crucible 90, a first resistance heater 61, a second resistance heater 62, a third resistance heater 63, a shaped heat insulating material 80, and a soft heat insulating material 70. Figure 8

[0078] The crucible 90 has a raw material housing portion 92 and a lid portion 91. The lid portion 91 is disposed on the raw material housing portion 92. The first resistance heater 61 is disposed above the lid portion 91. The second resistance heater 62 is disposed in a manner of wrapping the outer periphery of the raw material housing portion 92. The third resistance heater 63 is disposed below the bottom surface of the raw material housing portion 92.

[0079] The shaped heat insulating material 80 has a first shaped heat insulating material portion 81, a second shaped heat insulating material portion 82, and a third shaped heat insulating material portion 83. The first shaped heat insulating material portion 81 is disposed above the first resistance heater 61. A through hole is provided in the center of the first shaped heat insulating material portion 81. The second shaped heat insulating material portion 82 is disposed in a manner of wrapping each of the first resistance heater 61, the second resistance heater 62, and the third resistance heater 63. The third shaped heat insulating material portion 83 is disposed below the third resistance heater 63. A through hole is provided in the center of the third shaped heat insulating material portion 83.

[0080] The soft heat insulating material 70 has a first soft heat insulating material portion 71, a second soft heat insulating material portion 72, and a third soft heat insulating material portion 73. The first soft heat insulating material portion 71 is disposed on the bottom surface of the first shaped heat insulating material portion 81. In the growth direction of the silicon carbide ingot 110, the first soft heat insulating material portion 71 is located between the first resistance heater 61 and the first shaped heat insulating material portion 81.

[0081] ​The second soft heat insulating material portion 72 is arranged on the inner peripheral surface of the second molded heat insulating material portion 82. In the radial direction of the silicon carbide ingot 110, the second soft heat insulating material portion 72 is located between the second electric resistance heater 62 and the second molded heat insulating material portion 82. The third soft heat insulating material portion 73 is arranged on the upper surface of the third molded heat insulating material portion 83. In the growth direction of the silicon carbide ingot 110, the third soft heat insulating material portion 73 is located between the third electric resistance heater 63 and the third molded heat insulating material portion 83.

[0082] As the molded heat insulating material 80, for example, DON-2011 manufactured by Osaka Gas Chemical Co., Ltd. or FGL-203GH manufactured by Nippon Carbon Co., Ltd. or the like can be used. As the soft heat insulating material 70, for example, LFP-105 manufactured by Osaka Gas Chemical Co., Ltd. or GF-20-5FH manufactured by New Japan Techno-Carbon Co., Ltd. or the like is used.

[0083] The soft heat insulating material 70 has higher softness than the molded heat insulating material 80. Specifically, the value of the actual density with respect to the tap bulk density of the soft heat insulating material 70 is smaller than the value of the actual density with respect to the tap bulk density of the molded heat insulating material 80. Note that the actual density is the weight with respect to the actual volume. The tap bulk density is the weight with respect to the volume in the case where the heat insulating material is filled with the clearance excluded. If the softness is higher, the clearance increases, and thus the value of the actual density is smaller than the value of the tap bulk density.

[0084] In addition, the sinking amount per unit pressure of the soft heat insulating material 70 is larger than the sinking amount per unit pressure of the molded heat insulating material 80. The sinking amount per unit pressure is the amount of sinking of the pressing portion of a press when the heat insulating material is pressed by the pressing portion of the press with a certain pressure applied. The sinking amount per unit pressure can be measured using a digital dial indicator (ID-H0530) manufactured by Mitutoyo Corporation.

[0085] Figure 9 is a partial cross-sectional schematic view showing the structure of the second example of the manufacturing apparatus of the silicon carbide ingot 110. The second example of the manufacturing apparatus of the silicon carbide ingot 110 is different from the first example of the manufacturing apparatus of the silicon carbide ingot 110 mainly in that the fourth soft heat insulating material portion 74 is arranged between the first molded heat insulating material portion 81 and the second molded heat insulating material portion 82, and is substantially the same as the first example of the manufacturing apparatus of the silicon carbide ingot 110 with respect to other structures. Hereinafter, the structures different from the first example of the manufacturing apparatus of the silicon carbide ingot 110 will be described.

[0086] As Figure 9As shown, the manufacturing apparatus 500 of the silicon carbide ingot 110 can also have a fourth soft thermal insulation material portion 74. The fourth soft thermal insulation material portion 74 is disposed between the first molded thermal insulation material portion 81 and the second molded thermal insulation material portion 82. The fourth soft thermal insulation material portion 74 is continuous with the first soft thermal insulation material portion 71. In the growth direction of the silicon carbide ingot 110, the thickness of the fourth soft thermal insulation material portion 74 can be the same as the thickness of the first soft thermal insulation material portion 71.

[0087] Next, a manufacturing method of the silicon carbide substrate 100 according to the present embodiment will be described.

[0088] First, a pre-burning process is performed. Specifically, the crucible 90 is heated without disposing the silicon carbide raw material 94 and the seed substrate 93 in the crucible 90. Specifically, the crucible 90 is heated by applying power to the first resistance heater 61, the second resistance heater 62, and the third resistance heater 63. The temperature of the crucible 90 is, for example, 2200°C or higher and 2400°C or lower. The pressure of the crucible 90 is, for example, 0.1 kPa or higher and 3 kPa or lower. The atmosphere gas contains argon or nitrogen. The time of the pre-burning process is, for example, 5 hours or more and 20 hours or less.

[0089] Next, a growth process is performed. As shown in FIG. 1, the silicon carbide ingot 110 is grown from the silicon carbide raw material 94. Figure 8 As shown in FIG. 1, the silicon carbide ingot 110 is grown from the silicon carbide raw material 94. Figure 9 As shown, the silicon carbide raw material 94 is disposed in the raw material housing portion 92. The seed substrate 93 is fixed to the lid portion 91 using a bonding agent (not shown), for example. The seed substrate 93 is disposed in opposition to the silicon carbide raw material 94. The seed substrate 93 is, for example, a silicon carbide substrate 100 of a polytype of 4H. The diameter of the main surface of the seed substrate 93 is, for example, 150 mm. The main surface of the seed substrate 93 is, for example, a {0001} surface or a surface having a deviation angle of about 8° or less with respect to the {0001} surface.

[0090] Next, power is not applied to the first resistance heater 61, the second resistance heater 62, and the third resistance heater 63, and the pressure of the crucible 90 is maintained at 1.0 Pa or lower for about 30 minutes. Next, the crucible 90 is heated by applying power to the first resistance heater 61, the second resistance heater 62, and the third resistance heater 63. Specifically, the crucible 90 is heated under high vacuum without flowing argon and nitrogen until the temperature of the bottom surface of the crucible 90 reaches 1300°C. Thereby, impurities (for example, aluminum, titanium, iron, vanadium, boron, calcium, and the like) contained in the soft thermal insulation material 70 are largely removed. After the temperature of the bottom surface of the crucible 90 reaches 1300°C, the atmosphere gas is introduced into the crucible 90 in such a manner that the pressure of the crucible 90 is 0.3 kPa or higher and 1.0 kPa or lower. Next, the crucible 90 is warmed up to the growth temperature of the silicon carbide ingot 110. Thereby, the growth of the silicon carbide ingot 110 is started.

[0091] The pressure of the crucible 90 is, for example, 0.1 kPa or more and 3 kPa or less. The temperature of the crucible 90 is, for example, 2200°C or more and 2400°C or less. Thus, the silicon carbide raw material 94 is sublimated, and a silicon carbide gas (raw material gas) is generated. The silicon carbide gas is recrystallized on the surface of the seed substrate 93. Thus, the silicon carbide ingot 110 is grown on the surface of the seed substrate 93.

[0092] After the growth of the silicon carbide ingot 110 is completed, the pressure of the crucible 90 is adjusted to about 80 kPa. The atmosphere gas is only argon. In a state where the temperature of the crucible 90 is, for example, 2200°C or more and 2400°C or less, the silicon carbide ingot 110 is annealed for about 5 hours.

[0093] After the annealing is completed, the silicon carbide ingot 110 is cooled to room temperature. Next, the silicon carbide ingot 110 is taken out of the crucible 90. Next, the silicon carbide ingot 110 is sliced by a wire saw device (not shown). Thus, a plurality of silicon carbide substrates 100 are cut out of the silicon carbide ingot 110.

[0094] The silicon carbide substrate 100 is, for example, composed of a polytype 4H hexagonal silicon carbide. The silicon carbide substrate 100 has a first main surface 1 and a second main surface 2 located on the side opposite to the first main surface 1. The first main surface 1 is, for example, a surface deviated by 4° or less in a direction of 11-20> with respect to a {0001} surface.

[0095] Next, a process of mechanically polishing the silicon carbide substrate 100 is performed. Specifically, the first main surface 1 is disposed so as to face a stage (not shown). Next, a slurry is introduced between the first main surface 1 and the stage. The slurry contains, for example, diamond abrasive grains. The diameter of the diamond abrasive grains is, for example, 1 μm or more and 3 μm or less. A load is applied to the first main surface 1 by the stage. Thus, the silicon carbide substrate 100 is mechanically polished in the first main surface 1.

[0096] Next, a process of chemically mechanically polishing the silicon carbide substrate 100 is performed. Figure 10 is a schematic view showing the process of chemically mechanically polishing the silicon carbide substrate 100. As shown in Figure 10 , the chemical mechanical polishing device 300 has a polishing cloth 301, a polishing head 302, a vacuum pump 304, and a pressurizing section 305. The polishing cloth 301 is, for example, a suede polishing cloth (SUPREME) manufactured by Nitta Haas.

[0097] As shown in Figure 9As shown, the silicon carbide substrate 100 is subjected to chemical mechanical polishing using a polishing liquid 310. The polishing liquid 310 has abrasive grains 312 and an oxidizing agent 311. The abrasive grains 312 are, for example, colloidal silica. The oxidizing agent is, for example, hydrogen peroxide water, permanganate, nitrate, hypochlorite, or the like. The polishing liquid is, for example, DSC-0902 manufactured by FUJIMI INCORPORATED.

[0098] The silicon carbide substrate 100 is mounted on a polishing head 302. The silicon carbide substrate 100 is arranged so as to face the polishing cloth 301. The polishing liquid 310 is supplied between the silicon carbide substrate 100 and the polishing cloth 301. The rotation speed of the polishing head 302 is, for example, 60 rpm. The rotation speed of the stage on which the polishing cloth 301 is provided is, for example, 60 rpm. The average processing surface pressure is, for example, 450 g / cm 2 The flow rate of the polishing liquid 310 is, for example, 2 liters per minute. Thereby, the silicon carbide substrate 100 according to the present embodiment can be obtained. Figure 1

[0099] <Manufacturing method of silicon carbide semiconductor device>

[0100] Next, a manufacturing method of the silicon carbide semiconductor device 400 according to the present embodiment will be described. Figure 11 is a flowchart showing a manufacturing method of the silicon carbide semiconductor device 400 according to the present embodiment. As shown in Figure 11 the manufacturing method of the silicon carbide semiconductor device 400 according to the present embodiment mainly has a process of preparing a silicon carbide epitaxial substrate (S5), a process of processing a silicon carbide epitaxial layer (S3), and a process of forming an electrode on the silicon carbide epitaxial layer (S4).

[0101] First, the process of preparing a silicon carbide epitaxial substrate (S5) is performed. The process of preparing a silicon carbide epitaxial substrate (S5) has a process of preparing a silicon carbide substrate (S1) and a process of forming a silicon carbide epitaxial layer on the silicon carbide substrate (S2). In the process of preparing a silicon carbide substrate (S1), the silicon carbide substrate 100 according to the present embodiment is prepared (refer to FIG. 1). Figure 1

[0102] Next, the process of forming a silicon carbide epitaxial layer 20 on the silicon carbide substrate 100 (S2) is performed. Specifically, the silicon carbide epitaxial layer 20 is formed on the first main face 1 of the silicon carbide substrate 100 by epitaxial growth. In the epitaxial growth, for example, silane (SiH4) and propane (C3H8) are used as source gases, and hydrogen (H2) is used as a carrier gas. The temperature of the epitaxial growth is, for example, around 1400°C or higher and 1700°C or lower. In the epitaxial growth, for example, an n-type impurity such as nitrogen is introduced into the silicon carbide epitaxial layer 20. Thereby, the silicon carbide epitaxial substrate 200 according to the present embodiment is prepared. ​​

[0103] Figure 12 is a cross-sectional schematic view showing a structure of a silicon carbide epitaxial substrate 200 according to the present embodiment. As shown in the drawing, the silicon carbide epitaxial substrate 200 according to the present embodiment has a silicon carbide substrate 100 and a silicon carbide epitaxial layer 20. The silicon carbide epitaxial layer 20 is provided on the silicon carbide substrate 100. Figure 12

[0104] The silicon carbide epitaxial layer 20 can also have a buffer layer 41, a drift layer 42, and a third main surface 3. The buffer layer 41 is in contact with the first main surface 1 of the silicon carbide substrate 100. The drift layer 42 is provided on the buffer layer 41. The nitrogen concentration contained in the drift layer 42 can be lower than the nitrogen concentration contained in the buffer layer 41. The third main surface 3 is constituted by the drift layer 42.

[0105] Next, a process of processing the silicon carbide epitaxial layer is performed (S3). Specifically, the silicon carbide epitaxial layer 20 is subjected to ion implantation. The silicon carbide epitaxial layer 20 is subjected to ion implantation of, for example, aluminum or the like.

[0106] Figure 13 is a cross-sectional schematic view showing a process of forming a body region. In the process of forming the body region, a p-type impurity such as aluminum or the like is ion-implanted into the third main surface 3 of the silicon carbide epitaxial layer 20. Thus, a body region 113 having a p-type conductivity is formed. The portions where the body region 113 is not formed become the drift layer 42 and the buffer layer 41. The thickness of the body region 113 is, for example, 0.9 μm. The silicon carbide epitaxial layer 20 includes the buffer layer 41, the drift layer 42, and the body region 113.

[0107] Next, a process of forming a source region is performed. Figure 14 is a cross-sectional schematic view showing the process of forming the source region. Specifically, an n-type impurity such as phosphorus or the like is ion-implanted into the body region 113. Thus, a source region 114 having an n-type conductivity is formed. The thickness of the source region 114 is, for example, 0.4 μm. The concentration of the n-type impurity contained in the source region 114 is higher than the concentration of the p-type impurity contained in the body region 113.

[0108] Next, a contact region 118 is formed by ion-implanting a p-type impurity such as aluminum or the like into the source region 114. The contact region 118 is formed so as to penetrate the source region 114 and the body region 113 and be in contact with the drift layer 42. The concentration of the p-type impurity contained in the contact region 118 is higher than the concentration of the n-type impurity contained in the source region 114.

[0109] Next, in order to activate the impurities ion-implanted, activation annealing is performed. The temperature of the activation annealing is, for example, 1500°C or higher and 1900°C or lower. The time of the activation annealing is, for example, about 30 minutes. The atmosphere of the activation annealing is, for example, an argon atmosphere.

[0110] ​Next, a process of forming a trench on the third main surface 3 of the silicon carbide epitaxial layer 20 is performed. Figure 15 is a cross-sectional schematic view showing the process of forming a trench on the third main surface 3 of the silicon carbide epitaxial layer 20. On the third main surface 3 composed of the source region 114 and the contact region 118, a mask 117 having an opening is formed. Using the mask 117, a portion of the source region 114, the body region 113, and the drift layer 42 is removed by etching. As a method of etching, for example, an inductively coupled plasma reactive ion etching can be used. Specifically, an inductively coupled plasma reactive ion etching using, for example, SF6or a mixed gas of SF6and O2as a reaction gas is used. By etching, a recess is formed on the third main surface 3.

[0111] Next, a thermal etching is performed in the recess. The thermal etching can be performed by heating in an atmosphere containing a reactive gas having at least one or more halogen atoms in a state where the mask 117 is formed on the third main surface 3. The at least one or more halogen atoms include at least any one of a chlorine (Cl) atom and a fluorine (F) atom. The atmosphere contains, for example, Cl2, BCl3, SF6, or CF4. For example, the thermal etching is performed using a mixed gas of chlorine and oxygen as a reaction gas, and the heat treatment temperature is set to, for example, 700°C or higher and 1000°C or lower. Note that the reaction gas can contain a carrier gas in addition to the chlorine and the oxygen. As the carrier gas, for example, nitrogen, argon, or helium, or the like can be used.

[0112] As shown in Figure 15 , a trench 56 is formed on the third main surface 3 by the thermal etching. The trench 56 is defined by a side wall surface 53 and a bottom wall surface 54. The side wall surface 53 is composed of the source region 114, the body region 113, and the drift layer 42. The bottom wall surface 54 is composed of the drift layer 42. Next, the mask 117 is removed from the third main surface 3.

[0113] Next, a process of forming a gate insulating film is performed. Figure 16 is a cross-sectional schematic view showing the process of forming a gate insulating film. Specifically, the silicon carbide epitaxial substrate 200 on which the trench 56 is formed on the third main surface 3 is heated in an atmosphere containing oxygen at a temperature of, for example, 1300°C or higher and 1400°C or lower. Thus, a gate insulating film 115 is formed, which is in contact with the drift layer 42 on the bottom wall surface 54, in contact with the drift layer 42, the body region 113, and the source region 114 on the side wall surface 53, and in contact with the source region 114 and the contact region 118 on the third main surface 3, respectively.

[0114] Next, a process of forming a gate electrode is performed. Figure 17is a cross-sectional schematic view showing a step of forming a gate electrode and an interlayer insulating film. The gate electrode 127 is formed inside the trench 56 in a manner to be in contact with the gate insulating film 115. The gate electrode 127 is disposed inside the trench 56, and is formed on the gate insulating film 115 in a manner to be opposed to each of the side wall surface 53 and the bottom wall surface 54 of the trench 56. The gate electrode 127 is formed, for example, by an LPCVD (Low Pressure Chemical Vapor Deposition) method.

[0115] Next, the interlayer insulating film 126 is formed. The interlayer insulating film 126 is formed in a manner to cover the gate electrode 127 and to be in contact with the gate insulating film 115. The interlayer insulating film 126 is formed, for example, by a chemical vapor deposition method. The interlayer insulating film 126 is composed of a material containing silicon dioxide, for example. Next, a part of the interlayer insulating film 126 and the gate insulating film 115 is etched in a manner to form an opening portion on the source region 114 and the contact region 118. Thereby, the contact region 118 and the source region 114 are exposed from the gate insulating film 115.

[0116] Next, a step of forming a source electrode is performed. The source electrode 116 is formed in a manner to be in contact with the source region 114 and the contact region 118, respectively. The source electrode 116 is formed, for example, by a sputtering method. The source electrode 116 is composed of a material containing Ti (titanium), Al (aluminum), and Si (silicon), for example.

[0117] Next, alloying annealing is performed. Specifically, the source electrode 116 in contact with the source region 114 and the contact region 118, respectively, is held at a temperature of 900°C or higher and 1100°C or lower for about 5 minutes, for example. Thereby, at least a part of the source electrode 116 is silicided. Thereby, the source electrode 116 is formed in ohmic junction with the source region 114. The source electrode 116 can also be in ohmic junction with the contact region 118.

[0118] Next, a source wiring 119 is formed. The source wiring 119 is electrically connected to the source electrode 116. The source wiring 119 is formed in a manner to cover the source electrode 116 and the interlayer insulating film 126.

[0119] Next, a step of forming a drain electrode is performed. First, in the second main surface 2, the silicon carbide substrate 100 is polished. Thereby, the thickness of the silicon carbide substrate 100 is thinned. Next, the drain electrode 123 is formed. The drain electrode 123 is formed in a manner to be in contact with the second main surface 2. Thereby, the silicon carbide semiconductor device 400 according to the present embodiment is manufactured.

[0120] Figure 18is a cross-sectional schematic view showing a structure of a silicon carbide semiconductor device according to the present embodiment. The silicon carbide semiconductor device 400 is, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The silicon carbide semiconductor device 400 mainly has a silicon carbide epitaxial substrate 200, a gate electrode 127, a gate insulating film 115, a source electrode 116, a drain electrode 123, a source wiring 119, and an interlayer insulating film 126. The silicon carbide epitaxial substrate 200 has a buffer layer 41, a drift layer 42, a body region 113, a source region 114, and a contact region 118. The silicon carbide semiconductor device 400 can be, for example, an IGBT (Insulated Gate Bipolar Transistor) or the like.

[0121] Next, an effect of the silicon carbide substrate 100 according to the present embodiment will be described.

[0122] In the production of the silicon carbide ingot 110, deterioration of the molded heat insulating material 80 sometimes occurs due to the influence of the raw material gas leaked from the crucible 90. If the deterioration of the molded heat insulating material 80 is aggravated, a gap is formed in the molded heat insulating material 80, and a path for the raw material gas to escape to the outside is generated. In this case, the temperature of the upper portion of the crucible 90 excessively decreases, and thus the temperature difference in the vertical direction of the crucible 90 becomes large. Therefore, compared with a case where no gap is formed in the molded heat insulating material 80, excessive upflow of the raw material gas is generated.

[0123] Figure 8 and Figure 9 The arrow of the dotted line shown in FIG. 1 illustrates an example of the flow of the raw material gas (silicon carbide gas). The raw material gas passes through the crucible 90 and easily flows to the molded heat insulating material 80 located above the crucible 90.

[0124] In addition, since the molded heat insulating material 80 is used repeatedly, the gap of the molded heat insulating material 80 expands with the passage of time. Due to this, the heat insulating performance decreases, and the pressure fluctuation in the crucible 90 is generated. Therefore, the stability of the temperature environment in the crystal growth of the silicon carbide ingot 110 decreases, and it is difficult to achieve the desired temperature distribution in the crucible 90. As a result, the crystal quality of the silicon carbide ingot 110 is sometimes affected.

[0125] In particular, the deterioration of the molded heat insulating material 80 located above the crucible 90 makes the temperature difference in the vertical direction of the crucible 90 large. As a result, since excessive upflow of the raw material gas is generated, carbon-based impurities easily fly from the carbon member constituting the crucible 90, carbonized raw material, or the like. As a result, the carbon-based impurities are incorporated into the grown silicon carbide ingot 110.

[0126] The present inventors have repeatedly and intensively studied a method for suppressing generation of excessive upflow of raw material gas, and as a result, have obtained the following findings.

[0127] First, a soft thermal insulation material 70 having moderate softness is disposed in the vicinity of the molded thermal insulation material 80. In the case where the softness of the soft thermal insulation material 70 is high, the soft thermal insulation material 70 can be embedded at the joint of the two molded thermal insulation materials 80. Thus, a gap between the two molded thermal insulation materials 80 due to assembly deviation, design error, or the like can be filled. By sandwiching the soft thermal insulation material 70 between the molded thermal insulation materials 80 disposed above and below, the gap between the two molded thermal insulation materials 80 can be further filled by the weight of the molded thermal insulation material 80 disposed on the upper side.

[0128] On the other hand, in the case where the softness is excessively high, the raw material gas easily permeates through the soft thermal insulation material 70. As a result, the deterioration of the molded thermal insulation material 80 cannot be sufficiently suppressed. Note that the degree of softness of the molded thermal insulation material 80 is evaluated by the ratio of the actual density to the tap bulk density and the amount of sinking per unit pressure.

[0129] According to the present disclosure, by disposing the soft thermal insulation material 70 having moderate softness in the vicinity of the molded thermal insulation material 80, it is possible to suppress the formation of a path for the raw material gas to escape to the outside in the molded thermal insulation material 80. As a result, it is possible to suppress the generation of excessive upflow of the raw material gas. Thus, it is possible to obtain a silicon carbide substrate 100 in which the incorporation of carbon-based impurities is suppressed.

[0130] Example

[0131] (Sample Preparation)

[0132] First, the silicon carbide substrates 100 involved in Samples 1 to 3 are prepared. The silicon carbide substrate 100 involved in Sample 1 is a comparative example. The silicon carbide substrates 100 involved in Samples 2 and 3 are examples. The silicon carbide substrates 100 involved in Samples 1, 2, and 3 are each manufactured using Device A, Device B, and Device C. Device B is the manufacturing device illustrated in FIG. 1. Device C is the device illustrated in FIG. 2. Device A has the molded thermal insulation material 80 but does not have the soft thermal insulation material 70. Figure 8 Figure 9 Device A has the molded thermal insulation material 80 but does not have the soft thermal insulation material 70.

[0133] The respective characteristics of the molded thermal insulation material 80 and the soft thermal insulation material 70 are shown in Table 1. In Device A, the density ratio of the molded thermal insulation material 80 is 0.99. In Device B, the density ratio of the molded thermal insulation material 80 is 0.98. In Device C, the density ratio of the molded thermal insulation material 80 is 0.99. In Table 1, the density ratio refers to the ratio of the actual density to the tap bulk density.​​

[0134]

[0135] The device A does not have the soft thermal insulation material 70. In the device B, the density ratio of the soft thermal insulation material 70 is 0.95. In the device C, the density ratio of the soft thermal insulation material 70 is 0.91. In the device B, the density ratio of the soft thermal insulation material 70 with respect to the density ratio of the molded thermal insulation material 80 (B / A) is 97%. In the device C, the density ratio of the soft thermal insulation material 70 with respect to the density ratio of the molded thermal insulation material 80 (B / A) is 92%.

[0136] In Table 1, the sink-in amount is the sink-in amount per unit pressure. In the device A, the sink-in amount of the molded thermal insulation material 80 is 0.58 mm / N. In the device B, the sink-in amount of the molded thermal insulation material 80 is 0.53 mm / N. In the device C, the sink-in amount of the molded thermal insulation material 80 is 0.60 mm / N. In the device B, the sink-in amount of the soft thermal insulation material 70 is 2.04 mm / N. In the device C, the sink-in amount of the soft thermal insulation material 70 is 1.72 mm / N.

[0137] As shown in Table 1, in the device A, the pre-burning process is not performed. In the device B and the device C, the pre-burning process is performed. In the pre-burning process, the temperature of the crucible 90 is 2300°C. The pressure of the crucible 90 is 0.5 kPa. The atmosphere gas is a mixed gas of argon and nitrogen. The time of the pre-burning process is 18 hours.

[0138] (Evaluation method)

[0139] Next, the Raman spectrum of the silicon carbide substrate 100 involved in the sample 1, the sample 2, and the sample 3 was measured. As the Raman spectrometer 30, LabRAM HR-800 manufactured by HORIBA JOBIN YVON Co., Ltd. was used. The light source 32 was a YAG laser. The excitation wavelength of the light source 32 was 532 nm. The laser irradiation intensity was 0.5 mW. The measurement method was backscattering measurement. The magnification of the objective lens 31 was 100 times. The diameter of the measurement region was 1 μm. The laser irradiation time was 20 seconds to 180 seconds. The number of accumulations was 2. The filter was D1. The grating was 300 gr / mm. The aperture was 100.

[0140] (Evaluation results)

[0141] If the concentration of the carbon-based impurities in the silicon carbide substrate 100 becomes high, the intensity of the maximum peak of the Raman spectrum in the range of 1300 cm -1 and 1800 cm -1 becomes large. Further, the half-value width D3 of the first peak P1 becomes large. In particular, the length of the tail on the high wave number side of the first peak P1 becomes long.

[0142] The intensity ratio of the maximum peak in the range of 1300 cm -1 to 1800 cm -1 was 1.13, 1.08, and 1.01, respectively. The intensity ratio of the maximum peak in the range of 1300 cm -1 to 1800 cm -1 was a value obtained by dividing the intensity of the Raman spectrum in the range of 1300 cm -1 or more and 1800 cm -1 or less by the intensity of the Raman spectrum at a Raman shift of 1300 cm -1 .

[0143] The half-value width D3 of the first peak P1 measured on the first main surface 1 of the silicon carbide substrate 100 involved in Samples 1 to 3 was 120 cm -1 , 40 cm -1 , and 20 cm -1 , respectively. The length of the tail on the high wave number side of the first peak P1 measured on the first main surface 1 of the silicon carbide substrate 100 involved in Samples 1 to 3 was 100 cm -1 , 20 cm -1 , and 10 cm -1 , respectively.

[0144] From the above results, it was confirmed that the silicon carbide substrate 100 involved in each of Samples 2 and 3 can suppress the incorporation of carbon-based impurities as compared with the silicon carbide substrate 100 involved in Sample 1.

[0145] The embodiments and examples disclosed herein are illustrative in all respects, and should not be considered as restrictive. The scope of the present application is not represented by the above description but by the claims, and is intended to include all modifications within the meaning and scope of the claims.

[0146] Explanation of Reference Signs

[0147] 1: first main surface; 2: second main surface; 3: third main surface; 5: Raman spectrum; 7: orientation plane; 8: circular arc portion; 9: outer peripheral surface; 20: silicon carbide epitaxial layer; 30: Raman spectrometer; 31: objective lens; 32: light source; 33: beam splitter; 34: stage; 35: beam splitter; 36: incident light; 38: detector; 41: buffer layer; 42: drift layer; 53: side wall surface; 54: bottom wall surface; 56: groove; 61: first resistance heater; 62: second resistance heater; 63: third resistance heater; 70: flexible thermal insulation material; 71: first flexible thermal insulation material portion; 72: second flexible thermal insulation material portion; 73: third flexible thermal insulation material portion; 74: fourth flexible thermal insulation material portion; 80: shaped thermal insulation material; 81: first shaped thermal insulation material portion; 82: second shaped thermal insulation material portion; 83: third shaped thermal insulation material portion; 90: crucible; 91: cover portion; 92: raw material storage portion; 93: seed substrate; 94: silicon carbide raw material; 100: silicon carbide substrate; 101: first direction; 102: second direction; 103: third direction; 110: silicon carbide ingot; 113: body region; 114: source region; 115: gate insulating film; 116: source electrode; 117: mask; 118: contact region; 119: source wiring; 123: drain electrode; 126: interlayer insulating film; 127: gate electrode; 200: silicon carbide epitaxial substrate; 300: chemical mechanical polishing device; 301: polishing cloth; 302: polishing head; 304: vacuum pump; 305: pressurizing portion; 310: polishing liquid; 311: oxidizing agent; 312: abrasive particles; 400: silicon carbide semiconductor device; 500: manufacturing device; A1: first peak intensity; A2: second peak intensity; A3: third peak intensity; A4: fourth intensity; B1: first wave number; B2: second wave number; B3: third wave number; B4: fourth wave number; B5: fifth wave number; C1: first intensity ratio; C2: second intensity ratio; D1: first length; D2: second length; D3: half-value width; E1: first intensity ratio difference; E2: second intensity ratio difference; F1: first arrow; F2: second arrow; F3: third arrow; P1: first peak; P2: second peak; P3: third peak; P4: fourth peak; P5: fifth peak; W1: maximum diameter.

Claims

1. A silicon carbide substrate, In a case where an intensity of a Raman spectrum at a Raman shift of 1300 cm -1 -1 is taken as a first intensity, an intensity of a Raman spectrum at a Raman shift of 1300 cm -1 -1 and 1800 cm -1 -1 is taken as a second intensity, a ratio of the second intensity to the first intensity is 1.03 or more and 1.12 or less.

2. A silicon carbide substrate, At a Raman displacement of 1300 cm -1 Above and 1800cm -1 Within the following range, if the Raman shift with the maximum Raman spectrum intensity is taken as the first wavenumber, the distance will be 30 cm to the side with a wavenumber lower than the first wavenumber. -1 The Raman shift is used as the second wavenumber, and the intensity of the Raman spectrum at the first wavenumber is relative to the Raman shift of 1300 cm⁻¹. -1 The ratio of the intensity of the Raman spectrum at the second wavenumber to the intensity of the Raman spectrum at the second wavenumber is taken as the first intensity ratio. -1 The ratio of the intensities of the Raman spectra at the specified time is taken as the second intensity ratio. The value obtained by subtracting the second intensity ratio from the first intensity ratio is taken as the first intensity ratio difference. The value obtained by subtracting 1 from the first intensity ratio is taken as the second intensity ratio difference. Then the first intensity ratio is less than 1.03, or the first intensity ratio difference is less than 50% of the second intensity ratio difference.

3. The silicon carbide substrate according to claim 1 or 2, wherein, Raman shift of 964 cm -1 ± 50 cm -1 the half-width of the peak of the Raman spectrum within the range of 50 cm -1 below.

4. The silicon carbide substrate according to any one of claims 1 to 3, wherein, If the Raman shift is 964 cm -1 ±50cm -1 The peak of the Raman spectrum within the range of [insert value here] is taken as the first peak, the Raman shift of the first peak is taken as the third wavenumber, and the Raman shift of the Raman spectrum with half the intensity of the first peak and located on a wavenumber side higher than the third wavenumber is taken as the fourth wavenumber. The value obtained by subtracting the third wave number from the fourth wave number is 20 cm -1 The following.

5. The silicon carbide substrate according to any one of claims 1 to 4, wherein, The maximum diameter of the silicon carbide substrate is 150 mm or more.

6. A silicon carbide epitaxial substrate, comprising: The silicon carbide substrate according to any one of claims 1 to 5; and A silicon carbide epitaxial layer provided on the silicon carbide substrate.

7. A method for manufacturing a silicon carbide semiconductor device, comprising: A step of preparing the silicon carbide epitaxial substrate according to claim 6; and A step of forming an electrode on the silicon carbide epitaxial layer.

Images