High-temperature-resistant and high-voltage-resistant silicon carbide intelligent power module device and manufacturing method thereof

Abstract

The invention discloses a high-temperature-resistant and high-voltage-resistant silicon carbide intelligent power module device and a manufacturing method thereof. The device comprises a radiator for providing a radiating channel and a mechanical support; the DBC substrate is used for providing circuit connection and mechanical support; the plurality of SiC MOS chips are arranged on the DBC substrate in sequence; a plurality of power terminals located on the DBC substrate; the shell is positioned on the radiator; the plurality of driving chips are positioned on the driving circuit board; the number of the driving chips is the same as that of the SiC MOS chips, and each driving chip is connected with and controls one SiC MOS chip; a plurality of signal terminals located on the driving circuit board, wherein the signal terminals are located at one side far away from the power terminals; the plurality of gate resistors are positioned on the driving circuit board; and each driving chip is connected with one SiC MOS chip through one gate resistor. The driving circuit is integrated, the module structure is resistant to high temperature, and the temperature range is 220-240 DEG C.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of packaging structure, and in particular to a high-temperature-resistant and high-voltage silicon carbide intelligent power module device and a manufacturing method thereof. BACKGROUND

[0002] In the field of power electronics, power modules integrated with control, detection and protection circuits are collectively referred to as IPM modules. Prior to this, the Si IGBT chips were mainly used in the IPM modules widely used in the market, and the voltage level was generally not greater than 650V, and the current level was not more than 40A at high temperature (100°C). Most of these modules are made by frame molding process, and the temperature resistance is not more than 175°C (limited by the glass transition temperature of the molding material). The reasons for the popularity of Si IGBT IPM modules in the market are as follows: 1. The price of Si IGBT chips is low, and the cost advantage is great; 2. Such modules are mostly used in the field of white goods (such as air conditioners, refrigerators, washing machines, etc.), and the bus voltage is not high, and the power is not large, so the current requirement of the module is not high; 3. The motor generally requires a three-phase full-bridge topology, and such modules have high integration and rich functions, so the engineer only needs to consider the assembly problem and give external control signals, which simplifies the use.

[0003] Although Si IGBT IPM modules are widely used, they have the problems of low withstand voltage, small power and unsuitability for working in a high-temperature (>200°C) environment. SUMMARY

[0004] Technical purpose: In view of the defects of low withstand voltage, small power and unsuitability for working in a high-temperature environment in the prior art, the present application provides a high-temperature-resistant and high-voltage silicon carbide intelligent power module device and a manufacturing method thereof. The driving chip, circuit board and shell are made of high-temperature-resistant materials, and the glue used is also high-temperature-resistant, so that the module structure is high-temperature-resistant, the temperature range is 220°C-240°C, and the functions of signal control, over-temperature protection, over-current protection and under-voltage protection of the power chip are realized through the integrated driving circuit.

[0005] Technical scheme: In order to achieve the above technical purpose, the present application adopts the following technical scheme.

[0006] A high-temperature-resistant and high-voltage silicon carbide intelligent power module device comprises: a heat sink for providing a heat dissipation channel and mechanical support; a DBC substrate on the heat sink for providing circuit connection and mechanical support; a plurality of SiC MOS chips arranged in sequence on the DBC substrate; a plurality of power terminals on the DBC substrate; a shell on the heat sink; A plurality of driving chips are located on the driving circuit board; the driving chips are high-temperature-resistant driving chips; the number of the driving chips is the same as the number of the SiC MOS chips, and each driving chip is connected to and controls one SiC MOS chip; A plurality of signal terminals are located on the driving circuit board, and the signal terminals are located on the side away from the power terminals; A plurality of gate resistors are located on the driving circuit board; each driving chip is connected to one SiC MOS chip through one gate resistor.

[0007] Further, the DBC substrate comprises a top conductive copper layer, an insulating ceramic plate and a bottom copper layer arranged in sequence from top to bottom; the top conductive copper layer is a plurality of copper layer units arranged in sequence and not connected.

[0008] Further, one side of the top conductive copper layer is provided with power terminals, the number of the power terminals is the same as the number of the copper layer units, and one power terminal is arranged on each copper layer unit.

[0009] Further, the number of the copper layer units is 5, the number of the SiC MOS chips is 6, the first SiC MOS chip is arranged on the fourth copper layer unit, the second SiC MOS chip is arranged on the third copper layer unit, the third SiC MOS chip is arranged on the second copper layer unit, and the fourth SiC MOS chip, the fifth SiC MOS chip and the sixth SiC MOS chip are arranged on the first copper layer unit.

[0010] Further, the driving circuit board is arranged side by side with the top conductive copper layer, and the horizontal plane where the driving circuit board is located is higher than the horizontal plane where the top conductive copper layer is located, so that the overall power module device size meets: length < 80 mm, width ≤ 50 mm, height < 15 mm.

[0011] Further, the inside of the shell is filled with high-temperature-resistant WACKER silicone gel, and the power terminals and the signal terminals are partially exposed from the silicone gel.

[0012] The application also discloses a manufacturing method of the high-temperature-resistant and high-voltage SiC intelligent power module device. S1, preparing a DBC substrate; S2, applying tin paste, and placing SiC MOS chips, power terminals and the DBC substrate on the heat dissipation base plate; S3, welding the heat dissipation base plate to further fix the SiC MOS chips, the power terminals and the DBC substrate; S4, cleaning the heat dissipation base plate; S5, inspecting the welding quality of the SiC MOS chips and the power terminals; S6, soldering signal terminals and gate resistors on the drive circuit board; S7, mounting the drive chip on the drive circuit board and bonding; S8, assembling the shell and the circuit board on the heat dissipation base plate; S9, bonding the drive circuit board with the SiC MOS chip lead; S10, filling the shell with glue to complete the module manufacturing.

[0013] Further, the signal terminal is a 0.8mm gold-plated copper needle.

[0014] Further, in S6, an electric assembly process is used to solder the signal terminal and the high-temperature-resistant gate resistor on the drive circuit board.

[0015] Beneficial effects: 1. The packaging structure design of the application realizes small size requirements on the frame packaging structure with a heat sink, i.e. length < 80mm, width ≤ 50mm, and height < 15mm; 2. The application realizes the functions of power chip signal control, over-temperature protection, over-current protection, and under-voltage protection through integrated drive circuit, so that the MCU only needs to give a control signal to drive the motor to work in actual use, greatly simplifying the use of circuit engineers; the product of the application has high integration, such as the drive chip in the module itself having under-voltage, 3. The application uses high-temperature-resistant materials to make the drive chip, the circuit board, and the shell, and the glue used is also high-temperature-resistant, so that the module structure is high-temperature-resistant, with a temperature range of 220°C~240°C; 4. The product of the application is high-voltage-resistant, and the product supports packaging of SiC MOS chips of 1700V voltage grade, and the position of the power terminal, the shape of the shell, and the layout of the circuit board and the DBC are optimized in design; 5. In the manufacturing method, the drive signal is led out, i.e. in S6, an electric assembly process is used to realize the function of the integrated drive circuit of the application; 6. Based on the above advantages, the application aims to promote the development of SiC MOS IPM modules to power bricks, replacing the current situation that SiC MOS power modules are used with external drive circuit boards. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 It is a packaging structure diagram of a high-temperature-resistant and high-voltage-resistant silicon carbide intelligent power module device of embodiment 1. Figure 2 It is an internal structure diagram of a high-temperature-resistant and high-voltage-resistant silicon carbide intelligent power module device of embodiment 1. Figure 3 It is a lead connection diagram of a high-temperature-resistant and high-voltage-resistant silicon carbide intelligent power module device of embodiment 1. Figure 4 A high-temperature-resistant high-voltage silicon carbide intelligent power module device manufacturing method flow chart of embodiment 1; Figures 5 to 8 A high-temperature-resistant high-voltage silicon carbide intelligent power module device manufacturing method step schematic diagram of embodiment 1. DETAILED DESCRIPTION

[0017] The high-temperature-resistant high-voltage silicon carbide intelligent power module device and the manufacturing method thereof will be further explained and described below in combination with the drawings and embodiments.

[0018] The embodiments are only used to illustrate the present application, and do not constitute a limitation on the scope of the claims, and other alternative means that can be thought of by those skilled in the art are within the scope of the claims of the present application.

[0019] In addition, in the description of the present application, it should be noted that the orientations or positional relationships indicated by the terms "central", "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the application. In addition, the terms "first", "second", "third" are only for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0020] Embodiment 1 As shown in the drawings, Figure 1 to the drawings, Figure 3 A high-temperature-resistant high-voltage silicon carbide intelligent power module device of the present embodiment includes: a heat sink 4 for providing a heat dissipation channel and mechanical support; a DBC substrate 2 located on the heat sink 4; the DBC substrate 2 is welded on the heat sink 4 to provide circuit connection and mechanical support, and the solder between the DBC substrate 2 and the heat sink 4 is Pb92.5Sn5Ag2.5; a plurality of SiC MOS chips 1 arranged in sequence on the DBC substrate 2; the SiC MOS chips 1 are welded on the top conductive copper layer of the DBC substrate 2, and the solder between each chip and the DBC substrate 2 is Pb92.5Sn5Ag2.5; the number of SiC MOS chips 1 in the present embodiment is 6, i.e. a first SiC MOS chip 11, a second SiC MOS chip 12, a third SiC MOS chip 13, a fourth SiC MOS chip 14, a fifth SiC MOS chip 15, and a sixth SiC MOS chip 16; The DBC substrate 2 comprises a top conductive copper layer, an insulating ceramic plate and a bottom copper layer arranged in sequence from top to bottom; the bottom copper layer is an integral copper layer; The top of the DBC substrate 2 is provided with a top conductive copper layer, and the top conductive copper layer is a plurality of copper layer units arranged in sequence and not connected, and the number of copper layer units in the embodiment is 5, that is, the copper layer units are a first copper layer unit 21, a second copper layer unit 22, a third copper layer unit 23, a fourth copper layer unit 24 and a fifth copper layer unit 25; the first SiC MOS chip 11 is arranged on the fourth copper layer unit 24, the second SiC MOS chip 12 is arranged on the third copper layer unit 23, the third SiC MOS chip 13 is arranged on the second copper layer unit 22, and the fourth SiC MOS chip 14, the fifth SiC MOS chip 15 and the sixth SiC MOS chip 16 are arranged on the first copper layer unit 21; The copper layer units are arranged in this way to meet the requirements of the three-phase bridge circuit topology of the power module, because most IPM modules are applied to the control circuit of a small power motor, and the motor is applied to different scenes, such as an air conditioner compressor and a refrigerator motor, which are essentially motors, only with different powers. Due to the size limitation of the IPM module, the design of the copper layer unit to realize the three-phase bridge topology is relatively single. Therefore, in the present application, the copper layer unit and the SiC MOS chip are designed to meet the requirements of small size and realize the three-phase bridge circuit topology of the power module.

[0021] A plurality of power terminals 3 are located on the DBC substrate 2; the power terminals 3 are welded on the top conductive copper layer of the DBC substrate 2, and the terminals and the copper layer are Pb92.5Sn5Ag2.5 solder; in the embodiment, one side of the top conductive copper layer is provided with power terminals, the number of power terminals is the same as the number of copper layer units, and one power terminal is arranged on each copper layer unit; the power terminals 3 comprise a first power terminal 31, a second power terminal 32, a third power terminal 33, a fourth power terminal 34 and a fifth power terminal 35; An outer shell 5 is located on the heat sink 4; the outer shell 5 is adhered to the bottom plate of the heat sink 4 and can be fixed by screws, the material of the outer shell 5 is peek (high-temperature resistant engineering plastic), and the glue between the outer shell 5 and the bottom plate of the heat sink 4 is WACKER ELASTOSIL RT707W; A driving circuit board 6 is located on the shell 5; the driving circuit board 6 is adhered to the shell 5 and does not contact the DBC substrate 2, and the glue between the driving circuit board 6 and the shell 5 is WACKER ELASTOSIL RT 707W; the driving circuit board 6 is arranged side by side with the top conductive copper layer, and the horizontal plane where the driving circuit board 6 is located is slightly higher than the horizontal plane where the top conductive copper layer is located, so that the overall power module device size meets: length < 80 mm, width ≤ 50 mm, height < 15 mm, and it needs to be particularly emphasized that the power module device of the application is a frame type package structure with a radiator, which can meet the small size requirement on this basis, which is one of the important innovations of the application; in addition, the SiC MOS chip arranged on the top conductive copper layer represents the power circuit, and in the actual use process, the power circuit will heat up sharply and much higher than the temperature that the driving circuit board 6 can withstand; therefore, the driving circuit board 6 is arranged side by side with the top conductive copper layer, and the horizontal plane where the driving circuit board 6 is located is higher than the horizontal plane where the top conductive copper layer is located, so as to realize the isolation of the driving circuit and the power circuit, and the overall power module device can achieve the effect of high temperature resistance. The driving circuit board 6 is not directly connected with the power circuit, so that the heat dissipated by the power circuit will not be directly transmitted to the driving circuit board, and in fact only a small part of the heat will be laterally transmitted to the driving circuit board, but the part of the heat is very low, so it will not affect the driving circuit.

[0022] A plurality of driving chips 7 are located on the driving circuit board 6; the driving chips 7 are adhered to the driving circuit board 6, and the glue between the driving chips 7 and the driving circuit board 6 is WACKER ELASTOSIL RT 707W; the number of the driving chips 7 is the same as the number of the SiC MOS chips, and each driving chip 7 is connected with and controls one SiC MOS chip; in the embodiment, the number of the driving chips 7 is 6, which are respectively a first driving chip 71, a second driving chip 72, a third driving chip 73, a fourth driving chip 74, a fifth driving chip 75 and a sixth driving chip 76; the driving chip 7 in the application is a high-temperature-resistant driving chip, and the models that can be used include: Nchip micro Nsi6601M, Nchip micro Nsi6651, Nchip micro Nsi6611, Summitek siLM5932, Summitek siLM5852 and TIVCC21750. The above models of chips can be used to manufacture the module described in the application.

[0023] A plurality of signal terminals 8 are located on the driving circuit board 6, and the signal terminals 8 are located on the side away from the power terminal 3; the driving signals on the driving chips 7 are connected with the external communication through the signal terminals; the signal terminals 8 are welded on the driving circuit board 6, and the solder is tin; in the embodiment, each driving chip 7 leads out 8 signal terminals 8; A plurality of gate resistors 9 are located on the driving circuit board 6; the gate resistors 9 are soldered on the driving circuit board 6, and the solder is tin; each driving chip 7 is connected with a SiC MOS chip through a gate resistor 9; in this embodiment, the first driving chip 71 controls the first SiC MOS chip 11, and the two are connected through the first gate resistor 91; the second driving chip 72 controls the second SiC MOS chip 12, and the two are connected through the second gate resistor 92; the third driving chip 73 controls the third SiC MOS chip 13, and the two are connected through the third gate resistor 93; the fourth driving chip 74 controls the fourth SiC MOS chip 14, and the two are connected through the fourth gate resistor 94; the fifth driving chip 75 controls the fifth SiC MOS chip 15, and the two are connected through the fifth gate resistor 95; the sixth driving chip 76 controls the sixth SiC MOS chip 16, and the two are connected through the sixth gate resistor 96; In this embodiment, the first SiC MOS chip 11 is connected with the fifth copper layer unit 25 through four 15 mil aluminum wires, connected with the first driving chip 71 through one 5 mil aluminum wire, and connected with the first gate resistor 91 through one 5 mil aluminum wire; the second SiC MOS chip 12 is connected with the fifth copper layer unit 25 through four 15 mil aluminum wires, connected with the second driving chip 72 through one 5 mil aluminum wire, and connected with the second gate resistor 92 through one 5 mil aluminum wire; the third SiC MOS chip 13 is connected with the fifth copper layer 25 through four 15 mil aluminum wires, connected with the third driving chip 73 through one 5 mil aluminum wire, and connected with the third gate resistor 93 through one 5 mil aluminum wire; the fourth SiC MOS chip 14 is connected with the fourth copper layer unit 24 through four 15 mil aluminum wires, connected with the fourth driving chip 74 through one 5 mil aluminum wire, and connected with the fourth gate resistor 94 through one 5 mil aluminum wire; the fifth SiC MOS chip 15 is connected with the third copper layer unit 23 through four 15 mil aluminum wires, connected with the fifth driving chip 75 through one 5 mil aluminum wire, and connected with the fifth gate resistor 95 through one 5 mil aluminum wire; the sixth SiC MOS chip 16 is connected with the second copper layer unit 22 through four 15 mil aluminum wires, connected with the sixth driving chip 76 through one 5 mil aluminum wire, and connected with the sixth gate resistor 96 through one 5 mil aluminum wire; the first power terminal 31 is in contact with the drain of the fourth and sixth SiC MOS chips; the second power terminal 32 is in contact with the drain of the third SiC MOS chip 13 and the source of the sixth SiC MOS chip 16; the third power terminal 33 is in contact with the drain of the second SiC MOS chip 12 and the source of the fifth SiC MOS chip 15; the fourth power terminal 34 is in contact with the drain of the first SiC MOS chip 11 and the source of the fourth SiC MOS chip 14; the fifth power terminal 35 is in contact with the sources of the first to third SiC MOS chips; the first driving chip 71 controls the gate of the first SiC MOS chip 11 through the first gate resistor 91 and is directly connected with the Kelvin source of the first SiC MOS chip 11; the second driving chip 72 controls the gate of the second SiC MOS chip 12 through the second gate resistor 92 and is directly connected with the Kelvin source of the second SiC MOS chip 12; the third driving chip 73 controls the gate of the third SiC MOS chip 13 through the third gate resistor 93 and is directly connected with the Kelvin source of the third SiC MOS chip 13; the fourth driving chip 74 controls the gate of the fourth SiC MOS chip 14 through the fourth gate resistor 94 and is directly connected with the Kelvin source of the fourth SiC MOS chip 14; the fifth driving chip 75 controls the gate of the fifth SiC MOS chip 15 through the fifth gate resistor 95 and is directly connected with the Kelvin source of the fifth SiC MOS chip 15;The sixth driving chip 76 controls the gate of the sixth SiC MOS chip 16 through the sixth gate resistor 96, and directly connects the Kelvin source of the sixth SiC MOS chip 16; The shell 5 is filled with high-temperature-resistant WACKER silicon gel inside, and the power terminal 3 and the signal terminal 8 partially expose the silicon gel.

[0024] As shown in the accompanying drawings Figure 4 to the accompanying Figure 8 As shown in the accompanying drawings S1, prepare the DBC substrate 2; the DBC substrate 2 is double-sided copper-clad, the top part is the first to fifth copper layer units, and the bottom part is an integral copper layer; S2, tin paste, place the SiC MOS chip, power terminal, and DBC substrate on the heat sink bottom plate; tin paste is applied on the heat sink 4 bottom plate, the DBC substrate 2 is placed on the heat sink 4 bottom plate, tin paste is applied on the corresponding positions of the first to fifth copper layer units in sequence, then the SiC MOS chip and the power terminal are placed, and a customized sintering clamp is used to fix the relative positions of the DBC substrate 2 and the heat sink 4 bottom plate, the position of the SiC MOS chip 1 on the DBC substrate 2, and the position of the power terminal 3 on the DBC substrate 2; S3, weld the heat sink 4 bottom plate to further fix the SiC MOS chip, power terminal, and DBC substrate; place the heat sink 4 bottom plate with the SiC MOS chip 1, power terminal 3, and DBC substrate 2 attached on it in a sintering furnace, the maximum sintering temperature is 330-370°C, the maximum temperature is maintained for 10-20s, and vacuum is drawn during sintering; S4, clean the heat sink 4 bottom plate; place the heat sink 4 bottom plate in a cleaning machine for ultrasonic cleaning to remove the flux; S5, inspect the welding quality of the SiC MOS chip and the power terminal; use X-ray to check the welding quality of the SiC MOS chip and the power terminal, and the welding cavity rate of a single one is required to be less than 2% and the overall rate is required to be less than 5%; S6, weld the signal terminal 8 and the gate resistor 9 on the driving circuit board 6; use the electric assembly process to weld the signal terminal 8 and the high-temperature-resistant gate resistor 9 to the corresponding positions on the driving circuit board 6; wherein the signal terminal 8 is a 0.8mm gold-plated copper needle; S7, attach the driving chip 7 to the driving circuit board 6 and bond; use the glue WACKER ELASTOSIL RT 707W to attach the driving chip 7 to the corresponding position on the driving circuit board 6, and solidify at 100°C for 2h. Use 30um gold wire to connect the driving chip and the corresponding PAD on the driving circuit board 6; S8, assemble the housing 5 and the drive circuit board 6 on the base plate of the heat sink 4; use WACKER ELASTOSIL RT707W to glue the drive circuit board 6 on the housing 5, and then glue the housing 5 on the base plate of the heat sink 4, and cure at 100°C for 2h; S9, wire-bond the drive circuit board 6 with the SiC MOS chip leads; place the base plate of the heat sink 4 in a wire-bonding machine, and wire-bond according to the wiring diagram using appropriate bonding parameters; S10, encapsulate and glue, and complete the module; vacuumize the module, and use WACKER 915HT to glue, cure at 100°C for 2h, and finally point glue and encapsulate.

[0025] The present application develops a new high-temperature-resistant high-voltage SiC MOS IPM module aiming at the problems existing in Si IGBT IPM modules. Wide-bandgap semiconductor material SiC has higher breakdown voltage, smaller switching loss and higher temperature resistance than Si. The module structure is redesigned in the present application, which improves the current output capability of the module and increases the voltage level of the module under the premise of ensuring good heat dissipation of the module. The high-temperature-resistant high-voltage silicon carbide intelligent power module device of the present application can work in a high-temperature (220°C~240°C) environment. The high-temperature-resistant high-voltage silicon carbide intelligent power module device of the present application adopts a glue-filling process, and the drive circuit and the power circuit in the module are roughly in the same plane, that is, the present application is a planar structure, which makes the z-axis size of the module smaller and more suitable for narrow space applications. The present application uses bare drive chips to control the SiC MOS chips, and the control mode is one-to-one, such as the six drive chips mentioned in the embodiment, which has the highest degree of freedom. Moreover, the process requirement of the manufacturing method of the present application is low, and mass production is possible.

[0026] The above only describes the preferred embodiments of the present application, and it should be noted that for ordinary skilled persons in the art, some improvements and refinements can be made without departing from the principles of the present application, and these improvements and refinements should also be considered as the protection scope of the present application.

Claims

1. A high-temperature, high-voltage silicon carbide intelligent power module device, characterized in that, include: heat sink; Radiators are used to provide heat dissipation channels and mechanical support; The DBC substrate, located on the heat sink, provides circuit connections and mechanical support; Several SiC MOS chips arranged sequentially on a DBC substrate; Several power terminals located on the DBC substrate; The outer casing located on the radiator; Several driver chips located on the driver circuit board; The driver chip is a high-temperature resistant driver chip; The number of driver chips is the same as the number of SiC MOS chips, and each driver chip is connected to and controls one SiC MOS chip; Several signal terminals are located on the drive circuit board, with the signal terminals located on the side away from the power terminals; Several gate resistors are located on the driver circuit board; each driver chip is connected to a SiC MOS chip through a gate resistor.

2. The high-temperature and high-voltage silicon carbide intelligent power module device according to claim 1, characterized in that: The DBC substrate includes a top conductive copper layer, an insulating ceramic plate, and a bottom copper layer arranged sequentially from top to bottom; the top conductive copper layer consists of several copper layer units arranged sequentially and not connected.

3. The high-temperature and high-voltage silicon carbide intelligent power module device according to claim 2, characterized in that: A power terminal is provided on one side of the top conductive copper layer. The number of power terminals is the same as the number of copper layer units, and each copper layer unit has one power terminal.

4. The high-temperature and high-voltage silicon carbide intelligent power module device according to claim 2, characterized in that: There are 5 copper layer units and 6 SiC MOS chips. The first SiC MOS chip is set on the fourth copper layer unit, the second SiC MOS chip is set on the third copper layer unit, the third SiC MOS chip is set on the second copper layer unit, and the fourth, fifth, and sixth SiC MOS chips are set on the first copper layer unit.

5. The high-temperature and high-voltage silicon carbide intelligent power module device according to claim 4, characterized in that: The drive circuit board is arranged side by side with the top conductive copper layer, and the horizontal plane of the drive circuit board is higher than the horizontal plane of the top conductive copper layer, so that the overall power module device size meets the following requirements: length < 80mm, width ≤ 50mm, and height < 15mm.

6. The high-temperature and high-voltage silicon carbide intelligent power module device according to claim 1, characterized in that: The inside of the casing is filled with high-temperature resistant WACKER silicone gel, with the power and signal terminals partially exposed.

7. A method for fabricating a high-temperature, high-voltage silicon carbide intelligent power module device, used to fabricate the high-temperature, high-voltage silicon carbide intelligent power module device as described in any one of claims 1-6, characterized in that, Includes the following steps: S1. Prepare the DBC substrate; S2. Apply solder paste and place the SiC MOS chip, power terminals, and DBC substrate on the heat sink base plate; S3. Weld the heat sink base plate to further fix the SiC MOS chip, power terminals, and DBC substrate; the maximum sintering temperature range is 330~370°C. S4. Clean the heat dissipation base plate; S5. Inspect the soldering quality of the SiC MOS chip and power terminals; S6. Solder signal terminals and gate resistors onto the driver circuit board; S7. Mount and bond the driver chip on the driver circuit board; S8. Assemble the outer casing and circuit board on the heat sink base plate; S9, The driver circuit board is wire-bonded to the SiC MOS chip; S10. Sealing and potting completes module fabrication.

8. The method for fabricating a high-temperature, high-voltage silicon carbide intelligent power module device according to claim 7, characterized in that: The signal terminals are 0.8mm gold-plated copper pins.

9. The method for fabricating a high-temperature, high-voltage silicon carbide intelligent power module device according to claim 7, characterized in that: The S6 uses an electrical assembly process, where signal terminals and high-temperature resistant gate resistors are soldered onto the driver circuit board.

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