High aspect ratio deep silicon structure patterning definition method and high aspect ratio deep silicon structure

Abstract

The application discloses a high aspect ratio deep silicon structure patterning definition method and a high aspect ratio deep silicon structure, and relates to the technical field of semiconductor manufacturing. The method comprises the following steps: forming a plurality of photoresist patterns on the surface of a silicon substrate; at a first temperature, using a first gas as a deposition gas, depositing a polymer layer on the silicon substrate and the photoresist patterns; at a second temperature, using a second gas as an etching gas, etching the polymer layer and the silicon substrate; repeating the deposition and etching steps until a high aspect ratio deep silicon structure is formed on the silicon substrate; and removing the photoresist patterns. The first temperature and the second temperature are less than -40 DEG C, the first gas is CH4, CHF3 and H2, which is used for uniformly depositing an a-C:H:F cross-linked polymer layer, and the second gas is F2 and N2, which is used for improving the bottom etching rate and reducing the photoresist pattern loss. The application can uniformly protect the sidewall at a smaller size and a higher aspect ratio, and can improve the etching rate.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor processing, in particular to a high aspect ratio deep silicon structure patterning definition method and a high aspect ratio deep silicon structure obtained by using the method. BACKGROUND

[0002] In the rapidly developing field of advanced packaging, higher density interconnection is required, and deep silicon etching (DSE) is required to meet the requirements of nanoscale line width (less than 50 nm) and higher aspect ratio (greater than 100:1). The traditional periodic cyclic etching process has been difficult to meet the above limit aspect ratio requirements due to the influence of the corresponding physical limitations (such as ion shadow effect, reaction gas transmission efficiency). At the same time, nanoscale line width is more sensitive to the thickness fluctuation of the sidewall passivation layer (such as C-F polymer). When the thickness fluctuation of the sidewall passivation layer is large, it is easy to cause line width deviation and etching tilt (three-dimensional through silicon via and memory stack require etching verticality error less than ±0.2°) problems. In addition, the existing etching process also has the problems of plasma chemical residue and local rough peak (Ra>5nm) caused by random deposition of C-F polymer on the sidewall, which have important influence on the realization of higher aspect ratio and nanoscale deep silicon etching. And under the requirements of higher aspect ratio and nanoscale line width, how to improve the etching rate and how to improve the uniformity of the protection of the bottom sidewall during the etching process is particularly important. Therefore, it is necessary to study a process method which can significantly improve the above problems. SUMMARY

[0003] The present application aims to overcome the above problems existing in the prior art, and provides a high aspect ratio deep silicon structure patterning definition method and a high aspect ratio deep silicon structure.

[0004] To achieve the above purpose, the technical scheme of the present application is as follows:

[0005] According to the first aspect of the present application, the present application provides a high aspect ratio deep silicon structure patterning definition method, comprising:

[0006] providing a silicon substrate;

[0007] forming a plurality of photoresist patterns on the surface of the silicon substrate;

[0008] depositing a polymer layer on the silicon substrate and the photoresist pattern at a first temperature using a first gas as a deposition gas to protect the silicon substrate and the photoresist pattern during etching;

[0009] etching the polymer layer and the silicon substrate using a second gas as an etching gas at a second temperature;

[0010] repeating the steps of depositing and etching until a high aspect ratio deep silicon structure is formed on the silicon substrate;

[0011] removing the photoresist pattern;

[0012] wherein the first temperature and the second temperature are less than -40℃, the first gas is CH4, CHF3 and H2 for uniformly depositing a-C:H:F cross-linked polymer layer, and the second gas is F2 and N2 for increasing a bottom etching rate and reducing a photoresist pattern loss.

[0013] In some embodiments, the step of depositing specifically comprises:

[0014] at the first temperature, first passing the CH4 and the CHF3 in the first gas to deposit a transition a-C:H:F cross-linked polymer layer with a first hydrogen content; then, stopping passing the CH4 and the CHF3, and passing the H2 in the first gas to first treat the transition a-C:H:F cross-linked polymer layer to form a highly cross-linked a-C:H:F cross-linked polymer layer with a three-dimensional network structure and a second hydrogen content greater than the first hydrogen content by reducing dangling bonds and increasing cross-linking degree.

[0015] In some embodiments, the flow rate of the CH4 is 3sccm-20sccm.

[0016] In some embodiments, the flow rate of the CHF3 is 10sccm-50sccm.

[0017] In some embodiments, the flow rate of the H2 is 10sccm-100sccm.

[0018] In some embodiments, the flow rate ratio of the CH4, the CHF3 and the H2 is CH4:CHF3:H2=1:2:3-1:5:10.

[0019] In some embodiments, when the step of etching is performed, the second treatment is also performed on a sidewall of the high aspect ratio deep silicon structure being formed by using a plasma formed by the N2 in the second gas being passed to form a nitrided layer on the sidewall to assist passivation on a surface of the sidewall.

[0020] In some embodiments, the flow rate of the F2 is 100sccm-500sccm.

[0021] In some embodiments, the flow rate of the N2 is 10-100sccm.

[0022] In some embodiments, the flow rate ratio of the F2 and the N2 is F2:N2=5:1-10:1.

[0023] In some embodiments, the first temperature is -100- -40℃.

[0024] In some embodiments, the second temperature is -100- -40℃.

[0025] In some embodiments, the step of depositing is performed for 0.1-2s.

[0026] In some embodiments, the step of etching is performed for 0.2-4s.

[0027] According to a second aspect of the present application, the embodiments of the present application further provide a high aspect ratio deep silicon structure obtained by using the patterning definition method of the high aspect ratio deep silicon structure according to any one of the embodiments of the first aspect.

[0028] The embodiments of the present application can have / at least have the following advantages:

[0029] (1) By using small molecule first gas (CH4, CHF3 and H2) and second gas (F2 and N2) to replace traditional large molecule gas C4F8 and SF6 as deposition gas and etching gas respectively, the diffusion coefficient can be increased, the gas transmission efficiency can be improved, the etching gas can be more evenly diffused, and it is more beneficial to enter the nanoscale high aspect ratio deep silicon structure (deep trench, deep hole or via) for etching reaction, to achieve more excellent small size high aspect ratio deep silicon etching, and make the deposition gas can smoothly enter the bottom of the high aspect ratio deep silicon structure, realize more uniform protection of the sidewall at a smaller size. And by making the temperature (first temperature, second temperature) during the deposition step and the etching step less than -40℃, the ultra-low temperature can be used to change the chemical kinetics, enhance the physical adsorption, and reduce the reaction rate, so that the polymer layer (a-C:H:F cross-linked polymer layer) can be more dense and uniformly adsorbed on the sidewall, even at the bottom of the high aspect ratio deep silicon structure, the sidewall can also be effectively protected, and the lateral etching can be effectively inhibited, and an extremely vertical sidewall morphology can be obtained. Therefore, the application can solve the problem of the influence of the thickness fluctuation of the polymer formed by using large molecule C4F8 deposition on the control of nanoscale line width, and the ion shadow effect problem (nanoscale involves atomic size level), effectively improve the uniformity and roughness of the local C-F polymer, realize more excellent uniformity (high aspect ratio deep silicon structure upper, middle and lower position size uniformity), better sidewall smoothness, and further realize higher aspect ratio nanoscale size deep silicon structure etching. At the same time, the small molecule etching gas can significantly improve the etching rate and etching behavior at high depth (>100µm).

[0030] (2) By using a combination of CH4, CHF3 and H2 as the deposition gas, it can be easier to enter and uniformly deposit on the sidewall bottom of the ultra-narrow and ultra-deep silicon structure, and it can reduce the physical bombardment and chemical erosion of high-energy ions on the mask (photoresist pattern), reduce the damage to the mask, and protect the critical dimension. Moreover, by first passing CH4 and CHF3, a transition a-C:H:F cross-linked polymer layer is deposited as a skeleton structure at an ultra-low temperature (first temperature), and after stopping the passage of CH4 and CHF3, by passing H2, the first treatment is performed on the formed transition a-C:H:F cross-linked polymer layer at an ultra-low temperature, which can utilize the combination of H atoms and dangling bonds of carbon chains to reduce or even terminate dangling bonds, form stable C-H bonds, make the polymer structure more complete, and can use -CH2- and -CH- groups as cross-linking points to tightly connect carbon chains together, promote the improvement of cross-linking degree, thereby forming an a-C:H:F cross-linked polymer layer with a three-dimensional network structure with high cross-linking, which has the characteristics of lower fluorocarbon ratio, higher hydrogen-carbon ratio, higher density, higher hardness, and higher cross-linking degree, thus having excellent anti-physical sputtering and chemical etching capability, better blocking effect, thereby effectively avoiding lateral etching. At the same time, since the polymer layer can extend to the bottom, it ensures that the etching rate from the top to the bottom is anisotropic, thereby maintaining the vertical sidewall morphology.

[0031] (3) By using a combination of F2 and N2 as the etching gas, the high reactivity of F2 can provide abundant primary etchants, reduce the dependence on physical bombardment, and can improve the etching rate; the light ions generated by N2 can efficiently transfer energy to the bottom with small sputtering damage. Among them, the small molecule reactants and products have a longer average free path, can directly reach the bottom of the high aspect ratio deep silicon structure, ensure the bottom etching rate, and avoid "etching stop"; the generated ions have lighter mass and more concentrated energy distribution, realizing extreme anisotropic etching, and can reduce the damage to the photoresist pattern, obtaining a more vertical sidewall. In addition, the plasma formed by N2 can also perform a second treatment on the sidewall of the forming high aspect ratio deep silicon structure, and can form an extremely thin nitrided layer on the sidewall, so as to assist in passivating the surface of the sidewall, thereby further improving the fidelity of the pattern.

[0032] Other advantages of the present application will be described in the specific embodiments described below. BRIEF DESCRIPTION OF DRAWINGS

[0033] Figure 1 A flowchart of a definition method of a high aspect ratio deep silicon structure pattern according to a preferred embodiment of the present application.

[0034] Figure 2 A structure schematic diagram after forming a photoresist pattern on a silicon substrate according to a preferred embodiment of the present application.

[0035] Figure 3 A structure schematic diagram after a polymer layer is deposited on a silicon substrate and a photoresist pattern according to an embodiment of the present application.

[0036] Figure 4 A structure schematic diagram after a first etching structure is formed on a silicon substrate according to an embodiment of the present application.

[0037] Figure 5 A structure schematic diagram after a polymer layer is deposited on a silicon substrate and a photoresist pattern again according to an embodiment of the present application.

[0038] Figure 6 A structure schematic diagram after a second etching structure is formed on a silicon substrate according to an embodiment of the present application.

[0039] Figure 7 A structure schematic diagram after a high aspect ratio deep silicon structure is formed on a silicon substrate according to an embodiment of the present application.

[0040] Figure 8 A structure schematic diagram after a photoresist pattern is removed according to an embodiment of the present application.

[0041] Figure 10. Silicon substrate; 11. Opening; 12. Photoresist pattern; 13. Carbon-based protective film; 14. a-C:H:F cross-linked polymer layer; 15. First etching structure; 16. Second etching structure; 17. High aspect ratio deep silicon structure. DETAILED DESCRIPTION

[0042] In order to solve the problems existing in the prior art, an embodiment of the present application provides a method for defining a high aspect ratio deep silicon structure, which comprises the following steps:

[0043] providing a silicon substrate;

[0044] forming a plurality of photoresist patterns on the surface of the silicon substrate;

[0045] depositing a polymer layer on the silicon substrate and the photoresist pattern at a first temperature by using a first gas as a deposition gas, so as to protect the silicon substrate and the photoresist pattern during etching;

[0046] etching the polymer layer and the silicon substrate by using a second gas as an etching gas at a second temperature;

[0047] repeating the steps of depositing and etching until a high aspect ratio deep silicon structure is formed on the silicon substrate;

[0048] removing the photoresist pattern;

[0049] wherein the first temperature and the second temperature are less than -40℃, the first gas is CH4, CHF3 and H2 for uniform deposition of a-C:H:F cross-linked polymer layer, and the second gas is F2 and N2 for increasing the bottom etching rate and reducing the photoresist pattern loss.

[0050] The embodiments of the present application use small molecule first gas (CH4, CHF3 and H2) and second gas (F2 and N2) to replace the traditional large molecule gas C4F8 and SF6 as deposition gas and etching gas respectively, effectively increase the diffusion coefficient, improve the transmission efficiency of the reaction gas, make the etching gas diffuse more uniformly, and more easily enter the nanoscale high aspect ratio deep silicon structure (deep trench, deep hole or through hole) for etching reaction, achieve more excellent small size high aspect ratio deep silicon etching, and make the deposition gas smoothly enter the bottom of the high aspect ratio deep silicon structure to achieve more uniform protection of the sidewall at a smaller size. Moreover, by making the temperature (first temperature, second temperature) during the deposition step and the etching step less than -40℃, the ultra-low temperature can be used to change the chemical kinetics, enhance the physical adsorption, and reduce the reaction rate, so that the polymer layer (a-C:H:F cross-linked polymer layer) can be more dense and uniformly adsorbed on the sidewall, even at the bottom of the high aspect ratio deep silicon structure, the sidewall can be effectively protected, and the lateral etching can be effectively inhibited to obtain an extremely vertical sidewall morphology. At the same time, the small molecule etching gas can significantly improve the etching rate and etching behavior at high depth (>100µm).

[0051] The embodiments of the present application also provide a high aspect ratio deep silicon structure obtained by the patterning definition method of the high aspect ratio deep silicon structure.

[0052] The specific embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0053] Reference Figure 1 According to a first aspect of the present application, the embodiments of the present application provide a patterning definition method of a high aspect ratio deep silicon structure, which comprises the following steps in sequence:

[0054] Step S11: providing a silicon substrate.

[0055] Reference Figure 2 In some embodiments, a silicon substrate 10 is used to form a required high aspect ratio deep silicon structure on the silicon substrate 10 by the patterning definition method of the high aspect ratio deep silicon structure provided by the embodiments of the present application.

[0056] In some embodiments, the high aspect ratio deep silicon structure includes a deep trench, a deep hole or a through hole, etc.

[0057] In some embodiments, a silicon wafer can be used as the silicon substrate 10.

[0058] In some embodiments, the silicon wafer can be subjected to a doping process to provide the silicon substrate 10 with desired electrical properties.

[0059] In some embodiments, integrated circuits such as transistor structures can be fabricated on the silicon substrate 10 to achieve desired vertical interconnections by filling conductive materials after forming high aspect ratio deep silicon structures.

[0060] Step S12: Forming a plurality of photoresist patterns on the surface of the silicon substrate.

[0061] Reference Figure 2 In some embodiments, a spin coating process can be used to form a photoresist layer on the upper surface of the silicon substrate 10, and the photoresist layer can be subjected to a photolithographic patterning process to form a plurality of photoresist patterns 12 on the upper surface of the silicon substrate 10. Any two adjacent photoresist patterns 12 have an opening 11 as an etching window therebetween, and the surface of the silicon substrate 10 between the two adjacent photoresist patterns 12 is exposed at the bottom of the opening 11.

[0062] It should be noted that, Figure 2 In FIG. 2, only the case where two photoresist patterns 12 are formed on the upper surface of the silicon substrate 10 is shown. However, it should be understood that more photoresist patterns can be formed on the upper surface of the silicon substrate 10, such as three photoresist patterns, four photoresist patterns, ten photoresist patterns, etc., and the number of photoresist patterns is not limited thereto.

[0063] In some embodiments, before etching the silicon substrate 10, a third treatment is performed on the interface between the silicon substrate 10 and the photoresist patterns 12 at a third temperature below -40°C using an argon plasma to form a carbon-based protective film 13 (a protective film of carbon-based material containing C, N, and O) at the interface (the upper surface) of the silicon substrate 10 by bombarding the interface (the upper surface) of the silicon substrate 10 at the junction between the bottom of the photoresist patterns 12 and the upper surface of the silicon substrate 10 (i.e., at the inner bottom corner of the opening 11). The carbon-based protective film 13 can effectively protect the top of the etching during subsequent etching of the silicon substrate 10, prevent abnormal excessive lateral etching behavior at the top, and ensure the uniformity of the size at different depths (i.e., the verticality of the sidewall) during subsequent high aspect ratio etching.

[0064] In some embodiments, during the third treatment, the third temperature is -100°C to -40°C, the pressure is 50 mTorr to 800 mTorr, the source power is 50 W to 100 W, the bias power is 10 W to 50 W, and the time is 5 s to 20 s. However, the above ranges are not limiting.

[0065] Step S13: CH4 and CHF3 in the deposition gas are introduced at a first temperature below -40°C to deposit a transition a-C:H:F cross-linked polymer layer on the silicon substrate and the photoresist pattern.

[0066] In some embodiments, the deposition of the polymer layer is performed on the exposed surface of the silicon substrate 10 (sidewall of the high aspect ratio deep silicon structure being formed) and the exposed surface of the photoresist pattern 12 (side surface and top surface) using the first gas as the deposition gas to protect the silicon substrate 10 (sidewall of the high aspect ratio deep silicon structure being formed) and the photoresist pattern 12 during etching.

[0067] The first gas is CH4, CHF3 and H2, which belongs to small molecule gas with molecular weight less than C4F8, and is used to deposit a uniform a-C:H:F cross-linked polymer layer on the exposed surface of the silicon substrate 10 and the exposed surface of the photoresist pattern 12 at an ultra-low temperature less than -40°C. The plasma of the first gas is obtained by ionizing the first gas introduced into the process chamber, which is used to deposit the polymer layer.

[0068] In some embodiments, a transition a-C:H:F cross-linked polymer layer (not shown) is formed before the a-C:H:F cross-linked polymer layer is formed, which specifically includes:

[0069] At the first temperature, CH4 and CHF3 (without H2) in the first gas are introduced into the process chamber in which the silicon substrate 10 is placed, and a plasma is formed to first deposit a transition a-C:H:F cross-linked polymer layer (not shown) on the exposed surface of the silicon substrate 10 and the exposed surface of the photoresist pattern 12.

[0070] The transition a-C:H:F cross-linked polymer layer has a lower first hydrogen content. Moreover, the transition a-C:H:F cross-linked polymer layer contains dangling bonds of carbon chains, so that its structure is not complete enough and the cross-linking degree is not high enough, so that the transition a-C:H:F cross-linked polymer layer has not high enough density and hardness to play a better blocking effect. Therefore, the transition a-C:H:F cross-linked polymer layer formed can be treated (first treatment) to improve its density and hardness.

[0071] Step S14: Stop introducing CH4 and CHF3, and introduce H2 in the deposition gas to perform the first treatment on the transition a-C:H:F cross-linked polymer layer to form an a-C:H:F cross-linked polymer layer with a three-dimensional network structure of high cross-linking.

[0072] Reference Figure 3In some embodiments, after the formation of the transition a-C:H:F cross-linked polymer layer, the CH4 and CHF3 are stopped, and the transition a-C:H:F cross-linked polymer layer is subjected to a first treatment by passing H2 in the first gas at a first temperature below -40°C to form the a-C:H:F cross-linked polymer layer 14 (amorphous carbon hydrogen fluorine polymer layer) having a highly cross-linked three-dimensional network structure by reducing dangling bonds present in the transition a-C:H:F cross-linked polymer layer and increasing the cross-linking degree.

[0073] Due to the additional addition of hydrogen in the transition a-C:H:F cross-linked polymer layer, the a-C:H:F cross-linked polymer layer 14 formed has a higher second hydrogen content than the transition a-C:H:F cross-linked polymer layer, further increases the H / C ratio, and increases the density and hardness.

[0074] The deposition gas C4F8 used in the prior art belongs to a macromolecular gas. In the realization of smaller CDs (nanometer-level line width) and higher aspect ratios (>100:1), the deposition on the sidewall is mainly in the upper half of the deep trench and deep hole, and it is difficult to enter the bottom of the deep silicon structure, so it is not very sufficient for the bottom sidewall protection of the high aspect ratio deep silicon structure. The embodiments of the present application replace the traditional macromolecular C4F8 with small molecules CH4, CHF3 and H2 as deposition gas, and the first temperature is less than -40°C. In the high aspect ratio deep silicon etching, it has the following core advantages:

[0075] (1) Better sidewall protection quality: the a-C:H:F cross-linked polymer layer 14 with lower fluorocarbon ratio, higher density, and higher cross-linking degree can be formed.

[0076] (2) Better step coverage and penetration: small molecule deposition gas is easier to enter and uniformly deposit on the sidewall bottom of the ultra-narrow and ultra-deep structure (the average free path of small molecules such as CH3• and CF• is longer, and it is easier to reach the bottom of the deep hole without collision. The large groups (such as C2F5) generated by the traditional C4F8 dissociation are more likely to collide in the narrow channel and be consumed, and it is difficult to reach the bottom).

[0077] (3) Reduce damage to the photoresist pattern 12: the use of small molecule deposition gas reduces the physical bombardment and chemical erosion of high-energy ions on the photoresist pattern 12, and protects the critical dimension.

[0078] The embodiments of the present application use a gas system combined with CH4, CHF3 and H2 (without C4F8) to form a dense a-C:H:F cross-linked polymer layer 14 (amorphous carbon film), which is an amorphous carbon hydrogen fluorine polymer. Its structure is no longer linear, but a highly cross-linked three-dimensional network structure.

[0079] The deposition step of the traditional deep silicon etching is to use C4F8 as the deposition gas to form a polymer. When the polymer is dissociated in the plasma, a large amount of CF2 free radicals and other larger fluorocarbon groups (such as CF3, C2F5, etc.) are generated. The polymer is a "loose" Teflon-like structure mainly composed of linear -CF2-CF2- chains. This structure is relatively loose and has weak mechanical strength. In addition, the polymer formed by the C4F8 deposition gas has a high F / C ratio and contains a large amount of fluorine (F), making it more similar to Teflon, which has strong chemical inertness but is not strong enough as an etching barrier.

[0080] The small molecule deposition system formed by the combination of CH4, CHF3 and H2 in the embodiment of the present application has a low F / C ratio and a high H / C ratio. The introduction of H can play the following key roles:

[0081] (a) Termination of dangling bonds: H atoms can combine with dangling bonds of carbon chains to form stable C-H bonds, making the structure of the formed a-C:H:F cross-linked polymer layer 14 more complete.

[0082] (b) Promote cross-linking: -CH2- and -CH- groups can be used as cross-linking points to tightly connect carbon chains together, so that the a-C:H:F cross-linked polymer layer 14 formed on the sidewall has better blocking effect and can effectively avoid lateral etching.

[0083] Therefore, the a-C:H:F cross-linked polymer layer 14 formed by the embodiment of the present application has a highly cross-linked structure, which is more dense and hard when deposited on the sidewall, and has excellent resistance to physical sputtering and chemical etching.

[0084] In the small molecule system of CH4, CHF3 and H2 in the embodiment of the present application, the F / C ratio is relatively low and the H / C ratio is relatively high, so the chemical corrosion of the photoresist pattern 12 can be greatly reduced. Moreover, the plasma conditions required for small molecule deposition are generally milder than those of macromolecules, and the ion energy is relatively low, reducing the physical sputtering of the photoresist pattern 12. Therefore, the loss of the photoresist pattern 12 is effectively reduced.

[0085] In addition, the small molecule deposition gas system of the embodiment of the present application can effectively resist lateral etching, thereby inhibiting the generation of a Bowing morphology.

[0086] At the same time, the a-C:H:F cross-linked polymer layer 14 can extend to the bottom, ensuring that the etching rate from top to bottom is anisotropic and consistent, thereby maintaining a vertical sidewall morphology.

[0087] In some embodiments, the flow rate of CH4 in the deposition gas is 3 sccm to 20 sccm. For example, the flow rate of CH4 can be 3 sccm, 5 sccm, 8 sccm, 10 sccm, 15 sccm, or 20 sccm, or any value between any two of the aforementioned flow rates. However, the application is not limited thereto.

[0088] In some embodiments, the flow rate of CHF3 in the deposition gas is 10 sccm to 50 sccm. For example, the flow rate of CHF3 can be 10 sccm, 15 sccm, 20 sccm, 30 sccm, 40 sccm, or 50 sccm, or any value between any two of the aforementioned flow rates. However, the application is not limited thereto.

[0089] In some embodiments, the flow rate of H2 in the deposition gas is 10 sccm to 100 sccm. For example, the flow rate of H2 can be 10 sccm, 20 sccm, 30 sccm, 50 sccm, 80 sccm, or 100 sccm, or any value between any two of the aforementioned flow rates. However, the application is not limited thereto.

[0090] In some embodiments, the flow rate ratio of CH4, CHF3, and H2 in the deposition gas is CH4:CHF3:H2 = 1:2:3 to 1:5:10. However, the application is not limited thereto.

[0091] In some embodiments, the first temperature is -100°C to -40°C. For example, the first temperature can be -100°C, -90°C, -80°C, -70°C, -60°C, -50°C, or -40°C, or any value between any two of the aforementioned temperatures. However, the application is not limited thereto.

[0092] In some embodiments, when the step of performing deposition (steps S13 to S14) is performed, the time is 0.1 s to 2 s. For example, the time when the step of performing deposition is performed can be 0.1 s, 0.2 s, 0.3 s, 0.4 s, 0.5 s, 0.7 s, 0.9 s, 1 s, 1.2 s, 1.5 s, 1.8 s, or 2 s, or any value between any two of the aforementioned times. However, the application is not limited thereto.

[0093] In some embodiments, when the step of performing deposition is performed, the ratio of the time of passing CH4 and CHF3 to the time of passing H2 can be 1:1 to 1:3. However, the application is not limited thereto.

[0094] In some embodiments, the pressure is between 5 mTorr and 200 mTorr when performing the step of depositing. For example, the pressure can be 5 mTorr, 10 mTorr, 20 mTorr, 50 mTorr, 80 mTorr, 100 mTorr, 130 mTorr, 150 mTorr, 190 mTorr, or 200 mTorr, or any value between any two of the foregoing pressure values. However, the application is not limited in this regard.

[0095] In some embodiments, the source power is between 500 W and 3000 W when performing the step of depositing. For example, the source power can be 500 W, 1000 W, 1500 W, 2000 W, 2500 W, or 3000 W, or any value between any two of the foregoing source power values. However, the application is not limited in this regard.

[0096] In some embodiments, the bias power is between 10 W and 200 W when performing the step of depositing. For example, the bias power can be 10 W, 20 W, 50 W, 70 W, 100 W, 130 W, 160 W, 180 W, or 200 W, or any value between any two of the foregoing bias power values. However, the application is not limited in this regard.

[0097] Step S15: F2 and N2 are introduced as etching gas to etch the a-C:H:F cross-linked polymer layer and the silicon substrate at a second temperature of -40°C or lower.

[0098] Reference Figure 4 This step is used to continue performing the step of etching after the step of depositing described above, at an ultra-low temperature (second temperature) of less than -40°C, and to etch the a-C:H:F cross-linked polymer layer 14 and the silicon substrate 10 formed in the previous step by using F2 and N2 (second gas) as etching gas (not containing SF6) to form a first etching structure 15 on the silicon substrate 10 (after the step of etching, there is still a remaining a-C:H:F cross-linked polymer layer 14 on the side of the photoresist pattern 12, Figure 4 The second gas is ionized to form a plasma of the second gas for etching the a-C:H:F cross-linked polymer layer 14 and the silicon substrate 10. Further, the a-C:H:F cross-linked polymer layer 14 on the bottom of the opening 11 is removed by the bombardment of the plasma of the second gas through the first etching step, and the exposed silicon substrate 10 is further etched by the plasma of the second gas through the second etching step to form the first etching structure 15.

[0099] In etching the silicon substrate 10, due to the presence of the carbon-based protective film 13, when the first etching structure 15 is formed by etching, the top is prevented from being excessively laterally etched, so that the size of the first etching structure 15 is relatively uniform, thereby laying a foundation for ensuring that the sizes at different positions on the entire high-aspect-ratio deep silicon structure are uniform.

[0100] When a mixed gas of fluorine gas (F2) and N2 with smaller molecules is used as the etching gas instead of the traditional SF6 large molecule gas, more uniform diffusion can be achieved, which is more conducive to entering the nanoscale deep trench or hole for etching reaction, so that more excellent small-size high-aspect-ratio deep silicon etching can be achieved. In addition, although SF6 has 6 F, only one F ion can be dissociated for etching reaction, and the remaining SF5 does not participate in the reaction and is then removed. However, F2 dissociation can produce two F ions, and the number of reactants participating in the reaction is more than that of SF6, which can improve the etching rate, especially for etching deep silicon structures with high depth (more than 100 µm), which can significantly improve the throughput of the machine.

[0101] Therefore, by using the above-mentioned small-molecule etching gas and deposition gas, the diffusion coefficient is effectively increased, the reaction gas transmission efficiency is improved, the influence of the thickness fluctuation of the previous large-molecule C4F8 polymer on the control of the nanoscale line width and the ion shadow effect problem are solved, the uniformity and roughness of the local C-F polymer are effectively improved, and thus more uniform, better sidewall smoothness, and higher-aspect-ratio nanoscale size deep silicon structure etching is achieved. At the same time, using a mixed gas of F2 and N2 as the etching gas can significantly improve the etching rate and behavior at high depth (more than 100 µm).

[0102] By changing the etching gas from the traditional SF6 to a combination of small-molecule F2 and N2 mixed gas, the application embodiment can better adapt to the needs of advanced processes, and significantly improve the performance in molecular transport, reaction efficiency, and morphology control through optimized reaction chemistry and plasma physics, which is a key technical path to realize ultra-high-aspect-ratio etching.

[0103] The differences of using a combination of F2 and N2 mixed gas as the etching gas compared to using the traditional SF6 as the etching gas can include:

[0104] (1) High-efficiency generation of high-density F atoms: through a more efficient dissociation path, a sufficient amount of main etching agent (F atoms) is provided.

[0105] (2) Excellent deep hole transport capability: small-molecule reactants and products have a longer mean free path, which can reach the bottom of the deep hole, ensuring the bottom etching rate.

[0106] (3) Precise ion energy and angle control: the generated ions are lighter and have more concentrated energy distribution, realizing extreme anisotropic etching and reducing damage to the photoresist pattern 12.

[0107] (4) Bowing and other defects can be inhibited, and more vertical sidewalls can be obtained.

[0108] When a combination of F2 and N2 is used as the etching gas, the main reaction groups are F•, N + , and N2 + . N2 can dilute F2 to prevent over-reaction; N + , N2 + is a light ion that can efficiently transfer energy to the bottom with little sputtering damage.

[0109] In some embodiments, when the etching step is performed, the sidewalls of the high aspect ratio deep silicon structure being formed (in this step, the sidewalls of the first etching structure 15) are also subjected to a second treatment using a plasma formed by N2 in the second gas. A very thin nitride layer is formed on the sidewalls by the N element, which can assist in passivating the surface of the sidewalls, thereby further improving the fidelity of the etching pattern, and thus more vertical sidewalls can be obtained.

[0110] In some embodiments, NF3, BF3, PF3, CF4, C2F6, etc. can be added to the second gas when the etching step is performed, which can further have a synergistic effect.

[0111] When NF3 is added to the etching gas, more F ions can be generated, thus providing a high-efficiency fluorine source; and the dissociated NF2 and other groups also help to passivate the sidewalls and inhibit the bowing defect.

[0112] When BF3 is added to the etching gas, BF x + is a light ion that is beneficial to bottom etching and sidewall modification. The B element can also be incorporated into the polymer on the sidewalls, changing its properties and further enhancing the etch resistance of the a-C:H:F cross-linked polymer layer 14 (similar to the case when PF3 is added).

[0113] When CF4 is added to the etching gas, a small amount of C can be introduced, which can work synergistically with the deposition step to achieve more precise control of the sidewall morphology, thus balancing deposition and etching. In addition, the C element can also form a light C-containing protective layer on the surface of the photoresist pattern 12.

[0114] When C2F6 is added to the etching gas, a higher C / F ratio can be provided, which can be used for etching conditions that require stronger passivation.

[0115] The small molecule radicals in the etching gas, the dominant mechanism in the etching step can include:

[0116] (1) Higher F atom density and deep hole penetration ability: the dissociation energy of small molecule gas is usually lower than SF6, under the same plasma conditions, it can produce a higher concentration of F atoms. F atoms and small molecule ions are light in mass and have long mean free paths, which can effectively diffuse to the bottom of the deep hole to maintain the etching rate at the bottom and avoid "etching stop".

[0117] (2) Better ion-assisted etching: the essence of etching is "ion-enhanced chemical etching". The removal of the bottom silicon requires: a) F atoms for chemical reaction; b) ion bombardment to provide energy to break Si-Si bonds and sputter by-products. Light ions (such as N + ) can more effectively transfer energy to the bottom surface than SF x + heavy ions, enhancing the etching reaction; at the same time, due to their light mass, the physical sputtering yield of the material is low, reducing the physical damage to the bottom silicon and the back sputtering of the top photoresist pattern 12.

[0118] (3) Inhibit drum-shaped morphology: the cause of drum-shaped morphology includes local failure of the sidewall protection layer, resulting in lateral etching of silicon from the side by F atoms and ions. The advantages of small molecule systems are: a) higher F atom density means faster switching to the deposition step, avoiding lateral etching caused by long etching step time; b) assisting sidewall passivation; c) more concentrated vertical ion beams reduce lateral scattering ions. The three work together to ensure that etching is basically in the vertical direction.

[0119] (4) Reduce photoresist pattern 12 consumption caused by physical bombardment: the ions produced by the small molecule system are lighter in mass, and at the same bias, their momentum is lower than that of the heavy ions produced by SF6. Therefore, the physical sputtering rate of the photoresist pattern 12 is significantly reduced, resulting in reduced photoresist pattern 12 consumption and improved pattern fidelity.

[0120] (5) Reduce photoresist pattern 12 consumption caused by chemical erosion: although F atoms will erode the photoresist pattern 12, the small molecule system reduces the overall process time through higher etching efficiency, indirectly reducing the cumulative exposure time of the photoresist pattern 12.

[0121] In some embodiments, the flow rate of F2 in the etching gas is 100-500 sccm. For example, the flow rate of F2 can be 100 sccm, 120 sccm, 150 sccm, 200 sccm, 300 sccm, 400 sccm or 500 sccm, or any value between any two of the foregoing. But it can not be limited to this.

[0122] In some embodiments, the flow rate of N2 in the etching gas is 10-100 seem. For example, the flow rate of N2 can be 10 seem, 20 seem, 30 seem, 50 seem, 60 seem, 80 seem, or 100 seem, or any value between any two of the foregoing. However, the disclosure is not limited thereto.

[0123] In some embodiments, the flow rate ratio of F2 and N2 in the etching gas is F2:N2 = 5:1-10:1. For example, the flow rate ratio of F2 and N2 can be 5:1, 6:1, 7:1, 8:1, 9:1, or 10:1. However, the disclosure is not limited thereto. Among them, N2 plays a role in providing light ions and stabilizing plasma, but the proportion should not be too high, otherwise F2 will be diluted too much, reducing the rate.

[0124] In some embodiments, the second temperature is -100°C to -40°C. For example, the second temperature can be -100°C, -90°C, -80°C, -70°C, -60°C, -50°C, or -40°C, or any value between any two of the foregoing. However, the disclosure is not limited thereto.

[0125] In some embodiments, when performing the step of etching (step S15), the time for the first etching step and the second etching step is 0.1-2 s, and the total time for performing the etching step is 0.2-4 s. For example, the time for performing the first etching step or the second etching step can be 0.1 s, 0.2 s, 0.3 s, 0.4 s, 0.5 s, 0.7 s, 0.9 s, 1 s, 1.2 s, 1.5 s, 1.8 s, or 2 s, or any value between any two of the foregoing. However, the disclosure is not limited thereto.

[0126] In some embodiments, when performing the step of etching, the pressure is 5-200 mTorr. For example, the pressure can be 5 mTorr, 10 mTorr, 20 mTorr, 50 mTorr, 80 mTorr, 100 mTorr, 130 mTorr, 150 mTorr, 190 mTorr, or 200 mTorr, or any value between any two of the foregoing. However, the disclosure is not limited thereto.

[0127] In some embodiments, when performing the step of etching, the source power is 500-3000 W. For example, the source power can be 500 W, 1000 W, 1500 W, 2000 W, 2500 W, or 3000 W, or any value between any two of the foregoing. However, the disclosure is not limited thereto.

[0128] In some embodiments, the bias power is 10 W to 200 W when performing the step of etching. For example, the bias power can be 10 W, 20 W, 50 W, 70 W, 100 W, 130 W, 160 W, 180 W, or 200 W, or any value between any two of the foregoing bias power values. However, the present application is not limited thereto.

[0129] Step S16: Repeating the steps S13 to S15 until the high aspect ratio deep silicon structure is formed on the silicon substrate.

[0130] Reference Figure 5 In some embodiments, the step S13 is repeated to deposit a transition a-C:H:F cross-linked polymer layer on the exposed surface of the silicon substrate 10 (i.e., the inner wall of the first etching structure 15 formed in the previous step) and the exposed surface of the photoresist pattern 12 by introducing CH4 and CHF3 in the deposition gas at a first temperature below -40°C. Then, the step S14 is repeated to perform the first treatment on the transition a-C:H:F cross-linked polymer layer by introducing H2 in the deposition gas to form the a-C:H:F cross-linked polymer layer 14 having a highly cross-linked three-dimensional network structure, so as to protect the sidewall of the first etching structure 15 and the photoresist pattern 12 when performing the step of etching subsequently.

[0131] Next, the step S15 is repeated to etch the a-C:H:F cross-linked polymer layer 14 and the silicon substrate 10 by introducing F2 and N2 as the etching gas at a second temperature below -40°C, i.e., by the first etching step, and by the bombardment effect of the plasma of the second gas (F2 and N2), the a-C:H:F cross-linked polymer layer 14 on the bottom of the first etching structure 15 (the bottom of the opening 11) is removed first, and then by the second etching step, the etching of the exposed silicon material on the bottom of the first etching structure 15 is continued downward by the plasma of the second gas, and the second etching structure 16 is formed successively below the first etching structure 15, as shown in Figure 6 The original bottom of the first etching structure 15 is represented by a horizontal dashed line in Figure 6 After this etching step, the remaining a-C:H:F cross-linked polymer layer 14 on the sidewall of the photoresist pattern 12 and the sidewall of the first etching structure 15 is Figure 6 omitted.

[0132] By analogy, by repeatedly performing the above steps S13 to S15, a third etching structure, a fourth etching structure, etc. (not shown) can be successively formed below the second etching structure 16, and finally a high-aspect-ratio deep silicon structure 17 with a target aspect ratio composed of the successively formed etching structures (the first etching structure 15, the second etching structure 16, the third etching structure, the fourth etching structure, etc.) is formed on the silicon substrate 10, as shown in Figure 7

[0133] In some embodiments, when the process of steps S13 to S15 is performed once, scallop-like stripes are regularly formed on the sidewall, each scallop-like stripe has a concave portion at the bottom and a convex portion at the junction of two scallop-like stripes, so that the sidewall has a rough surface topography. Therefore, in the embodiments of the present application, after each cycle of performing steps S13 to S15 once or after each cycle of performing steps S13 to S15 twice, a step of fourth processing of the sidewall is embedded at a fourth temperature to timely remove the excess a-C:H:F cross-linked polymer layer 14 on the sidewall, prevent non-uniform etching caused by excessive polymer thickness, and through the fourth processing, remove at least part of the convex portion, reduce the roughness of the sidewall, and improve the smoothness of the sidewall.

[0134] In some embodiments, the fourth processing specifically includes: using a plasma of HBr and O2 to react with the a-C:H:F cross-linked polymer layer 14 to remove part of the thickness of the a-C:H:F cross-linked polymer layer 14 deposited on the sidewall to adjust the thickness uniformity of the a-C:H:F cross-linked polymer layer 14 on the sidewall, and react with the silicon material on the surface of the exposed convex portion to generate a silicon tetrabromide layer and a silicon dioxide layer; then, stop the input of HBr and O2, and use a plasma of CF4 and Ar to bombard the sidewall to etch and remove the silicon dioxide on the convex portion and desorb the silicon tetrabromide to be removed from the sidewall, thereby removing at least part of the convex portion and forming a relatively smooth new sidewall, so that the sidewall is smoothed, thereby reducing the roughness of the sidewall surface and effectively avoiding the local rough peaks (Ra>5nm) caused by the random deposition of the polymer on the sidewall.

[0135] In some embodiments, the fourth temperature is -100℃ to -40℃. For example, the fourth temperature can be -100℃, -90℃, -80℃, -70℃, -60℃, -50℃ or -40℃, or any value between any two of the foregoing temperature values. However, it can not be limited thereto.

[0136] ​In some embodiments, the time for performing the fourth treatment is 1s-4s. For example, the time can be 1s, 1.2s, 1.4s, 1.6s, 1.8s, 2s, 2.4s, 3s, 3.6s or 4s, or any value between any two of the aforementioned time values. However, the application is not limited thereto.

[0137] In some embodiments, the time for passing in HBr and O2 is the same as or different from the time for passing in CF4 and Ar when performing the fourth treatment.

[0138] In some embodiments, HBr is also used to perform a fifth treatment on the exposed surface of the photoresist pattern 12 when performing the fourth treatment, so that the chemical bonds in the photoresist pattern 12 material on the surface are broken and recombined to form high-molecular polymer chains, so as to improve the etching resistance of the photoresist pattern 12 by changing the C / H ratio on the surface of the photoresist pattern 12 material. Therefore, the etching resistance of the photoresist pattern 12 above the high-aspect-ratio deep silicon structure 17 is improved, i.e., the etching selectivity of the photoresist pattern 12 is improved. The fifth treatment is performed simultaneously with the fourth treatment.

[0139] In some embodiments, O2 is also used to perform a sixth treatment on the exposed surface of the photoresist pattern 12 when performing the fourth treatment, so that the exposed surface of the photoresist pattern 12 is oxidized at the fourth ultra-low temperature and is triggered to react by the deep ultraviolet light in the environment to form a hardened layer. Therefore, the etching resistance of the photoresist pattern 12 above the high-aspect-ratio deep silicon structure 17 is improved, i.e., the etching selectivity of the photoresist pattern 12 is improved. The sixth treatment is performed simultaneously with the fourth treatment.

[0140] Step S17: removing the photoresist pattern.

[0141] In some embodiments, after the high-aspect-ratio deep silicon structure 17 is formed, the surface of the silicon substrate 10 is bombarded using a plasma of a third gas to remove the photoresist pattern 12 and the carbon-based protective film 13 on the surface of the silicon substrate 10. After the photoresist pattern 12 and the carbon-based protective film 13 are removed, the silicon substrate 10 with the surface exposed and the high-aspect-ratio deep silicon structure 17 formed thereon is obtained, as shown in FIG. 2D. Figure 8

[0142] In some embodiments, the third gas includes an oxidizing gas. The oxidizing gas can be, for example, oxygen, and nitrogen can be passed in simultaneously as a dilution gas.

[0143] ​In some other embodiments, another implementation of the high aspect ratio deep silicon structure is that the process of forming the high aspect ratio deep silicon structure on the silicon substrate by repeatedly performing the steps of deposition and etching is divided into a first etching stage, a second etching stage and a third etching stage which are sequentially connected and are respectively used for forming the top part, the middle part and the bottom part of the high aspect ratio deep silicon structure in sequence. The first etching stage can use F2 and N2 as etching gas, the second etching stage can use F2 and PF3 (or F2 and BF3) as etching gas, and the third etching stage can use F2 and C2F6 (or F2 and CF4) as etching gas. When the first etching stage is performed, a stable plasma can be formed by adding N2, which can reduce the severe etching behavior of the top region caused by the instability of the sheath layer at the beginning of etching and the mask edge effect, effectively ensure the stability of the top critical dimension, reduce ion sputtering damage during etching, improve the protection of the photoresist pattern, and also form an extremely thin nitride layer on the sidewall to assist in passivation of the sidewall surface to prevent excessive lateral etching and improve the verticality of the sidewall top. By using the combination of F2 and PF3 (or F2 and BF3) as etching gas in the second etching stage, the properties of the polymer layer can be changed by the incorporation of P (or B) elements to enhance the lateral etching resistance of the polymer layer, thereby further improving the verticality of the sidewall and the uniformity of the size. By using the combination of F2 and C2F6 (or F2 and CF4) as etching gas in the third etching stage, a higher fluorocarbon ratio can be provided to enhance the deposition, effectively inhibit lateral etching of the sidewall bottom, and thus eliminate the problem of bottom side digging. Therefore, by performing the etching process in stages, not only the limitations of the traditional single etching process which cannot achieve high precision control are overcome, but also a more precise and controllable etching scheme is provided for the manufacture of high-performance devices, effectively expanding the etching process window.

[0144] According to a second aspect of the present application, the embodiments of the present application also provide a high aspect ratio deep silicon structure obtained by using the patterning definition method of the high aspect ratio deep silicon structure as described in any one of the embodiments of the first aspect.

[0145] Reference Figure 8 In some embodiments, the high aspect ratio deep silicon structure 17 is formed on the surface of the silicon substrate 10. The critical dimension of the high aspect ratio deep silicon structure 17 can be 50 nm or less, and the aspect ratio can be greater than or equal to 100:1. The high aspect ratio deep silicon structure 17 can be, for example, a deep trench, a deep hole or a via, etc.

[0146] In some embodiments, the high aspect ratio deep silicon structure 17 can be applied to MEMS devices (such as accelerometers, gyroscopes, pressure sensors, etc.), 3D integration and advanced packaging (such as through-silicon via (TSV) fabrication, chip stacking, etc.), optical devices (such as optical waveguides, diffraction gratings, etc.), power devices (such as insulated gate bipolar transistors (IGBT), trench structures of power metal-oxide-semiconductor field-effect transistors (MOSFET), etc.).

[0147] In a third aspect, the embodiments of the present application also provide a plasma processing device for performing the patterning definition method of the high aspect ratio deep silicon structure corresponding to the above-mentioned embodiments to form the high aspect ratio deep silicon structure 17 corresponding to the above-mentioned embodiments. The plasma processing device includes an inductively coupled plasma (ICP) etching device or a capacitively coupled plasma (CCP) etching device, etc.

[0148] In other aspects, the embodiments of the present application also provide an electronic device including the high aspect ratio deep silicon structure 17 (such as a deep trench, a deep hole or a via, etc.) obtained by using the patterning definition method of the high aspect ratio deep silicon structure according to the above-mentioned embodiments. The electronic device can be a storage device, a mobile phone, a computer, a tablet computer, an electronic instrument, a television, an artificial intelligence device, etc.

[0149] In summary, by using small molecule first gas (CH4, CHF3 and H2) and second gas (F2 and N2) instead of traditional large molecule gas C4F8 and SF6 as deposition gas and etching gas respectively, the diffusion coefficient can be increased, the gas transmission efficiency can be improved, the etching gas can be more uniformly diffused and more easily enter the nanoscale high aspect ratio deep silicon structure 17 for etching reaction, more excellent small size high aspect ratio etching can be achieved, and the deposition gas can smoothly enter the bottom of the high aspect ratio deep silicon structure 17 to achieve more uniform protection of the sidewall at a smaller size. Moreover, by making the temperature (first temperature) during the deposition step and the etching step less than -40°C, the chemical kinetics can be changed, the physical adsorption can be enhanced, and the reaction rate can be reduced by using ultra-low temperature, so that the a-C:H:F cross-linked polymer layer 14 can be more dense and more uniformly adsorbed on the sidewall, effective protection of the sidewall can be formed even at the bottom of the high aspect ratio deep silicon structure, lateral etching can be effectively inhibited, an extremely vertical sidewall morphology can be obtained, and etching of a high aspect ratio nanoscale size deep silicon structure can be achieved. At the same time, the small molecule etching gas can significantly improve the etching rate and etching behavior at a high depth (>100µm).

[0150] The above merely describes the preferred embodiments of the present application, and the embodiments are not intended to limit the protection scope of the present application. Any equivalent changes made according to the content of the specification and drawings of the present application should also be included in the protection scope of the present application.

Claims

1. A method of patterned definition of high aspect ratio deep silicon structures, characterized in that, The method comprises the following steps: providing a silicon substrate; forming a plurality of photoresist patterns on the surface of the silicon substrate; depositing a polymer layer on the silicon substrate and the photoresist patterns at a first temperature using a first gas as a deposition gas to protect the silicon substrate and the photoresist patterns during etching; etching the polymer layer and the silicon substrate at a second temperature using a second gas as an etching gas; repeating the steps of depositing and etching until a high-aspect-ratio deep silicon structure is formed on the silicon substrate; removing the photoresist patterns; wherein the first temperature and the second temperature are less than -40℃, the first gas is CH4, CHF3 and H2, which is used to uniformly deposit an a-C:H:F cross-linked polymer layer, and the second gas is F2 and N2, which is used to increase the bottom etching rate and reduce the photoresist pattern loss.

2. The method of patterned definition of high aspect ratio deep silicon structures according to claim 1, wherein, The step of depositing specifically comprises the following steps: at the first temperature, first introducing the CH4 and the CHF3 in the first gas to deposit a transition a-C:H:F cross-linked polymer layer with a first hydrogen content; then, stopping the introduction of the CH4 and the CHF3 and introducing the H2 in the first gas to perform a first treatment on the transition a-C:H:F cross-linked polymer layer to form a highly cross-linked a-C:H:F cross-linked polymer layer with a three-dimensional network structure by reducing dangling bonds and increasing cross-linking degree, the highly cross-linked a-C:H:F cross-linked polymer layer having a second hydrogen content greater than the first hydrogen content.

3. The method of patterned definition of high aspect ratio deep silicon structures according to claim 1, wherein, The flow rate of the CH4 is 3sccm-20sccm, the flow rate of the CHF3 is 10sccm-50sccm, and the flow rate of the H2 is 10sccm-100sccm.

4. The method of patterned definition of high aspect ratio deep silicon structures according to claim 1, wherein, The flow rate ratio of the CH4, the CHF3 and the H2 is CH4:CHF3:H2=1:2:3-1:5:

10.

5. The method of patterned definition of high aspect ratio deep silicon structures according to claim 1, wherein, When performing the step of etching, the second gas introduced in the step of etching is also used to form a plasma, which is used to perform a second treatment on the sidewall of the high-aspect-ratio deep silicon structure being formed to form a nitrided layer on the sidewall to assist in passivating the surface of the sidewall.

6. The method of patterned definition of high aspect ratio deep silicon structures according to claim 1, wherein, The flow rate of the F2 is 100sccm-500sccm, and the flow rate of the N2 is 10sccm-100sccm.

7. The method of patterned definition of high aspect ratio deep silicon structures according to claim 1, wherein, The flow rate ratio of the F2 and the N2 is F2:N2=5:1-10:

1.

8. The method of patterned definition of high aspect ratio deep silicon structures according to claim 1, wherein, The first temperature is -100℃--40℃, and the second temperature is -100℃--40℃.

9. The method of patterned definition of high aspect ratio deep silicon structures according to claim 1, wherein, The time for performing the step of depositing is 0.1s-2s, and the time for performing the step of etching is 0.2s-4s.

10. A high aspect ratio deep silicon structure, characterized by, The method is obtained by using the high-aspect-ratio deep silicon structure defined by the patterning method according to any one of claims 1-9.

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