Heterogeneous packaging substrate locally embedded with glass core and preparation method thereof

Abstract

The invention provides a heterogeneous packaging substrate locally embedded with a glass core and a preparation method of the heterogeneous packaging substrate, and relates to the technical field of semiconductor packaging, and the heterogeneous packaging substrate comprises a core plate which is provided with at least one mounting groove; the at least one glass core is embedded into the mounting groove and is fixedly connected with the core plate; the glass core is provided with a glass through hole, and conductive metal is arranged in the glass through hole; the first wire layer is arranged on one side of the core plate and is electrically connected with the conductive metal; the second wire layer is arranged on the other side of the core plate and is electrically connected with the conductive metal; the chip is arranged on the side, away from the core plate, of the first wire layer, arranged above the glass core and electrically connected with the first wire layer. According to the technical scheme, the glass core is locally embedded into the core plate instead of integrally replacing the core plate, the expansion degree of the glass core and the expansion degree of the chip are similar during thermal deformation, the warping problem can be solved, the glass core is integrated into an existing technological process, the difficulty of a large-area glass manufacturing process is avoided, and cost and technical threshold can be reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor packaging, in particular to a heterogeneous packaging substrate with a locally embedded glass core and a preparation method thereof. BACKGROUND

[0002] With the rise of AI, 5G and other applications, advanced packaging boards are gradually developing towards large size, high layer number and high speed transmission. However, there is a significant difference between the thermal expansion coefficient of traditional organic boards and the thermal expansion coefficient of silicon chips, which leads to increasingly prominent reliability problems such as warping and cracking during packaging. At the same time, the dielectric constant of organic materials is high, and the signal loss is large, which makes it difficult to meet the high-frequency and high-speed interconnection requirements.

[0003] In order to solve the warping and high-frequency performance bottleneck in packaging, the industry is focusing on new materials such as glass substrates. Glass substrates are considered as the technical direction of the next generation of boards due to their excellent thermal expansion coefficient matching with silicon, flatness and stability. However, the pure glass substrate has high manufacturing cost and complex process, and the processing of large-area thin glass is difficult.

[0004] Therefore, how to introduce the advantages of glass materials without replacing the traditional board as a whole is a problem that needs to be solved at present. SUMMARY

[0005] In order to solve or improve the warping problem in the packaging process, the pure glass substrate has high manufacturing cost and complex process, and the processing of large-area thin glass is difficult. One purpose of the present application is to provide a heterogeneous packaging substrate with a locally embedded glass core.

[0006] Another purpose of the present application is to provide a preparation method of a heterogeneous packaging substrate with a locally embedded glass core.

[0007] To achieve the above purpose, the first aspect of the present application provides a heterogeneous packaging substrate with a locally embedded glass core, comprising: a core plate, at least one mounting groove is provided on the core plate; at least one glass core, the glass core is embedded in the mounting groove, and the glass core is fixedly connected with the core plate; the glass core is provided with a through glass via, and a conductive metal is arranged in the through glass via; at least one first wire layer, the first wire layer is arranged on one side of the core plate, and one end of the conductive metal is electrically connected with the first wire layer; at least one second wire layer, the second wire layer is arranged on the other side of the core plate, and the other end of the conductive metal is electrically connected with the second wire layer; at least one chip, the chip is arranged on the side of the first wire layer away from the core plate, and the chip is arranged above the glass core, and the chip is electrically connected with the first wire layer.

[0008] The present application provides a heterogeneous packaging substrate with a locally embedded glass core, which has the following advantages: In the first aspect, the glass core is locally embedded in the core board instead of replacing the core board as a whole. The coefficient of thermal expansion of the locally embedded glass core region is closer to that of the chip (especially a silicon chip). Therefore, when the entire carrier board is deformed by heat, the expansion between the glass core and the chip is similar, thereby effectively solving the warping problem of chip-level and board-level packaging.

[0009] In the second aspect, the glass material has high Young's modulus and high mechanical rigidity. The embedded glass core greatly improves the overall rigidity and dimensional stability of the carrier board, and improves the reliability against vibration and thermal cycling.

[0010] In the third aspect, the glass core has low dielectric constant and low dielectric loss, which can support higher frequency signal transmission. The embedded structure increases the via density by about 10 times, realizes more compact wiring and better signal integrity. At the same time, the core board with the glass core can withstand higher temperature, which is beneficial to power integration.

[0011] In the fourth aspect, the local embedded design avoids the thin plate process which is difficult to process for the full glass substrate. The glass core is integrated into the existing process flow, which reduces the cost and technical threshold. This structure not only maintains the processing advantages of organic materials, but also fully utilizes the excellent performance of glass materials, and can be widely used in advanced packaging and high-speed circuit design.

[0012] In some technical solutions, the core board is a chip-level basic carrier board or a PCB substrate. In the case of a chip-level basic carrier board, the heterogeneous packaging substrate is a chip-level substrate structure. In the case of a PCB substrate, the heterogeneous packaging substrate is a PCB board-level structure.

[0013] In this technical solution, by locally embedding a glass core in a traditional carrier board (chip-level basic carrier board or PCB substrate), thermal expansion matching and electrical performance optimization can be achieved, and compatibility with existing processes can also be achieved. By locally inserting a glass core region in the carrier board instead of replacing it as a whole, the size matching and warping problem is effectively solved, and the difficulty of large-area glass processing is also avoided.

[0014] It should be noted that PCB (Printed Circuit Board) refers to a printed circuit board.

[0015] In some technical solutions, the coefficient of thermal expansion of the glass core is less than that of the core board under the same temperature condition; and / or the elastic modulus of the glass core is greater than that of the core board; and / or the dielectric constant of the glass core is less than that of the core board.

[0016] In the technical solution, the absolute value of the difference between the thermal expansion coefficient of the glass core and the thermal expansion coefficient of the chip is less than the absolute value of the difference between the thermal expansion coefficient of the core plate and the thermal expansion coefficient of the chip. In comparison with the mode of directly arranging the chip on the core plate, the expansion degree between the glass core and the chip is similar when the whole carrier plate is deformed by heat, which is beneficial to solve the warping problem of chip-level and board-level packaging.

[0017] The elastic modulus is used to quantify the anti-deformation ability of a material or structure. Since the elastic modulus of the glass core is greater than the elastic modulus of the core plate, the glass core is less likely to be deformed relative to the core plate. By locally embedding the glass core in the core plate, the overall stiffness of the carrier plate is improved, so that the heterogeneous packaging substrate has a large enough structural strength.

[0018] The glass core has low dielectric constant and small dielectric loss, and can support higher frequency signal transmission. The area where the glass core is located can be used as a high-speed signal optimization area.

[0019] In some technical solutions, optionally, the material of the glass core is any one of high borosilicon and silicon-based glass; and the material of the core plate is any one of ABF, PI, BT, FR4 and ceramic material.

[0020] In the technical solution, high borosilicon and silicon-based glass have the advantages of small thermal expansion coefficient and large elastic modulus. The material of the glass core is any one of high borosilicon and silicon-based glass, which can improve the overall stiffness of the carrier plate while ensuring that the expansion degree between the glass core and the chip is similar when deformed by heat, which is beneficial to solve the warping problem of chip-level and board-level packaging.

[0021] The glass core is locally embedded in the core plate, and the core plate can use traditional ABF, PI, BT, FR4 or ceramic material lamination process, which is compatible with existing production lines.

[0022] It should be noted that ABF (Ajinomoto Build-up Film) refers to Ajinomoto Build-up Film. PI (Polyimide) refers to polyimide. BT (Bismaleimide Triazine Resin) refers to bismaleimide triazine resin. FR4 (FR represents flame retardant grade, and 4 represents glass fiber reinforced material) refers to glass fiber reinforced epoxy resin laminated board.

[0023] In some technical solutions, optionally, the area of the surface of the side of the chip facing the first wire layer is less than or equal to the area of the surface of the side of the glass core facing the first wire layer.

[0024] In the technical solution, since the chip is arranged above the glass core, on the premise that the area of the chip is not greater than the area of the glass core, the warping problem of the chip-level and board-level packaging can be further improved to ensure that the thermal expansion of the glass core and the chip is matched when being deformed by heat.

[0025] In some technical solutions, optionally, the glass core and the core board are fixedly connected by means of an adhesive or compression co-firing.

[0026] In the technical solution, the adhesive connection does not need to make large-scale modification to the existing packaging production line, and can be directly adapted to the scene where the core board is made of ABF, PI, BT, FR4 or other organic materials, thereby reducing the cost of technical upgrading.

[0027] In the process of compression co-firing, the glass core and the core board are physically infiltrated and chemically reacted to form atomic-level metallurgical bonding. This connection mode has high bonding strength between the mounting grooves of the glass core and the core board, outstanding high-temperature resistance, and excellent air tightness, which effectively prevents the erosion of water vapor and corrosive gases on the internal circuit.

[0028] In some technical solutions, optionally, the chip and the first conductive layer are electrically connected through a plurality of micro-bumps.

[0029] In the technical solution, in the process of connecting the chip and the first conductive layer, the micro-bumps on the chip are precisely aligned with the pads corresponding to the conductive layer. By heating to a temperature higher than the melting point of the micro-bumps, the micro-bumps are melted, and under the combined action of capillary action and pressure, metallurgical bonding with the pads of the first conductive layer is achieved. After cooling and solidification, a stable and reliable electrical connection path is formed.

[0030] In some technical solutions, optionally, a filling layer is arranged between the chip and the first conductive layer, and the plurality of micro-bumps are embedded in the filling layer.

[0031] In the technical solution, the filling layer is used to fill the gap between the chip and the first conductive layer, which is conducive to improving the connection reliability between the chip and the first conductive layer. In addition, the filling layer can also play the role of buffering and protecting the micro-bumps.

[0032] In some technical solutions, optionally, the thickness of the glass core is 0.2mm to 1mm.

[0033] In the technical solution, by limiting the thickness range of the glass core, on the one hand, the thickness of the glass core is prevented from being too small, so that the glass core has sufficient structural strength, and the cracking and breaking of the glass core are largely avoided; on the other hand, the thickness of the glass core is prevented from being too large, which is conducive to reducing the material cost and installation difficulty.

[0034] The second aspect of the present application provides a preparation method of a heterogeneous packaging substrate with a locally embedded glass core, for preparing the heterogeneous packaging substrate with a locally embedded glass core in any of the above technical solutions. The preparation method comprises: In the first step, a glass core is prepared, a hole is drilled in the glass core to form a glass via hole, and a conductive metal is arranged in the glass via hole.

[0035] In the second step, at least one mounting groove is processed on the core plate.

[0036] In the third step, the glass core is embedded in the mounting groove, and the glass core is fixedly connected with the core plate.

[0037] In the fourth step, at least one first wire layer is arranged on one side of the core plate and the glass core, and at least one second wire layer is arranged on the other side of the core plate and the glass core, one end of the conductive metal is electrically connected with the first wire layer, and the other end of the conductive metal is electrically connected with the second wire layer.

[0038] In the fifth step, a chip is arranged on the side of the first wire layer away from the core plate, the chip is arranged above the glass core, and the chip is electrically connected with the first wire layer.

[0039] The present application provides a preparation method of a heterogeneous packaging substrate with a locally embedded glass core, which has the following advantages: In the first aspect, by locally embedding a glass core in the core plate instead of replacing the core plate as a whole, the thermal expansion coefficient of the locally embedded glass core region is closer to the thermal expansion coefficient of the chip (especially a silicon chip), so that when the entire carrier plate is deformed by heat, the expansion degree between the glass core and the chip is similar, thereby effectively solving the warping problem of chip-level and board-level packaging.

[0040] In the second aspect, the glass material has high Young's modulus and high mechanical rigidity, and the embedded glass core greatly improves the overall rigidity and dimensional stability of the carrier plate, and improves the reliability of vibration resistance and thermal cycling.

[0041] In the third aspect, the glass core has low dielectric constant and small dielectric loss, which can support higher frequency signal transmission. The embedded structure increases the via density by about 10 times, realizes more compact wiring and better signal integrity. At the same time, the core plate cooperates with the glass core to withstand higher temperature, which is beneficial to power integration.

[0042] In the fourth aspect, the locally embedded design avoids the thin plate process which is difficult to process for the full glass substrate, integrates the glass core into the existing process flow, and reduces the cost and technical threshold. This structure not only maintains the processing advantages of organic materials, but also fully utilizes the excellent performance of glass materials, and can be widely used in advanced packaging and high-speed circuit design.

[0043] Additional aspects and advantages of the technical solutions of the present application will become apparent in the description below, or will be learned by practice of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0044] Figure 1 A schematic diagram of a heterogeneous packaging substrate partially embedded with a glass core is shown according to one embodiment of the present application; Figure 2 A schematic diagram of a heterogeneous packaging substrate partially embedded with a glass core is shown according to another embodiment of the present application; Figure 3 A schematic diagram of a heterogeneous packaging substrate partially embedded with a glass core is shown according to yet another embodiment of the present application; Figure 4 A flow chart of a method for manufacturing a heterogeneous packaging substrate partially embedded with a glass core is shown according to one embodiment of the present application; Figure 5 A flow chart of a method for manufacturing a heterogeneous packaging substrate partially embedded with a glass core is shown according to another embodiment of the present application.

[0045] wherein, Figures 1 to 3 The correspondence between the reference signs and the component names in the accompanying drawings is as follows: 100: heterogeneous packaging substrate partially embedded with a glass core; 110: core plate; 111: mounting groove; 120: glass core; 121: glass via; 122: conductive metal; 131: first conductive line layer; 132: second conductive line layer; 140: chip; 141: micro-bump; 142: filling layer; T: thickness of the glass core; D: groove depth of the mounting groove. DETAILED DESCRIPTION

[0046] In order to more clearly understand the above-mentioned purposes, features and advantages of the embodiments of the present application, the embodiments of the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

[0047] In the following description, a large number of specific details are set forth in order to facilitate a thorough understanding of the present application, however, the embodiments of the present application can also be implemented in other ways different from those described herein, and therefore, the scope of protection of the present application is not limited to the specific embodiments disclosed below.

[0048] The following description refers to the accompanying drawings, which illustrate preferred embodiments of the present application. Figures 1 to 5 The heterogeneous packaging substrate partially embedded with a glass core and the method for manufacturing the same according to some embodiments of the present application are described below.

[0049] In one embodiment of the present application, as Figure 1 , Figure 2 and Figure 3As shown, the heterogeneous packaging substrate 100 partially embedded with the glass core includes a core board 110, at least one glass core 120, at least one first conductive layer 131, at least one second conductive layer 132, and at least one chip 140. The core board 110 mainly serves as a mounting carrier relative to the glass core 120, the first conductive layer 131, and the second conductive layer 132.

[0050] Optionally, the core board 110 is a chip-level base board, and the heterogeneous packaging substrate 100 partially embedded with the glass core is a chip-level substrate structure. Optionally, the core board 110 is a PCB substrate, and the heterogeneous packaging substrate 100 partially embedded with the glass core is a PCB board-level structure.

[0051] The core board 110 is provided with at least one mounting groove 111. The number of the glass cores 120 is at least one, and the glass cores 120 are embedded in the mounting grooves 111, and the glass cores 120 are fixedly connected with the core board 110.

[0052] In a specific embodiment, the core board 110 is provided with a mounting groove 111 penetrating through the upper and lower surfaces, and the glass core 120 is embedded in the mounting groove 111. The upper surface of the glass core 120 is flush with the upper surface of the core board 110, and the lower surface of the glass core 120 is flush with the lower surface of the core board 110. The thickness T of the glass core 120 is consistent with the groove depth D of the mounting groove 111.

[0053] In a specific embodiment, the thickness T of the glass core 120 is smaller than the groove depth D of the mounting groove 111. For example, the upper surface of the glass core 120 is slightly lower than the upper surface of the core board 110.

[0054] In a specific embodiment, the thickness T of the glass core 120 is greater than the groove depth D of the mounting groove 111. For example, the upper surface of the glass core 120 is slightly higher than the upper surface of the core board 110.

[0055] It is emphasized that the number of the mounting grooves 111 is at least one, i.e., the mounting grooves 111 can be one, two, or more. The number of the glass cores 120 is at least one, i.e., the glass cores 120 can be one, two, or more. The number of the mounting grooves 111 and the number of the glass cores 120 can be flexibly set according to actual requirements.

[0056] Optionally, the number of the glass cores 120 is consistent with the number of the mounting grooves 111. In the case that the number of the mounting grooves 111 and the number of the glass cores 120 are both two or more, each glass core 120 is arranged in a corresponding mounting groove 111.

[0057] The glass core 120 is provided with a through glass via 121, and the through glass via 121 is provided with a conductive metal 122.

[0058] Optionally, the number of glass vias 121 is multiple, and each glass via 121 is provided with a conductive metal 122.

[0059] It should be noted that the glass vias 121 are drilled on the glass core 120 (TGV, Through Glass Via), and the conductive metal 122 is filled in the glass vias 121 to realize the vertical interconnection between the first conductive layer 131 and the second conductive layer 132.

[0060] In a specific embodiment, the glass vias 121 are processed on the glass core 120 by laser etching or other means, and the hole wall of the glass via 121 is formed with a nano-scale rough structure (such as micropores or grooves); the conductive metal 122 is filled in the glass via 121, and at least part of the conductive metal 122 will enter the micropores or grooves to form a "mechanical interlocking" structure, so that the conductive metal 122 and the glass core 120 are relatively fixed.

[0061] Optionally, the aperture of the glass via 121 is 10-50 microns.

[0062] In a specific embodiment, the aperture of the glass via 121 is 10 microns.

[0063] In a specific embodiment, the aperture of the glass via 121 is 30 microns.

[0064] In a specific embodiment, the aperture of the glass via 121 is 50 microns.

[0065] Optionally, the hole spacing between the multiple glass vias 121 is not greater than 100 microns.

[0066] By locally embedding the glass core 120 in the core plate 110, and opening multiple glass vias 121 on the glass core 120, compared with the way of directly providing vias on the core plate 110, it is beneficial to increase the via density in the glass core 120 area (the via density is increased by about 10 times), and realize more compact wiring and better signal integrity.

[0067] By limiting the hole spacing between the multiple glass vias 121, it is beneficial to improve the via density of the glass core 120 and ensure the vertical interconnection between the first conductive layer 131 and the second conductive layer 132.

[0068] In a specific embodiment, the material of the conductive metal 122 is copper.

[0069] The number of the first conductive layer 131 is at least one. The first conductive layer 131 is arranged on one side of the core plate 110, and the first conductive layer 131 is electrically connected to one end of the conductive metal 122.

[0070] The number of the second conductive layers 132 is at least one. The second conductive layers 132 are arranged on the other side of the core board 110, and the second conductive layers 132 are electrically connected with the other ends of the conductive metal 122.

[0071] It is emphasized that the number of the first conductive layers 131 is at least one, i.e. the first conductive layers 131 can be one, two or more. The number of the second conductive layers 132 is at least one, i.e. the second conductive layers 132 can be one, two or more. The number of the first conductive layers 131 and the number of the second conductive layers 132 can be flexibly set according to actual needs.

[0072] In a specific embodiment, the core board 110 has opposite upper and lower sides, the glass core 120 has opposite upper and lower sides, and the conductive metal 122 has opposite upper and lower ends. The first conductive layers 131 are arranged on the upper side of the core board 110 and the upper side of the glass core 120, and the first conductive layers 131 are electrically connected with the upper ends of the conductive metal 122. The second conductive layers 132 are arranged on the lower side of the core board 110 and the lower side of the glass core 120, and the second conductive layers 132 are electrically connected with the lower ends of the conductive metal 122.

[0073] The vertical interconnection of the first conductive layers 131 and the second conductive layers 132 is realized by the conductive metal 122.

[0074] In a specific embodiment, in the case that the upper surface of the glass core 120 is flush with the upper surface of the core board 110, and the lower surface of the glass core 120 is flush with the lower surface of the core board 110, the first conductive layers 131 abut the upper surface of the core board 110 and the upper surface of the glass core 120, and the second conductive layers 132 abut the lower surface of the core board 110 and the lower surface of the glass core 120.

[0075] Optionally, the first conductive layers 131 are insulating layers deposited on the upper surface of the core board 110 and the upper surface of the glass core 120, and metal wiring is arranged in the insulating layers.

[0076] Optionally, the second conductive layers 132 are insulating layers deposited on the lower surface of the core board 110 and the lower surface of the glass core 120, and metal wiring is arranged in the insulating layers.

[0077] It is noted that the first conductive layers 131 and the second conductive layers 132 are both redistribution layers (RDL). The pins inside the chip 140 are redistributed to more suitable positions to meet the needs of miniaturization and multi-functional integration of modern electronic products. The redistribution layer can reduce signal delay and crosstalk, optimize the signal transmission path, ensure stable power transmission, and avoid overheating or burning caused by high current density.

[0078] The number of chips 140 is at least one. The chip 140 is arranged on the side of the first conductive layer 131 away from the core board 110. The chip 140 is arranged above the glass core 120, and the chip 140 is electrically connected to the conductive layer.

[0079] It should be emphasized that the number of chips 140 is at least one, that is, the chip 140 can be one, two or more, and the number of chips 140 can be flexibly set according to actual needs.

[0080] In a specific embodiment, the number of glass cores 120 and the number of chips 140 are both multiple, and each chip 140 is arranged above a corresponding glass core 120.

[0081] The present application provides a heterogeneous packaging substrate 100 that is locally embedded with a glass core, and has the advantages of: First, excellent thermal expansion matching: by locally embedding the glass core 120 in the core board 110 instead of replacing the core board 110 entirely, the coefficient of thermal expansion (CTE) of the locally embedded glass core 120 region is closer to the thermal expansion coefficient of the chip 140 (especially the silicon chip), so that when the entire carrier board is deformed by heat, the expansion between the glass core 120 and the chip 140 is similar, thereby effectively solving the warping problem of chip-level and board-level packaging.

[0082] Second, mechanical strength is enhanced: glass material has high Young's modulus and high mechanical rigidity, and the embedded glass core 120 greatly improves the overall rigidity and dimensional stability of the carrier board, and improves the reliability of vibration and thermal cycling resistance.

[0083] Third, the electrical performance is improved: the glass core 120 has low dielectric constant and low dielectric loss, and can support higher frequency signal transmission. The embedded structure increases the via density by about 10 times, achieving more compact wiring and better signal integrity. At the same time, the core board 110 cooperates with the glass core 120 to withstand higher temperatures, which is beneficial to power integration.

[0084] Fourth, strong manufacturing compatibility: the local embedding design avoids the thin plate process that is difficult to handle for all-glass substrates, integrates the glass core 120 into the existing process flow, and reduces costs and technical barriers. This structure not only maintains the processing advantages of organic materials, but also fully utilizes the excellent performance of glass materials, and can be widely used in advanced packaging and high-speed circuit design.

[0085] It should be noted that the coefficient of thermal expansion refers to the expansion or contraction characteristics of a material when the temperature changes, and is a key parameter for measuring the thermal stability of a material.

[0086] In the technical solution of the present application, the glass core 120 is locally embedded in the core plate 110 instead of replacing the core plate 110 as a whole, effectively solving the problems of size matching and warping, and avoiding the difficulties of large-area glass processing. The present application adopts the way of locally embedding the glass core 120, realizing the comprehensive optimization of the heterogeneous packaging substrate (heterogeneous packaging substrate 100 with locally embedded glass core) in terms of thermal matching, mechanical reinforcement and electrical performance, and has significant engineering application value.

[0087] In some embodiments, optionally, the core plate 110 is a chip-level basic carrier plate or a PCB (Printed Circuit Board) substrate.

[0088] In the case of the core plate 110 being a chip-level basic carrier plate, the heterogeneous packaging substrate (heterogeneous packaging substrate 100 with locally embedded glass core) is a chip-level substrate structure.

[0089] Optionally, the chip-level basic carrier plate is a multi-layer organic stack plate or a ceramic substrate. The multi-layer organic stack plate is an ABF substrate, a PI substrate or a BT resin substrate.

[0090] The material of the ABF substrate is ABF (Ajinomoto Build-up Film), which is a kind of resin material.

[0091] The material of the PI substrate is PI (Polyimide), which is a high-performance polymer material with excellent high-temperature resistance, chemical corrosion resistance and mechanical strength.

[0092] The material of the BT resin substrate is BT (Bismaleimide Triazine Resin), which is a high-performance thermosetting resin with excellent high-temperature resistance, chemical corrosion resistance and mechanical strength.

[0093] The glass core 120 is embedded in the predetermined area (such as between the plurality of chips 140 or directly below the chip 140) of the core plate 110 by epoxy resin bonding or compression co-firing process.

[0094] It should be noted that the epoxy resin is an adhesive. Compression co-firing is a professional term, which means that the glass core 120 and the material (such as ceramic or organic resin) of the core plate 110 are combined as a whole through physical or chemical action during the compression process, forming reliable mechanical connection and electrical compatibility.

[0095] In the case of the core plate 110 being a PCB substrate, the heterogeneous packaging substrate (heterogeneous packaging substrate 100 with locally embedded glass core) is a PCB board-level structure.

[0096] The PCB substrate is an FR4 structure board (glass fiber reinforced epoxy resin laminate board) or a high-frequency substrate (such as Rogers substrate).

[0097] It should be noted that FR represents the flame retardant grade, and 4 represents the glass fiber reinforced material.

[0098] The area where the glass core 120 is located is a local rigid reinforcement area or a high-speed signal optimization area of the PCB board level structure.

[0099] In the technical solution defined in the present application, by locally embedding the glass core 120 in the traditional carrier board (chip-level basic carrier board or PCB substrate), thermal expansion matching and electrical performance optimization can be achieved, and compatibility with existing processes can also be achieved. By locally inserting the glass core 120 area in the carrier board instead of replacing the whole, the size matching and warping problems are effectively solved, and the difficulties of large-area glass processing are avoided. The core board 110 can use traditional ABF, PI, BT, FR4 or ceramic material lamination process, and is compatible with existing production lines.

[0100] In some embodiments, optionally, the heterogeneous packaging substrate of the present application can be applied to a chip-level substrate structure of a multi-chip 140 system package, and can also be applied to a high-frequency high-speed PCB board-level structure. In the scenario of the chip-level substrate structure, the glass core 120 is usually placed between the multi-chip 140 or below the chip 140, for enhancing the rigidity and signal interconnection of the core board 110. In the PCB board-level structure, the glass core 120 acts as a local rigid layer or a high-speed signal optimization area, and cooperates with the organic layer such as FR4.

[0101] In a specific embodiment, the chip-level substrate structure can serve a heterogeneous chip package architecture that adopts an embedded interconnection scheme of the EMIB (Embedded Multi-die Interconnect Bridge) interposer technology.

[0102] A chip-level basic carrier board (such as a multi-layer organic stack board) is provided, and a slot or space is reserved in a predetermined area.

[0103] A thin glass chip (glass core 120) of a pre-designed size is cut from a large-size high-boron-silicon glass plate.

[0104] The glass core 120 chip is inserted into the embedding slot (mounting slot 111) reserved in the core board 110, and is bonded and filled with epoxy resin or polymer glue. After pressure and heat curing, the glass core 120 is tightly combined with the core board 110.

[0105] The cured structure is processed: a plurality of layers of redistribution layers (RDL) are formed on the upper and lower surfaces of the glass core 120 and the core board 110, respectively.

[0106] A via (glass via 121) is made on the glass core 120 by laser or etching, and the via is filled with copper metal (one of the conductive metals 122); the upper RDL (first conductive layer 131) and the lower RDL (second conductive layer 132) are electrically connected by the copper metal.

[0107] Subsequent layering and surface treatment (e.g., copper plating, solder mask, etc.) processes are performed on the carrier board.

[0108] Finally, the multiple chips 140 are connected to the carrier board (obtained by assembling the core board 110 and the glass core 120) by micro-bumps or bonding wires in the area of the glass core 120 and its periphery.

[0109] Through the above processes, the glass core 120 serves as a low-CTE, high-rigidity area that can bear and stabilize the signal paths between the chips 140. The CTE of the glass core 120 is closer to that of the chips 140, effectively suppressing warping under high-temperature packaging or working conditions. The glass core 120 has a higher Young's modulus relative to the core board 110, which is conducive to enhancing the local rigidity of the carrier board. In addition, the glass core 120 has low loss and high-frequency characteristics, which helps to improve the integrity and bandwidth of the interconnection signals and support higher-frequency signal transmission.

[0110] In some embodiments, the PCB substrate is a 6- to 12-layer FR4 structure board.

[0111] A suitable embedded cavity (mounting groove 111) is formed in a specified area of the substrate.

[0112] The glass core 120 is prepared and surface treated (e.g., cleaning, plasma treatment), and the glass core 120 is placed in the embedded cavity of the PCB substrate.

[0113] The glass core 120 and the PCB substrate are bonded by high-temperature curing epoxy or co-extrusion molding, and the glass core 120 and the PCB substrate are integrated by curing under heating and pressure.

[0114] Subsequent processing is performed on the entire board: corresponding conductive wiring and vias are formed in the position of the glass core 120 and its adjacent layers, and micro-vias (glass vias 121) are made in the area of the glass core 120 to connect to the upper and lower layers of circuitry (first conductive layer 131 and second conductive layer 132). If necessary, surface plating, device mounting, and testing, etc. can be performed as conventional PCB processes.

[0115] The PCB board-level structure forms a local rigid reinforcing layer in the glass core 120 area, which can significantly improve the local mechanical strength and reduce the deformation caused by thermal cycling. The glass core 120 has low dielectric loss characteristics, making this area an ideal medium layer for high-speed signal transmission. By locally applying the glass core 120 in the PCB substrate, the performance of the hot spot area and the sensitive circuit area is optimized, while the overall manufacturing process basically follows the traditional PCB process, without the need to completely modify the existing production equipment.

[0116] In some embodiments, optionally, the thermal expansion coefficient of the glass core 120 is less than the thermal expansion coefficient of the core board 110 under the same temperature conditions.

[0117] The absolute value of the difference between the thermal expansion coefficient of the glass core 120 and the thermal expansion coefficient of the chip 140 is less than the absolute value of the difference between the thermal expansion coefficient of the core board 110 and the thermal expansion coefficient of the chip 140. In this design, compared with the way of directly setting the chip 140 on the core board 110, the expansion degree between the glass core 120 and the chip 140 is similar when the entire carrier board is deformed by heat, which is beneficial to solve the warping problem of chip-level and board-level packaging.

[0118] It should be noted that the thermal expansion coefficient refers to the expansion or contraction characteristics of a material when the temperature changes, which is a key parameter for measuring the thermal stability of a material.

[0119] In some embodiments, optionally, the elastic modulus of the glass core 120 is greater than the elastic modulus of the core board 110.

[0120] It should be noted that the elastic modulus refers to the stress-strain relationship constant of a material in the elastic deformation stage. The elastic modulus usually specifically refers to the Young's modulus (i.e., the modulus under unidirectional tension or compression).

[0121] The elastic modulus is used to quantify the anti-deformation ability of a material or structure. Since the elastic modulus of the glass core 120 is greater than the elastic modulus of the core board 110, the glass core 120 is less likely to deform relative to the core board 110. By locally embedding the glass core 120 in the core board 110, the overall stiffness of the carrier board is improved, so that the heterogeneous packaging substrate has sufficient structural strength.

[0122] In some embodiments, optionally, the dielectric constant of the glass core 120 is less than the dielectric constant of the core board 110. The glass core 120 has low dielectric constant and low dielectric loss, which can support higher frequency signal transmission, and the area where the glass core 120 is located can be used as a high-speed signal optimization area.

[0123] In some embodiments, optionally, the material of the glass core 120 is any one of high borosilicon and silicon-based glass.

[0124] In one specific embodiment, the material of the glass core 120 is high borosilicate. The main components of high borosilicate are silicon dioxide and diboron trioxide, with a small amount of sodium oxide, aluminum oxide, etc. being introduced to form a network-like silicate structure.

[0125] In one specific embodiment, the material of the glass core 120 is silicon-based glass. Silicon-based glass is mainly composed of high-purity silicon dioxide, with atoms arranged in a disordered network and low impurity content.

[0126] High borosilicate and silicon-based glass have the advantages of small thermal expansion coefficient and large elastic modulus. The material of the glass core 120 is any one of high borosilicate and silicon-based glass, which can improve the overall stiffness of the carrier plate while ensuring that the expansion between the glass core 120 and the chip 140 is similar when heated and deformed, which is beneficial to solving the warping problem of chip-level and board-level packaging.

[0127] In some embodiments, optionally, the material of the core plate 110 is any one of ABF, PI, BT, FR4, and ceramic material.

[0128] ABF (Ajinomoto Build-up Film) is a kind of resin material.

[0129] PI (Polyimide) is a high-performance polymer material with excellent high-temperature resistance, chemical corrosion resistance, and mechanical strength.

[0130] BT (Bismaleimide Triazine Resin) is a high-performance thermosetting resin with excellent high-temperature resistance, chemical corrosion resistance, and mechanical strength.

[0131] FR4 (glass fiber reinforced epoxy resin laminated plate) is composed of epoxy resin and glass fiber cloth, with the characteristics of low cost and good processing performance.

[0132] Ceramic material can use aluminum oxide or nitrogen oxide, which has extremely high high-temperature resistance, and has good chemical stability and mechanical strength.

[0133] The glass core 120 is partially embedded in the core plate 110, and the core plate 110 can use traditional ABF, PI, BT, or FR4 material lamination process, which is compatible with existing production lines.

[0134] In some embodiments, optionally, the area of the surface of the chip 140 on the side facing the first wire layer 131 is less than or equal to the area of the surface of the glass core 120 on the side facing the first wire layer 131.

[0135] Since the chip 140 is arranged above the glass core 120, under the premise that the area of the chip 140 is not greater than the area of the glass core 120, the warping problem of the chip-level and board-level packaging can be further improved to ensure that the thermal expansion matching between the glass core 120 and the chip 140 when being deformed by heat. In addition, this design can further improve the overall rigidity of the carrier board, so that the heterogeneous packaging substrate has sufficient structural strength.

[0136] In some embodiments, the glass core 120 and the core board 110 are fixedly connected by an adhesive. For example, the adhesive is applied to the outer wall of the glass core 120, and after the glass core 120 is embedded in the mounting groove 111 of the core board 110, the outer wall of the glass core 120 and the groove wall of the mounting groove 111 are tightly bonded together by the adhesive. Alternatively, the adhesive is applied to the groove wall of the mounting groove 111, and after the glass core 120 is embedded in the mounting groove 111 of the core board 110, the outer wall of the glass core 120 and the groove wall of the mounting groove 111 are tightly bonded together by the adhesive.

[0137] Optionally, the adhesive is a high-performance resin, epoxy resin or polymer glue, which can be flexibly set according to actual needs.

[0138] The adhesive connection does not require large-scale modification of the existing packaging production line, and can be directly adapted to the scene where the core board 110 is made of ABF, PI, BT, FR4 or other organic materials, reducing the cost of technology upgrading. For small-batch customized packaging products, process parameters can be quickly adjusted to meet diversified needs.

[0139] In addition, the adhesive has a certain flexibility and can to some extent buffer the stress generated between the glass core 120 and the core board 110 due to the difference in thermal expansion coefficient.

[0140] In some embodiments, the glass core 120 and the core board 110 are fixedly connected by press-bonding and co-firing.

[0141] Press-bonding and co-firing means that the glass core 120 and the core board 110 material (such as ceramic or organic resin) are combined into a whole through physical or chemical action during the press-bonding process, forming reliable mechanical connection and electrical compatibility. During the press-bonding and co-firing process, the glass core 120 and the core board 110 undergo physical infiltration and chemical reaction to form atomic-level metallurgical bonding.

[0142] This connection method has high bonding strength between the glass core 120 and the mounting groove 111 of the core board 110, outstanding high-temperature resistance, and excellent air tightness, effectively preventing water vapor and corrosive gases from eroding the internal circuit.

[0143] In some embodiments, the glass core 120 and the core board 110 are fixedly connected by press-bonding and co-firing. Figure 3As shown, the chip 140 is electrically connected with the first wire layer 131 through a plurality of micro bumps.

[0144] In the process of connecting the chip 140 with the first wire layer 131, the micro bumps on the chip 140 are accurately aligned with the corresponding pads of the wire layer. By heating to a temperature higher than the melting point of the micro bumps, the micro bumps are melted, and under the combined action of capillary action and pressure, a metallurgical bond is formed with the pads of the first wire layer 131. After cooling and solidification, a stable and reliable electrical connection path is formed.

[0145] The micro bump technology can achieve extremely high pin density, enabling complex electrical interconnection between the chip 140 and the wire layer, meeting high-performance transmission requirements, supporting multi-channel data parallel transmission, and significantly improving data transmission rate.

[0146] Since the micro bumps directly connect the chip 140 with the wire layer, compared with the traditional wire bonding connection method, it is beneficial to shorten the signal transmission path and reduce signal transmission delay and loss.

[0147] In some embodiments, as shown in Figure 1 and Figure 2 The chip 140 and the first wire layer 131 are provided with a filling layer 142, and a plurality of micro bumps are embedded in the filling layer 142.

[0148] The filling layer 142 is used to fill the gap between the chip 140 and the first wire layer 131, which is beneficial to improve the connection reliability between the chip 140 and the first wire layer 131. In addition, the filling layer 142 can also play a role in buffering and protecting the micro bumps.

[0149] Optionally, the filling layer 142 is an underfill. The application of the underfill further enhances the mechanical connection strength between the chip 140 and the wire layer. After the underfill is solidified, the micro bumps are wrapped and fixed, forming a whole mechanical support structure, which effectively disperses the stress caused by the difference in thermal expansion coefficient, external vibration or impact.

[0150] In some embodiments, optionally, the thickness T of the glass core 120 is 0.2mm to 1mm.

[0151] By limiting the thickness T range of the glass core 120, on the one hand, it avoids that the thickness T of the glass core 120 is too small, ensuring that the glass core 120 has sufficient structural strength, to a large extent, avoiding the occurrence of cracks and breakage; on the other hand, it avoids that the thickness T of the glass core 120 is too large, which is beneficial to reduce the material cost and installation difficulty.

[0152] In a specific embodiment, the thickness T of the glass core 120 is 0.2mm.

[0153] In one specific embodiment, the thickness T of the glass core 120 is 0.3 mm.

[0154] In one specific embodiment, the thickness T of the glass core 120 is 0.4 mm.

[0155] In one specific embodiment, the thickness T of the glass core 120 is 0.5 mm.

[0156] In one specific embodiment, the thickness T of the glass core 120 is 0.6 mm.

[0157] In one specific embodiment, the thickness T of the glass core 120 is 0.7 mm.

[0158] In one specific embodiment, the thickness T of the glass core 120 is 0.8 mm.

[0159] In one specific embodiment, the thickness T of the glass core 120 is 0.9 mm.

[0160] In one specific embodiment, the thickness T of the glass core 120 is 1 mm.

[0161] In one embodiment of the present application, the preparation method of the heterogeneous packaging substrate with a locally embedded glass core is used to prepare the heterogeneous packaging substrate with a locally embedded glass core in any of the above embodiments.

[0162] As shown in Figure 4 , the steps of the preparation method of the heterogeneous packaging substrate with a locally embedded glass core include: S202, preparing a glass core, drilling a hole on the glass core to form a glass through hole, and arranging a conductive metal in the glass through hole.

[0163] A glass core with a pre-designed size is cut from a large-size high-boron-silicon glass plate. A glass through hole (TGV, Through Glass Via) is drilled on the glass core, and a conductive metal is filled in the glass through hole to realize vertical interconnection between the first and second conductive layers.

[0164] S204, machining at least one mounting groove on the core plate.

[0165] The size of the mounting groove matches the size of the glass core.

[0166] S206, embedding the glass core into the mounting groove, and fixedly connecting the glass core with the core plate.

[0167] Optionally, the glass core is fixedly connected with the core board by an adhesive. For example, the adhesive is applied to the outer wall of the glass core, and after the glass core is embedded in the mounting groove of the core board, the outer wall of the glass core and the groove wall of the mounting groove are tightly bonded together by the adhesive; or the adhesive is applied to the groove wall of the mounting groove, and after the glass core is embedded in the mounting groove of the core board, the outer wall of the glass core and the groove wall of the mounting groove are tightly bonded together by the adhesive.

[0168] Optionally, the adhesive is a high-performance resin or an epoxy resin or a polymer glue, which is flexibly set according to actual needs.

[0169] The adhesive connection does not require large-scale modification of the existing packaging production line, can be directly adapted to the scene of the core board being an ABF, PI, BT, FR4, or other organic material, and reduces the cost of technology upgrading. For small-batch customized packaging products, process parameters can be quickly adjusted to meet diversified needs.

[0170] In addition, the adhesive has a certain flexibility and can to some extent buffer the stress generated between the glass core and the core board due to the difference in the coefficient of thermal expansion.

[0171] Optionally, the glass core and the core board are fixedly connected by compression co-firing.

[0172] Compression co-firing refers to synchronous heating during compression to make the glass core and the core board material (such as ceramic or organic resin) combine as a whole through physical or chemical action, forming reliable mechanical connection and electrical compatibility. During compression co-firing, the glass core and the core board undergo physical infiltration and chemical reaction to form atomic-level metallurgical bonding.

[0173] This connection mode has high bonding strength between the glass core and the mounting groove of the core board, outstanding high-temperature resistance, and excellent air tightness, effectively preventing water vapor and corrosive gases from eroding the internal circuit.

[0174] S208. At least one first wire layer is arranged on one side of the core board and the glass core, and at least one second wire layer is arranged on the other side of the core board and the glass core. One end of the conductive metal is electrically connected with the first wire layer, and the other end of the conductive metal is electrically connected with the second wire layer.

[0175] Optionally, the first wire layer is an insulating layer deposited on the upper surface of the core board and the upper surface of the glass core, and the insulating layer is provided with metal wiring.

[0176] Optionally, the second wire layer is an insulating layer deposited on the lower surface of the core board and the lower surface of the glass core, and the insulating layer is provided with metal wiring.

[0177] It should be noted that the first conductive layer and the second conductive layer are both redistribution layers (RDL, Redistribution Layer). The pins inside the chip are redistributed to a more suitable position to meet the needs of miniaturization and multi-functional integration of modern electronic products. The redistribution layer can reduce signal delay and crosstalk, optimize the signal transmission path, ensure stable power transmission, and avoid overheating or burning caused by high current density.

[0178] S210, the chip is arranged on the side of the first conductive layer away from the core plate, and the chip is arranged above the glass core and electrically connected with the first conductive layer.

[0179] In one specific embodiment, the number of glass cores and the number of chips are both multiple, and each chip is arranged above a corresponding glass core.

[0180] The present application provides a preparation method of a heterogeneous packaging substrate locally embedded with a glass core, which has the advantages of: In the first aspect, by locally embedding a glass core in the core plate instead of replacing the core plate as a whole, the thermal expansion coefficient of the locally embedded glass core region is closer to the thermal expansion coefficient of the chip (especially the silicon chip). Therefore, when the entire carrier plate is deformed by heat, the expansion degree between the glass core and the chip is similar, thereby effectively solving the warping problem of chip-level and board-level packaging.

[0181] In the second aspect, the glass material has high Young's modulus and high mechanical rigidity, and the embedded glass core greatly improves the overall rigidity and dimensional stability of the carrier plate, and improves the reliability of vibration resistance and thermal cycling.

[0182] In the third aspect, the glass core has low dielectric constant and low dielectric loss, which can support higher frequency signal transmission. The embedded structure increases the via density by about 10 times, realizes more compact wiring and better signal integrity. At the same time, the core plate cooperates with the glass core to withstand higher temperature, which is beneficial to power integration.

[0183] In the fourth aspect, the local embedded design avoids the thin plate process which is difficult to handle for the full glass substrate, integrates the glass core into the existing process flow, and reduces the cost and technical threshold. This structure not only maintains the processing advantages of organic materials, but also fully utilizes the excellent performance of glass materials, and can be widely used in advanced packaging and high-speed circuit design.

[0184] It should be noted that the thermal expansion coefficient refers to the expansion or contraction characteristics of a material when the temperature changes, which is a key parameter for measuring the thermal stability of a material.

[0185] In the technical solution of the present application, the problem of size matching and warping is effectively solved by locally embedding a glass core in the core plate instead of replacing the core plate as a whole, and the difficulty of large-area glass processing is avoided. The present application adopts the way of locally embedding a glass core, realizes the comprehensive optimization of the heterogeneous packaging substrate (heterogeneous packaging substrate locally embedding a glass core) in terms of thermal matching, mechanical reinforcement and electrical performance, and has significant engineering application value.

[0186] In one embodiment of the present application, as shown in Figure 5 the preparation method of the heterogeneous packaging substrate locally embedding a glass core comprises the following steps: S302, core plate pretreatment: embedding groove preparation. An embedding groove matching the size of the glass core is processed on the core plate (such as an organic carrier plate or a ceramic substrate).

[0187] It should be noted that the "embedding groove" is the mounting groove of the core plate.

[0188] S304, glass core embedding and bonding. The pre-cut glass core is accurately placed in the groove, high-performance resin is filled and solidified.

[0189] It should be noted that the "groove" in this step is the mounting groove of the core plate.

[0190] S306, RDL formation. An insulating layer is deposited on the upper and lower surfaces of the glass core and the core plate, and metal wiring is made.

[0191] It should be noted that the RDL is the first conductive layer and the second conductive layer.

[0192] S308, TGV preparation and metal filling. A hole is drilled in the glass core and filled with conductive metal to realize vertical interconnection.

[0193] It should be noted that the "hole" in this step refers to the TGV.

[0194] S310, layer-by-layer wiring and surface treatment. Multiple layers of RDL are stacked and the final surface treatment is completed.

[0195] The preparation method of the heterogeneous packaging substrate locally embedding a glass core is used to prepare the heterogeneous packaging substrate locally embedding a glass core in any of the above embodiments, and therefore has the beneficial effects of any of the above embodiments, which will not be repeated here.

[0196] In the present application, the terms "first", "second", "third" are only used for descriptive purpose, and should not be understood as indicating or implying relative importance. The term "multiple" refers to two or more, unless otherwise explicitly limited. The terms "mount", "connect", "connection", "fix", and the like should be interpreted broadly, for example, "connection" can be fixed connection, or detachable connection, or integral connection; "connection" can be direct connection, or indirect connection through intermediate medium. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0197] In the description of the present application, it should be understood that the terms "upper", "lower", "left", "right", "front", "back", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or unit referred to must have a particular direction, be constructed and operated in a particular orientation, therefore, should not be understood as a limitation on the present application.

[0198] In the description of the present application, the terms "one embodiment", "some embodiments", "a specific embodiment", and the like, mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0199] The above is only the preferred embodiment of the present application, and is not intended to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A heterogeneous package substrate locally embedded with a glass core, characterized by, include: Core board (110), wherein at least one mounting groove (111) is provided on the core board (110). At least one glass core (120) is embedded in the mounting groove (111) and fixedly connected to the core plate (110); the glass core (120) is provided with a through glass hole (121) and a conductive metal (122) is provided in the glass hole (121). At least one first conductive layer (131) is disposed on one side of the core plate (110) and is electrically connected to one end of the conductive metal (122). At least one second conductive layer (132) is disposed on the other side of the core plate (110), and the second conductive layer (132) is electrically connected to the other end of the conductive metal (122); At least one chip (140) is disposed on the side of the first conductive layer (131) away from the core plate (110), the chip (140) is disposed above the glass core (120), and the chip (140) is electrically connected to the first conductive layer (131).

2. The heterogeneous package substrate with locally embedded glass core of claim 1, wherein, The core board (110) is a chip-level base carrier board or a PCB substrate; When the core board (110) is the chip-level base carrier board, the heterogeneous packaging substrate is a chip-level substrate structure; When the core board (110) is the PCB substrate, the heterogeneous packaging substrate is a PCB board-level structure.

3. The locally glass-embedded core heterogeneous package substrate of claim 1, wherein, Under the same temperature conditions, the coefficient of thermal expansion of the glass core (120) is less than that of the core plate (110); and / or The elastic modulus of the glass core (120) is greater than that of the core plate (110); and / or The dielectric constant of the glass core (120) is less than that of the core plate (110).

4. The heterogeneous package substrate with locally embedded glass core of claim 1, wherein, The glass core (120) is made of either borosilicate glass or silicon-based glass. The core board (110) is made of any one of ABF, PI, BT, FR4 and ceramic materials.

5. The heterogeneous package substrate with locally embedded glass core of any one of claims 1 to 4, wherein, The area of ​​the surface of the chip (140) facing the first conductive layer (131) is less than or equal to the area of ​​the surface of the glass core (120) facing the first conductive layer (131).

6. The heterogeneous package substrate with locally embedded glass core of any one of claims 1 to 4, wherein, The glass core (120) and the core plate (110) are fixedly connected by adhesive or by pressing and co-firing.

7. The heterogeneous package substrate with locally embedded glass core of any one of claims 1 to 4, wherein, The chip (140) is electrically connected to the first conductive layer (131) through a plurality of microbumps (141).

8. The locally glass-embedded core heterogeneous package substrate of claim 7, wherein, A filling layer (142) is provided between the chip (140) and the first conductive layer (131), and a plurality of microbumps (141) are embedded in the filling layer (142).

9. The heterogeneous package substrate with locally embedded glass core of any one of claims 1 to 4, wherein, The thickness of the glass core (120) is 0.2 mm to 1 mm.

10. A method of making a heterogeneous package substrate with a partially embedded glass core, the method comprising: The method for preparing a heterogeneous packaging substrate with a partially embedded glass core as described in any one of claims 1 to 9 includes: Prepare a glass core, drill a hole in the glass core to form a glass through hole, and place a conductive metal inside the glass through hole; At least one mounting groove is processed on the core plate; The glass core is embedded into the mounting groove, and the glass core is fixedly connected with the core plate; At least one first wire layer is arranged on one side of the core plate and the glass core, and at least one second wire layer is arranged on the other side of the core plate and the glass core, one end of the conductive metal is electrically connected with the first wire layer, and the other end of the conductive metal is electrically connected with the second wire layer; A chip is arranged on the side of the first wire layer away from the core plate, the chip is arranged above the glass core, and the chip is electrically connected with the first wire layer.

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