Flash memory chip aging test method, device, equipment and medium

Abstract

The invention discloses a flash memory chip aging test method, apparatus and device, and a medium. The method comprises the steps of obtaining a first test case of a flash memory chip; controlling the flash memory chip to execute the first test case to obtain a first execution duration; the first execution duration is the total duration for executing the first test case; determining a first average reading rate according to the first execution duration and the first test case; obtaining a first used time length of the flash memory chip; determining a second average reading rate corresponding to the first used duration; when the first average reading rate is greater than the second average reading rate, determining that the flash memory chip is aged normally; when the first average reading rate is smaller than or equal to the second average reading rate, a first deviation degree between the first average reading rate and the second average reading rate is determined, and when the first deviation degree is larger than a preset threshold value, it is determined that aging of the flash memory chip is abnormal. By adopting the embodiment of the invention, the accurate aging test can be realized on the flash memory chip.

Description

Technical Field

[0001] This application relates to the field of storage technology or computer technology, specifically to a flash memory chip aging test method, apparatus, equipment and medium. Background Technology

[0002] With the rapid development of storage technology, flash memory chips are becoming increasingly common. In practical applications, the aging of flash memory chips can reduce their performance to some extent. Faults caused by aging flash memory chips can affect the normal operation of the entire system, leading to problems such as computer lag and crashes. The degree of aging of flash memory chips directly affects their intelligent maintenance. Therefore, the problem of how to achieve accurate aging testing of flash memory chips to improve the intelligence of flash memory chip maintenance urgently needs to be solved. Summary of the Invention

[0003] This application provides a flash memory chip aging test method, apparatus, device, and medium, which can perform accurate aging tests on flash memory chips to improve the intelligence of flash memory chip maintenance.

[0004] In a first aspect, embodiments of this application provide an aging test method for a flash memory chip, the method comprising:

[0005] Obtain the first test case for the flash memory chip;

[0006] The flash memory chip is controlled to execute the first test case to obtain a first execution time; the first execution time is the total execution time of the first test case.

[0007] The first average read rate is determined based on the first execution duration and the first test case.

[0008] Obtain the first usage time of the flash memory chip;

[0009] Determine the second average read rate corresponding to the first used duration;

[0010] When the first average read rate is greater than the second average read rate, it is determined that the flash memory chip is aging normally.

[0011] When the first average read rate is less than or equal to the second average read rate, a first deviation between the first average read rate and the second average read rate is determined. When the first deviation is greater than a preset threshold, the flash memory chip is determined to be aging abnormally.

[0012] Secondly, embodiments of this application provide an aging test apparatus for flash memory chips, the apparatus comprising: an acquisition unit, a control unit, and a determination unit, wherein,

[0013] The acquisition unit is used to acquire the first test case of the flash memory chip;

[0014] The control unit is used to control the flash memory chip to execute the first test case and obtain a first execution duration; the first execution duration is the total duration of executing the first test case;

[0015] The determining unit is configured to determine a first average read rate based on the first execution duration and the first test case.

[0016] The acquisition unit is used to acquire the first used duration of the flash memory chip;

[0017] The determining unit is further configured to determine a second average read rate corresponding to the first used duration; when the first average read rate is greater than the second average read rate, determine that the flash memory chip is aging normally; when the first average read rate is less than or equal to the second average read rate, determine a first deviation between the first average read rate and the second average read rate; and when the first deviation is greater than a preset threshold, determine that the flash memory chip is aging abnormally.

[0018] Thirdly, embodiments of this application provide an electronic device, including a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and the programs include instructions for performing the steps in the first aspect of embodiments of this application.

[0019] Fourthly, embodiments of this application provide a computer-readable storage medium storing a computer program for electronic data interchange, wherein the computer program causes a computer to perform some or all of the steps described in the first aspect of embodiments of this application.

[0020] Fifthly, embodiments of this application provide a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps described in the first aspect of embodiments of this application. The computer program product may be a software installation package.

[0021] Implementing the embodiments of this application has the following beneficial effects:

[0022] As can be seen, the flash memory chip aging test method, apparatus, device, and medium described in the embodiments of this application obtain a first test case of the flash memory chip; control the flash memory chip to execute the first test case to obtain a first execution duration; the first execution duration is the total duration of executing the first test case; determine a first average read rate based on the first execution duration and the first test case, the first average read rate corresponding to the actual aging degree; obtain a first used time of the flash memory chip; determine a second average read rate corresponding to the first used time, the second average read rate corresponding to the first used time can be understood as the read rate corresponding to normal aging, that is, corresponding to the normal aging degree; when the first average read rate is greater than the second average read rate, it is determined that the flash memory chip is aging normally; when the first average read rate is less than or equal to the second average read rate, determine a first deviation between the first average read rate and the second average read rate; when the first deviation is greater than a preset threshold, it is determined that the flash memory chip is aging abnormal; when the first deviation is greater than the preset threshold, it indicates that the flash memory chip is aging abnormal. Thus, accurate aging tests can be performed on the flash memory chip to improve the intelligence of flash memory chip maintenance. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic flowchart of an aging test method for a flash memory chip provided in an embodiment of this application;

[0025] Figure 2 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application;

[0026] Figure 3 This is a schematic diagram of the structure of another electronic device provided in an embodiment of this application;

[0027] Figure 4 This is a functional unit block diagram of an aging test device for a flash memory chip provided in an embodiment of this application. Detailed Implementation

[0028] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0029] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0030] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0031] In this embodiment of the application, the electronic device may include a flash memory chip. The electronic device can be understood as a test device for aging tests on the flash memory chip, or the electronic device can also be understood as the flash memory chip itself.

[0032] In this embodiment, the main purpose of flash memory aging test is to ensure that the flash memory can operate stably during long-term use and to evaluate its reliability and lifespan. Furthermore, based on the actual aging condition of the flash memory chip, appropriate maintenance is performed to ensure the normal operation and maintenance of the flash memory chip.

[0033] In this embodiment of the application, a bad block, or a bad storage block, can be understood as a flash memory block in the storage medium that cannot be read or written normally. In contrast, a good block, or a good storage block, is a flash memory block that can be read or written normally.

[0034] In this embodiment of the application, the read rate of the flash memory chip refers to the amount of data read from the flash memory chip per unit time.

[0035] The embodiments of this application will be described in detail below.

[0036] Please see Figure 1, Figure 1 This is a flowchart illustrating an aging test method for a flash memory chip provided in this application embodiment. As shown in the figure, it is applied to an electronic device, which includes a flash memory chip. The aging test method for this flash memory chip includes:

[0037] 101. Obtain the first test case for the flash memory chip.

[0038] In the embodiments of this application, such as Figure 2 As shown, electronic devices may include flash memory chips.

[0039] The first test case can be a pre-set aging test case for the flash memory chip. This first test case can be stored in the cloud or within the flash memory chip itself.

[0040] In practice, the electronic device can obtain the first test case of the flash memory chip. The first test case can be preset or defaulted to by the system. For example, the first test case can be pre-stored in the flash memory chip during factory settings. The first test case can be used to test the aging degree of the flash memory chip.

[0041] 102. Control the flash memory chip to execute the first test case to obtain a first execution time; the first execution time is the total time for executing the first test case.

[0042] In practice, the flash memory chip can be controlled to execute the first test case to obtain the first execution time. The first execution time is the total execution time of the first test case. Since the aging of the flash memory chip is dynamic, the first test case can be used to test the actual aging of the flash memory chip.

[0043] 103. Determine the first average read rate based on the first execution duration and the first test case.

[0044] In practice, the first average read rate can be determined based on the first execution duration and the first test case. Specifically, the total amount of data read corresponding to the first test case can be obtained, and the first average read rate can be determined based on the total amount of data read and the first execution duration, i.e., the first average read rate = total amount of data read / first execution duration.

[0045] 104. Obtain the first used duration of the flash memory chip.

[0046] In this embodiment, the first usage time of the flash memory chip can be obtained. The longer the usage time, the more severe the aging of the flash memory chip; conversely, the shorter the usage time, the less the flash memory chip ages. In specific implementation, the usage time of the flash memory chip can be counted.

[0047] 105. Determine the second average read rate corresponding to the first used duration.

[0048] In this embodiment, a preset mapping relationship between used duration and average read rate can be stored in advance. Then, a second average read rate corresponding to the first used duration can be determined based on this mapping relationship. The mapping relationship between used duration and average read rate can be set at the factory. The first used duration can be the normal usage duration, and the second average read rate corresponding to the first used duration can be understood as the read rate corresponding to normal aging.

[0049] 106. When the first average read rate is greater than the second average read rate, it is determined that the flash memory chip is aging normally.

[0050] If the first average read rate is greater than the second average read rate, it indicates that the flash memory chip is aging normally.

[0051] 107. When the first average read rate is less than or equal to the second average read rate, determine a first deviation between the first average read rate and the second average read rate; when the first deviation is less than a preset threshold, determine that the flash memory chip is aging abnormally.

[0052] The preset threshold can be set in advance or set by system default.

[0053] In this embodiment of the application, when the first average read rate is less than or equal to the second average read rate, it indicates that the flash memory chip is aging abnormally. Then, a first deviation between the first average read rate and the second average read rate can be determined. The first deviation = |first average read rate - second average read rate| / second average read rate. When the first deviation is greater than a preset threshold, it indicates that the flash memory chip is aging abnormally. Thus, the flash memory chip aging abnormality can be determined, and accurate aging test can be performed on the flash memory chip to improve the intelligence of flash memory chip maintenance.

[0054] In practice, a pre-stored mapping relationship between the preset deviation and the maintenance scheme of the flash memory chip can be stored in advance. Then, the target maintenance scheme corresponding to the first deviation can be determined based on the mapping relationship. Then, the flash memory chip can be maintained based on the target maintenance scheme. Finally, the flash memory chip can be accurately aged to improve the intelligence of flash memory chip maintenance.

[0055] The maintenance plan may include at least one of the following: limiting the function of the flash memory chip, limiting the read rate of the flash memory chip, limiting the storage space of the flash memory chip, replacing the flash memory chip, etc., without limitation.

[0056] In a specific implementation, a pre-stored mapping relationship between the deviation degree and the warning parameters of the flash memory chip can be stored in advance. Then, the target warning parameter corresponding to the first deviation degree can be determined based on the mapping relationship. Then, the flash memory chip can be given a warning operation based on the target warning parameter. Finally, the flash memory chip can be subjected to precise aging test to improve the intelligence of flash memory chip maintenance.

[0057] The warning parameters may include at least one of the following: voice risk prompts, display risk prompts, short-term risk prompts, warning levels, notification of maintenance personnel, etc., without limitation.

[0058] Correspondingly, if the first deviation is less than or equal to the preset threshold, it indicates that although the flash memory chip is aging abnormally, it is not obvious, so no warning is needed and the flash memory chip can continue to be used normally.

[0059] Optionally, step 103 above, determining the first average read rate based on the first execution duration and the first test case, can be implemented as follows:

[0060] During the execution of the first test case, the read rate related to the first test case is detected at preset time intervals to obtain n read rates; each read rate corresponds to a detection time; n is a positive integer.

[0061] The fitting curve segment of the first time period is obtained by fitting the n reading rates and the detection time corresponding to each of the n reading rates. The first time period is the time period corresponding to the execution of the first test case.

[0062] The total amount of data read is obtained by performing an integral calculation based on the first time period.

[0063] The first average read rate is determined based on the total amount of data read and the total duration.

[0064] In practice, the preset time interval can be set in advance or set by system default.

[0065] Specifically, during the execution of the first test case, the read rate related to the first test case can be detected at preset time intervals to obtain n read rates; each read rate corresponds to a detection time; n is a positive integer. Then, based on the n read rates and the detection time corresponding to each of the n read rates, a fitting curve segment for the first time period can be obtained. The first time period is the time period corresponding to the execution of the first test case. That is, the n read rates and the detection time corresponding to each of the n read rates can be regarded as n coordinate points. The horizontal axis of the coordinate system corresponding to the n coordinate points is time, and the vertical axis is read rate. Based on these n coordinate points, a fitting curve can be obtained, and then the fitting curve segment for the first time period can be extracted.

[0066] Next, the total amount of data read can be obtained by integral calculation based on the first time period. Then, the first average read rate can be determined based on the total amount of data read and the total duration, i.e., the first average read rate = total amount of data read / total duration. By using the average read rate corresponding to the first test case to compare the aging degree of the flash memory chip, the interference of the read rate at a certain moment can be avoided, further ensuring the accuracy of the aging test. In this way, accurate aging test of flash memory chip can be achieved, thereby improving the intelligence of flash memory chip maintenance.

[0067] Optionally, the above step of determining the first average read rate based on the total amount of data read and the total duration can be implemented in the following manner:

[0068] A reference reading rate is determined based on the total amount of data read and the total duration.

[0069] The operating voltage of the flash memory chip during the first time period is obtained, resulting in m operating voltages, each corresponding to a monitoring time; m is a positive integer.

[0070] The working voltage change line is determined based on the m working voltages and the monitoring time corresponding to each of the m working voltages;

[0071] Determine the slope corresponding to the linear change in the working voltage to obtain the first slope;

[0072] Determine the first adjustment parameter corresponding to the first slope;

[0073] The first average read rate is determined based on the first adjustment parameter and the reference read rate.

[0074] In the specific implementation, the reference read rate can be determined based on the total amount of data read and the total duration, i.e., reference read rate = total amount of data read / total duration. Then, the working voltage of the flash memory chip in the first time period is obtained to get m working voltages, each working voltage corresponding to a monitoring time. m is a positive integer. For example, the working voltage of the flash memory chip can be collected at a specified time interval. The specified time interval can be preset or the system default. Then, the working voltage change line can be determined based on the m working voltages and the monitoring time corresponding to each of the m working voltages. The m working voltages and the monitoring time corresponding to each of the m working voltages can be regarded as m coordinate points. The horizontal axis of the coordinate system of these m coordinate points is time, and the vertical axis is working voltage.

[0075] Next, the slope corresponding to the linear change in operating voltage can be determined to obtain the first slope. The slope reflects the operating stability of the flash memory chip to a certain extent. Of course, the more severe the aging, the worse the operating stability, and vice versa. Aging will also have a certain impact on the test read rate. Therefore, a preset mapping relationship between the slope and the adjustment parameter can be stored in advance. The value range of the adjustment parameter can be preset or the system default. For example, the value range of the adjustment parameter can be -0.1 to 0.1. Based on this mapping relationship, the first adjustment parameter corresponding to the first slope can be determined. Then, the first average read rate can be determined according to the first adjustment parameter and the reference read rate. The first average read rate = (1 + first adjustment parameter) × reference read rate. In this way, the impact of aging on the operating stability of the flash memory chip can be considered, and the reference read rate can be further calibrated to improve the accuracy of the first average read rate. Thus, accurate aging test of the flash memory chip can be achieved to improve the intelligence of flash memory chip maintenance.

[0076] Optionally, the above step of determining the first average read rate based on the first adjustment parameter and the reference read rate can be implemented in the following manner:

[0077] The first read rate is determined based on the first adjustment parameter and the reference read rate;

[0078] Obtain the current number of bad blocks in the flash memory chip;

[0079] The first bad block ratio value is determined based on the current number of bad blocks;

[0080] Obtain the second bad block ratio value corresponding to the first used duration;

[0081] Determine a second deviation between the first bad block ratio value and the second bad block ratio value;

[0082] Determine the first fine-tuning parameter corresponding to the second deviation;

[0083] The first average read rate is determined based on the first fine-tuning parameter and the first read rate.

[0084] In this embodiment of the application, the first read rate can be determined based on the first adjustment parameter and the reference read rate, where the first read rate = (1 + first adjustment parameter) × reference read rate. Then, the current number of bad blocks in the flash memory chip is obtained, and the first bad block ratio value is determined based on the current number of bad blocks, that is, the ratio between the current number of bad blocks and the total number of storage blocks is determined to obtain the first bad block ratio value.

[0085] Correspondingly, a pre-stored mapping relationship between the used duration and the bad block ratio can be stored. Then, based on this mapping relationship, a second bad block ratio corresponding to the first used duration can be determined. Next, a second deviation between the first and second bad block ratios can be determined: the second deviation = (first bad block ratio - second bad block ratio) / second bad block ratio. A pre-stored mapping relationship between the deviation and fine-tuning parameters can also be stored. Then, based on this mapping relationship, a first fine-tuning parameter corresponding to the second deviation can be determined. The range of the fine-tuning parameter can be pre-set or defaulted to by the system. For example, the range of the fine-tuning parameter is -0.01 to 0.01. Finally, a first average read rate can be determined based on the first fine-tuning parameter and the first read rate: the first average read rate = (1 + first fine-tuning parameter) × first read rate. In this way, the changes in bad blocks within the flash memory chip can be used to further optimize the first read rate from an internal microscopic perspective, which is equivalent to deep calibration of the first read rate. This can improve the accuracy of the first average read rate, thereby enabling precise aging tests on the flash memory chip and improving the intelligence of flash memory chip maintenance.

[0086] Optionally, step 105 above, determining the second average read rate corresponding to the first used duration, can be implemented as follows:

[0087] Obtain the preset mapping relationship between the elapsed time and the average read rate;

[0088] The second average read rate corresponding to the first used duration is determined based on the mapping relationship.

[0089] In practice, a pre-stored mapping relationship between the elapsed usage time and the average read rate can be stored. This mapping relationship can be set at the factory or obtained by the manufacturer through testing.

[0090] In this embodiment of the application, a preset mapping relationship between the used time and the average read rate can be obtained, and then the second average read rate corresponding to the first used time can be determined according to the mapping relationship. In this way, a standard read rate can be obtained based on the used time.

[0091] As can be seen, the flash memory chip aging test method described in this application embodiment obtains a first test case of the flash memory chip; controls the flash memory chip to execute the first test case to obtain a first execution duration; the first execution duration is the total duration of executing the first test case; determines a first average read rate based on the first execution duration and the first test case, the first average read rate corresponding to the actual aging degree; obtains a first used time of the flash memory chip; determines a second average read rate corresponding to the first used time, the second average read rate corresponding to the first used time can be understood as the read rate corresponding to normal aging, that is, corresponding to the normal aging degree; when the first average read rate is greater than the second average read rate, it is determined that the flash memory chip is aging normally; when the first average read rate is less than or equal to the second average read rate, a first deviation between the first average read rate and the second average read rate is determined; when the first deviation is greater than a preset threshold, it is determined that the flash memory chip is aging abnormal; when the first deviation is greater than the preset threshold, it indicates that the flash memory chip is aging abnormal. Thus, accurate aging tests can be performed on the flash memory chip to improve the intelligence of flash memory chip maintenance.

[0092] Consistent with the above embodiments, please refer to Figure 3 , Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. As shown in the figure, the electronic device includes a processor, a memory, a communication interface, and one or more programs. The one or more programs are stored in the memory and configured to be executed by the processor. In this embodiment, the electronic device includes a flash memory chip, and the programs include instructions for performing the following steps:

[0093] Obtain the first test case for the flash memory chip;

[0094] The flash memory chip is controlled to execute the first test case to obtain a first execution time; the first execution time is the total execution time of the first test case.

[0095] The first average read rate is determined based on the first execution duration and the first test case.

[0096] Obtain the first usage time of the flash memory chip;

[0097] Determine the second average read rate corresponding to the first used duration;

[0098] When the first average read rate is greater than the second average read rate, it is determined that the flash memory chip is aging normally.

[0099] When the first average read rate is less than or equal to the second average read rate, a first deviation between the first average read rate and the second average read rate is determined. When the first deviation is greater than a preset threshold, the flash memory chip is determined to be aging abnormally.

[0100] Optionally, in determining the first average read rate based on the first execution duration and the first test case, the above procedure includes instructions for performing the following steps:

[0101] During the execution of the first test case, the read rate related to the first test case is detected at preset time intervals to obtain n read rates; each read rate corresponds to a detection time; n is a positive integer.

[0102] The fitting curve segment of the first time period is obtained by fitting the n reading rates and the detection time corresponding to each of the n reading rates. The first time period is the time period corresponding to the execution of the first test case.

[0103] The total amount of data read is obtained by performing an integral calculation based on the first time period.

[0104] The first average read rate is determined based on the total amount of data read and the total duration.

[0105] Optionally, in determining the first average read rate based on the total amount of data read and the total duration, the above procedure includes instructions for performing the following steps:

[0106] A reference reading rate is determined based on the total amount of data read and the total duration.

[0107] The operating voltage of the flash memory chip during the first time period is obtained, resulting in m operating voltages, each corresponding to a monitoring time; m is a positive integer.

[0108] The working voltage change line is determined based on the m working voltages and the monitoring time corresponding to each of the m working voltages;

[0109] Determine the slope corresponding to the linear change in the working voltage to obtain the first slope;

[0110] Determine the first adjustment parameter corresponding to the first slope;

[0111] The first average read rate is determined based on the first adjustment parameter and the reference read rate.

[0112] Optionally, in determining the first average read rate based on the first adjustment parameter and the reference read rate, the above procedure includes instructions for performing the following steps:

[0113] The first read rate is determined based on the first adjustment parameter and the reference read rate;

[0114] Obtain the current number of bad blocks in the flash memory chip;

[0115] The first bad block ratio value is determined based on the current number of bad blocks;

[0116] Obtain the second bad block ratio value corresponding to the first used duration;

[0117] Determine a second deviation between the first bad block ratio value and the second bad block ratio value;

[0118] Determine the first fine-tuning parameter corresponding to the second deviation;

[0119] The first average read rate is determined based on the first fine-tuning parameter and the first read rate.

[0120] Optionally, in determining the second average read rate corresponding to the first used duration, the above procedure includes instructions for performing the following steps:

[0121] Obtain the preset mapping relationship between the elapsed time and the average read rate;

[0122] The second average read rate corresponding to the first used duration is determined based on the mapping relationship.

[0123] As can be seen, the electronic device described in this application embodiment obtains a first test case for the flash memory chip; controls the flash memory chip to execute the first test case to obtain a first execution duration; the first execution duration is the total duration of executing the first test case; determines a first average read rate based on the first execution duration and the first test case, the first average read rate corresponding to the actual aging degree; obtains a first used time of the flash memory chip; determines a second average read rate corresponding to the first used time, the second average read rate corresponding to the first used time can be understood as the read rate corresponding to normal aging, that is, corresponding to the normal aging degree; when the first average read rate is greater than the second average read rate, it is determined that the flash memory chip is aging normally; when the first average read rate is less than or equal to the second average read rate, a first deviation between the first average read rate and the second average read rate is determined; when the first deviation is greater than a preset threshold, it is determined that the flash memory chip is aging abnormally; when the first deviation is greater than the preset threshold, it indicates that the flash memory chip is aging abnormally. Thus, accurate aging testing of the flash memory chip can be achieved to improve the intelligence of flash memory chip maintenance.

[0124] Figure 4This is a functional unit block diagram of an aging test apparatus 400 for a flash memory chip according to an embodiment of this application. The aging test apparatus 400 for the flash memory chip is applied to an electronic device, which includes a flash memory chip. The aging test apparatus 400 includes: an acquisition unit 401, a control unit 402, and a determination unit 403, wherein...

[0125] The acquisition unit 401 is used to acquire the first test case of the flash memory chip;

[0126] The control unit 402 is used to control the flash memory chip to execute the first test case and obtain a first execution duration; the first execution duration is the total duration of executing the first test case;

[0127] The determining unit 403 is used to determine a first average read rate based on the first execution duration and the first test case.

[0128] The acquisition unit 401 is used to acquire the first used duration of the flash memory chip;

[0129] The determining unit 402 is further configured to determine a second average read rate corresponding to the first used time; when the first average read rate is greater than the second average read rate, determine that the flash memory chip is aging normally; when the first average read rate is less than or equal to the second average read rate, determine a first deviation between the first average read rate and the second average read rate; and when the first deviation is greater than a preset threshold, determine that the flash memory chip is aging abnormally.

[0130] Optionally, in determining the first average read rate based on the first execution duration and the first test case, the determining unit 402 is specifically used for:

[0131] During the execution of the first test case, the read rate related to the first test case is detected at preset time intervals to obtain n read rates; each read rate corresponds to a detection time; n is a positive integer.

[0132] The fitting curve segment of the first time period is obtained by fitting the n reading rates and the detection time corresponding to each of the n reading rates. The first time period is the time period corresponding to the execution of the first test case.

[0133] The total amount of data read is obtained by performing an integral calculation based on the first time period.

[0134] The first average read rate is determined based on the total amount of data read and the total duration.

[0135] Optionally, in determining the first average read rate based on the total amount of data read and the total duration, the determining unit 402 is specifically configured to:

[0136] A reference reading rate is determined based on the total amount of data read and the total duration.

[0137] The operating voltage of the flash memory chip during the first time period is obtained, resulting in m operating voltages, each corresponding to a monitoring time; m is a positive integer.

[0138] The working voltage change line is determined based on the m working voltages and the monitoring time corresponding to each of the m working voltages;

[0139] Determine the slope corresponding to the linear change in the working voltage to obtain the first slope;

[0140] Determine the first adjustment parameter corresponding to the first slope;

[0141] The first average read rate is determined based on the first adjustment parameter and the reference read rate.

[0142] Optionally, in determining the first average read rate based on the first adjustment parameter and the reference read rate, the determining unit 402 is specifically configured to:

[0143] The first read rate is determined based on the first adjustment parameter and the reference read rate;

[0144] Obtain the current number of bad blocks in the flash memory chip;

[0145] The first bad block ratio value is determined based on the current number of bad blocks;

[0146] Obtain the second bad block ratio value corresponding to the first used duration;

[0147] Determine a second deviation between the first bad block ratio value and the second bad block ratio value;

[0148] Determine the first fine-tuning parameter corresponding to the second deviation;

[0149] The first average read rate is determined based on the first fine-tuning parameter and the first read rate.

[0150] Optionally, in determining the second average read rate corresponding to the first used duration, the determining unit 402 is specifically configured to:

[0151] Obtain the preset mapping relationship between the elapsed time and the average read rate;

[0152] The second average read rate corresponding to the first used duration is determined based on the mapping relationship.

[0153] As can be seen, the flash memory chip aging test apparatus described in this application embodiment obtains a first test case of the flash memory chip; controls the flash memory chip to execute the first test case to obtain a first execution duration; the first execution duration is the total duration of executing the first test case; determines a first average read rate based on the first execution duration and the first test case, the first average read rate corresponding to the actual aging degree; obtains a first used time of the flash memory chip; determines a second average read rate corresponding to the first used time, the second average read rate corresponding to the first used time can be understood as the read rate corresponding to normal aging, that is, corresponding to the normal aging degree; when the first average read rate is greater than the second average read rate, it is determined that the flash memory chip is aging normally; when the first average read rate is less than or equal to the second average read rate, it determines a first deviation between the first average read rate and the second average read rate; when the first deviation is greater than a preset threshold, it is determined that the flash memory chip is aging abnormal; when the first deviation is greater than the preset threshold, it indicates that the flash memory chip is aging abnormal. Thus, it can achieve accurate aging test of the flash memory chip to improve the intelligence of flash memory chip maintenance.

[0154] It is understood that the functions of each program module of the flash memory chip aging test device in this embodiment can be specifically implemented according to the methods in the above method embodiments. The specific implementation process can be referred to the relevant descriptions in the above method embodiments, and will not be repeated here.

[0155] This application also provides a computer storage medium storing a computer program for electronic data interchange, which causes a computer to perform some or all of the steps of any of the methods described in the above method embodiments.

[0156] This application also provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods described in the above method embodiments. This computer program product can be a software installation package.

[0157] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0158] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0159] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical or other forms.

[0160] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0161] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0162] If the integrated units described above are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0163] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, which may include: flash drive, read-only memory (ROM), random access memory (RAM), disk or optical disk, etc.

[0164] The embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A method of aging test of a flash memory chip, characterized by, The method comprises: obtaining a first test case of a flash memory chip; controlling the flash memory chip to execute the first test case to obtain a first execution duration; the first execution duration is a total duration of executing the first test case; determining a first average read rate according to the first execution duration and the first test case; obtaining a first used duration of the flash memory chip; determining a second average read rate corresponding to the first used duration; when the first average read rate is greater than the second average read rate, determining that the flash memory chip is aging normally; when the first average read rate is less than or equal to the second average read rate, determining a first deviation between the first average read rate and the second average read rate, and when the first deviation is greater than a preset threshold, determining that the flash memory chip is aging abnormally.

2. The method of claim 1, wherein, The determination of the first average read rate according to the first execution duration and the first test case comprises: during the execution of the first test case, detecting a read rate related to the first test case every preset time interval to obtain n read rates; each read rate corresponds to a detection time; n is a positive integer; fitting according to the n read rates and the detection time corresponding to each read rate in the n read rates to obtain a fitting curve segment of a first time period; the first time period is a time period corresponding to the execution of the first test case; performing integral operation according to the first time period to obtain a total read data amount; determining the first average read rate according to the total read data amount and the total duration.

3. The method of claim 2, wherein, The determination of the first average read rate according to the total read data amount and the total duration comprises: determining a reference read rate according to the total read data amount and the total duration; obtaining working voltages of the flash memory chip in the first time period to obtain m working voltages; each working voltage corresponds to a monitoring time; m is a positive integer; determining a working voltage change straight line according to the m working voltages and the monitoring time corresponding to each working voltage in the m working voltages; determining a slope corresponding to the working voltage change straight line to obtain a first slope; determining a first adjustment parameter corresponding to the first slope; determining the first average read rate according to the first adjustment parameter and the reference read rate.

4. The method of claim 3, wherein, The determination of the first average read rate according to the first adjustment parameter and the reference read rate comprises: determining a first read rate according to the first adjustment parameter and the reference read rate; obtaining a current number of bad blocks of the flash memory chip; determining a first bad block proportion value according to the current number of bad blocks; obtaining a second bad block proportion value corresponding to the first used duration; determining a second deviation between the first bad block proportion value and the second bad block proportion value; determining a first fine tuning parameter corresponding to the second deviation; determining the first average read rate according to the first fine tuning parameter and the first read rate.

5. The method according to any one of claims 1 to 4, characterized in that, The determination of the second average read rate corresponding to the first used duration comprises: obtain a mapping relationship between a preset used time length and an average read rate; determine the second average read rate corresponding to the first used time length according to the mapping relationship.

6. An aging test apparatus for a flash memory chip, characterized by comprising: The device comprises an obtaining unit, a control unit and a determining unit, wherein, The obtaining unit is configured to obtain a first test case of a flash memory chip. The control unit is configured to control the flash memory chip to execute the first test case to obtain a first execution time length, wherein the first execution time length is a total time length of executing the first test case. The determining unit is configured to determine a first average read rate according to the first execution time length and the first test case. The obtaining unit is configured to obtain a first used time length of the flash memory chip. The determining unit is further configured to determine a second average read rate corresponding to the first used time length, determine that the flash memory chip is aging normally when the first average read rate is greater than the second average read rate, and determine a first deviation between the first average read rate and the second average read rate when the first average read rate is less than or equal to the second average read rate, and determine that the flash memory chip is aging abnormally when the first deviation is greater than a preset threshold.

7. The apparatus of claim 6, wherein, In the aspect of determining the first average read rate according to the first execution time length and the first test case, the determining unit is specifically configured to: detect a read rate related to the first test case every preset time interval in a process of executing the first test case to obtain n read rates, wherein each read rate corresponds to a detection time, and n is a positive integer; fit a fitting curve segment of a first time period according to the n read rates and the detection time corresponding to each read rate in the n read rates, wherein the first time period is a time period corresponding to executing the first test case; perform integral operation according to the first time period to obtain a total read data amount; determine the first average read rate according to the total read data amount and the total time length.

8. The apparatus of claim 7, wherein, In the aspect of determining the first average read rate according to the total read data amount and the total time length, the determining unit is specifically configured to: determine a reference read rate according to the total read data amount and the total time length; obtain m working voltages of the flash memory chip in the first time period, wherein each working voltage corresponds to a monitoring time, and m is a positive integer; determine a working voltage change straight line according to the m working voltages and the monitoring time corresponding to each working voltage in the m working voltages; determine a first slope corresponding to the working voltage change straight line to obtain a first slope; determine a first adjustment parameter corresponding to the first slope; determine the first average read rate according to the first adjustment parameter and the reference read rate.

9. An electronic device, comprising: A computer program product comprising a computer readable medium storing instructions executable by one or more processors to perform the method according to any one of claims 1-5.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, and the computer program is executed by the processor to implement the method in any one of claims 1 to 5.

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