Method, device, equipment, storage medium and product for testing electrically erasable programmable read-only memory of electric energy meter

By setting up multiple electrically erasable programmable read-only memories (EEPROMs) on the test equipment and combining read/write lifetime and data retention test instructions, the problem of low testing efficiency in the prior art is solved, and efficient reliability testing of EEPROMs is achieved in different environments.

CN121276427BActive Publication Date: 2026-04-28ELECTRIC POWER RES INST CHINA SOUTHERN POWER GRID CO LTD +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
ELECTRIC POWER RES INST CHINA SOUTHERN POWER GRID CO LTD
Filing Date
2025-12-09
Publication Date
2026-04-28

AI Technical Summary

Technical Problem

Existing technologies for electrically erasable programmable read-only memories (EROMs) have low testing efficiency, making it difficult to spot faulty chips. Furthermore, whole-machine testing cannot simulate complex power outage scenarios, resulting in a high failure rate for smart meters.

Method used

By setting up multiple electrically erasable programmable read-only memories on the test equipment, and combining read/write lifetime test instructions and data retention test instructions, the read/write lifetime and data retention tests are performed on each memory sequentially using data transmission lines. The reliability of the chip is determined by combining the test results.

Benefits of technology

It improves the testing efficiency of electrically erasable programmable read-only memory, enables reliability testing under different ambient temperatures, and ensures the quality of memory used in electricity meters.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to a test method, device, equipment, storage medium and product of an electrically erasable programmable read-only memory of an electric energy meter. The read-write life test and data retention test are sequentially performed on each electrically erasable programmable read-only memory with the power turned on based on a read-write life test instruction and a retention test instruction of the corresponding memory of the electric energy meter, the test result of each electrically erasable programmable read-only memory is determined according to the read-write life test result and the data retention time, compared with the traditional mode of testing one piece of electrically erasable programmable read-only memory of one whole machine, the scheme sets each memory on the test equipment, combines the read-write life test instruction and the data retention test instruction, sequentially performs the read-write life test and the data retention test through a data transmission line, and obtains the test result of the electrically erasable programmable read-only memory by combining the results of the two tests, thereby improving the test efficiency of the electrically erasable programmable read-only memory.
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Description

Technical Field

[0001] This application relates to the field of electrical energy equipment testing technology, and in particular to a testing method, apparatus, computer equipment, computer-readable storage medium, and computer program product for an electrically erasable programmable read-only memory of an energy meter. Background Technology

[0002] Electrically erasable programmable read-only memory (EEPROM), as a non-volatile storage technology, has unique advantages such as data retention even when power is off and the ability to be repeatedly erased and rewritten online. EEPROM is used to store critical data that cannot be lost even when power is off, such as metering parameters, tiered pricing, tariff periods, and user electricity consumption data in smart meters. Therefore, high reliability is required for EEPROM. Currently, most EEPROMs cannot be inspected upon arrival at the factory; key performance indicators are tested using whole-unit testing. Typically, only one EEPROM can be tested per unit, making it difficult to identify faulty chips and reducing testing efficiency.

[0003] Therefore, current testing methods for electrically erasable programmable read-only memories (EROMs) in electricity meters suffer from low testing efficiency. Summary of the Invention

[0004] Therefore, it is necessary to provide a testing method, apparatus, computer equipment, computer-readable storage medium, and computer program product for the electrically erasable programmable read-only memory of an energy meter that can improve testing efficiency, in order to address the above-mentioned technical problems.

[0005] In a first aspect, this application provides a method for testing the electrically erasable programmable read-only memory (EPROM) of an energy meter, comprising:

[0006] In response to a read / write lifetime test command for each electrically erasable programmable read-only memory (EROM) to be tested corresponding to an electricity meter, the power supply to each of the EROMs is turned on; each of the EROMs is disposed in the test equipment and connected to a data transmission line in the test equipment.

[0007] Through the data transmission line, read and write lifetime tests are performed on each of the electrically erasable programmable read-only memories that are powered on in sequence to obtain read and write lifetime test results.

[0008] In response to a data retention test command for each of the electrically erasable programmable read-only memories (ERMs), a data retention test is performed sequentially on each of the powered-on ERMs via the data transmission line to obtain the data retention time of each ERM.

[0009] Based on the read / write lifetime test results and the data retention time, the test results for each of the electrically erasable programmable read-only memories are determined.

[0010] Secondly, this application also provides a testing device for the electrically erasable programmable read-only memory of an electricity meter, comprising:

[0011] A response module is used to respond to a read / write lifetime test command for each electrically erasable programmable read-only memory (EROM) to be tested corresponding to the electricity meter, and to turn on the power supply of each of the EROMs; each of the EROMs is disposed in the test equipment and connected to the data transmission line in the test equipment;

[0012] The first test module is used to sequentially perform read / write lifetime tests on each of the electrically erasable programmable read-only memories that are powered on via the data transmission line, and obtain the read / write lifetime test results.

[0013] The second test module is used to respond to the data retention test command for each of the electrically erasable programmable read-only memories (ERMs) by sequentially performing data retention tests on each of the powered-on ERMs through the data transmission line to obtain the data retention time of each ERM.

[0014] The determination module is used to determine the test results of each of the electrically erasable programmable read-only memories based on the read / write lifetime test results and the data retention time.

[0015] Thirdly, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the above-described method.

[0016] Fourthly, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the above-described method.

[0017] Fifthly, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the above-described method.

[0018] The aforementioned testing method, apparatus, computer equipment, computer-readable storage medium, and computer program product for the electrically erasable programmable read-only memory (EEPROM) of an electricity meter improves testing efficiency by setting up individual EEPROMs on the testing equipment based on read / write lifetime test commands for the EEPROM corresponding to the electricity meter, turning on the power to each EEPROM on the testing equipment, sequentially performing read / write lifetime tests on each powered-on EEPROM, and sequentially performing data retention tests on each powered-on EEPROM based on data retention test commands. The test results for each EEPROM are determined based on the read / write lifetime test results and data retention time. Compared to the traditional method of testing one EEPROM per entire unit, this solution improves testing efficiency by setting up individual EEPROMs on the testing equipment, combining read / write lifetime test commands and data retention test commands, and sequentially performing read / write lifetime tests and data retention tests on each EEPROM via data transmission lines, combining the results of the two tests to obtain the EEPROM test results. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is an application environment diagram of a test method for an electrically erasable programmable read-only memory (EPROM) of an energy meter in one embodiment;

[0021] Figure 2 This is a flowchart illustrating a test method for an electrically erasable programmable read-only memory (EPROM) of an energy meter in one embodiment.

[0022] Figure 3 This is a flowchart illustrating the testing steps in one embodiment;

[0023] Figure 4 This is a structural diagram of the test device in one embodiment;

[0024] Figure 5 This is a flowchart illustrating a test method for an electrically erasable programmable read-only memory (EPROM) of an energy meter in another embodiment.

[0025] Figure 6 This is a structural block diagram of a test device for an electrically erasable programmable read-only memory of an energy meter in one embodiment;

[0026] Figure 7 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0028] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0029] Among related technologies, electrically erasable programmable read-only memory (EEPROM), as a non-volatile storage technology, has unique advantages such as data retention after power failure and online rewriting capability. In modern electronic systems, EEPROM has become an indispensable storage component, with applications spanning consumer electronics, industrial control, automotive electronics, and IoT devices. Furthermore, EEPROM is used to store critical data that cannot be lost even when power is off, such as metering parameters, tiered pricing, tariff periods, and user electricity consumption data in smart meters. Therefore, high reliability requirements are placed on EEPROM. Currently, most EEPROMs cannot undergo in-factory inspection; key performance indicators / reliability indicators (write / erase life, data retention capability, etc.) are mainly controlled by the manufacturer. If key performance indicators fail to meet standards, defective products will be used in smart meters, leading to excessively high defect rates and batch failures.

[0030] Furthermore, whole-system testing typically only allows for the testing of one electrically erasable programmable read-only memory (EEPROM) chip per system. In high and low temperature testing environments, the limited size of the testing space restricts the testing of a large number of systems, resulting in a small number of tested chips and making it difficult to identify problematic chips. Additionally, whole-system testing struggles to simulate complex power-down scenarios (such as power loss during chip erasure and write operations) and to test the chip's data retention capabilities after such events. Therefore, a reliability testing scheme for electrically erasable programmable read-only memories (EEPROMs) needs to be developed.

[0031] Based on this, this application sets up each electrically erasable programmable read-only memory (EEPROM) on a test device, and combines read / write lifetime test instructions and data retention test instructions to sequentially perform read / write lifetime tests and data retention tests on each EEPROM through data transmission lines. The test results of the EEPROM are obtained by combining the results of the two tests, thereby improving the testing efficiency of EEPROM.

[0032] The testing method for the electrically erasable programmable read-only memory of an energy meter provided in this application embodiment can be applied to, for example, Figure 1 In the application environment shown, the main control system connects to the testing equipment via RS485 communication and to the temperature control system via RS232 communication. The main control system controls the testing equipment to perform read / write lifetime tests on each electrically erasable programmable read-only memory (EEPROM) in response to read / write lifetime test commands, and controls the testing equipment to perform data retention tests on each EEPROM in response to data retention test commands. Furthermore, the main control system can adjust the corresponding test temperature of the testing equipment through the temperature control system. The main control system can be a standalone physical server, a server cluster or distributed system consisting of multiple physical servers, or a cloud server providing cloud computing services.

[0033] In one exemplary embodiment, such as Figure 2 As shown, a test method for the electrically erasable programmable read-only memory (EROM) of an energy meter is provided, which is then applied to... Figure 1 Taking the main control system as an example, the explanation includes the following steps S202 to S208. Wherein:

[0034] In step S202, in response to the read / write lifetime test command for each electrically erasable programmable read-only memory (EROM) to be tested corresponding to the electricity meter, the power supply of each of the aforementioned EROMs is turned on; each of the aforementioned EROMs is installed in the test equipment and connected to the data transmission line in the test equipment.

[0035] Among them, each of the aforementioned electrically erasable programmable read-only memories can be used as a memory for installation in an electricity meter. During testing, the electrically erasable programmable read-only memories are set on the test equipment, which is equipped with multiple electrically erasable programmable read-only memories. Each electrically erasable programmable read-only memory is connected to the data transmission line of the test equipment, and the main control system performs tests on each electrically erasable programmable read-only memory by controlling the data transmission line.

[0036] The main control system controls the test equipment to switch test items (such as read / write life test and data retention test), and the main control system controls the ambient temperature of the test device through the temperature control system. Thus, the main control system, test fixtures (test equipment), and temperature control system form a reliability test system for electrically erasable programmable read-only memory. By designing a reasonable program, test efficiency can be improved, the number of chips tested can be increased, and reliability testing of chips under different environments can be achieved.

[0037] The main control system can receive read / write lifetime test commands for each electrically erasable programmable read-only memory (EROM) corresponding to the electricity meter. For example, the main control system can receive periodically triggered read / write lifetime test commands, or receive read / write lifetime test commands from personnel. In response to the read / write lifetime test commands, the main control system can turn on the power to each of the aforementioned EROMs. For example, the main control system can control the power pins of each EROM to switch its power on / off.

[0038] Step S204: Through the aforementioned data transmission line, the read / write lifetime test is performed sequentially on each of the electrically erasable programmable read-only memories that are powered on, and the read / write lifetime test results are obtained.

[0039] Upon receiving the read / write lifetime test command, the main control system can sequentially perform read / write lifetime tests on each electrically erasable programmable read-only memory (EROM) powered on via the data transmission line, obtaining the test results. For example, the main control system can write and read data to and from each EROM via the data transmission line, comparing the consistency of the written and read data to determine the read / write lifetime. Furthermore, in some embodiments, the main control system can also control the testing equipment to perform read / write lifetime tests on each EROM under different ambient temperatures.

[0040] Step S206: In response to the data retention test command for each of the electrically erasable programmable read-only memories (EROMs), the data retention test is performed sequentially on each of the powered-on EROMs via the data transmission line to obtain the data retention time of each of the EROMs.

[0041] The main control system can receive data retention test commands for each electrically erasable programmable read-only memory (EROM) to be tested corresponding to the electricity meter. For example, after performing a read / write life test, the main control system automatically triggers a data retention test command, or the command can be triggered by an operator. In response to the data retention test command for each of the aforementioned EROMs, the main control system sequentially performs data retention tests on each powered-on EROM via the aforementioned data transmission line to obtain the data retention time of each EROM.

[0042] For example, the main control system can perform data retention testing on the electrically erasable programmable read-only memory by powering off and then powering on the memory during data erasure and writing, and then detecting the data retention time of the memory after power-on.

[0043] Step S208: Based on the above read / write lifetime test results and the above data retention time, determine the test results of each of the above electrically erasable programmable read-only memories.

[0044] After obtaining the read / write lifetime test results and data retention time, the main control system can combine these results to determine the test results for each of the electrically erasable programmable read-only memories (EROMs). For example, by statistically analyzing the data retention time of EROMs under different read / write cycles, the main control system can obtain the relationship between the number of read / write cycles and the data retention time for each EROM. Furthermore, the main control system can also filter out EROMs whose read / write lifetime and data retention time meet the corresponding threshold requirements using preset thresholds. EROMs that meet the threshold requirements can be installed in electricity meters for storing electricity data.

[0045] In the aforementioned testing method for the electrically erasable programmable read-only memory (EROM) of an energy meter, based on the read / write lifetime test command for the EROM corresponding to the energy meter, the power supply of each EROM on the test equipment is turned on, and read / write lifetime tests are performed sequentially on each powered-on EROM. Similarly, based on the data retention test command, data retention tests are performed sequentially on each powered-on EROM. The test results for each EROM are determined based on the read / write lifetime test results and the data retention time. Compared to the traditional method of testing one EROM per entire unit, this solution sets up each EROM on the test equipment, combines read / write lifetime test commands and data retention test commands, and sequentially performs read / write lifetime tests and data retention tests on each EROM via data transmission lines. The test results of the EROM are obtained by combining the results of the two tests, thus improving the testing efficiency of the EROM.

[0046] In one embodiment, in response to a read / write lifetime test instruction for each electrically erasable programmable read-only memory (EROM) to be tested corresponding to the electricity meter, the method further includes: sending a temperature control instruction to a temperature control system; the temperature control system is used to control the ambient temperature corresponding to the test equipment to meet a target temperature according to the temperature control instruction; under the target temperature condition, through the data transmission line, sequentially performing read / write lifetime tests on each of the electrically erasable programmable read-only memories that are powered on, to obtain the read / write lifetime test result corresponding to the target temperature.

[0047] In this embodiment, when testing the electrically erasable programmable read-only memory (EPR), the main control system can control the temperature of the test environment where the EPR is located to achieve performance variations of the EPR under different ambient temperatures. The ambient temperature corresponding to the EPR can be controlled by a temperature control system. The main control system can send temperature control commands to the temperature control system. Based on these commands, the temperature control system determines the target temperature to which the EPR needs to be adjusted, and thus controls the ambient temperature of the test equipment to meet the target temperature. Under the target temperature condition, the main control system can sequentially perform read / write lifetime tests on each powered-on EPR via the data transmission line to obtain the read / write lifetime test results corresponding to the target temperature. Multiple target temperatures can be specified.

[0048] In one embodiment, the target temperature includes one or more of a first target temperature, a second target temperature, and a third target temperature. The first target temperature represents the temperature corresponding to room temperature; the second target temperature is lower than the first target temperature; and the third target temperature is higher than the first target temperature.

[0049] In this embodiment, when the main control system tests the electrically erasable programmable read-only memory (EEPROM), it can perform tests at different temperatures. For example, the main control system can use a temperature control system to control the temperature of the environment where the EEPROM is located to reach a first target temperature, allowing the EEPROM to perform the aforementioned tests at room temperature. The main control system can also use a temperature control system to control the temperature of the environment where the EEPROM is located to reach a second target temperature, allowing the EEPROM to perform the aforementioned tests at a low temperature (e.g., -40°C) below the first target temperature. Furthermore, the main control system can also use a temperature control system to control the temperature of the environment where the EEPROM is located to reach a third target temperature, allowing the EEPROM to perform the aforementioned tests at a high temperature (e.g., -70°C) above the first target temperature.

[0050] Through the above embodiments, the main control system can perform read / write lifetime tests and data retention time tests on electrically erasable programmable read-only memory (EEPROM) under various ambient temperature conditions, thereby obtaining the performance changes of EEPROM under different temperature conditions and improving the test integrity of EEPROM.

[0051] In one embodiment, read / write lifetime tests are performed sequentially on each of the electrically erasable programmable read-only memories (EROMs) powered on via the aforementioned data transmission line to obtain read / write lifetime test results. This includes: for each EROM powered on, writing first preset data to the powered-on EROM via the aforementioned data transmission line, and reading the stored data in the EROM until the stored data is inconsistent with the first preset data; determining the number of read / write operations corresponding to the EROM; the number of read / write operations represents the number of times the stored data is consistent with the first preset data; and obtaining the read / write lifetime test results based on the number of read / write operations corresponding to each EROM.

[0052] In this embodiment, the main control system can perform read / write lifetime tests on the electrically erasable programmable read-only memory (EEPROM) by writing and reading data to and from the EEPROM. For example, for each EEPROM with the power on, the main control system can write first preset data to the powered-on EEPROM via the aforementioned data transmission line and read the stored data from the EEPROM. The first preset data can be set according to actual conditions, such as historical operating data of the power system. The main control system can repeat the steps of writing the first preset data and reading the stored data until the stored data is inconsistent with the first preset data, thus determining the number of read / write operations corresponding to the EEPROM.

[0053] Here, the read / write count represents the number of times the stored data matches the first preset data. The main control system can obtain the read / write lifetime test results based on the read / write counts corresponding to each of the aforementioned electrically erasable programmable read-only memories (EEPROMs). That is, the main control system can determine the maximum number of read / write operations within which the written data and the stored data can remain consistent for each EEPROM.

[0054] Specifically, such as Figure 3 As shown, Figure 3 This is a flowchart illustrating the test steps in one embodiment. The main control system communicates with the test equipment via an RS485 circuit. The test equipment includes an RS485 circuit, a microcontroller unit (MCU) circuit, and an electrically erasable programmable read-only memory (EEPROM) circuit. The MCU circuit is connected to the EEPROM circuit via IIC communication. The main control system controls the power switch of the EEPROM circuit and performs data transmission by controlling the MCU circuit. For example, after the main control system sends an EEPROM erase / write lifetime test command frame (read / write lifetime test instruction), the RS485 circuit converts the RS485 communication signal into a Universal Asynchronous Receiver / Transmitter (UART) communication signal. The MCU circuit receives and parses the command frame. The MCU sends read / write commands to the EEPROM chip via IIC communication.

[0055] The specific structure of an electrically erasable programmable read-only memory circuit can be as follows: Figure 4 As shown, Figure 4This is a structural diagram of the test device in one embodiment. U1-U8 represent the electrically erasable programmable read-only memory (EPR) chip under test. A0 (pin 1), A1 (pin 2), and A2 (pin 3) are the device address bits. SDA (pin 5) is the serial data input, SCL (pin 6) is the serial clock input, WP (pin 7) is the write-protect pin, and VCC (pin 8) is the power supply pin. EPR_SDA and EPR_SCL are the IIC communication lines of the microcontroller circuit. To improve testing efficiency, the main control system will use a cyclic write-read comparison method to avoid unnecessary waiting time. During testing, the main control system controls the microcontroller to send the data to be written to the EPR via IIC communication. After receiving the data, the chip performs internal writing. At this time, the chip is in a busy state and will not respond; data can only be read and compared after the internal writing is completed.

[0056] For example, after receiving the command frame for the electrically erasable programmable read-only memory (EEPROM) lifetime test from the main control system, the microcontroller unit (MCU) turns on the power supplies VCC1-VCC8 of the EEPROM chips. After sending the data to be written (the first preset data) to U1, the MCU changes the device address and directly sends the data to be written to U2, and then sends data to U3-U8 sequentially. After sending the data to be written to U8, the MCU can immediately read the data already written inside U1, and then read the data inside each subsequent chip in sequence. The written data inside each chip is compared. If the comparison is consistent, the erase / write lifetime of that chip is incremented by one; if the comparison is inconsistent, the number of erase / write cycles (read / write count) is recorded. This process is repeated cyclically until all chips show inconsistencies between read and written data, or the minimum erase / write lifetime specified in the datasheet is reached, at which point the process stops.

[0057] In this embodiment, the main control system can perform read / write lifetime tests by reading and writing first preset data to electrically erasable programmable read-only memories (ERMs), thereby quickly determining the read / write lifetime of multiple ERMs and improving the testing efficiency of ERMs.

[0058] In one embodiment, a data retention test is performed sequentially on each of the electrically erasable programmable read-only memories (EROMs) powered on via the aforementioned data transmission line to obtain the data retention time of each EROM. This includes: for each powered-on EROM, sending a data write instruction for a second preset data to the powered-on EROM via the aforementioned data transmission line, and turning off the power to the EROM after a preset time; turning the power back on the EROM and obtaining the time for the EROM to maintain a target state; the target state includes a state where the data in the EROM is consistent with the data before the second preset data was written, and / or a state where the data in the EROM contains the second preset data; and determining the data retention time of the EROM based on the time for maintaining the target state.

[0059] In this embodiment, the main control system can test the data retention time by power-off restarting during the reading and writing process of the electrically erasable programmable read-only memory (EEPROM). For example, for each EEPROM with the power on, the main control system can send a data write command for a second preset data to the powered-on EEPROM via the aforementioned data transmission line, and then turn off the power to the EEPROM after a preset time. The second preset data can be set according to actual conditions, such as historical operating data of the power system, and the preset time can be determined based on the time period during which the EEPROM enters its internal erase / write state.

[0060] After the main control system powers off the electrically erasable programmable read-only memory (EEPROM), it can power on the EEPROM again and obtain the time during which the EEPROM maintains a target state. The target state includes one or more of the following: the data in the EEPROM is consistent with the data before the second preset data was written (data not written, maintaining consistency with the pre-writing state); or the data in the EEPROM contains the second preset data (data successfully written, maintaining a successful write state). Therefore, the main control system can determine the data retention time of the EEPROM based on the aforementioned time for maintaining the target state.

[0061] Specifically, when the main control system sends a power-off data retention test command frame (data retention test instruction) to the electrically erasable programmable read-only memory (EROM) under abnormal power loss, the RS485 circuit converts the RS485 communication signal into a universal asynchronous transceiver (UART) communication signal. The microcontroller circuit receives and parses the command frame. The microcontroller sends a write command to the EROM chip via IIC communication. After sending a stop signal, the power supply to the EROM chip is turned off after a certain interval (configurable). To improve the accuracy of the chip's power-off time, the microcontroller is used to power the EROM chip.

[0062] Among them, such as Figure 4 As shown, after receiving the command frame for the test of data retention during abnormal power loss of the electrically erasable programmable read-only memory (EEPROM) under the main control system, the microcontroller unit (MCU) turns on the power supplies VCC1-VCC8 of the EEPROM chip. The MCU sends the data to be written (such as the second preset data) to U1. After sending the stop signal, the MCU immediately turns off the power supply to VCC1 after a certain interval (such as a preset time). The interval can be controlled by the main control system. After power is restored, the data inside the chip is read and compared with the second preset data before or after writing to see if they are consistent. If they are consistent, a comparison is performed every 30 minutes (the time is adjustable) to check for data changes and record the data retention time.

[0063] In this embodiment, the main control system can use a testing device to cut off the power and restart the electrically erasable programmable read-only memory (EEPROM) when writing data, thereby improving the testing efficiency of EEPROM.

[0064] In one embodiment, determining the test results of each of the electrically erasable programmable read-only memories (EEPROMs) based on the read / write lifetime test results and the data retention time includes: determining target EEPROMs with read / write counts greater than a preset threshold based on the read / write lifetime test results; generating a correlation between the read / write counts and the data retention time based on the data retention time corresponding to each of the target EEPROMs, thereby obtaining the test results of each EEPROM.

[0065] In this embodiment, the main control system can combine the read / write lifetime test results and data retention time to determine the test results of the electrically erasable programmable read-only memory (EEPROM). For example, based on the read / write lifetime test results, the main control system determines target EEPROMs with read / write cycles exceeding a preset threshold, thereby obtaining EEPROMs whose read / write cycles meet normal read / write requirements. The main control system can generate a correlation between the read / write cycles and the data retention time corresponding to each target EEPROM, thus obtaining the test results of each EEPROM.

[0066] For example, the main control system uses the number of read / write operations and the data retention time as coordinate axes to form a coordinate system. The main control system distributes the test results of each electrically erasable programmable read-only memory on the above coordinate system, thereby obtaining the distribution information of the number of read / write operations and the data retention time of the electrically erasable programmable read-only memory, and then determines the above correlation based on the distribution information.

[0067] Through this embodiment, the main control system can combine the number of read / write operations and the data retention time to determine the test results of electrically erasable programmable read-only memory (ERM), thereby enabling test analysis of batch ERMs and improving the testing efficiency of ERMs.

[0068] In one exemplary embodiment, such as Figure 5 As shown, Figure 5 This is a flowchart illustrating a testing method for the electrically erasable programmable read-only memory (EPROM) of an energy meter, as shown in another embodiment. In this embodiment, the system consists of three main parts: a main control system, testing equipment, and a temperature control system. The steps include:

[0069] S1. After starting the test, the main control system sends out a test command frame at room temperature (e.g., 23°C);

[0070] S2. After receiving the ambient temperature (e.g., 23°C) test command frame from the main control system, the temperature control system adjusts the test environment of the electrically erasable programmable read-only memory to ambient temperature (e.g., 23°C) and sends a response frame to the main control system.

[0071] S3. The main control system receives the response frame from the temperature control system and, after a preset stabilization time, sends a power-generating erasable programmable read-only memory erase / write life test command frame (read / write life test instruction).

[0072] S4. The test equipment will turn on the power supply to the electrically erasable programmable read-only memory chip;

[0073] S5. The test equipment will send the data to be written to the electrically erasable programmable read-only memory chip U1;

[0074] S6. The test equipment will send the data to be written to the electrically erasable programmable read-only memory chip U2;

[0075] ...

[0076] S7. The test equipment will send the data to be written to the electrically erasable programmable read-only memory chip U8;

[0077] S8. The test equipment will read the data inside the electrically erasable programmable read-only memory chip U1;

[0078] S9. The test equipment will read the data inside the electrically erasable programmable read-only memory chip U2;

[0079] ...

[0080] S10. The test equipment will read the data inside the electrically erasable programmable read-only memory chip U8;

[0081] S11. When the written data matches the data read from inside the chip, one erase / write operation is completed, and the erase / write lifespan is incremented by one; when they do not match, the number of erase / write operations is recorded.

[0082] S12. Repeat S5~S11 until all chips show inconsistencies or reach the minimum erase / write life specified in the datasheet.

[0083] S13~S24 are the same as S1~S12, completing the test of all electrically erasable programmable read-only memories at low temperatures (e.g. -40℃);

[0084] S25~S36 are the same as S1~S12 test procedures, completing the test of all electrically erasable programmable read-only memories at high temperatures (e.g., 70°C);

[0085] S37, Test command frame for data retention capability of power-erasable programmable read-only memory under abnormal power failure in main control system (data retention test instruction).

[0086] S38. The test equipment will turn on the power supply to the electrically erasable programmable read-only memory chip;

[0087] S39. The test equipment will send the data to be written to the electrically erasable programmable read-only memory chip U1;

[0088] S40. The test equipment will cut off the power supply of the electrically erasable programmable read-only memory chip at different times when the chip enters internal erasure and writing (e.g., the chip erasure and writing time is 3ms, at the 100us time point) after sending a stop signal to the electrically erasable programmable read-only memory.

[0089] S41. After restoring power to the electrically erasable programmable read-only memory chip, read the data inside the chip;

[0090] S42. If the data inside the chip is consistent with the data before or after writing;

[0091] S43. Wait 30 minutes (time can be set);

[0092] S44. When the data inside the chip is inconsistent with the data before or after writing, record the data retention time inside the chip.

[0093] S45. Statistics on the chip's ability to retain internal data during power loss at different erase / write times;

[0094] S46. After the main control system completes all tests, it automatically organizes the test data and filters out chips that do not meet the minimum erase / write life requirements.

[0095] Specifically, the main control system communicates with the test equipment via an RS485 circuit. The test equipment includes an RS485 circuit, a microcontroller circuit, and an electrically erasable programmable read-only memory (EEPROM) circuit. The microcontroller circuit is connected to the EEPROM circuit via IIC communication. The main control system controls the power switch of the EEPROM circuit and performs data transmission by controlling the microcontroller circuit. For example, after the main control system sends an EEPROM erase / write lifetime test command frame (read / write lifetime test instruction), the RS485 circuit converts the RS485 communication signal into a universal asynchronous transceiver (UART) communication signal, and the microcontroller circuit receives and parses the command frame. The microcontroller then sends read / write commands to the EEPROM chip via IIC communication.

[0096] like Figure 4 As shown, U1-U8 are the electrically erasable programmable read-only memory (EEPROM) chips under test. A0 (pin 1), A1 (pin 2), and A2 (pin 3) are the device address bits. SDA (pin 5) is the serial data input, SCL (pin 6) is the serial clock input, WP (pin 7) is the write-protect pin, and VCC (pin 8) is the power supply pin. EEPROM_SDA and EEPROM_SCL are the IIC communication lines of the microcontroller circuit. In some embodiments, multiple IIC communication lines can be used to operate multiple chips. To improve testing efficiency, the main control system will use a cyclic write and read comparison method to avoid unnecessary waiting time. During testing, the main control system controls the microcontroller to send the data to be written to the EEPROM via IIC communication. After receiving the data, the chip performs internal writing. At this time, the chip is in a busy state and will not respond; data can only be read and compared after the internal writing is completed.

[0097] For example, after receiving the command frame for the electrically erasable programmable read-only memory (EEPROM) lifetime test from the main control system, the microcontroller unit (MCU) turns on the power supplies VCC1-VCC8 of the EEPROM chips. After sending the data to be written (the first preset data) to U1, the MCU changes the device address and directly sends the data to be written to U2, and then sends data to U3-U8 sequentially. After sending the data to be written to U8, the MCU can immediately read the data already written inside U1, and then read the data inside each subsequent chip in sequence. The written data inside each chip is compared. If the comparison is consistent, the erase / write lifetime of that chip is incremented by one; if the comparison is inconsistent, the number of erase / write cycles (read / write count) is recorded. This process is repeated cyclically until all chips show inconsistencies between read and written data, or the minimum erase / write lifetime specified in the datasheet is reached, at which point the process stops.

[0098] When the main control system sends a power-on error message (data retention test command frame) to the electrically erasable programmable read-only memory (EEPROM) after an abnormal power loss, the RS485 circuit converts the RS485 communication signal into a universal asynchronous transceiver (UART) communication signal. The microcontroller unit (MCU) circuit receives and parses the command frame. The MCU sends a write command to the EEPROM chip via IIC communication. After sending a stop signal, the MCU power supply is turned off after a certain time interval (configurable). To improve the accuracy of the chip's power-off time, the MCU powers the EEPROM chip.

[0099] Among them, such as Figure 4 As shown, after receiving the command frame for the test of data retention during abnormal power loss of the electrically erasable programmable read-only memory (EEPROM) under the main control system, the microcontroller unit (MCU) turns on the power supplies VCC1-VCC8 of the EEPROM chip. The MCU sends the data to be written (such as the second preset data) to U1. After sending the stop signal, the MCU immediately turns off the power supply to VCC1 after a certain interval (such as a preset time). The interval can be controlled by the main control system. After power is restored, the data inside the chip is read and compared with the second preset data before or after writing to see if they are consistent. If they are consistent, a comparison is performed every 30 minutes (the time is adjustable) to check for data changes and record the data retention time.

[0100] Through the above embodiments, the main control system sets up each electrically erasable programmable read-only memory (EEPROM) on the test equipment, and combines read / write lifetime test instructions and data retention test instructions to sequentially perform read / write lifetime tests and data retention tests on each EEPROM through the data transmission line. The test results of the EEPROM are obtained by combining the results of the two tests, which improves the testing efficiency of EEPROM.

[0101] Furthermore, by employing automated testing, a certain number of electrically erasable programmable read-only memory (ERM) chips can be sampled for inspection, enabling incoming chip inspection. Compared to whole-system testing, more chips can be tested, increasing the probability of detecting chip faults, reducing testing costs, shortening the operation time of a single chip, and improving testing efficiency. It can also test the data retention capability under abnormal power loss conditions, assessing the impact of abnormal power loss on the chip's internal data.

[0102] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0103] Based on the same inventive concept, this application also provides a testing apparatus for an electrically erasable programmable read-only memory (ERM) of an energy meter, used to implement the testing method for the ERM of an energy meter described above. The solution provided by this apparatus is similar to the implementation described in the above method. Therefore, the specific limitations in one or more embodiments of the testing apparatus for an ERM of an energy meter provided below can be found in the limitations of the testing method for the ERM of an energy meter described above, and will not be repeated here.

[0104] In one exemplary embodiment, such as Figure 6 As shown, a testing device for the electrically erasable programmable read-only memory (ERM) of an electricity meter is provided, comprising: a response module 500, a first test module 502, a second test module 504, and a determination module 506, wherein:

[0105] The response module 500 is used to turn on the power supply of each of the electrically erasable programmable read-only memories (ERMs) in response to a read / write lifetime test command for each ERM to be tested corresponding to the electricity meter; each of the ERMs is disposed in the test equipment and connected to the data transmission line in the test equipment.

[0106] The first test module 502 is used to perform read / write lifetime tests on each of the electrically erasable programmable read-only memories that are powered on via the aforementioned data transmission line, and obtain the read / write lifetime test results.

[0107] The second test module 504 is used to respond to the data retention test command for each of the electrically erasable programmable read-only memories (ERMs) by sequentially performing data retention tests on each of the powered-on ERMs through the data transmission line, thereby obtaining the data retention time of each of the ERMs.

[0108] The determination module 506 is used to determine the test results of each of the above electrically erasable programmable read-only memories based on the above read / write lifetime test results and the above data retention time.

[0109] In one embodiment, the device further includes: a temperature control module for sending a temperature control command to a temperature control system; the temperature control system for controlling the ambient temperature corresponding to the test equipment to meet the target temperature according to the temperature control command; and under the target temperature condition, sequentially performing read / write lifetime tests on each of the electrically erasable programmable read-only memories powered on via the data transmission line to obtain the read / write lifetime test results corresponding to the target temperature.

[0110] In one embodiment, the first test module 502 is configured to, for each electrically erasable programmable read-only memory (EROM) powered on, write first preset data to the powered-on EROM via the data transmission line, and read the stored data in the EROM until the stored data is inconsistent with the first preset data, thereby determining the read / write count corresponding to the EROM; the read / write count represents the number of times the stored data is consistent with the first preset data; and the read / write lifetime test result is obtained based on the read / write count corresponding to each EROM.

[0111] In one embodiment, the second test module 504 is configured to, for each of the electrically erasable programmable read-only memories (EROMs) powered on, send a data write instruction for a second preset data to the powered-on EROM via the data transmission line, and turn off the power of the EROM after a preset time; turn the power of the EROM back on, and obtain the time for the EROM to maintain a target state; the target state includes a state in which the data in the EROM is consistent with the data before the second preset data was written, and / or a state in which the data in the EROM contains the second preset data; and determine the data retention time of the EROM based on the time for maintaining the target state.

[0112] In one embodiment, the determining module 506 is used to determine, based on the read / write lifetime test results, a target electrically erasable programmable read-only memory (EEPROM) with a read / write count greater than a preset threshold; and to generate a correlation between the read / write count and the data retention time based on the data retention time corresponding to each of the target EEPROMs, thereby obtaining the test results of each EEPROM.

[0113] The modules in the test device for the electrically erasable programmable read-only memory of the aforementioned energy meter can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independent of the processor in a computer device, or stored in software in the memory of a computer device, so that the processor can call and execute the operations corresponding to each module.

[0114] In one exemplary embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 7As shown, this computer device includes a processor, memory, input / output (I / O) interfaces, and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides the environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores power data. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communication with external terminals via a network connection. When executed by the processor, the computer program implements a test method for the electrically erasable programmable read-only memory (EROM) of an electricity meter.

[0115] Those skilled in the art will understand that Figure 7 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0116] In one exemplary embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the above-described test method for the electrically erasable programmable read-only memory of an electricity meter.

[0117] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the test method for the electrically erasable programmable read-only memory of the energy meter described above.

[0118] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the above-described method for testing the electrically erasable programmable read-only memory of an energy meter.

[0119] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0120] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0121] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0122] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A test method for the electrically erasable programmable read-only memory of an electricity meter, characterized in that, The method includes: In response to a read / write lifetime test command for each electrically erasable programmable read-only memory (EROM) to be tested corresponding to an electricity meter, the power supply to each of the EROMs is turned on; each of the EROMs is disposed in the test equipment and connected to a data transmission line in the test equipment. Through the data transmission line, read and write lifetime tests are performed on each of the electrically erasable programmable read-only memories that are powered on in sequence to obtain read and write lifetime test results. In response to a data retention test command for each of the electrically erasable programmable read-only memories (EEPROMs), for each EEPROM powered on, a data write command for a second preset data is sent to the powered-on EEPROM via the data transmission line, and the power to the EEPROM is turned off after a preset time; the power to the EEPROM is then turned back on, and the time for the EEPROM to maintain a target state is obtained; the target state includes a state where the data in the EEPROM is consistent with the data before the second preset data was written, and / or a state where the data in the EEPROM contains the second preset data; obtaining the time for the EEPROM to maintain the target state includes: comparing the data in the EEPROM with the data before the second preset data was written or the written second preset data; if consistent, reading and comparing at set intervals to see if there is a data change, thus obtaining the time for maintaining the target state; and determining the data retention time of the EEPROM based on the time for maintaining the target state. Based on the read / write lifetime test results and the data retention time, the test results for each of the electrically erasable programmable read-only memories are determined.

2. The method according to claim 1, characterized in that, Following the read / write lifetime test command for each electrically erasable programmable read-only memory (EROM) to be tested corresponding to the energy meter, the method further includes: A temperature control command is sent to the temperature control system; the temperature control system is used to control the ambient temperature corresponding to the test equipment to meet the target temperature according to the temperature control command. Under the target temperature condition, the read / write lifetime test is performed sequentially on each of the electrically erasable programmable read-only memories that are powered on via the data transmission line to obtain the read / write lifetime test results corresponding to the target temperature.

3. The method according to claim 2, characterized in that, The target temperature includes one or more of a first target temperature, a second target temperature, and a third target temperature; The first target temperature represents the temperature corresponding to room temperature; The second target temperature is lower than the first target temperature; The third target temperature is greater than the first target temperature.

4. The method according to claim 1, characterized in that, The process involves sequentially performing read / write lifetime tests on each of the electrically erasable programmable read-only memories (EROMs) powered on via the data transmission line to obtain read / write lifetime test results, including: For each electrically erasable programmable read-only memory (EEPROM) powered on, a first preset data is written to the powered-on EEPROM via the data transmission line, and the stored data in the EEPROM is read until the stored data is inconsistent with the first preset data. Then, the read / write count corresponding to the EEPROM is determined. The read / write count represents the number of times the stored data is consistent with the first preset data. The read / write lifetime test results are obtained based on the number of reads and writes corresponding to each electrically erasable programmable read-only memory.

5. The method according to any one of claims 1 to 4, characterized in that, The step of determining the test results of each electrically erasable programmable read-only memory based on the read / write lifetime test results and the data retention time includes: Based on the read / write lifetime test results, a target electrically erasable programmable read-only memory with a read / write count greater than a preset threshold number is determined. Based on the data retention time corresponding to each of the target electrically erasable programmable read-only memories (EEPROMs), a correlation between the number of read / write operations and the data retention time is generated to obtain the test results of each EEPROM.

6. A testing device for the electrically erasable programmable read-only memory of an electricity meter, characterized in that, The device includes: A response module is used to respond to a read / write lifetime test command for each electrically erasable programmable read-only memory (EROM) to be tested corresponding to the electricity meter, and to turn on the power supply of each of the EROMs; each of the EROMs is disposed in the test equipment and connected to the data transmission line in the test equipment; The first test module is used to sequentially perform read / write lifetime tests on each of the electrically erasable programmable read-only memories that are powered on via the data transmission line, and obtain the read / write lifetime test results. The second test module is used to respond to a data retention test command for each of the electrically erasable programmable read-only memories (EEPROMs). For each EEPROM powered on, the module sends a data write command for a second preset data to the powered-on EEPROM via the data transmission line, and then shuts off the power to the EEPROM after a preset time. The module then powers on the EEPROM again and obtains the time the EEPROM maintains a target state. The target state includes a state where the data in the EEPROM is consistent with the data before the second preset data was written, and / or a state where the data in the EEPROM contains the second preset data. Specifically, the module compares the data in the EEPROM with the data before or after the second preset data was written. If they are consistent, it performs a read comparison at set intervals to check for data changes, thus obtaining the time to maintain the target state. Based on the time to maintain the target state, the module determines the data retention time of the EEPROM. The determination module is used to determine the test results of each of the electrically erasable programmable read-only memories based on the read / write lifetime test results and the data retention time.

7. The apparatus according to claim 6, characterized in that, The device further includes: a temperature control module, used for: A temperature control command is sent to the temperature control system; the temperature control system is used to control the ambient temperature corresponding to the test equipment to meet the target temperature according to the temperature control command. Under the target temperature condition, the read / write lifetime test is performed sequentially on each of the electrically erasable programmable read-only memories that are powered on via the data transmission line to obtain the read / write lifetime test results corresponding to the target temperature.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 5.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 5.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 5.

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