A power panel detection method, system, terminal and storage medium

Abstract

This application relates to a power board testing method, system, terminal, and storage medium, and pertains to the technical field of power board testing. The method includes acquiring power board parameter information of a preset power board under test; analyzing the power board parameter information to determine a power board test set; controlling a preset load control module to test the power board under test according to the power board test set to determine power board feedback data; and analyzing the power board test set, power board parameter information, and power board feedback data to determine the power board testing result. This application improves the efficiency of power board testing.

Description

Technical Field

[0001] This application relates to the technical field of power board testing, and in particular to a power board testing method, system, terminal, and storage medium. Background Technology

[0002] Power board testing refers to the technical method of testing and verifying the power supply performance and electrical parameters of a power board to determine whether it meets the usage requirements and ensures stable power supply to the equipment.

[0003] In related technologies, when testing power boards, discrete instruments such as multimeters, oscilloscopes, and electronic loads are usually used for combined measurements. The test link is manually set up, and data is collected parameter by parameter. The data is then summarized and analyzed to finally determine the power board test results.

[0004] Regarding the aforementioned technologies, when data is measured and summarized manually for each parameter, it is necessary to manually switch discrete instruments, adjust the test link, and manually read, record, and integrate discrete data. The operation is complex and highly repetitive. In the process, additional deviations can easily be introduced due to human reading errors, inconsistent operation timing, and data entry errors. Furthermore, the measurement scenario is singular, and the measurement parameters are independent of each other, making it impossible to accurately capture faults and determine the causes of faults. This results in low power board testing efficiency, and there is still room for improvement. Summary of the Invention

[0005] To improve the efficiency of power board testing, this application provides a power board testing method, system, terminal, and storage medium.

[0006] Firstly, this application provides a power board testing method, which adopts the following technical solution:

[0007] A power board testing method, comprising:

[0008] Obtain the power board parameter information of the preset power board under test;

[0009] Analyze the power board parameter information to determine the power board test set;

[0010] The preset load control module tests the power board under test according to the power board test set to determine the power board feedback data.

[0011] The power board test set, power board parameter information, and power board feedback data are analyzed to determine the power board test results.

[0012] Optionally, the steps of analyzing power board parameter information to determine the power board test set include:

[0013] Extract power board parameter information to determine the power board model;

[0014] The system searches a preset historical database based on the power board model to determine the historical device input.

[0015] Generate a device test set based on historical device input;

[0016] The power board model, power board parameter information, and equipment test set are analyzed to determine the power board test set.

[0017] Optionally, the steps of analyzing the power board model, power board parameter information, and device test set to determine the power board test set include:

[0018] Extract power board parameter information to determine the power board's limiting parameters;

[0019] Search the historical database based on the power board model to determine the fault setting parameters;

[0020] Determine whether the fault setting parameters are within the range of the power board's specified parameters;

[0021] If not, then remove the fault parameters of the power board;

[0022] If so, then the fault parameters of that power board shall be determined as the reference fault parameters;

[0023] Determine the fault test set based on reference fault parameters;

[0024] Integrate the device test set and the fault test set to determine the power board test set.

[0025] Optionally, the steps for analyzing the power board test set, power board parameter information, and power board feedback data to determine the power board test results include:

[0026] The power board test set is analyzed to determine the power board operating condition set;

[0027] The data fluctuation set is determined within the preset power board fluctuation threshold for the power board operating condition set.

[0028] Input the power board parameter information and power board test set into the preset circuit analysis model to determine the theoretical output set;

[0029] The sum of the theoretical output set and the data fluctuation set is calculated to determine the fault-free parameter range;

[0030] Determine whether the power board feedback data is within the fault-free parameter range;

[0031] If so, the preset power board fault-free result is defined as the power board detection result;

[0032] If not, the power board test set, fault-free parameter range, power board parameter information, and power board feedback data are analyzed to determine the power board test results.

[0033] Optionally, the steps for analyzing the power board test set, fault-free parameter range, power board parameter information, and power board feedback data to determine the power board test results include:

[0034] Deviation analysis is performed based on power board feedback data and fault-free parameter range to determine feedback deviation data;

[0035] Obtain historical fault parameters;

[0036] Deviation analysis is performed on historical fault parameters, power board parameter information, and power board fluctuation thresholds to determine historical deviation data.

[0037] Feedback deviation data and historical deviation data are input into a preset weighted similarity model to determine fault similarity;

[0038] The power board test set, fault similarity, and historical fault parameters are analyzed to determine the power board test results.

[0039] Optionally, the steps of analyzing the power board test set, fault similarity, and historical fault parameters to determine the power board test results include:

[0040] Numerical analysis of fault similarity is performed to determine the first and second similarity.

[0041] Based on the first similarity, determine the first fault type and the first fault parameter corresponding to the first similarity in the historical fault parameters;

[0042] The first fault parameter is input into the preset fault learning model to determine the quantified fault trend;

[0043] The power board test set and quantified fault trends were analyzed to determine the fault verification dataset;

[0044] The load control module tests the power supply board under test based on the fault verification dataset to determine the fault verification results.

[0045] Determine whether the fault verification results conform to the quantitative fault trend;

[0046] If the conditions are met, the power board test result will be identified as the first fault type.

[0047] If the results do not meet the requirements, the secondary similarities are updated to the primary similarities one by one, and the primary similarities are analyzed iteratively to determine the power board detection results.

[0048] Optionally, the steps of analyzing the power board test set and quantifying fault trends to determine the fault verification dataset include:

[0049] Analyze the quantitative failure trend to determine the univariate change trend;

[0050] Data analysis is performed on the changing trends of univariates to determine the type of univariate and the effective range of variation.

[0051] Data is extracted from the power board test set to determine the basic test set;

[0052] The base test set is univariately adjusted based on the univariate type and effective range of variation to determine the fault verification dataset.

[0053] Secondly, this application provides a power board detection system, which adopts the following technical solution:

[0054] A power board testing system, comprising:

[0055] The acquisition module is used to acquire power board parameter information;

[0056] A memory for storing a program for a power board detection method as described in any of the preceding claims;

[0057] The processor and the program in the memory can be loaded and executed by the processor to implement a power board detection method as described in any of the above.

[0058] Thirdly, this application provides a smart terminal, which adopts the following technical solution:

[0059] A smart terminal includes a memory and a processor, wherein the memory stores a computer program that can be loaded by the processor and executed as described in any of the preceding claims for a power board detection method.

[0060] Fourthly, this application provides a computer storage medium capable of storing corresponding programs, which facilitates improving the detection efficiency of the power board, and adopts the following technical solution:

[0061] A computer-readable storage medium storing a computer program that can be loaded by a processor and executed according to any of the above-described power board detection methods.

[0062] In summary, this application includes at least one of the following beneficial technical effects:

[0063] 1. By analyzing the power board parameter information, a power board test set that meets the requirements of the power board's connected devices and common power board errors is determined. This allows for testing of the power board based on its actual application, thereby improving the accuracy of power board testing. The load control module is then controlled according to the power board test set to test the power board under test, obtaining feedback data from the power board. This feedback data is then analyzed to determine the final power board test result, thus achieving automated power board testing, enriching power board testing scenarios, and ultimately improving power board testing efficiency.

[0064] 2. By extracting information from the power board parameters, the power board model is determined. Then, the historical database is searched based on the power board model to determine the historical device inputs of the devices connected to this model of power board. Based on the historical device inputs, a device test set matching the historical device inputs is generated. Then, the power board is targeted for testing according to the actual application scenario of the power board, thereby improving the reliability of power board testing.

[0065] 3. When a power board malfunctions, numerical analysis of the fault similarity is performed. The fault sources of the power board are analyzed sequentially according to the order of fault similarity, thereby improving the fault detection efficiency of the power board. The first fault parameter is input into the fault learning model to learn and quantify the fault trend. Then, a corresponding fault verification dataset is generated based on the quantified fault trend. The fault verification dataset is input into the load control module to test the power board under test, and the fault verification results are determined. Then, it is judged whether the fault verification results are consistent with the quantified fault trend, thereby determining the fault source of the power board under test and improving the accuracy of fault source detection of the power board under test. Attached Figure Description

[0066] Figure 1 This is a flowchart of a power board detection method according to an embodiment of this application.

[0067] Figure 2 This is a flowchart illustrating the analysis of power board parameter information to determine the power board test set in this embodiment of the application.

[0068] Figure 3 This is a flowchart illustrating the analysis of the power board model, power board parameter information, and device test set in this embodiment of the application to determine the power board test set.

[0069] Figure 4 This is a flowchart illustrating the analysis of the power board test set, power board parameter information, and power board feedback data in this embodiment of the application to determine the power board test results.

[0070] Figure 5This is a flowchart in this application embodiment of analyzing the power board test set, fault-free parameter range, power board parameter information, and power board feedback data to determine the power board test results.

[0071] Figure 6 This is a flowchart illustrating the analysis of power board test sets, fault similarity, and historical fault parameters in this embodiment of the application to determine the power board detection results.

[0072] Figure 7 This is a flowchart illustrating the analysis of the power board test set and quantified fault trends in this embodiment of the application to determine the fault verification dataset. Detailed Implementation

[0073] To make the purpose, technical solution, and advantages of this application clearer, the following description is provided in conjunction with the appendix. Figures 1 to 7 The present application will be further described in detail below with reference to embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the application.

[0074] This application discloses a power board testing method, system, terminal, and storage medium. Specifically, it discloses a processing terminal and a power board under test (DUT). The processing terminal and the DUT are communicatively connected to achieve data interaction and control. The processing terminal acquires power board parameter information, analyzes the power board parameter information, and determines a power board test set that conforms to the power board's connected devices and common power board errors. This allows the power board to be tested according to its actual application, thereby improving the accuracy of power board testing. Based on the power board test set, a load control module is controlled to test the power board under test, obtaining power board feedback data. This feedback data is then analyzed, and the final power board testing result is determined based on the feedback data. This achieves automated power board testing, enriches power board testing scenarios, and improves power board testing efficiency.

[0075] Reference Figure 1 This application discloses a power board testing method, including the following steps:

[0076] Step S100: Obtain the power board parameter information of the preset power board under test.

[0077] Among them, the power board under test refers to the power board currently waiting to be tested. The power board is a core electronic component that receives external power, processes it through circuits such as rectification, filtering, and voltage regulation, and converts it into voltage and current forms that meet the requirements, so as to provide stable power supply for various components of the integrated smart terminal.

[0078] Power board parameter information refers to the parameter information of the power board, including the power board model, rated current and rated power, etc. The processing terminal determines the parameters by scanning the parameter display on the surface of the power board and reading the information in the built-in storage chip, which provides data support for the subsequent determination of the power board test set.

[0079] Step S101: Analyze the power board parameter information to determine the power board test set.

[0080] The power board test set refers to the set of input parameters used to test the power board, including the equipment test set and the fault test set. These are determined by the processing terminal based on the power board parameter information, identifying historical equipment input parameters and frequently occurring historical fault input parameters. Specific analysis steps are detailed below. Figure 2 The steps in the process.

[0081] Step S102: Control the preset load control module to test the power board under test according to the power board test set to determine the power board feedback data.

[0082] Among them, the load control module refers to the power board detection module that simulates the load state of the power board in actual operation according to the input parameters in the test set. It can accurately adjust parameters such as load current and power, realize automatic switching of load conditions, and realize dynamic detection of the power board.

[0083] Power board feedback data refers to the real-time feedback data of the power board after the load control module inputs the power board test set. This includes the power board's output voltage, real-time current, and current ripple. The processing terminal detects the electrical signal information of the power board in real time using the power board detection units, such as voltage sensors and current sensors. After filtering the electrical signal information and converting it into a digital signal, the digital information is analyzed and determined to provide data support for the subsequent determination of the power board test results.

[0084] Step S103: Analyze the power board test set, power board parameter information, and power board feedback data to determine the power board test results.

[0085] The power board test result refers to the fault detection result of the power board under test, including no fault result or specific fault cause, etc. It is determined by the processing terminal through analysis of the power board test set, power board parameter information and power board feedback data. The specific analysis steps are as follows: Figure 4 The steps in the process.

[0086] Reference Figure 2 The steps for analyzing power board parameter information to determine the power board test set include:

[0087] Step S200: Extract power board parameter information to determine the power board model.

[0088] Among them, the power board model refers to the model of the power board under test. It is determined by the processing terminal by extracting the power board model information from the power board parameter information, so as to provide data support for the subsequent determination of historical device input.

[0089] Step S201: Search the preset historical database according to the power board model to determine the historical device input.

[0090] The historical database refers to a structured data set used to store historical information related to the power supply board, including the rated parameter range of each model of power supply board, historical input data of the devices connected to the power supply board, and historical fault records of the power supply board. It is determined by the operator after structuring and integrating the historical test data of the power supply board, the data records of the actual operation of the power supply board, and the historical fault reporting information of the power supply board.

[0091] Historical device input refers to the input data of devices that have been connected to this model of power board in the past. This includes the feedback data of the power board during actual operation after the device is connected, as well as input mode parameters such as operating current, operating power and device resistance during the operation of the connected device. The processing terminal determines this by querying the historical database to find the operating records, historical test data and input parameter information reported by the device for devices that have been connected to the same model of power board in the past.

[0092] Step S202: Generate a device test set based on historical device input.

[0093] The equipment test set refers to the set of power board test parameters that match the historical equipment input. This includes operating current, operating power, equipment resistance, and parameter simulation schemes that are consistent with the actual operation of the historical equipment input. After determining the historical equipment input, the processing terminal extracts the fluctuation range of operating current, operating power, and equipment resistance, as well as core data such as parameter jump amplitude, frequency, and timing from the historical equipment input. This ensures complete coverage of all key dimensions of the actual operation of the historical equipment. At the same time, the length of the dataset is controlled to avoid redundancy. Then, the test thresholds, operating condition switching logic, data acquisition nodes, and other test rules for each parameter are defined. Finally, these are integrated to form a standardized set of power board test parameters.

[0094] Step S203: Analyze the power board model, power board parameter information, and equipment test set to determine the power board test set.

[0095] The power board test set is consistent with the power board test set in step S101. After determining the equipment test set, the processing terminal analyzes the power board model and power board parameter information to determine the fault test set. Finally, the equipment test set and the fault test set are integrated and determined. The specific analysis steps are as follows: Figure 3 The steps in the process.

[0096] Reference Figure 3The steps for analyzing the power board model, power board parameter information, and equipment test set to determine the power board test set include:

[0097] Step S300: Extract power board parameter information to determine the power board's limiting parameters.

[0098] Among them, the power board limit parameters refer to the safe operating parameter boundaries of the power board, which are determined by the processing terminal after extracting the power board parameter information, and provide data support for subsequent determination of fault setting parameters.

[0099] Step S301: Search the historical database according to the power board model to determine the fault setting parameters.

[0100] Among them, the fault setting parameters refer to the fault parameter information of the same model of power board during actual operation, including the precursor parameters before the fault occurs and the output parameters when the power board fails. The processing terminal determines the fault parameter information by searching in the historical database according to the power board model.

[0101] Step S302: Determine whether the fault setting parameters are within the range of the power board's limited parameters.

[0102] Specifically, by processing the terminal to determine whether the fault setting parameters are within the power board's limited parameter range, it can be determined whether the power board is damaged due to its own fault, thus filtering out fault cases caused by the power board's own problems, thereby improving the relevance of the power board test set and the accuracy of power board testing.

[0103] Step S3021: If not, then remove the fault parameters of the power board.

[0104] If the processing terminal determines that the fault setting parameters are not within the power board's specified parameter range, it indicates that the power board fault is not caused by the power board itself, and therefore the power board fault parameters are removed.

[0105] Step S3022: If yes, then the power board fault parameter is determined as the reference fault parameter.

[0106] If the processing terminal determines that the fault setting parameters are within the power board's defined parameter range, it indicates that the power board fault is caused by its own reasons, and therefore the power board fault parameters are set as reference fault parameters.

[0107] Step S303: Determine the fault test set based on the reference fault parameters.

[0108] The fault test set refers to a standardized set of test parameters related to the power board's own fault damage. This includes fault precursor parameters corresponding to historical real faults, core output parameters when the fault occurs, and fault scenario reproduction schemes. After the processing terminal filters out the historical real fault data corresponding to its own fault damage, it extracts the fault precursor parameter range, the core output parameter threshold at the time of the fault, and the magnitude, frequency, and triggering timing of abnormal parameter changes from the historical fault data. This ensures complete coverage of all key scenarios and parameter characteristics of the historical faults. At the same time, the dataset length is controlled to avoid redundancy. Then, the test thresholds, operating condition switching logic, data acquisition nodes, and other test rules for each parameter are clarified. Finally, these are integrated to form a standardized set of power board fault test parameters.

[0109] Step S304: Integrate the device test set and the fault test set to determine the power board test set.

[0110] The power board test set is consistent with the power board test set in step S101. It is determined by the processing terminal after determining the equipment test set and the fault test set, and then integrating the equipment test set and the fault test set in sequence.

[0111] Reference Figure 4 The steps for analyzing the power board test set, power board parameter information, and power board feedback data to determine the power board test results include:

[0112] Step S400: Analyze the power board test set to determine the power board operating condition set.

[0113] The power board operating condition set refers to the set of operating conditions such as temperature and load rate corresponding to each test data in the power board test set. Depending on the specific operating condition classification, it can be divided into high temperature and high load operating conditions, high temperature and low load operating conditions, etc. The processing terminal determines the operating conditions based on the temperature and load rate data associated with each test data in the power board test set and the specific operating condition data.

[0114] Step S401: Determine the data fluctuation set for the power board operating condition set within the preset power board fluctuation threshold.

[0115] Among them, the power board fluctuation threshold refers to the fluctuation range table of the power board output data relative to the standard theoretical data, which is divided according to different operating conditions. It is determined by the operator based on the normal fluctuation records of the power board under the same operating conditions in the historical database and the power board limit parameter requirements.

[0116] The data fluctuation set refers to the set of allowable fluctuation ranges for each test data in the power board test set. It is determined by the processing terminal after matching each operating condition in the power board operating condition set with the power board fluctuation threshold.

[0117] Step S402: Input the power board parameter information and power board test set into the preset circuit analysis model to determine the theoretical output set.

[0118] Among them, the circuit analysis model refers to a pre-set professional model built based on circuit theory and power board design parameters. It can simulate the operating mechanism of the power board under different test conditions. After receiving power board parameter information and power board test set as input, it accurately outputs the theoretical output data of the power board under the corresponding operating conditions through calculation.

[0119] The theoretical output set refers to the set of theoretical output values ​​of each test data in the current power board test circuit. It is determined by the processing terminal by inputting the power board parameter information and the power board test set into the circuit analysis model, providing data support for subsequent judgment of power board fault conditions.

[0120] Step S403: Calculate the sum of the theoretical output set and the data fluctuation set to determine the fault-free parameter range.

[0121] Among them, the fault-free parameter range refers to the range of fault-free parameters corresponding to each test data in the power board test set, which is determined by the processing terminal through the sum of the theoretical output set and the data fluctuation set.

[0122] Step S404: Determine whether the power board feedback data is within the fault-free parameter range.

[0123] Specifically, by processing the terminal to determine whether the power board feedback data is within the fault-free parameter range, the system can determine whether the power board under test is faulty based on theoretical values ​​and fluctuation ranges, thereby improving the accuracy of power board fault detection.

[0124] Step S4041: If yes, then the preset power board fault-free result is defined as the power board detection result.

[0125] If the power board feedback data is determined by the processing terminal to be within the fault-free parameter range, it indicates that the power board under test is fault-free. Therefore, the fault-free result of the power board is defined as the power board test result.

[0126] A power board fault-free result means that the power board has no faults and can be used normally.

[0127] Step S4042: If not, analyze the power board test set, fault-free parameter range, power board parameter information, and power board feedback data to determine the power board test results.

[0128] If the processing terminal determines that the power board feedback data is outside the fault-free parameter range, it indicates a fault in the power board. Therefore, the power board test set, fault-free parameter range, power board parameter information, and power board feedback data are analyzed to determine the source of the power board fault, thereby further confirming the power board detection results and improving the accuracy of power board fault detection. Specific analysis steps are detailed below. Figure 5 The steps in the process.

[0129] Reference Figure 5 The steps for analyzing the power board test set, fault-free parameter range, power board parameter information, and power board feedback data to determine the power board test results include:

[0130] Step S500: Perform deviation analysis based on the power board feedback data and the fault-free parameter range to determine the feedback deviation data.

[0131] Among them, the feedback deviation data refers to the deviation between the power board feedback data and the fault-free data. The processing terminal determines the deviation items in the power board feedback data that are outside the fault-free parameter range based on the fault-free parameter range, and then compares the specific values ​​corresponding to the deviation items with the fault-free parameter range item by item to calculate the deviation.

[0132] Step S501: Obtain historical fault parameters.

[0133] Among them, historical fault parameters refer to the power board input parameters corresponding to all possible fault conditions of the power board. The processing terminal searches the historical database according to the power board fault category and integrates the data according to the fault type to determine the parameters.

[0134] Step S502: Perform deviation analysis on historical fault parameters, power board parameter information, and power board fluctuation threshold to determine historical deviation data.

[0135] Historical deviation data refers to the deviation between the output parameters of the faulty power supply board and the data without faults. The processing terminal first analyzes the historical fault parameters and power supply board parameter information circuit to determine the theoretical output value of the faulty power supply board. Then, based on the historical fault parameters and the power supply board fluctuation threshold, it determines the fluctuation data of the faulty power supply board. Based on the fluctuation data and the theoretical output value, it determines the non-faulty output range. Finally, it performs deviation analysis on the non-faulty output range and the historical fault parameters.

[0136] Step S503: Input the feedback deviation data and historical deviation data into the preset weighted similarity model to determine the fault similarity.

[0137] The weighted similarity model refers to assigning corresponding weights to each parameter dimension based on the importance of different deviation parameters, such as voltage deviation, current deviation, and power deviation, in fault determination. Then, the two sets of data are weighted and calculated using algorithms such as cosine similarity and weighted Euclidean distance, and finally outputting a calculation model that reflects the degree of similarity between the two.

[0138] Fault similarity refers to the degree of similarity between feedback deviation data and historical deviation data. It is used to reflect the probability of power board fault sources, thereby improving the efficiency of power board fault detection. The processing terminal inputs the feedback deviation data and historical deviation data into the weighted similarity model to determine the similarity.

[0139] Step S504: Analyze the power board test set, fault similarity, and historical fault parameters to determine the power board test results.

[0140] After determining the fault similarity, the fault sources of the power board under test are screened in order of fault similarity ranking. The power board test set and historical fault parameters are combined to finally determine the power board detection result, thereby improving the power board detection efficiency and accuracy.

[0141] Reference Figure 6 The steps for analyzing the power board test set, fault similarity, and historical fault parameters to determine the power board test results include:

[0142] Step S600: Perform numerical analysis on the fault similarity to determine the first similarity and the second similarity.

[0143] Among them, the first similarity refers to the largest fault similarity, which is determined by the processing terminal through numerical analysis of fault similarity, sorting them in order of size, and selecting the largest data.

[0144] Secondary similarity refers to the fault similarity remaining after removing the primary similarity. The processing terminal performs numerical analysis on the fault similarity data, sorts the fault similarities according to their size, removes the largest similarity data, and the remaining data are the secondary similarities.

[0145] Step S601: Determine the first fault type and first fault parameter corresponding to the first similarity in the historical fault parameters based on the first similarity.

[0146] The first fault type refers to the fault type with the highest similarity to the fault of the power supply board under test. It is determined by the processing terminal after determining the first similarity, based on the fault category of the historical fault parameters corresponding to the first similarity.

[0147] The first fault parameter refers to the fault input parameter with the highest similarity to the fault of the power supply board under test. After determining the first similarity, the processing terminal searches for and determines the fault parameter in the historical fault parameters according to the fault type corresponding to the first similarity.

[0148] Step S602: Input the first fault parameter into the preset fault learning model to determine the quantified fault trend.

[0149] Among them, the fault learning model refers to an intelligent analysis model trained based on historical fault parameters. Its core is to learn the parameter change patterns and correlation characteristics of historical fault development through algorithms. After receiving the first fault parameter input, it analyzes the evolution trend of the parameter and quantifies the development trend, severity and impact range of the fault.

[0150] The quantitative fault trend refers to the quantitative characteristics of the data fluctuation of the fault type corresponding to the first fault parameter, such as the current fluctuation amplitude stabilizing at 3%, which is determined by the processing terminal by inputting the first fault parameter into the fault learning model.

[0151] Step S603: Analyze the power board test set and quantified fault trends to determine the fault verification dataset.

[0152] The fault verification dataset refers to a test set used for secondary testing of the power board under test to verify whether the source of the power board fault is the primary fault type, thereby improving the accuracy of power board fault detection. It is determined by the processing terminal through analysis of the power board test set and quantified fault trends. Specific analysis steps are detailed in [reference needed]. Figure 7 The steps in the process.

[0153] Step S604: Control the load control module to test the power board under test according to the fault verification dataset to determine the fault verification result.

[0154] Among them, the fault verification result refers to the verification feedback data of the power board under test for the first fault type. The processing terminal controls the load control module to test the power board under test based on the fault verification dataset, and the feedback data of the power board is determined to provide data support for the subsequent determination of the power board test result.

[0155] Step S605: Determine whether the fault verification results conform to the quantitative fault trend.

[0156] Specifically, by processing the terminal to determine whether the fault verification result conforms to the quantified fault trend, it is determined whether the fault type of the power board under test is the first fault type. Then, the fault type is verified according to the quantified fault trend, thereby improving the accuracy of fault detection.

[0157] Step S6051: If the condition is met, the power board detection result is determined as the first fault type.

[0158] If the power board test result is determined to conform to the quantified fault trend through the processing terminal, it indicates that the fault type of the power board under test is the first fault type, and therefore the power board test result is determined to be the first fault type.

[0159] Step S6052: If it does not meet the requirements, the secondary similarity is updated to the first similarity one by one, and the first similarity is analyzed cyclically to determine the power board detection result.

[0160] If the fault verification result is determined by the processing terminal to be inconsistent with the quantified fault trend, the secondary similarity is updated to the first similarity one by one, and the first similarity is analyzed in a loop to determine the power board detection result. Then, the faults are screened one by one according to the size of the fault similarity, and finally the fault type of the power board under test is determined, thereby improving the power board fault detection efficiency.

[0161] Reference Figure 7 The steps for analyzing the power board test set and quantified fault trends to determine the fault verification dataset include:

[0162] Step S700: Analyze the quantitative fault trend to determine the univariate change trend.

[0163] Among them, the trend of univariate change refers to

[0164] Step S701: Perform data analysis on the univariate change trend to determine the univariate type and effective range of change.

[0165] Among them, the single variable type refers to the evolution state of a single fault-related core parameter extracted from the quantitative fault trend. It is presented with quantifiable features such as the direction of increase or decrease in value, the rate of change, and whether it approaches the threshold. The processing terminal first decomposes the quantitative fault trend into parameters, locates each independent fault core parameter, extracts the specific change features of the parameter, and finally determines the single parameter evolution type based on the feature attributes.

[0166] The effective range of variation refers to the effective range of variation of a single core parameter. The parameter changes within this range have practical reference significance. They will not deviate from the actual working conditions due to data distortion, nor will the trend of change be exaggerated due to abnormal interference. The processing terminal first extracts the target core parameter from the trend of single variable change, and then combines the power board fluctuation threshold, historical normal records under the same working conditions, and fault judgment criteria to eliminate distorted data and exaggerated interference items before determining the effective range of variation.

[0167] Step S702: Extract data from the power board test set to determine the basic test set.

[0168] The basic test set is consistent with the device test set in step S202. It is determined by the processing terminal through data extraction of the device test set in the power board test set and is the basic data for generating the fault verification dataset.

[0169] Step S703: Perform targeted univariate adjustment on the base test set according to the univariate type and effective range of variation to determine the fault verification dataset.

[0170] In this process, after determining the type of univariate and the effective range of variation, an average step size is set according to the effective range of variation. The parameters corresponding to the type of univariate in the basic test set are adjusted within the effective range of variation according to the average step size to generate a series of univariate variation data, which is the fault verification dataset. This decomposes the overall trend into univariate trends, and the faults are verified synchronously based on the univariate trends, thereby improving the accuracy of fault verification.

[0171] Based on the same inventive concept, embodiments of this application provide a power board detection system, including:

[0172] The acquisition module is used to acquire power board parameter information and historical fault parameters;

[0173] A memory used to store a program for a power board detection method;

[0174] The processor and memory can load and execute programs to implement a power board detection method.

[0175] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional modules is used as an example. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. The specific working process of the system, device, and unit described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0176] This application provides a computer-readable storage medium storing a computer program that can be loaded by a processor and executed as a power board detection method.

[0177] Computer storage media include, for example, USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, optical disks, and other media that can store program code.

[0178] Based on the same inventive concept, embodiments of this application provide a smart terminal, including a memory and a processor, wherein the memory stores a computer program that can be loaded and executed by the processor to perform a power board detection method.

[0179] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional modules is used as an example. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. The specific working process of the system, device, and unit described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0180] The above are all preferred embodiments of this application and are not intended to limit the scope of protection of this application. Any feature disclosed in this specification (including the abstract and drawings) may be replaced by other equivalent or similar features unless specifically stated otherwise. That is, unless specifically stated otherwise, each feature is only one example of a series of equivalent or similar features.

Claims

1. A power board testing method, characterized in that, include: Obtain the power board parameter information of the preset power board under test; Analyze the power board parameter information to determine the power board test set; The preset load control module tests the power board under test according to the power board test set to determine the power board feedback data. The power board test set, power board parameter information, and power board feedback data are analyzed to determine the power board test results. The steps for analyzing the power board test set, power board parameter information, and power board feedback data to determine the power board test results include: The power board test set is analyzed to determine the power board operating condition set; The data fluctuation set is determined within the preset power board fluctuation threshold for the power board operating condition set. Input the power board parameter information and power board test set into the preset circuit analysis model to determine the theoretical output set; The sum of the theoretical output set and the data fluctuation set is calculated to determine the fault-free parameter range; Determine whether the power board feedback data is within the fault-free parameter range; If so, the preset power board fault-free result is defined as the power board detection result; If not, the power board test set, fault-free parameter range, power board parameter information, and power board feedback data are analyzed to determine the power board test results. The steps for analyzing the power board test set, fault-free parameter range, power board parameter information, and power board feedback data to determine the power board test results include: Deviation analysis is performed based on power board feedback data and fault-free parameter range to determine feedback deviation data; Obtain historical fault parameters; Deviation analysis is performed on historical fault parameters, power board parameter information, and power board fluctuation thresholds to determine historical deviation data. Feedback deviation data and historical deviation data are input into a preset weighted similarity model to determine fault similarity; The power board test set, fault similarity, and historical fault parameters are analyzed to determine the power board test results. The steps for analyzing the power board test set, fault similarity, and historical fault parameters to determine the power board test results include: Numerical analysis of fault similarity is performed to determine the first and second similarity. Based on the first similarity, determine the first fault type and the first fault parameter corresponding to the first similarity in the historical fault parameters; The first fault parameter is input into the preset fault learning model to determine the quantified fault trend; The power board test set and quantified fault trends were analyzed to determine the fault verification dataset; The load control module tests the power supply board under test based on the fault verification dataset to determine the fault verification results. Determine whether the fault verification results conform to the quantitative fault trend; If the conditions are met, the power board test result will be identified as the first fault type. If the results do not meet the requirements, the secondary similarity will be updated to the first similarity one by one, and the first similarity will be analyzed iteratively to determine the power board detection result. The steps for analyzing the power board test set and quantified fault trends to determine the fault verification dataset include: Analyze the quantitative failure trend to determine the univariate change trend; Data analysis is performed on the changing trends of univariates to determine the type of univariate and the effective range of variation. Data is extracted from the power board test set to determine the basic test set; The base test set is univariately adjusted based on the univariate type and effective range of variation to determine the fault verification dataset.

2. The power board testing method according to claim 1, characterized in that, The steps for analyzing power board parameter information to determine the power board test set include: Extract power board parameter information to determine the power board model; The system searches a preset historical database based on the power board model to determine the historical device input. Generate a device test set based on historical device input; The power board model, power board parameter information, and equipment test set are analyzed to determine the power board test set.

3. The power board testing method according to claim 2, characterized in that, The steps for analyzing the power board model, power board parameter information, and device test set to determine the power board test set include: Extract power board parameter information to determine the power board's limiting parameters; Search the historical database based on the power board model to determine the fault setting parameters; Determine whether the fault setting parameters are within the range of the power board's specified parameters; If not, then remove the fault parameters of the power board; If so, then the fault parameters of that power board shall be determined as the reference fault parameters; Determine the fault test set based on reference fault parameters; Integrate the device test set and the fault test set to determine the power board test set.

4. A power board detection system, characterized in that, include: The acquisition module is used to acquire power board parameter information; A memory for storing a program for a power board detection method as described in any one of claims 1 to 3; The processor and the program in the memory can be loaded and executed by the processor to implement the power board detection method as described in any one of claims 1 to 3.

5. A smart terminal, characterized in that, It includes a memory and a processor, wherein the memory stores a computer program that can be loaded by the processor and executed as described in any one of claims 1 to 3.

6. A computer-readable storage medium, characterized in that, The computer program is stored and can be loaded by a processor and executed as described in any one of claims 1 to 3.

Images