Infrared detector and preparation method thereof

Abstract

The invention discloses an infrared detector and a preparation method thereof, and relates to the technical field of infrared detectors. The preparation method comprises the following steps: providing a readout circuit wafer; depositing a sacrificial layer on the top surface of the readout circuit wafer, and sequentially carrying out photoetching treatment, deposition treatment and etching treatment on the sacrificial layer to prepare a first semiconductor device; sequentially depositing a second metal layer and a third metal layer on the supporting layer; depositing a protective layer on the third metal layer, and performing photoetching treatment and etching treatment on the protective layer by using a first mask to prepare an etched protective layer; performing photoetching treatment and etching treatment on the third metal layer by using the etching protection layer as a hard mask plate to prepare an etched metal layer; and carrying out photoetching treatment and etching treatment on the second metal layer to prepare the infrared detector. According to the invention, no additional mask needs to be added, the process steps are simplified, the unnecessary process redundancy is reduced, the production efficiency is improved, and the production cost is remarkably reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of infrared detector, in particular to an infrared detector and a preparation method thereof. BACKGROUND

[0002] As an important photoelectric detector, the infrared detector is widely used in military, civil, medical, environmental protection and other fields for the detection of temperature, infrared radiation or image imaging. The traditional infrared detector generally uses semiconductor materials (such as silicon, vanadium oxide, etc.) as a heat sensing layer to convert infrared radiation into an electrical signal through the thermoelectric effect. However, in the manufacturing process of high-sensitivity infrared detectors, due to the multi-layer metal structure and the electrical contact between different metal layers, the preparation process is difficult, which easily leads to low yield, low production efficiency and unstable electrical performance.

[0003] In the prior art, the deposition, lithography and etching of the metal layer are the core steps in the preparation of the infrared detector. In the multi-layer metal structure, aluminum is commonly used as a conductive metal to connect the circuit and realize signal transmission. However, aluminum metal is easily affected by etching residual reactants, wet cleaning liquid and oxides, and is prone to corrosion, oxidation and unstable electrical performance, especially in the etching and cleaning process, because the surface activity of aluminum is high, the metal sidewall is easily corroded after being exposed, thereby affecting the overall performance of the infrared detector. In addition, during the lithography and etching process, due to the small size and large depth of the first through hole, the etching gas is difficult to completely remove, which usually leads to post-corrosion of the sidewall metal aluminum. And in the process of lithography and etching treatment of the metal aluminum layer and the metal titanium layer, the cleaning of the photoresist protective film needs to be carried out multiple times, which further leads to oxidation and corrosion of the metal layer. SUMMARY

[0004] One object of the first aspect of the present application is to provide a preparation method of an infrared detector, which solves the technical problem that the etching of metal aluminum before the etching of metal titanium in the prior art will affect the sidewall aluminum of the contact hole, leading to corrosion of the sidewall aluminum.

[0005] Another object of the first aspect of the present application is to ensure that the metal surface after etching is flat, which reduces the contact resistance of the device and improves the stability of current conduction.

[0006] An object of the second aspect of the present application is to provide an infrared detector prepared according to the above preparation method.

[0007] According to the object of the first aspect of the present application, the present application provides a preparation method of an infrared detector, comprising: providing a readout circuit wafer, the readout circuit wafer comprising a substrate layer and an insulating layer arranged in a stack from bottom to top, the insulating layer being provided with a first metal layer; A sacrificial layer is deposited on the top surface of the readout circuit wafer, and the sacrificial layer is sequentially subjected to photolithography treatment, deposition treatment and etching treatment to obtain a first semiconductor device with a support layer, the first semiconductor device further comprising a thermistor in the support layer, and the support layer having a plurality of first through holes communicating with the first metal layer and a plurality of second through holes communicating with the thermistor; A second metal layer and a third metal layer are sequentially deposited on the support layer, so that the second metal layer and the third metal layer are connected with the first metal layer through the first through holes; A protective layer is deposited on the third metal layer, and the protective layer is subjected to photolithography treatment and etching treatment using a first mask to obtain an etching protective layer with a predetermined pattern; The third metal layer is subjected to photolithography treatment and etching treatment using the etching protective layer as a hard mask to obtain an etching metal layer; The second metal layer is subjected to photolithography treatment and etching treatment to obtain the infrared detector; wherein, The first mask is a photolithography mask for the third metal layer, the material of the protective layer is silicon nitride, and the materials of the first metal layer and the third metal layer are aluminum.

[0008] Optionally, in the step of using the first mask to perform photolithography treatment and etching treatment on the protective layer, the radio frequency power of the etching treatment is any value in the range of 300W-1600W, the pressure is any value in the range of 20mTorr-100mTorr, the CHF3 flow rate is any value in the range of 10sccm-100sccm, and the CF4 flow rate is any value in the range of 50sccm-100sccm.

[0009] Optionally, the O2 flow rate of the etching treatment is any value in the range of 5sccm-50sccm, and the Ar flow rate is any value in the range of 10sccm-500sccm.

[0010] Optionally, the deposition process of the protective layer is any one of plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition or atomic layer deposition.

[0011] Optionally, the deposition process of the second metal layer and the third metal layer is any one of sputtering deposition process, electron beam evaporation process or atomic layer deposition process.

[0012] Optionally, the etching treatment of the etching metal layer is chlorine-based plasma etching.

[0013] Optionally, the etching gas of the chlorine-based plasma etching is a mixed gas of chlorine, argon and boron trichloride.

[0014] Optionally, the chlorine gas flow rate is any value ranging from 10sccm to 50sccm, the boron trichloride flow rate is any value ranging from 10sccm to 50sccm, and the argon gas flow rate is any value ranging from 10sccm to 150sccm.

[0015] Optionally, the thickness of the protective layer is any value ranging from 100A to 200A.

[0016] According to the purpose of the second aspect of the present application, the present application further provides an infrared detector prepared according to any one of the above preparation methods.

[0017] The present application simplifies the process steps and reduces unnecessary process redundancy by depositing a silicon nitride protective layer on the third metal layer and using the same mask for etching the silicon nitride protective layer pattern in the process flow, without the need for additional mask addition, thereby improving production efficiency, significantly reducing production cost, and ensuring the success rate of tape-out. In addition, the silicon nitride protective layer successfully solves the problems of post-corrosion, oxidation, and unstable electrical performance of the aluminum metal layer during the manufacturing process of the infrared detector by combining multi-step photolithography and etching processes. The silicon nitride protective layer plays a key role in multiple process steps, thereby significantly improving the performance, production efficiency, and reliability of the infrared detector.

[0018] Further, the etching treatment of the etching metal layer is chlorine-based plasma etching, which can achieve high selectivity and high anisotropy etching of the aluminum metal layer, significantly improving the etching precision and edge definition of the metal pattern. At the same time, chlorine-based plasma etching can achieve high etching rate at relatively low temperature, which can effectively avoid re-oxidation or grain coarsening of the metal layer at high temperature, thereby ensuring the flatness of the metal surface after etching, reducing the device contact resistance, and improving the current conduction stability.

[0019] The above description is only a summary of the technical solutions of the present application. In order to more clearly understand the technical means of the present application, and to implement the content of the description, the following will describe the preferred embodiments of the present application in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0020] Some specific embodiments of the present application will be described in detail hereinafter with reference to the accompanying drawings, which are exemplary but not limiting. It should be understood by those skilled in the art that these drawings are not necessarily drawn to scale. In the drawings: Figure 1 is a schematic flowchart of a preparation method of an infrared detector according to an embodiment of the present application; Figure 2 is a schematic structural diagram of an infrared detector according to an embodiment of the present application; Figure 3 This is a schematic structural diagram of a first semiconductor device according to an embodiment of the present invention; Figure 4 This is a schematic structural diagram of a first semiconductor device with a second metal layer and a third metal layer deposited according to an embodiment of the present invention; Figure 5 This is a schematic structural diagram of a first semiconductor device with a deposited protective layer according to an embodiment of the present invention; Figure 6 This is a schematic diagram of the device structure prepared in step S400 according to one embodiment of the present invention; Figure 7 This is a schematic diagram of the device structure prepared in step S600 according to one embodiment of the present invention; Figure 8 This is a schematic device structure diagram of a first silicon nitride layer and a second silicon nitride layer according to an embodiment of the present invention.

[0021] Figure label: 100 - Infrared detector, 10 - Readout circuit wafer, 11 - Substrate, 12 - Insulating layer, 13 - First metal layer, 20 - Sacrificial layer, 30 - First semiconductor device, 31 - Support layer, 32 - Thermistor, 311 - First via, 312 - Second via, 313 - First silicon nitride layer, 314 - Second silicon nitride layer, 315 - Third silicon nitride layer, 40 - Second metal layer, 50 - Third metal layer, 60 - Protective layer. Detailed Implementation

[0022] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following examples are for illustrative purposes only and are not intended to limit the scope of the invention.

[0023] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, it should be noted that, for ease of description, only the parts relevant to this application are shown in the accompanying drawings, not the entire structure. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of this application.

[0024] The terms “comprising” and “having”, and any variations thereof, used in this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0025] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0026] Figure 1 This is a schematic flowchart illustrating a method for fabricating an infrared detector according to an embodiment of the present invention. Figure 2 This is a schematic structural diagram of an infrared detector according to an embodiment of the present invention. Figure 3 This is a schematic structural diagram of a first semiconductor device according to an embodiment of the present invention. Figure 4 This is a schematic structural diagram of a first semiconductor device with a second metal layer and a third metal layer deposited according to an embodiment of the present invention. Figure 5 This is a schematic structural diagram of a first semiconductor device with a deposited protective layer according to an embodiment of the present invention. Figure 6 This is a schematic diagram of the device structure prepared in step S400 according to one embodiment of the present invention. Figure 7 This is a schematic diagram of the device structure prepared in step S600 according to one embodiment of the present invention. Figure 8 This is a schematic device structure diagram of a first silicon nitride layer and a second silicon nitride layer according to an embodiment of the present invention.

[0027] like Figure 1 As shown, the present invention provides a method for manufacturing an infrared detector 100, comprising: Step S100: Provide a readout circuit wafer 10 (refer to...) Figure 2 The readout circuit wafer 10 includes a substrate layer 11 and an insulating layer 12 arranged sequentially from bottom to top, and a first metal layer 13 is provided in the insulating layer 12. Step S200: A sacrificial layer 20 is deposited on the top surface of the readout circuit wafer 10, and the sacrificial layer 20 is sequentially subjected to photolithography, deposition, and etching processes to fabricate a first semiconductor device 30 with a support layer 31 (see reference). Figure 3The first semiconductor device 30 also includes a thermistor 32 located in the support layer 31, and the support layer 31 has a plurality of first through holes 311 communicating with the first metal layer 13 and a plurality of second through holes 312 communicating with the thermistor 32. Step S300: Sequentially deposit the second metal layer 40 and the third metal layer 50 on the support layer 31 (refer to...) Figure 4 ), so that the second metal layer 40 and the third metal layer 50 are connected to the first metal layer 13 through the first through hole 311; Step S400: Deposit a protective layer 60 on the third metal layer 50 (refer to...) Figure 5 The protective layer 60 is then photolithographically and etched using the first mask to prepare an etched protective layer 60 with a preset pattern (see reference). Figure 6 ); Step S500: Using the etching protective layer 60 as a hard mask, the third metal layer 50 is subjected to photolithography and etching to prepare the etched metal layer. Step S600: Perform photolithography and etching on the second metal layer 40 to fabricate the infrared detector 100 (refer to...). Figure 7 The first photomask is the photolithography photomask of the third metal layer 50, the protective layer 60 is made of silicon nitride, and the first metal layer 13 and the third metal layer 50 are made of aluminum.

[0028] In this embodiment, the method for fabricating the infrared detector 100 firstly provides a readout circuit wafer 10. The readout circuit wafer 10 includes a substrate layer 11 and an insulating layer 12 stacked sequentially from bottom to top. A first metal layer 13 is disposed within the insulating layer 12, and the insulating layer 12 is made of silicon oxide. Then, a sacrificial layer 20 is deposited on the top surface of the readout circuit wafer 10, and the sacrificial layer 20 is subjected to photolithography, deposition, and etching processes sequentially to fabricate a first semiconductor device 30 with a support layer 31. The first semiconductor device 30 also includes a thermistor 32 located within the support layer 31, and the support layer 31 has a plurality of first vias 311 connecting the first metal layer 13 and a plurality of second vias 312 connecting the thermistor 32. Next, on the support layer 31... A second metal layer 40 and a third metal layer 50 are deposited sequentially. The second metal layer 40 is a titanium layer, and the third metal layer 50 is an aluminum layer, so that the second metal layer 40 and the third metal layer 50 are connected to the first metal layer 13 through the first via 311. Then, a protective layer 60 is deposited on the third metal layer 50. The protective layer 60 is made of silicon nitride. The protective layer 60 is photolithographically etched and etched using the first mask, i.e., the photolithographic mask of the third metal layer 50, to prepare an etched protective layer 60 with a preset pattern. Then, the etched protective layer 60 is used as a hard mask to photolithographically etch and etch the third metal layer 50 to prepare an etched metal layer. Finally, the second metal layer 40 is photolithographically etched and etched to prepare the infrared detector 100.

[0029] In this embodiment, by depositing a silicon nitride protective layer 60 on the third metal layer 50 and using the same mask as the third metal layer 50 to complete the etching of the silicon nitride protective layer 60 pattern in the process flow, no additional mask is required, simplifying the process steps, reducing unnecessary process redundancy, improving production efficiency, significantly reducing production costs, and ensuring a higher wafer fabrication success rate. Furthermore, the silicon nitride protective layer 60, combined with multi-step photolithography and etching processes, successfully solves the problems of post-corrosion, oxidation, and unstable electrical performance faced by the aluminum metal layer in the manufacturing process of the infrared detector 100. The silicon nitride protective layer 60 plays a key role in multiple process steps, thereby significantly improving the performance, production efficiency, and reliability of the infrared detector 100.

[0030] In this embodiment, by depositing a silicon nitride protective layer 60, the layer effectively prevents the aluminum sidewall from contacting residual etching gas or cleaning fluid, thereby avoiding corrosion problems and ensuring the electrical stability of the aluminum metal. Furthermore, during the post-etching cleaning process of the second metal layer 40 and the third metal layer 50, the silicon nitride protective layer 60 remains effectively covering the surface of the third metal layer 50, preventing oxidation or corrosion problems caused by aluminum metal exposure to the cleaning fluid. In other words, by reducing the exposed area of ​​the aluminum metal surface, the silicon nitride protective layer 60 further improves the stability of the electrode interface, enhances the electrical performance consistency of the infrared detector 100, and effectively reduces metal oxidation problems caused by incomplete photoresist removal or cleaning fluid penetration, thereby greatly improving the yield.

[0031] In this embodiment, the introduction of the silicon nitride protective layer 60 isolates air and moisture, preventing surface oxidation of the aluminum metal during the etching process. This not only improves the selectivity of the etching process but also ensures high-precision etching of the multi-layer metal layers, avoiding electrical performance degradation or metal residue problems caused by oxidation. The silicon nitride protective layer 60 acts as a barrier, minimizing the chance of etching gas contacting the third metal layer 50, thereby improving the long-term reliability of the infrared detector 100.

[0032] In this embodiment, in step S200, the sacrificial layer 20 is first photolithographically processed to prepare a contact hole extending toward the first metal layer 13. Then, a first silicon nitride layer 313, a thermistor layer, and a second silicon nitride layer 314 are sequentially deposited on the contact hole and the surface of the sacrificial layer 20 (see reference). Figure 8 Next, the thermistor 32 is prepared by photolithography and etching of the thermistor layer and the second silicon nitride layer 314. Finally, the third silicon nitride layer 315 is deposited on the second silicon nitride layer 314, and the third silicon nitride layer 315 is prepared by photolithography and etching to obtain the first through hole 311.

[0033] In this embodiment, by setting a silicon nitride protective layer 60 on the surface of the third metal layer 50, problems such as incomplete etching, metal residue or residual adhesive are not avoided. Moreover, without the need for additional control of process interval time or the use of pre-run test wafers, the etching quality and pattern consistency can be ensured, which significantly improves process controllability.

[0034] In this embodiment, silicon nitride exhibits strong chemical stability, meaning it possesses excellent chemical inertness and density, effectively isolating it from air, moisture, and chemical reagents. This prevents it from being corroded by common acid and alkali solutions during etching and cleaning. Furthermore, the interface between silicon nitride and the third metal layer 50 is firmly bonded, preventing interface delamination issues. In addition, silicon nitride demonstrates good compatibility with the underlying third metal layer 50, the second metal layer 40, the support layer 31, and the substrate layer 11. Silicon nitride is a standard passivation layer material in microelectronic processes, compatible with common layer structures such as aluminum, titanium, and silicon oxide. Moreover, if subsequent bonding, encapsulation, or MEMS release steps are required, the silicon nitride layer can serve as both a protective layer 60 and an insulating layer.

[0035] In this embodiment, by adding a silicon nitride deposition step only after the third metal layer 50 is deposited, the previous support layer 31, sacrificial layer 20 and metal interconnect structure are not affected. There is no need to adjust the mask sequence or change the existing metal wiring design, which greatly ensures the compatibility and reusability of the original process. Moreover, the process can be quickly introduced into the original production line, with high equipment versatility and low R&D cost.

[0036] In this embodiment, after performing photolithography and etching on the second metal layer 40 using a third mask, the sacrificial layer 20 on top of the insulating layer 12 is removed to obtain the infrared detector 100. Here, the insulating layer 12 is made of silicon oxide, and the sacrificial layer 20 is made of polyimide.

[0037] In a further embodiment, in the step of photolithography and etching of the protective layer 60 using the first mask, the radio frequency power of the etching process is any value between 300W and 1600W, that is, the radio frequency power can be 300W, 400W, 500W, 600W, 700W, 800W, 900W, 1000W, 1100W, 1200W, 1300W, 1400W, 1500W, or 1600W, or any other value between 300W and 1600W. The pressure is any value between 20mTorr and 100mTorr, that is, the pressure can be 20mTorr, 30mTorr, 40mTorr, 50mTorr, 60mTorr, 70mTorr, 80mTorr, 90mTorr, or 100mTorr, or 20mTorr. The CHF3 flow rate is any value between -100mTorr and 100sccm, meaning the CHF3 flow rate can be 10sccm, 20sccm, 30sccm, 40sccm, 50sccm, 60sccm, 70sccm, 80sccm, 90sccm, or 100sccm, or any other value between 10sccm and 100sccm. The CF4 flow rate is any value between 50sccm and 100sccm, meaning the CF4 flow rate can be 50sccm, 55sccm, 60sccm, 65sccm, 70sccm, 75sccm, 80sccm, 85sccm, 90sccm, 95sccm, or 100sccm, or any other value between 50sccm and 100sccm. Under the synergistic effect of the above process conditions, there are very few surface residues after etching the silicon nitride protective layer 60, which will not form secondary pollution or residual adhesive during the subsequent etching of the third metal layer 50, thereby further ensuring the integrity and resistivity stability of the third metal layer 50 etching. Compared with traditional unoptimized etching conditions, this embodiment achieves a balance and synergy between the etching morphology of the protective layer 60, the etching selectivity, and the protective effect of the underlying metal layer without the need for additional process steps and photomasks, significantly improving the manufacturing yield and electrical consistency of the infrared detector 100.

[0038] In this embodiment, the radio frequency power is controlled within the range of 300W-1600W, allowing the energy of the plasma active ions to be flexibly adjusted according to the silicon nitride film thickness and etching depth, thereby achieving good etching rate control and sidewall morphology preservation. When the chamber pressure is maintained at 20mTorr-100mTorr, the etching directionality and timely removal of reaction products can be considered during the etching process, preventing fluorine radicals from remaining in the holes and causing uneven etching or localized corrosion.

[0039] In this embodiment, in the gas system, CHF3 gas is mainly used to provide CF radicals to achieve selective etching of silicon nitride. Simultaneously, the generated polymer can form a self-passivating layer on the sidewalls, improving the anisotropy of the etching. CF4 gas is mainly used to enhance the etching rate and remove residual polymer from the protective layer 60. By controlling the CF4 flow rate within the range of 50 sccm-100 sccm, the fluorine radical concentration ratio of CHF3 to CF4 is maintained within a suitable range. This maintains the etching rate while preventing excessive fluorination from corroding or oxidizing the underlying aluminum layer. Furthermore, the aforementioned parameter range synergizes with the structure of the silicon nitride protective layer 60 and its function as a hard mask, enabling high-precision pattern transfer of the protective layer 60 while maximally protecting the third metal layer 50 from plasma and etching gas erosion.

[0040] In a further embodiment, the O2 flow rate of the etching process is any value from 5 sccm to 50 sccm, that is, the O2 flow rate of the etching process can be 5 sccm, 10 sccm, 15 sccm, 20 sccm, 25 sccm, 30 sccm, 35 sccm, 40 sccm, 45 sccm or 50 sccm, or any other value from 5 sccm to 50 sccm. The Ar flow rate is any value from 0 sccm to 500 sccm, that is, the Ar flow rate can be 0 sccm, 5 sccm, 10 sccm, 15 sccm, 50 sccm, 100 sccm, 150 sccm, 200 sccm, 250 sccm, 300 sccm, 350 sccm, 400 sccm, 450 sccm or 500 sccm, or any other value from 5 sccm to 5 sccm. In this embodiment, by controlling the O2 flow rate within the range of 5 sccm-50 sccm, the balance between polymer generation and removal during the etching process can be effectively adjusted, ensuring the anisotropy of the etched pattern and surface cleanliness. By controlling the Ar flow rate within the range of 0 sccm-500 sccm, the plasma density and ion bombardment intensity can be enhanced, thereby improving the uniformity of the etching rate and the accuracy of the termination layer identification. The two work together to ensure that the sidewalls of the silicon nitride protective layer 60 are flat and the interface is clean after etching, and the underlying metal layer is not damaged, thereby improving the overall process stability and the yield of the infrared detector 100.

[0041] In a further embodiment, the deposition process of the protective layer 60 is any one of plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, or atomic layer deposition. In this embodiment, by selecting any one of plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, or atomic layer deposition to deposit the silicon nitride protective layer 60, a balance can be achieved between deposition temperature, film density, and interface stress control, resulting in a protective film structure with high density, low stress, and good adhesion to the metal layer. This effectively prevents oxidation or lateral etching of the metal layer during subsequent photolithography, etching, and cleaning processes, further improving the reliability of the protective layer 60.

[0042] In a further embodiment, the deposition process of the second metal layer 40 and the third metal layer 50 is any one of sputtering deposition, electron beam evaporation, or atomic layer deposition. In this embodiment, by employing any one of sputtering deposition, electron beam evaporation, or atomic layer deposition, the deposition method can be flexibly matched to the physical properties and structural requirements of different metal layer materials, achieving dense, uniform, strongly adhered, and interface-stable metal films, significantly improving conductivity, stress resistance, and structural reliability, thereby improving the signal transmission efficiency and overall device yield of the infrared detector 100.

[0043] In a further embodiment, the etching process for the metal layer is chlorine-based plasma etching. Since chlorine-based gas can react with aluminum metal in a plasma environment to form volatile aluminum chloride reaction products (chlorine-based gas can be Cl2 or BCl3), this etching method can achieve highly selective and anisotropic etching of the aluminum metal layer, significantly improving the etching accuracy and edge sharpness of the metal pattern. Simultaneously, chlorine-based plasma etching can achieve a high etching rate at relatively low temperatures, effectively avoiding re-oxidation or grain coarsening of the metal layer at high temperatures. This ensures a smooth metal surface after etching, reduces device contact resistance, and improves current conduction stability.

[0044] In this embodiment, the chlorine-based etching process works synergistically with the aforementioned silicon nitride protective layer 60 disposed on the metal layer to prevent chlorine plasma from laterally eroding the hole walls or underlying metal during the etching process, thus avoiding metal residue or hole wall corrosion problems caused by over-etching. Through this synergistic design, not only is the accuracy and consistency of the etched pattern transfer improved, but the integrity and conductivity reliability of the metal interconnect structure in the infrared detector 100 are also effectively guaranteed.

[0045] In a further embodiment, the etching gas used in the chlorine-based plasma etching is a mixture of chlorine, argon, and boron trichloride. In this embodiment, the synergistic effect of these gas components enables the metal layer etching process to possess high etching rate, high selectivity, and low residue characteristics, and to form a stable process matching relationship with the aforementioned silicon nitride protective layer 60. Specifically, the silicon nitride protective layer 60 exhibits high corrosion resistance in the boron trichloride and chlorine etching environment, effectively preventing the etching gas from eroding the underlying aluminum layer structure along the hole sidewalls, thereby preventing hole edge corrosion and post-corrosion problems. In this embodiment, chlorine in the mixed gas system is the main reactant gas, which can react chemically with aluminum metal to generate volatile aluminum chloride, thereby achieving highly selective chemical etching of the metal layer; boron trichloride can inhibit the redeposition of reaction products during the etching process and form a dense passivation layer on the metal sidewall to limit the lateral diffusion of etching and significantly improve the anisotropy of the etching morphology; while the introduction of argon can improve the uniformity of the etching rate through physical bombardment, help remove reaction residues, and further improve the cleanliness and contour accuracy of the etched area.

[0046] In a further embodiment, the chlorine flow rate is any value between 10 sccm and 50 sccm, that is, the chlorine flow rate can be 10 sccm, 15 sccm, 20 sccm, 25 sccm, 30 sccm, 35 sccm, 40 sccm, 45 sccm, or 50 sccm, or any other value between 10 sccm and 50 sccm. The boron trichloride flow rate is any value between 10 sccm and 50 sccm, that is, the boron trichloride flow rate can be 10 sccm, 15 sccm, 20 sccm, 25 sccm, 30 sccm, or 35 sccm. The argon flow rate can be any value between 10 sccm and 150 sccm, or 40 sccm, 45 sccm, or 50 sccm, or any other value between 10 sccm and 50 sccm. The argon flow rate can be any value between 10 sccm and 150 sccm, or 10 sccm, 15 sccm, 20 sccm, 25 sccm, 30 sccm, 50 sccm, 70 sccm, 90 sccm, 100 sccm, 110 sccm, 120 sccm, 130 sccm, 140 sccm, or 150 sccm, or any other value between 10 sccm and 150 sccm. In this embodiment, the coordinated control of the above three gas flow rates not only optimizes the etching rate and selectivity of the third metal layer 50, but also achieves good process compatibility with the silicon nitride protective layer 60. Furthermore, it can significantly enhance the reliability and yield of the metal interconnect structure of the infrared detector 100 while improving the etching rate and morphological accuracy, ensuring the overall device's electrical performance stability and production consistency.

[0047] In this embodiment, the silicon nitride protective layer 60 exhibits excellent corrosion resistance in the aforementioned etching gas system. It effectively blocks the erosion of the sidewalls by the reactive gas in structures with small apertures and large depths, preventing post-corrosion or lateral corrosion of the metal layer. Simultaneously, the addition of Ar improves etching stability, ensuring that the protective layer 60 maintains structural integrity even under repeated ion bombardment, further guaranteeing the consistency of the etching morphology and conductivity of the third metal layer 50.

[0048] In a further embodiment, the thickness of the protective layer 60 is any value between 100 Å and 200 Å, i.e., a preset thickness of 100 Å, 110 Å, 120 Å, 130 Å, 140 Å, 150 Å, 160 Å, 170 Å, 180 Å, 190 Å, or 200 Å, or any other value between 100 Å and 200 Å. In this embodiment, by limiting the thickness of the silicon nitride protective layer 60 to the above range, a dense and continuous protective film can be formed without affecting the resolution of subsequent photolithography and etching, effectively preventing oxidation or post-corrosion of the third metal layer 50 during etching and cleaning. At the same time, this thickness range can avoid structural warping and delamination problems caused by excessive stress on the silicon nitride protective layer 60, ensuring the mechanical stability and electrical reliability of the first semiconductor device 30, thereby achieving synergistic optimization of protective performance, etching accuracy, and process controllability, and further improving the yield and performance stability of the infrared detector 100.

[0049] like Figure 2 As shown, the present invention also provides an infrared detector 100, which is prepared according to any of the above-described methods. The preparation methods for the infrared detector 100 will not be described in detail here.

[0050] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0051] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A method for fabricating an infrared detector, characterized in that, include: A readout circuit wafer is provided, the readout circuit wafer comprising a substrate layer and an insulating layer stacked sequentially from bottom to top, wherein a first metal layer is disposed within the insulating layer; A sacrificial layer is deposited on the top surface of the readout circuit wafer, and the sacrificial layer is sequentially subjected to photolithography, deposition, and etching to prepare a first semiconductor device with a support layer. The first semiconductor device further includes a thermistor located in the support layer, and the support layer has a plurality of first vias communicating with the first metal layer and a plurality of second vias communicating with the thermistor. A second metal layer and a third metal layer are sequentially deposited on the support layer, such that the second metal layer and the third metal layer are connected to the first metal layer through the first via. A protective layer is deposited on the third metal layer, and the protective layer is subjected to photolithography and etching using a first mask to prepare an etched protective layer with a preset pattern. Using the etching protective layer as a hard mask, the third metal layer is subjected to photolithography and etching to prepare the etched metal layer. The second metal layer is subjected to photolithography and etching processes to prepare the infrared detector; wherein, The first photomask is the photolithographic photomask of the third metal layer, the protective layer is made of silicon nitride, and the first and third metal layers are made of aluminum.

2. The method for preparing an infrared detector according to claim 1, characterized in that, In the step of performing photolithography and etching on the protective layer using the first mask, the radio frequency power of the etching process is any value between 300W and 1600W, the pressure is any value between 20mTorr and 100mTorr, the CHF3 flow rate is any value between 10sccm and 100sccm, and the CF4 flow rate is any value between 50sccm and 100sccm.

3. The method for preparing an infrared detector according to claim 2, characterized in that, The O2 flow rate for the etching process is any value between 5 sccm and 50 sccm, and the Ar flow rate is any value between 10 sccm and 500 sccm.

4. The method for preparing an infrared detector according to claim 3, characterized in that, The deposition process of the protective layer is any one of plasma-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, or atomic layer deposition.

5. The method for preparing an infrared detector according to claim 4, characterized in that, The deposition process of the second metal layer and the third metal layer is any one of sputtering deposition, electron beam evaporation or atomic layer deposition.

6. The method for preparing an infrared detector according to any one of claims 1-5, characterized in that, The etching process for the etched metal layer is chlorine-based plasma etching.

7. The method for preparing an infrared detector according to claim 6, characterized in that, The etching gas used in the chlorine-based plasma etching is a mixture of chlorine, argon, and boron trichloride.

8. The method for preparing an infrared detector according to claim 7, characterized in that, The chlorine flow rate is any value between 10 sccm and 50 sccm, the boron trichloride flow rate is any value between 10 sccm and 50 sccm, and the argon flow rate is any value between 10 sccm and 150 sccm.

9. The method for preparing an infrared detector according to claim 1, characterized in that, The thickness of the protective layer is any value between 100 Å and 200 Å.

10. An infrared detector, characterized in that, The infrared detector is prepared by the method according to any one of claims 1-9.

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