Load current waveform extraction method, electronic equipment and storage medium

Abstract

The invention provides a load current waveform extraction method, electronic equipment and a storage medium, which are applied to the technical field of computers, and the method comprises the steps: carrying out the operation test of a simulation circuit model of a microprocessor architecture through a preset test set, and obtaining an initial load current waveform of the microprocessor architecture; waveform fragment extraction is carried out on the initial load current waveform by using a plurality of different time windows to obtain target current waveform fragments corresponding to the time windows, and finally each target current waveform fragment is determined as a target load current waveform of the microprocessor architecture. Because the duration of the time window is related to load current components of the initial load current waveform at different frequencies, the method utilizes a plurality of different time windows to carry out waveform fragment extraction on the initial load current waveform, can obtain load current waveforms corresponding to different frequency bands, and further comprehensively measures the load characteristics of the microprocessor architecture. The accuracy and reliability of PI simulation are improved, and the simulation test requirement is met.

Description

Technical Field

[0001] This application relates to the field of computer technology, and more specifically, to a method for extracting load current waveforms, an electronic device, and a storage medium. Background Technology

[0002] With continuous advancements in manufacturing processes, the power consumption and clock speed of microprocessor architectures have been steadily increasing. The impact of power supply noise on the operation of microprocessor architectures has become increasingly significant. Power integrity (PI) simulation can effectively detect power supply noise levels and has become a key verification method to ensure the stable operation of microprocessor architectures. PI simulation involves two main factors: the load current waveform of the microprocessor architecture and the circuit model of the power supply path of the microprocessor architecture. Therefore, the accuracy of the load current waveform plays a crucial role in the effectiveness of PI simulation.

[0003] The inventors discovered that existing load current waveform extraction methods mostly focus on high-frequency load current components, without covering the load current components corresponding to the power supply path components such as the packaging substrate and motherboard in the load current waveform. This makes it difficult for the extracted load current waveform to comprehensively measure the load characteristics of the microprocessor architecture, resulting in low accuracy and reliability of PI simulation, which is difficult to meet simulation testing requirements. Summary of the Invention

[0004] The purpose of this application is to provide a load current waveform extraction method, electronic device, and storage medium, which can obtain a load current waveform that is easier to analyze the load characteristics of a microprocessor, thereby improving the accuracy and reliability of PI simulation.

[0005] In a first aspect, this application provides a load current waveform extraction method, applied to power integrity assessment during the pre-silicon verification process of microprocessor architecture, the method comprising: The simulation circuit model of the microprocessor architecture is run and tested using a preset test set to obtain the initial load current waveform of the microprocessor architecture. Waveform segments are extracted from the initial load current waveform using multiple different time windows to obtain target current waveform segments corresponding to each time window, wherein the duration of any time window is less than the duration of the initial load current waveform. Each of the target current waveform segments is identified as the target load current waveform of the microprocessor architecture, so as to perform a power integrity assessment of the microprocessor architecture based on the target load current waveform.

[0006] The load current waveform extraction method provided in this application, after obtaining the initial load current waveform by running the simulation circuit model of the microprocessor architecture through a preset test set, extracts waveform segments from the initial load current waveform using multiple different time windows to obtain the target current waveform segments corresponding to each time window. These target current waveform segments are then identified as the target load current waveforms for the microprocessor architecture, allowing for power integrity evaluation of the microprocessor architecture based on the target load current waveforms. Generally, the duration of the time window is related to the load current components of the initial load current waveform at different frequencies; for example, a longer time window corresponds to a lower frequency of the load current component, while a shorter time window corresponds to a higher frequency. This method sets multiple different time windows and extracts waveform segments within each time window to obtain load current waveforms corresponding to different frequency bands. In this way, the load characteristics of the microprocessor architecture can be comprehensively measured, which helps improve the accuracy and reliability of PI simulation and meets simulation testing requirements.

[0007] In one optional implementation, the step of extracting waveform segments from the initial load current waveform using multiple different time windows to obtain target current waveform segments corresponding to each time window includes: Obtain the VCD file corresponding to the microprocessor architecture. The VCD file is used to record the transistor switching amount of the simulation circuit model at different test times. The transistor switching amount is used to characterize the load current of the microprocessor architecture. The VCD file is used to extract file segments using multiple different time windows to obtain the target file segments corresponding to each time window; The initial load current waveform is extracted using each of the target file segments to obtain the target current waveform segments corresponding to each of the target file segments.

[0008] In the load current waveform extraction method provided in this application, the VCD file records the transistor switching amounts during the operation and testing of the simulation circuit model of the microprocessor architecture, and the transistor switching amounts can characterize the changes in the load current of the microprocessor architecture. By extracting waveform segments based on the VCD file corresponding to the microprocessor architecture, the extracted results from the VCD file correspond to the extracted initial load current waveform. In this way, the extraction process can be simplified, and the extraction efficiency of the load current waveform can be improved.

[0009] In one optional implementation, the process of extracting file segments from the VCD file using any of the aforementioned time windows to obtain the target file segment corresponding to that time window includes: The VCD file is subjected to multiple file segment extractions according to the time range corresponding to the time window, resulting in multiple file segments, wherein each file segment has a different start time. Based on the transistor toggling amount recorded in each of the file segments, the target file segment corresponding to the time window is determined in each of the file segments.

[0010] In the load current waveform extraction method provided in this application, for each time window, the VCD file is extracted multiple times according to the time range corresponding to the time window to obtain multiple file segments corresponding to the time window. The target file segment corresponding to the time window is determined according to the transistor switching amount recorded in each file segment. By traversing all time windows, the target file segment corresponding to each time window can be obtained. For any time window, the process of extracting the corresponding file segment is carried out according to the time range of the time window. Therefore, it can be ensured that the duration of each file segment is equal. This setting can not only simplify the file segment truncation process, but also ensure the consistency of each file segment, which helps to simplify the subsequent waveform segment extraction process.

[0011] In one optional implementation, the VCD file is subjected to multiple file segment extractions according to the time range corresponding to the time window, resulting in multiple file segments, including: The transistor toggling amounts recorded in the VCD file are sampled according to a preset sampling period to obtain a VCD sample file; The VCD sample file is extracted multiple times according to the time range corresponding to the time window to obtain multiple file segments. The duration of the preset sampling period is less than the duration of the time window.

[0012] In the load current waveform extraction method provided in this application, the transistor switching amounts recorded in the VCD file are sampled according to a preset sampling period. The resulting sampling results are used as a VCD sampling file. Compared to the original VCD file, the data volume of the VCD sampling file is significantly reduced. Extracting file segments based on the VCD sampling file can effectively reduce the data volume of each file segment, thereby reducing the amount of data that needs to be processed in subsequent processes and helping to improve waveform extraction efficiency. Furthermore, the duration of the preset sampling period is shorter than the duration of the time window, which ensures that while reducing the data volume, the file segments extracted according to the time window can cover a sufficient amount of data.

[0013] In one optional implementation, determining the target file segment corresponding to the time window in each of the file segments based on the transistor toggles recorded in each of the file segments includes: The flip-off deviation corresponding to each of the file segments is determined respectively, and the flip-off deviation is the difference between the maximum transistor flip-off amount and the minimum transistor flip-off amount within the same file segment; The file segment with the largest flipping deviation among the file segments is determined as the target file segment corresponding to the time window.

[0014] In the load current waveform extraction method provided in this application, the difference between the maximum and minimum transistor switching values ​​within each file segment is determined to obtain the switching value deviation corresponding to each file segment. The file segment with the largest switching value deviation is then identified as the target file segment corresponding to the time window. Since the transistor switching values ​​recorded in the VCD file can be used to characterize the load current changes of the microprocessor architecture, the switching value deviation can be used to represent the current changes within the time range corresponding to the time window. Selecting the target file segment based on the transistor switching value deviation not only simplifies the determination process of the target file segment but also ensures that the obtained target file segment is consistent with the load current changes within the corresponding time period in the initial load current waveform, effectively guaranteeing the accuracy of subsequent load current extraction.

[0015] In one optional implementation, the process of extracting waveform segments from the initial load current waveform using any of the target file segments to obtain the target current waveform segment corresponding to the target file segment includes: Obtain the start and end times of the target file segment record; The target time range is determined based on the start time and the end time; Extract the load current waveforms that fall within the target time range from the initial load current waveform to obtain the target current waveform segment corresponding to the target file segment.

[0016] In the load current waveform extraction method provided in this application, a target time range is determined based on the start and end times of the target file segment. The load current waveform within the target time range in the initial load current waveform is extracted to obtain the target current waveform segment corresponding to the target file segment. Since the transistor switching amount recorded in the VCD file can be used to characterize the change in load current, and the change in transistor switching amount is consistent with the change in load current, the target file segment is the file segment with the largest deviation in transistor switching amount, and the load current change rate is also the largest in the corresponding time period. By extracting the load current waveform according to the target time range corresponding to the start and end times of the target file segment, it can be ensured that the current change rate of the obtained target current waveform segment is the largest.

[0017] In one optional implementation, determining the target time range based on the start time and the end time includes: The time before the start time and at a preset time interval from the start time is defined as the first time. The second moment is defined as the moment after the termination time and at a preset interval from the termination time. The time range between the first moment and the second moment is determined as the target time range.

[0018] In the load current waveform extraction method provided in this application, a preset time is shifted forward from the start time of the target file segment to form the first time. Correspondingly, a preset time is shifted backward from the end time of the target file segment to form the second time. The time range between the first time and the second time is determined as the target time range. This setting can appropriately expand the time range corresponding to the target current waveform segment based on the time range corresponding to the target file segment, ensuring that the entire target current waveform can be covered, which helps to improve the reliability and accuracy of PI evaluation.

[0019] In an optional embodiment, the load current waveform extraction method provided in the first aspect of this application further includes: performing Fourier transform on each of the target current waveform segments to obtain the corresponding frequency domain waveform curves. Determine whether the target load current waveform meets the power integrity assessment requirements based on the frequency bands included in the frequency domain waveform curve.

[0020] In the load current waveform extraction method provided in this application, each target current waveform segment is further subjected to Fourier transform to determine the frequency band corresponding to each target current waveform segment, thereby determining whether the obtained target load current waveform covers all frequency bands corresponding to the microprocessor architecture and its power supply path, providing a reference for determining whether the obtained target load current waveform meets the power integrity assessment requirements.

[0021] In a second aspect, this application provides an electronic device including a memory, a processor, and a computer program stored in the memory and executed by the processor, wherein the processor executes the computer program to implement the steps of the load current waveform extraction method provided in any embodiment of the first aspect of this application.

[0022] Thirdly, this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the load current waveform extraction method provided in any embodiment of the first aspect of this application. Attached Figure Description

[0023] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a flowchart illustrating a method for extracting load current waveforms provided in an embodiment of this application.

[0025] Figure 2 This is a schematic diagram of an initial load current waveform.

[0026] Figure 3 This is a flowchart illustrating a method for determining a target current waveform segment, as provided in an embodiment of this application.

[0027] Figure 4 This is a schematic diagram illustrating the trends of transistor switching and load current changes within a time window as described in the embodiments of this application.

[0028] Figure 5 This is a flowchart illustrating another method for extracting load current waveforms provided in an embodiment of this application.

[0029] Figure 6 This is a simulation link diagram for power integrity assessment of a microprocessor architecture.

[0030] Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0031] The technical solutions of the embodiments of this application will now be described with reference to the accompanying drawings. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0032] As mentioned above, to address the problem that existing load current waveform extraction methods cannot comprehensively measure the load characteristics of microprocessor architectures and cannot meet simulation testing requirements, this application provides a load current waveform extraction method. This method uses multiple different time windows to extract waveform segments from the initial load current waveform, obtaining load current waveforms corresponding to different frequency bands. This allows for a comprehensive measurement of the load characteristics of the microprocessor architecture, which helps improve the accuracy and reliability of PI simulation and thus better meets simulation testing requirements.

[0033] The load current waveform extraction method provided in this application embodiment is applied to power integrity assessment in the pre-silicon verification process of microprocessor architecture. Specifically, it is executed by an electronic device, which can be a personal computer, a laptop, or, in some cases, a network-side server.

[0034] See Figure 1 As shown in the embodiments of this application, the load current waveform extraction method may include the following steps.

[0035] S100. Run the simulation circuit model of the microprocessor architecture through the preset test set to obtain the initial load current waveform of the microprocessor architecture.

[0036] In one alternative implementation, a simulation circuit model of the microprocessor architecture can be loaded onto a register-transfer level (RTL) or gate-level simulation platform. Test stimuli are applied to the simulation circuit model of the microprocessor architecture using a preset test set to run the simulation circuit model of the microprocessor architecture. This stimulates the microprocessor architecture to generate various high-power, high-dynamic-current activity modes, and the final output VCD file of the simulation platform is obtained. This VCD file is used to record the transistor switching amount of the microprocessor architecture at different test times, and the obtained transistor switching amount can be used to characterize the load current of the microprocessor architecture.

[0037] Furthermore, the obtained VCD file, along with the physical layout data of the microprocessor architecture and the power consumption model of the cell library, are input into a dynamic power analysis tool. This tool is then used to perform dynamic power analysis on the microprocessor architecture, yielding results such as... Figure 2 The initial load current waveform is shown. In practical applications, since the transistor switching amounts recorded in the VCD file can be used to characterize the load current changes of the microprocessor architecture, dynamic analysis tools can perform dynamic power consumption analysis on the microprocessor architecture based on the VCD file, obtaining more accurate transient power consumption and current waveforms. This results in a more precise initial load current waveform with a longer time range, and the entire process takes less time.

[0038] As for the specific implementation of the preset test set, the simulation circuit model of the microprocessor architecture, and the dynamic power consumption analysis tool based on the VCD file to output the initial load current waveform, they can all be implemented with reference to relevant technologies, and will not be described in detail here.

[0039] S110. Use multiple different time windows to extract waveform segments from the initial load current waveform to obtain the target current waveform segments corresponding to each time window.

[0040] To cover as many frequency bands of load current components as possible, the load current waveform extraction method provided in this application presets multiple time windows, each with a different duration. The duration of each time window is shorter than the duration of the initial load current waveform to ensure sufficient sampling of the initial load current waveform. It should be noted that the different durations of the time windows can be understood as different sampling accuracies; a longer time window results in lower sampling accuracy, and a shorter time window results in higher sampling accuracy. Furthermore, the duration of the time window is also related to the load current components of the initial load current waveform at different frequencies; a longer time window corresponds to a lower frequency of the load current component, and a shorter time window corresponds to a higher frequency of the load current component. See Table 1 for examples.

[0041] Table 1 As shown in Table 1, by setting time windows of different durations, it is possible to... Figure 2 Different current waveform segments are extracted from the initial load current waveform shown, thereby determining the frequency band of the load current component corresponding to different target current waveform segments. Specifically, when the time window duration is 10ns, the extracted target current waveform segment is the current waveform segment corresponding to T4-T5, and its corresponding frequency band is above 100MHz. When the time window duration is 1us, the extracted target current waveform segment is the current waveform frequency band corresponding to T1-T2, and the corresponding frequency band is above 1MHz. It can be seen that by setting different time windows, it is possible to achieve full-band load component coverage from low frequency to high frequency, thus fully meeting the PI evaluation needs in multiple scenarios and providing more valuable reference for more accurately evaluating the performance of the power supply path of the microprocessor architecture under different load switching conditions.

[0042] The specific process of extracting waveform segments from the initial load current waveform using multiple different time windows to obtain the target current waveform segment corresponding to each time window may include, for example: Figure 3 The following steps are shown.

[0043] S1101. Obtain the VCD file corresponding to the microprocessor architecture.

[0044] As mentioned earlier, VCD files are used to record the transistor switching amounts of the simulation circuit model at different test times. The transistor switching amounts can characterize the load current of the microprocessor architecture. Therefore, as an optional implementation, the extraction of the initial load current waveform is based on the transistor switching amounts recorded in the VCD file.

[0045] S1102. Extract file segments from the VCD file using multiple different time windows to obtain the target file segments corresponding to each time window.

[0046] It should be noted that the process of extracting file segments from a VCD file using each time window and finally determining the target file segment corresponding to each time window is the same. The following only uses any one of the multiple time windows as an example to illustrate the process of extracting file segments from a VCD file using that time window and determining the target file segment corresponding to that time window.

[0047] First, the VCD file is extracted multiple times according to the time range corresponding to the time window, resulting in multiple file segments, each with a different start time. As an optional implementation, a preset time window movement step size can be used. Within the duration of the initial load current waveform, the time window is moved according to this step size. The time range after each time window movement is used as the extraction period, and the VCD file is extracted according to this extraction period to obtain corresponding file segments. Since the duration of the time window is shorter than the duration of the initial load current waveform, the time window can be moved multiple times within the duration of the initial load current waveform, thus obtaining multiple file segments. In practical applications, to ensure that no part of the initial load current curve is missed during file segment extraction, the duration corresponding to the movement step size should be shorter than the duration of the time window.

[0048] Understandably, as the integration level of microprocessor architecture continues to increase, the data volume of VCD files also increases. This massive data volume obviously affects the file segment extraction process. Therefore, as an optional implementation method, before extracting file segments, the transistor toggling amounts recorded in the VCD file can be sampled according to a preset sampling period to obtain a VCD sample file. The duration of the preset sampling period is shorter than the duration of any time window. Furthermore, multiple file segment extractions are performed on the VCD sample file according to the time range corresponding to the time window, resulting in multiple file segments. The specific extraction process can be referred to the aforementioned related content and will not be repeated here. Understandably, compared to a VCD file, the data volume of a VCD sample file is significantly reduced. Extracting file segments based on the VCD sample file can effectively reduce the data volume of each file segment, thereby reducing the amount of data that needs to be processed in subsequent processes and helping to improve waveform extraction efficiency. Furthermore, the duration of the preset sampling period is shorter than the duration of the time window, ensuring that while reducing the data volume, the file segments extracted according to the time window can cover a sufficient amount of data.

[0049] After extracting multiple file segments according to time windows, the target file segment corresponding to the time window is determined within each file segment based on the transistor toggle values ​​recorded in each file segment. As mentioned earlier, VCD files record the transistor toggle values ​​of the microprocessor architecture at different test times. Based on this, each obtained file segment also records the transistor toggle values ​​within its corresponding time range. Based on this, the toggle value deviation corresponding to each file segment is determined. Specifically, the toggle value deviation mentioned in this embodiment refers to the difference between the maximum and minimum transistor toggle values ​​within the same file segment. Figure 4 As shown, the duration of a file segment is T, the minimum transistor toggle within the file segment is N1, and the maximum transistor toggle is N10. Based on this, the difference between N10 and N1 is the toggle deviation corresponding to that file segment. Similarly, the toggle deviation for each file segment is determined, and the file segment with the maximum toggle deviation is identified as the target file segment for the time window.

[0050] S1103. Use each target file segment to extract waveform segments from the initial load current waveform to obtain the target current waveform segments corresponding to each target file segment.

[0051] As mentioned earlier, the transistor switching amount recorded in the VCD file can be used to characterize the load current changes of the microprocessor architecture. Therefore, the target file segment obtained in the aforementioned steps can be used as the basis for extracting the target current waveform segment.

[0052] Similar to the process of extracting file segments, the process of extracting waveform segments from the initial load current waveform using each target file segment and obtaining the target current waveform segment corresponding to each target file segment is the same. The following uses any target file segment as an example to illustrate the specific process of extracting the corresponding target current waveform segment according to the target file segment.

[0053] First, the start and end times of the target file segment are obtained. Based on these times, a target time range is determined. Specifically, in one optional implementation, the time range between the start and end times can be directly used as the target time range. In another optional implementation, a time before the start time and spaced at a preset interval can be defined as the first time, i.e., the first time is before the start time and the difference between the first and start times is the preset interval. Further, a time after the end time and spaced at a preset interval can be defined as the second time, i.e., the second time is after the end time and the difference between the second and end times is the preset interval. Finally, the time range between the first and second times is determined as the target time range. This setting allows for an appropriate expansion of the time range corresponding to the target current waveform segment, ensuring that the entire target current waveform is covered, thus improving the reliability and accuracy of PI evaluation.

[0054] Secondly, the load current waveforms within the target time range are extracted from the initial load current waveform to obtain the target current waveform segment corresponding to the target file segment. Since the transistor switching amount recorded in the VCD file can be used to characterize the change in load current, and the change in transistor switching amount is consistent with the change in load current, based on this, since the target file segment is the file segment with the largest deviation in transistor switching amount, the rate of change of load current in its corresponding time period is also the largest. Extracting the load current waveform according to the target time range corresponding to the start and end times of the target file segment can ensure that the current change rate of the obtained target current waveform segment is maximized.

[0055] As can be seen from the actual needs of power integrity assessment, the extraction of the initial load current waveform has its own limitations and is usually difficult to fully express the load characteristics of the microprocessor architecture during actual operation. Therefore, how to extract typical target current waveform segments from the initial load current waveform becomes the key to the reliability of power integrity assessment results, especially the instantaneous switching process from low power state to high performance state, such as the sudden change in load current when switching from sleep mode to full load mode. This method extracts the target current waveform segment based on transistor switching amount. The load current change rate corresponding to the target current waveform segment is the largest. Therefore, it can effectively capture the instantaneous scenario that poses the most severe stress to the microprocessor architecture and its power network, effectively ensuring the reliability of power integrity assessment results.

[0056] S120. Determine each target current waveform segment as the target load current waveform of the microprocessor architecture, so as to perform a power integrity assessment of the microprocessor architecture based on the target load current waveform.

[0057] After obtaining the target current waveform segment corresponding to each time window, each target current waveform segment can be used as the target load current waveform of the microprocessor architecture. Then, the power integrity of the microprocessor architecture can be evaluated based on the target load current waveform. The specific evaluation process will be discussed in the following content and will not be detailed here.

[0058] In summary, the load current waveform extraction method provided in this application, after obtaining the initial load current waveform by running the simulation circuit model of the microprocessor architecture through a preset test set, extracts waveform segments from the initial load current waveform using multiple different time windows to obtain the target current waveform segments corresponding to each time window. Each target current waveform segment is then determined as the target load current waveform for the microprocessor architecture, thereby enabling power integrity evaluation of the microprocessor architecture based on the target load current waveform. Generally, the duration of the time window is related to the load current components of the initial load current waveform at different frequencies. For example, a longer time window corresponds to a lower frequency of the load current component, while a shorter time window corresponds to a higher frequency. This method sets multiple different time windows and extracts waveform segments using each time window, obtaining load current waveforms corresponding to different frequency bands. In this way, the load characteristics of the microprocessor architecture can be comprehensively measured, which helps improve the accuracy and reliability of PI simulation and meets simulation testing requirements.

[0059] Furthermore, existing load current waveform extraction methods do not consider the load switching process that occurs in the microprocessor architecture, such as... Figure 2 The initial load current waveform shown illustrates the load current changes during time periods T1~T2 and T4~T5. These load state changes place high demands on the power supply path, especially when the current slope is large. Existing technologies cannot accurately reflect the performance of the power supply path in practical applications. This method, however, determines the time range with the largest tortuosity deviation based on the tortuosity recorded in the file fragment. It then extracts the target load current waveform with the largest rate of change within this time range, accurately capturing the current curve during load switching in the microprocessor architecture. This allows for a more precise evaluation of the power supply path's performance under different load switching conditions, providing a more valuable reference for the optimized design of the power supply path.

[0060] This application also provides another method for extracting load current waveforms, including, as follows: Figure 5 The steps shown are numerous, and the specific execution process of S100-S120 can be found in [reference needed]. Figure 1 The relevant content of the illustrated embodiment will not be repeated here. The specific implementation of S130 and S140 will be described in detail below.

[0061] S130. Perform Fourier transform on each target current waveform segment to obtain the corresponding frequency domain waveform curve.

[0062] After obtaining each target current waveform segment, a Fourier transform is performed on each target current waveform segment to obtain the frequency domain waveform curve corresponding to each target current waveform segment. Thus, the frequency band covered by each target current waveform segment can be determined based on the obtained frequency domain waveform curve. As for the specific process of performing a Fourier transform on any target load current waveform segment to obtain the frequency domain waveform curve, it can be implemented with reference to relevant technologies, and will not be described in detail here.

[0063] S140. Determine whether the target load current waveform meets the power integrity assessment requirements based on the frequency bands included in the frequency domain waveform curve.

[0064] In practical applications, the power supply path of a microprocessor architecture includes not only its internal power supply path but also several related parts, such as the power supply module, the power supply path on the motherboard, and the power supply path on the packaging substrate. These related parts have different effective response ranges to load current frequency changes. For example, the frequency range corresponding to the motherboard is 0~KHz, while the frequency range corresponding to the packaging substrate is 10MHz~tens of MHz. In order to obtain more accurate and reliable power integrity assessment results, the wider the frequency range that the load current curve can cover, the better.

[0065] Based on the above, power integrity assessment requirements can be preset by considering the actual situation of the microprocessor architecture and its power supply path. If the frequency bands included in the frequency domain waveform curve obtained in the preceding steps can cover the frequency bands required for power integrity assessment, then the obtained load current curve can be determined to meet the power integrity assessment requirements. Conversely, if the obtained frequency domain waveform curve does not cover the frequency bands required for power integrity assessment, then the obtained target load current waveform is determined to not meet the power integrity requirements, and it is necessary to return to S100 to re-extract the target load current waveform. As for the frequency bands required for power integrity assessment, they need to be determined based on the actual performance parameters of the microprocessor architecture and its power supply path, which will not be detailed here.

[0066] Once it is determined that the target load current waveform meets the power integrity assessment requirements, a power distribution network model of the microprocessor architecture can be further constructed. As discussed above, the power distribution network of a microprocessor architecture comprises multiple components, such as the power supply module, motherboard, and packaging substrate. Each component's power supply path has its own structure and characteristics. Therefore, when constructing the power distribution network model of the microprocessor architecture, dedicated analysis tools can be used to construct passive models (i.e., models composed of passive components such as parasitic inductors, parasitic resistances, and parasitic capacitances) for each component. Finally, the passive models of each component are coupled together to obtain the power distribution network model. The specific process of obtaining the power distribution network model using analysis tools can be found in relevant technical implementations and will not be detailed here.

[0067] Since power supply noise is generated by the combined effect of the impedance of the power distribution network and the load current, coupling the power distribution network model obtained in the preceding steps with the target load current curve allows for power integrity simulation of the microprocessor architecture. The specific structure of the power integrity simulation model can be found in [reference needed]. Figure 6 As shown, it should be noted that in Figure 6 In the power integrity simulation model shown, the power distribution network model includes the motherboard and the packaging substrate. The simulation model corresponding to the motherboard includes the power supply module and the simulation model of the motherboard power supply path. The two are not shown separately. The simulation models of the components of the power supply module, motherboard, and packaging substrate are all represented by RLC (i.e., resistor, inductor, and capacitor) passive components. The microprocessor architecture part includes the aforementioned target load current waveform and parasitic parameter file. The parasitic parameter file records the parasitic resistance parameters and parasitic capacitance parameters of the microprocessor architecture. As for the specific process of obtaining the parasitic parameter file, it can be referred to the relevant technology implementation, which will not be detailed here.

[0068] Combination Figure 6 As shown, when the microprocessor architecture is working, the current outputs from the leftmost power supply module, passes through the power supply path on the motherboard (including traces, vias, planes, etc.) to the packaging substrate, then enters the metal interconnect layer of the microprocessor architecture, and finally reaches the transistor circuit of the active layer. This process also includes passive components such as decoupling capacitors and inductors. Because the traces, vias, planes, and other structures themselves contain parasitic inductance, resistance, and capacitance, and the soldering of passive components introduces additional parasitic parameters, the voltage level transmitted to the microprocessor architecture through the actual power supply path is not an ideal level. This is why a power integrity assessment of the microprocessor architecture and its power supply path is necessary. It should be noted that... Figure 6 The power integrity simulation model shown is only an example. In actual applications, the specific architecture of the power integrity simulation model will vary depending on the actual power supply path and the microprocessor architecture.

[0069] The power integrity simulation model is subjected to test stimuli using simulation analysis tools, and the voltage ripple waveform of the operating voltage received by the microprocessor architecture is obtained. Based on the obtained voltage ripple waveform, it is determined whether the voltage noise is within the allowable voltage deviation range. If it is within the voltage deviation range, the power integrity test is determined to be passed. Conversely, if the voltage noise is not within the voltage deviation range, the power integrity test is determined to be failed, and the parameters of the power integrity simulation model need to be further adjusted.

[0070] Below, for reference Figure 7 The electronic device provided in this embodiment of the invention may include: at least one processor 100, at least one communication interface 200, at least one memory 300, and at least one communication bus 400. In this embodiment of the invention, the number of processor 100, communication interface 200, memory 300, and communication bus 400 is at least one, and the processor 100, communication interface 200, and memory 300 communicate with each other through communication bus 400; obviously, Figure 7 The communication connections shown for the processor 100, communication interface 200, memory 300, and communication bus 400 are optional. Optionally, the communication interface 200 can be an interface of a communication module, such as the interface of a GSM module; the processor 100 may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement embodiments of the present invention.

[0071] The memory 300 may include high-speed RAM memory, and may also include non-volatile memory, such as at least one disk storage device.

[0072] Specifically, the processor 100 is used to execute the application program in the memory to implement the steps of the load current waveform extraction method described above.

[0073] Furthermore, in some embodiments, this embodiment also provides a computer-readable storage medium, such as a floppy disk, optical disk, hard disk, flash memory, USB flash drive, SD (Secure Digital Memory Card), MMC (Multimedia Card), etc., in which one or more instructions for implementing the above steps are stored. When these one or more instructions are executed by one or more processors, the processors perform the load current waveform extraction method described above. For specific implementation details, please refer to the foregoing description; further elaboration is not provided here.

[0074] In addition to the methods and devices described above, embodiments of this application may also be computer program products, which include computer program instructions that, when executed by a processor, cause the processor to perform the steps in the load current waveform extraction methods according to various embodiments of this application as described above.

[0075] Computer program products can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of this application. The programming languages ​​include object-oriented programming languages ​​such as C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0076] Those skilled in the art will understand that the contents disclosed herein can be varied and modified in many ways. For example, the various devices or components described above can be implemented in hardware, or in software, firmware, or a combination of some or all of the three.

[0077] Furthermore, while this disclosure makes various references to certain elements of systems according to embodiments of this disclosure, any number of different elements may be used and operated on clients and / or servers. Elements are merely illustrative, and different aspects of the system and method may use different elements.

[0078] This disclosure uses flowcharts to illustrate the steps of a method according to embodiments of this disclosure. It should be understood that the preceding or following steps are not necessarily performed in exact order. Instead, the steps can be processed in reverse order or simultaneously. Furthermore, other operations can be added to these processes.

[0079] Those skilled in the art will understand that all or part of the steps in the above methods can be implemented by a computer program instructing related hardware, and the program can be stored in a computer-readable storage medium, such as a read-only memory. Optionally, all or part of the steps in the above embodiments can also be implemented using one or more integrated circuits. Accordingly, each module / unit in the above embodiments can be implemented in hardware or as a software functional module. This disclosure is not limited to any particular combination of hardware and software.

[0080] Unless otherwise defined, all terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It should also be understood that terms such as those defined in a common dictionary should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and not as having an idealized or highly formalized meaning, unless expressly defined herein.

[0081] The foregoing description is intended to illustrate the present disclosure and should not be construed as limiting it. While several exemplary embodiments of the present disclosure have been described, those skilled in the art will readily understand that many modifications may be made to the exemplary embodiments without departing from the novel teachings and advantages of the present disclosure. Therefore, all such modifications are intended to be included within the scope of the present disclosure as defined by the claims. It should be understood that the foregoing description is intended to illustrate the present disclosure and should not be construed as limiting it to the specific embodiments disclosed, and modifications to the disclosed embodiments and other embodiments are intended to be included within the scope of the appended claims. The present disclosure is defined by the claims and their equivalents.

Claims

1. A method for extracting load current waveforms, characterized in that, A power integrity assessment method applied in the pre-silicon verification process of microprocessor architectures, the method comprising: The simulation circuit model of the microprocessor architecture is run and tested using a preset test set to obtain the initial load current waveform of the microprocessor architecture. Waveform segments are extracted from the initial load current waveform using multiple different time windows to obtain target current waveform segments corresponding to each time window, wherein the duration of any time window is less than the duration of the initial load current waveform. Each of the target current waveform segments is identified as the target load current waveform of the microprocessor architecture, so as to perform a power integrity assessment of the microprocessor architecture based on the target load current waveform.

2. The method according to claim 1, characterized in that, The step of extracting waveform segments from the initial load current waveform using multiple different time windows to obtain the target current waveform segment corresponding to each time window includes: Obtain the VCD file corresponding to the microprocessor architecture. The VCD file is used to record the transistor switching amount of the simulation circuit model at different test times. The transistor switching amount is used to characterize the load current of the microprocessor architecture. The VCD file is used to extract file segments using multiple different time windows to obtain the target file segments corresponding to each time window; The initial load current waveform is extracted using each of the target file segments to obtain the target current waveform segments corresponding to each of the target file segments.

3. The method according to claim 2, characterized in that, The process of extracting file segments from the VCD file using any of the aforementioned time windows to obtain the target file segment corresponding to that time window includes: The VCD file is subjected to multiple file segment extractions according to the time range corresponding to the time window, resulting in multiple file segments, wherein each file segment has a different start time. Based on the transistor toggling amount recorded in each of the file segments, the target file segment corresponding to the time window is determined in each of the file segments.

4. The method according to claim 3, characterized in that, The VCD file is subjected to multiple file segment extractions according to the time range corresponding to the time window, resulting in multiple file segments, including: The transistor toggling amounts recorded in the VCD file are sampled according to a preset sampling period to obtain a VCD sample file; The VCD sample file is extracted multiple times according to the time range corresponding to the time window to obtain multiple file segments. The duration of the preset sampling period is less than the duration of the time window.

5. The method according to claim 3, characterized in that, The step of determining the target file segment corresponding to the time window in each of the file segments based on the transistor toggling amounts recorded in each of the file segments includes: The flip-off deviation corresponding to each of the file segments is determined respectively, and the flip-off deviation is the difference between the maximum transistor flip-off amount and the minimum transistor flip-off amount within the same file segment; The file segment with the largest flipping deviation among the file segments is determined as the target file segment corresponding to the time window.

6. The method according to claim 2, characterized in that, The process of extracting waveform segments from the initial load current waveform using any of the target file segments to obtain the target current waveform segment corresponding to the target file segment includes: Obtain the start and end times of the target file segment record; The target time range is determined based on the start time and the end time; Extract the load current waveforms that fall within the target time range from the initial load current waveform to obtain the target current waveform segment corresponding to the target file segment.

7. The method according to claim 6, characterized in that, Determining the target time range based on the start time and the end time includes: The time before the start time and at a preset time interval from the start time is defined as the first time. The second moment is defined as the moment after the termination time and at a preset interval from the termination time. The time range between the first moment and the second moment is determined as the target time range.

8. The method according to any one of claims 1 to 7, characterized in that, Also includes: Perform Fourier transform on each of the target current waveform segments to obtain the corresponding frequency domain waveform curves; Determine whether the target load current waveform meets the power integrity assessment requirements based on the frequency bands included in the frequency domain waveform curve.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executed by the processor, characterized in that, When the processor executes the computer program, it implements the steps of the load current waveform extraction method as described in any one of claims 1 to 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the load current waveform extraction method as described in any one of claims 1 to 8.

Images