Electronic device

Abstract

An electronic device includes a display panel including a folding area defined in the display panel, and a first non-folding area and a second non-folding area defined in the display panel and spaced apart from each other, the display panel includes a first non-folding area and a second non-folding area, and the folding area is interposed between the first non-folding area and the second non-folding area, and the display panel includes pixels and a plurality of signal lines connected to the pixels. A plate is disposed below the display panel and includes a pattern portion overlapping the folding area, a first flat portion overlapping the first non-folding area, and a second flat portion overlapping the second non-folding area. The plate is provided with a plurality of first holes defined through an upper surface and a rear surface of the plate. A plurality of first lines are disposed in the plurality of first holes and connected to the plurality of signal lines, and a circuit board is connected to the plurality of signal lines via the plurality of first lines and disposed below the board.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0107628 filed on August 12, 2024, and all benefits accruing therefrom, the disclosure of which is incorporated herein in its entirety by reference. TECHNICAL FIELD

[0003] The present disclosure relates to a flexible electronic device. More particularly, the present disclosure relates to an electronic device including a driving circuit placed on a rear surface thereof to reduce a non-display area and prevent cracks from occurring when folded. BACKGROUND

[0004] Various types of electronic devices, such as televisions, mobile phones, tablet computers, or game units, etc., are being developed. Recently, flexible electronic devices including a flexible display panel that can be slidable or foldable are being developed.

[0005] Components included in the flexible electronic device need to be properly designed to achieve the folding characteristics of the electronic device. However, unlike electronic devices including a flat display panel, some of the components stacked one on another can be detached or broken when the flexible electronic device is folded or slid. SUMMARY

[0006] The present disclosure provides an electronic device capable of preventing components thereof from being detached or broken when folded.

[0007] The present disclosure provides an electronic device capable of reducing a non-display area thereof.

[0008] Embodiments of the inventive concept provide an electronic device including a display panel including a folding area defined in the display panel and first and second non-folding areas defined in the display panel and spaced apart from each other with the folding area interposed therebetween, and the display panel including pixels and a plurality of signal lines connected to the pixels; a board disposed below the display panel and including a pattern portion overlapping the folding area, a first flat portion overlapping the first non-folding area, and a second flat portion overlapping the second non-folding area, and the board being provided with a plurality of first holes defined through an upper surface and a rear surface of the board; a plurality of first lines disposed in the plurality of first holes and connected to the plurality of signal lines, and a circuit board connected to the plurality of signal lines via the plurality of first lines and disposed below the board.

[0009] The board is non-conductive and includes a glass material.

[0010] The plate has a thickness equal to or greater than about 70 micrometers (μm) and equal to or less than about 400 micrometers.

[0011] The display panel further includes a base substrate including polyimide (PI), and is provided with a plurality of second holes defined through an upper surface and a rear surface of the base substrate and overlapping the first holes.

[0012] The display panel further includes a plurality of second lines disposed in the plurality of second holes.

[0013] Each of the plurality of first lines further includes a first-first pad exposed without being covered by the rear surface of the plate and a first-second pad exposed without being covered by the upper surface of the plate.

[0014] Each of the plurality of second lines further includes a second-first pad exposed without being covered by the rear surface of the base substrate and a second-second pad exposed without being covered by the upper surface of the base substrate.

[0015] The electronic device further includes a first conductive film disposed between the circuit board and the plate and a second conductive film disposed between the plate and the base substrate.

[0016] One end of the plurality of signal lines is connected to the pixels, the other end of the plurality of signal lines is connected to the plurality of second lines, and the plurality of signal lines is connected to the circuit board via the plurality of second lines and the plurality of first lines.

[0017] Each of the plurality of first holes has a width equal to or greater than about 10 micrometers and equal to or less than about 100 micrometers when viewed in cross-section.

[0018] The electronic device further includes a resin layer disposed between the plate and the display panel and including a first resin having a modulus equal to or greater than about 1 megapascal (MPa) and equal to or less than about 5 gigapascal (Gpa).

[0019] The resin layer has a thickness equal to or greater than about 5 micrometers and equal to or less than about 20 micrometers.

[0020] The display panel further includes a base substrate, and the base substrate includes a protruding portion protruding outward by about 0.01 mm or more and about 1 mm or less with respect to one end of the resin layer adjacent to the first hole, and an overlapping portion extending inward from the protruding portion and overlapping the resin layer.

[0021] The electronic device further includes an adhesive layer disposed between the circuit board and the plate and including a pressure sensitive adhesive material. The circuit board is attached to the rear surface of the plate by the adhesive layer.

[0022] The pattern portion includes a groove pattern defined by recessing a portion of the upper surface and at least a portion of the rear surface.

[0023] The plate further includes a resin portion filled in the groove pattern and including a second resin, and the pattern portion has a modulus equal to or greater than about 10 MPa and equal to or less than about 1 GPa.

[0024] The groove pattern is defined as a plurality, and at least a portion of the plurality of groove patterns is defined as penetrating the upper surface and the rear surface of the plate entirely.

[0025] The groove pattern is defined by a groove flat portion and a groove inclined portion spaced apart from each other and inclined in a direction toward the groove flat portion.

[0026] The groove pattern is defined through the rear surface, and when observed in a cross-section, a side surface of the plate defining the groove pattern has a tapered shape that gradually narrows from the rear surface toward the upper surface. The groove pattern is defined through the upper surface, and when observed in a cross-section, a side surface of the plate defining the groove pattern has a tapered shape that gradually narrows from the upper surface toward the rear surface.

[0027] The circuit plate includes a base film and a driving circuit disposed on the base film.

[0028] The electronic device further includes an ultra-thin glass layer disposed on the display panel and a protective layer disposed on the ultra-thin glass layer.

[0029] The electronic device further includes an impact absorbing layer disposed between the ultra-thin glass layer and the display panel and including polyethylene terephthalate (PET).

[0030] The plate has a thickness greater than a thickness of the display panel, and the pattern portion has a modulus equal to or greater than about 20 MPa and equal to or less than about 1 GPa.

[0031] Accordingly, the electronic device includes the plate including the pattern portion and the adhesive layer coupling the plate to the display panel, and the electronic device prevents components of the display module from being detached or broken.

[0032] Accordingly, the driving circuit driving the display module is placed at the rear surface of the display module, and thus, a non-display area of the display module is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0033] The above and other advantages of the present disclosure will become readily apparent by reference to the following detailed description when considered in connection with the accompanying drawings wherein:

[0034] Figure 1A is a perspective view of an electronic device according to an embodiment of the present disclosure; Figure 1B is a perspective view of a folding operation of an electronic device according to an embodiment of the present disclosure.

[0035] Figure 1C is a plan view of an electronic device in a folded state according to an embodiment of the disclosure;

[0036] Figure 1D is a perspective view of a folding operation of an electronic device according to an embodiment of the disclosure;

[0037] Figures 2A-2C is a perspective view of an electronic device according to an embodiment of the disclosure;

[0038] Figure 3 is an exploded perspective view of an electronic device according to an embodiment of the disclosure;

[0039] Figure 4 shows a cross-section of a portion of an electronic device according to an embodiment of the disclosure;

[0040] Figure 5 is a plan view of a display panel according to an embodiment of the disclosure;

[0041] Figure 6 is a cross-sectional view of a portion of a display panel according to an embodiment of the disclosure;

[0042] Figure 7 is a cross-sectional view of a portion of a display module taken along a line I-I' of Figure 5

[0043] Figure 8 is a magnified view of an AA' area in Figure 7

[0044] Figure 9 is a cross-sectional view of a portion of a display module taken along a line II-II' of Figure 5

[0045] Figure 10 is a cross-sectional view of a folded state of a display module according to an embodiment of the disclosure; and

[0046] Figures 11-14 is a cross-sectional view of a pattern portion included in a display module according to an embodiment of the disclosure. DETAILED DESCRIPTION

[0047] The disclosure can be variously modified and implemented in many different forms, and thus specific embodiments will be illustrated in the drawings and described in detail in the following. However, the disclosure should not be limited to the specific disclosed forms, but should be interpreted to include all modifications, equivalents, or alternatives included in the spirit and scope of the disclosure.

[0048] ​​​In the present disclosure, it will be understood that when an element (or components, layer or part) is referred to as being "on", "connected to" or "coupled to" another element, it can be directly on, connected or coupled to the other element, or intervening elements can be present.

[0049] The same reference numerals are used throughout the drawings to refer to the same or like elements. In the drawings, the thickness, proportions and dimensions of components can be exaggerated for effective description of the technical content. As used herein, the term "and / or" can include any combination of one or more of the associated listed items and all combinations thereof.

[0050] It will be understood that, although the terms first and second, etc. can be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Thus, a first element discussed below could be termed a second element without departing from the teachings of the present disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0051] For ease of description, spatial relative terms (such as "below", "under", "lower", "over", "upper" and the like) can be used herein to describe the relationship of one element or feature to another element (s) or another feature (s) as shown in the drawings.

[0052] It will also be understood that the terms "include", "comprise", "including" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0053] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0054] Embodiments of the present disclosure will be described below with reference to the accompanying drawings.

[0055] Figure 1A is a perspective view of an electronic device ED according to an embodiment of the present disclosure.

[0056] Figure 1Ais a perspective view of an electronic device ED in a deployed state according to an embodiment of the disclosure. The electronic device ED can be a device activated in response to an electrical signal. As an example, the electronic device ED can be a mobile phone, a tablet computer, a car navigation unit, a game unit, or a wearable device, however, the electronic device ED should not be limited to or by this or be limited thereto. Figure 1A A foldable electronic device ED is illustrated as a representative example. In the present embodiment, a mobile phone is illustrated as a representative example of the foldable electronic device ED.

[0057] The electronic device ED can include a first display surface FS defined by a first direction DR1 and a second direction DR2 intersecting the first direction DR1. The electronic device ED can provide an image IM to a user through the first display surface FS. The electronic device ED can display the image IM toward a third direction DR3 through the first display surface FS substantially parallel to each of the first direction DR1 and the second direction DR2.

[0058] In the present disclosure, the first direction DR1 can be perpendicular to the second direction DR2, and the third direction DR3 can be a normal direction with respect to a plane defined by the first direction DR1 and the second direction DR2. A thickness direction of the electronic device ED can be substantially parallel to the third direction DR3. A front surface (or an upper surface) and a rear surface (or a lower surface) can face away from each other in the third direction DR3, and a normal direction of each of the front surface (or the upper surface) and the rear surface (or the lower surface) can be substantially parallel to the third direction DR3.

[0059] The front surface (or the upper surface) can indicate a surface relatively close to the first display surface FS, and the rear surface (or the lower surface) can indicate a surface relatively far from the first display surface FS. In addition, the rear surface (or the lower surface) can indicate a surface relatively close to a second display surface RS described later. The upper side (or the upper portion) can indicate a direction approaching the first display surface FS, and the lower side (or the lower portion) can indicate a direction away from the first display surface FS.

[0060] A cross section of each component refers to a flat surface parallel to the thickness direction DR3, and a plane of each component refers to a flat surface perpendicular to the thickness direction DR3. The plane refers to a flat surface defined by the first direction DR1 and the second direction DR2.

[0061] The electronic device ED can sense an external input applied thereto from an outside thereof. The external input can include various forms of input provided from an outside of the electronic device ED. For example, the external input can include a proximity input (e.g., hovering) applied when approaching or being adjacent to the electronic device ED at a predetermined distance, and a touch input of a user's body (e.g., a user's hand). In addition, the external input can be provided in the form of force, pressure, temperature, light, etc.

[0062] The electronic device ED can include a first display surface FS and a second display surface RS. The first display surface FS can include a first active area F-AA, a first non-active area F-NAA, and an electronic module area EMA. The second display surface RS can be opposite at least a portion of the first display surface FS. That is, the second display surface RS can be defined as a portion of a rear surface of the electronic device ED.

[0063] The first active area F-AA can be activated in response to an electrical signal. The electronic device ED can display an image IM through the first active area F-AA, and can sense various external inputs through the first active area F-AA.

[0064] The image IM can not be displayed through the first non-active area F-NAA. The first non-active area F-NAA can be defined adjacent to the first active area F-AA. The first non-active area F-NAA can have a predetermined color. The first non-active area F-NAA can surround the first active area F-AA. Accordingly, the first active area F-AA can have a shape substantially defined by the first non-active area F-NAA, however, this is merely an example. The first non-active area F-NAA can be defined adjacent to only one side of the first active area F-AA or can be omitted.

[0065] Various electronic modules can be disposed in the electronic module area EMA. For example, the electronic modules can include at least one of a camera, a speaker, an optical sensor, and a thermal sensor. An external object can be sensed through the electronic module area EMA of the first display surface FS or the second display surface RS, or a sound signal such as a voice can be provided externally through the electronic module area EMA of the first display surface FS or the second display surface RS. In addition, the electronic modules can include a plurality of components, however, should not be limited to a specific embodiment.

[0066] The electronic module area EMA can be surrounded by the first non-active area F-NAA, however, should not be limited thereto or by it. As an example, the electronic module area EMA can be surrounded by the first active area F-AA and the first non-active area F-NAA, and the electronic module area EMA can be defined in the first active area F-AA.

[0067] The electronic device ED (and components thereof, e.g., the display panel DP) can include at least one folding area FA and a plurality of non-folding areas NFA1 and NFA2 extending from the folding area FA. As an example, the first non-folding area NFA1, the folding area FA, and the second non-folding area NFA2 can be sequentially defined along the second direction DR2.

[0068] The second non-folded area NFA2 can be spaced apart from the first non-folded area NFA1 in the second direction DR2, and the folded area FA is interposed between the second non-folded area NFA1 and the first non-folded area NFA1. For example, the first non-folded area NFA1 can be disposed adjacent to one side of the folded area FA in the second direction DR2, and the second non-folded area NFA2 can be disposed adjacent to the other side of the folded area FA in the second direction DR2.

[0069] Figure 1A A structure in which the electronic device ED includes one folded area FA is shown as a representative example, however, the disclosure should not be limited thereto or thereby, and the electronic device ED can include a plurality of folded areas defined therein. As an example, the electronic device ED can include two or more folded areas and three or more non-folded areas, wherein the folded areas are arranged between the folded areas.

[0070] Figure 1B is a perspective view of a folding operation of an electronic device ED according to an embodiment of the disclosure. Figure 1C is a plan view of an electronic device ED in a folded state according to an embodiment of the disclosure. Figure 1D is a perspective view of a folding operation of an electronic device ED according to an embodiment of the disclosure.

[0071] Referring to Figure 1B , the electronic device ED can be folded with respect to a first folding axis FX1 extending in a first direction DR1. When the electronic device ED is folded, the folded area FA can have a predetermined curvature and a curvature radius. The electronic device ED can be folded inward (inward folding) with respect to the first folding axis FX1 to allow the first non-folded area NFA1 to face the second non-folded area NFA2, and to allow the first display surface FS not to be exposed to the outside.

[0072] Referring to Figure 1C , when the electronic device ED is folded inward, a user can see the second display surface RS. In this case, the second display surface RS can include a second active area R-AA through which an image is displayed. The second active area R-AA can be activated in response to an electrical signal. An image can be displayed through the second active area R-AA, and various external inputs can be sensed through the second active area R-AA.

[0073] Additionally, the second display surface RS may include a second peripheral region R-NAA. The second peripheral region R-NAA may be defined as adjacent to the second active region R-AA. The second peripheral region R-NAA may have a predetermined color. The second peripheral region R-NAA may surround the second active region R-AA. Although not shown in the figures, the electronic device ED may also include an electronic module region, wherein an electronic module comprising various components is disposed in the second display surface RS.

[0074] According to the embodiments, such as Figure 1B As shown, when the electronic device ED is folded inward, the distance between the first non-folded region NFA1 and the second non-folded region NFA2 can be less than the radius of the circle defined by the radius of curvature of the folded region FA. In this case, the folded region FA can be folded into a dumbbell shape, and the distance between the first non-folded region NFA1 and the second non-folded region NFA2 can be reduced. Therefore, the electronic device ED can become thinner in the folded state.

[0075] refer to Figure 1D The electronic device ED can be folded relative to a second folding axis FX2 extending in the first direction DR1. The electronic device ED can be folded outward relative to the second folding axis FX2 to allow the first display surface FS to be exposed to the outside. The electronic device ED can be configured to repeatedly unfold and fold inward or repeatedly unfold and fold outward, however, this disclosure should not be limited to or restricted by this.

[0076] Figures 1A-1D An electronic device ED folded relative to a folding axis FX1 or FX2 is shown; however, the number of folding axes and the number of non-folded areas should not be particularly limited. As an example, the electronic device ED can be folded relative to multiple folding axes to allow a portion of a first display surface FS to face another portion of the first display surface FS, and to allow a portion of a second display surface RS to face another portion of the second display surface RS. Additionally, in the above embodiment, the first folding axis FX1 and the second folding axis FX2 are shown as parallel to the long side of the electronic device ED; however, this disclosure should not be limited to or construed as such. According to an embodiment, the first folding axis FX1 and the second folding axis FX2 can be substantially parallel to the short side of the electronic device ED.

[0077] In electronic devices such as ED, Figure 1DIn the folded state shown in FIG. 1A, the first non-fold area NFA1 and the second non-fold area NFA2 can each be defined as an area including the display surfaces FS and RS parallel to a plane defined by the first direction DR1 and the second direction DR2, and the fold area FA can be defined as an area between the first non-fold area NFA1 and the second non-fold area NFA2. The fold area FA can include a curved portion having a predetermined curvature in the folded state.

[0078] Figures 2A-2C is a perspective view of an electronic device ED-a according to an embodiment of the disclosure.

[0079] Figure 2A is a perspective view of the electronic device ED-a in an unfolded state. Figure 2B and Figure 2C is a perspective view illustrating a folding operation of the electronic device ED-a. Figure 2B is a perspective view illustrating Figure 2A is a perspective view illustrating an inner folding operation of the electronic device ED-a shown in FIG. 1A. Figure 2C is a perspective view illustrating Figure 2A is a perspective view illustrating an outer folding operation of the electronic device ED-a shown in FIG. 1A. Figure 2B illustrates the electronic device ED-a in a first mode, and Figure 2C illustrates the electronic device ED-a in a second mode.

[0080] Referring to Figure 2A , the electronic device ED-a can be folded with respect to a third folding axis FX3 extending in a direction substantially parallel to the first direction DR1. The direction in which the third folding axis FX3 extends can be substantially parallel to the direction in which the short side of the electronic device ED-a extends.

[0081] The electronic device ED-a can include a fold area FA-a, a first non-fold area NFA1-a adjacent to one side of the fold area FA-a, and a second non-fold area NFA2-a adjacent to the other side of the fold area FA-a. The first non-fold area NFA1-a can be spaced apart from the second non-fold area NFA2-a with the fold area FA-a interposed therebetween.

[0082] The fold area FA-a can be folded with respect to the third folding axis FX3. When the electronic device ED-a is folded, the fold area FA-a can have a predetermined curvature and a radius of curvature. The electronic device ED-a can be folded inwardly (inner folding) to allow the first non-fold area NFA1-a to face the second non-fold area NFA2-a, and to allow the display surface FS-a not to be exposed to the outside.

[0083] Referring to Figure 2AWhen the electronic device ED-a is in the unfolded state, the user can see the display surface FS-a. Like Figures 1A-1D Similarly, the display surface FS-a of the electronic device ED-a can include an active area F-AAa and a peripheral area F-NAAa. One or more images IM can be displayed through the active area F-AAa, and various external inputs can be sensed through the active area F-AAa.

[0084] Referring to Figure 2B When the electronic device ED-a is folded inward, the user can see the rear surface RS-a. As an example, the rear surface RS-a can serve as a second display surface through which one or more images are displayed. In addition, the rear surface RS-a can include an electronic module area in which an electronic module including various components is disposed. An active area through which images are displayed can be further defined in the rear surface RS-a of the electronic device ED-a.

[0085] Referring to Figure 2C , the electronic device ED-a can be folded with respect to a third folding axis FX3 to allow a portion of the rear surface RS-a overlapping the first non-folded area NFA1-a to face another portion of the rear surface RS-a overlapping the second non-folded area NFA2-a.

[0086] Figure 3 is an exploded perspective view of an electronic device ED according to an embodiment of the disclosure.

[0087] In Figure 3 and the following drawings, the size of the second non-folded area NFA2 is exaggerated to be larger than the size of the first non-folded area NFA1 for clarity of illustration of components overlapping the second non-folded area NFA2 when viewed in a plane, however, the disclosure should not be limited thereto or be restricted thereto. As an example, the size of the first non-folded area NFA1 can be substantially the same as the size of the second non-folded area NFA2 when viewed in a plane.

[0088] For ease of illustration, signal lines SL (refer to Figure 7 ) and lines CL1 and CL2 (refer to Figure 7 ) described later are omitted in Figure 3 . In addition, features described below with respect to the electronic device ED can be applied to the electronic device ED-a described with reference to Figures 2A-2C .

[0089] Referring to Figure 3 , the electronic device ED can include a window WG, a protection layer PL, an impact absorption layer IL, a display module DM, and a housing HAU.

[0090] A window WG and a protective layer PL can be disposed above the display module DM. The window WG and the protective layer PL can be optically transparent. An image IM (refer to Figure 1A ) generated by the display module DM can be provided to a user after passing through the window WG and the protective layer PL.

[0091] The window WG can include a polymer substrate or a glass substrate. In the present embodiment, a portion of the window WG overlapping the folding area FA can be etched, and thus folding characteristics of the window WG can be improved. As Figure 3 indicated in the drawings, the window WG can provide a window groove GR defined in the window WG by etching an upper surface of the window WG, however, the present disclosure should not be limited thereto or be construed as being limited thereto.

[0092] The protective layer PL can be disposed above the window WG. The protective layer PL can function as a layer for protecting an upper surface of the window WG. The protective layer PL can include a polymer film.

[0093] An impact absorbing layer IL can be disposed above the display module DM and can protect the display module DM from being pressed and deformed due to external impact and force.

[0094] The impact absorbing layer IL can include a flexible plastic material. As an example, the impact absorbing layer IL can include polyethylene terephthalate (PET).

[0095] The display module DM can be activated in response to an electrical signal, and the activated display module DM can display an image IM (refer to Figure 1A ) through the first active area F-AA (refer to Figure 1A ) of the electronic device ED. The display module DM can include a display area DP-DA and a non-display area DP-NDA defined in the display module DM. The display area DP-DA can be activated in response to an electrical signal. The non-display area DP-NDA can be defined adjacent to at least one side of the display area DP-DA.

[0096] The display module DM can include a display panel DP, a plate PT disposed below the display panel DP, a resin layer RL disposed between the display panel DP and the plate PT, and a circuit board FPCB disposed below the plate PT.

[0097] Although not shown in the drawings, Figure 3 the display module DM can further include an input sensing layer disposed on the display panel DP or an optical layer disposed between the display module DM and the window WG.

[0098] The display panel DP can have a substantially rectangular shape. The display panel DP can include a plurality of pixels PX arranged in a matrix form. Figure 1A) of FIG. 1. The display panel DP can include a first substrate 100 and a second substrate 200 disposed on the first substrate 100. In the second direction DR2, the first substrate 100 can have a length longer than a length of the second substrate 200.

[0099] The first substrate 100 can be provided with a second hole HH2 defined through an upper surface and a rear surface of the first substrate 100.

[0100] The plate PT can be disposed under the display panel DP. The plate PT can prevent foreign substances from entering the display module DM.

[0101] In addition, the plate PT can include a pattern portion PP (refer to FIG. 1) overlapping the folding area and filled with a resin in order to facilitate the folding operation of the electronic device ED and the flat portions FP1 and FP2 (refer to FIG. 1), and this will be described in detail later. Figure 7 ) of FIG. 1. The display panel DP can include a first substrate 100 and a second substrate 200 disposed on the first substrate 100. In the second direction DR2, the first substrate 100 can have a length longer than a length of the second substrate 200. Figure 7

[0102] The plate PT can have a thickness TH greater than a thickness DH of the display panel DP. The plate PT can have a thickness TH equal to or greater than about 70 µm and equal to or less than about 400 µm. In detail, the plate PT can have a thickness TH equal to or greater than about 100 µm and equal to or less than about 300 µm.

[0103] The plate PT can include a glass material. Accordingly, the plate PT can be electrically non-conductive and have improved processability. The plate PT can be provided with a first hole HH1 defined through the plate PT to connect the display panel DP and the circuit board FPCB.

[0104] The resin layer RL can be disposed between the plate PT and the display panel DP. The resin layer RL can function to attach the plate PT to the display panel DP.

[0105] The resin layer RL can have a modulus equal to or greater than about 1 MPa and equal to or less than about 5 GPa, and can include a first resin. As an example, the first resin can include an adhesive material such as a silicon-based adhesive material, an epoxy-based adhesive material, an acrylic-based adhesive material. The resin layer RL can have a thickness RT equal to or greater than about 5 µm and equal to or less than about 20 µm.

[0106] The circuit board FPCB can be disposed on a rear surface of the plate PT. The circuit board FPCB can include a substrate film FP and a driving circuit DC.

[0107] ​The basement membrane FP can receive and transmit electrical signals and can be connected to a drive circuit DC. In this embodiment, the basement membrane FP can be provided in the form of a flexible membrane. As an example, the basement membrane FP can be provided in the form of a printed circuit board; however, this disclosure should not be limited to or restricted by this. That is, the basement membrane FP does not necessarily need to be bent and can be provided in a rigid, flat form.

[0108] The driving circuit DC can be disposed on the rear surface of the base film FP. The driving circuit DC can direct power to pixel PX (reference). Figure 5 The electrical signal is transmitted to drive the pixel PX. The driving circuit DC can be mounted on the back surface of the base film FP as a driving chip.

[0109] The housing HAU can be coupled to the window WG and the protective layer PL to define the exterior of the electronic device ED. The housing HAU can provide a predetermined receiving space. The display module DM can be housed in the receiving space and can be protected from external impacts. According to an embodiment, the housing HAU may also include a hinge structure that overlaps with the folding area FA to guide the folding operation of the electronic device ED.

[0110] The housing HAU may include materials with relatively high rigidity. As an example, the housing HAU may include multiple frames and / or support plates formed of glass, plastic, or metal materials.

[0111] In conventional foldable electronic devices, the plate disposed beneath the display panel is formed of a metal material with a high modulus. Unlike conventional foldable electronic devices, the plate PT according to a non-limiting embodiment of this disclosure may comprise a glass material. Due to the properties of the material, a glass plate PT can be much lighter than a metal plate, and the processability of the plate PT can be improved.

[0112] For example, the first hole HH1 on the upper and rear surfaces of the through board PT can be easily formed by a glass through-hole (TGV) forming process, and therefore, the circuit board FPCB can be connected to the display panel DP.

[0113] Therefore, the arrangement of the circuit board FPCB of the display module DM can be changed. According to this embodiment, since the circuit board FPCB can be positioned below the board PT, the non-display area DP-NDA can be reduced, and the display area DP-DA can be increased. Therefore, user usability and convenience can be improved.

[0114] In addition, based on the display module DM, the modulus of the resin layer RL and the plate PT can be optimized to prevent cracking and buckling during folding operations.

[0115] The electronic device ED according to the present embodiment can further include a first adhesive layer AD1, a second adhesive layer AD2, and a third adhesive layer AD3.

[0116] The first adhesive layer AD1 can be disposed between the window WG and the protection layer PL. The second adhesive layer AD2 can be disposed between the impact absorption layer IL and the window WG. The third adhesive layer AD3 can be disposed between the display module DM and the impact absorption layer IL.

[0117] Each of the first adhesive layer AD1, the second adhesive layer AD2, and the third adhesive layer AD3 can include a conventional adhesive such as a pressure sensitive adhesive (PSA), an optical clear adhesive (OCA), or an optical clear resin (OCR), etc., but should not be particularly limited.

[0118] Although not separately shown, the electronic device ED can further include an ultra-thin glass layer disposed on the display panel DP and a protection layer disposed on the ultra-thin glass layer.

[0119] The electronic device ED can further include an impact absorption layer disposed between the ultra-thin glass layer and the display panel DP and including polyethylene terephthalate (PET).

[0120] Figure 4 A cross-section of a portion of the electronic device ED according to an embodiment of the disclosure is illustrated. For convenience of explanation, the housing HAU (refer to Figure 4 ) and the circuit board FPCB (refer to Figure 3 ) are omitted in the electronic device ED illustrated in Figure 3 .

[0121] Table 1 and Table 2 below are used to explain the allowable modulus of the plate PT included in the display module DM (refer to Figure 3 ) in the electronic devices ED of Embodiment Examples 1 and 2 according to the disclosure, respectively.

[0122] Hereinafter, the allowable modulus of the plate PT included in the display module DM (refer to Figure 3 ) will be described with reference to Figure 4 and Table 1 and Table 2. In the disclosure, the term "allowable" refers to a state in which at least one of the plurality of components included in the display module DM (refer to Figure 3 ) does not occur buckling during a folding operation of the display module DM (refer to Figure 3 ). In addition, it refers to a state in which no irreversible change (e.g., a crack) in physical properties occurs in the display module DM (refer to Figure 3 ).

[0123] Table 1 and Table 2 show experimental results when the display module DM is folded at about 1.5R and about -20℃. In Table 1 and Table 2, the term "NG" indicates that buckling occurs in at least one of the plurality of components included in the display module DM (refer to Figure 3 ) and the term "OK" indicates that buckling does not occur in the components included in the display module DM (refer to Figure 3 ) The term "Risk" indicates that buckling does not occur in the display module DM (refer to Figure 3 ) but there is a possibility that buckling can occur.

[0124] In Table 1 and Table 2, "B / P" can mean "backplane".

[0125] Table 1

[0126]

[0127] As shown in Figure 4 , the electronic device ED according to Embodiment Example 1 can include a plate PT, a resin layer RL, a display panel DP, a third adhesive layer AD3, an impact absorbing layer IL, a second adhesive layer AD2, a window WG, a first adhesive layer AD1, and a protection layer PL, which are sequentially stacked in a third direction DR3. In addition, these components respectively have thicknesses of about 150 µm, about 10 µm, about 30 µm, about 50 µm, about 23 µm, about 50 µm, about 30 µm, about 50 µm, and about 70 µm. Referring to Table 1, although the resin layer RL has a modulus of about 1.4 GPa in the electronic device ED according to Embodiment Example 1, the electronic device ED can be folded when the pattern portion PP has a modulus ranging from about 100 MPa to about 1 GPa.

[0128] However, when the pattern portion PP has a modulus of about 10 MPa, a bending strain occurring in the encapsulation layer of the display panel DP is about 0.72%, and when the pattern portion PP has a modulus of about 1.5 GPa, a bending strain (compressive strain) occurring in the encapsulation layer of the display panel DP is about -0.89%. When the absolute value of the compressive strain occurring in the encapsulation layer of the display panel DP is equal to or greater than about 0.7%, this can indicate a risk of buckling in the electronic device ED.

[0129] In addition, when the pattern portion PP has a modulus of about 2 GPa, buckling can occur.

[0130] As described above, in the case of Embodiment Example 1, when the modulus of the pattern portion PP is in a range of about 10 MPa or more and about 1 GPa or less, the reliability of the electronic device ED can be ensured.

[0131] Table 2

[0132]

[0133] The electronic device ED according to embodiment example 2 can include the plate PT, the resin layer RL, the display panel DP, the second adhesive layer AD2, the window WG, the first adhesive layer AD1, and the protection layer PL stacked sequentially in the third direction DR3. That is, compared to the electronic device ED according to embodiment example 1 illustrated in FIG. 1A, the third adhesive layer AD3 and the impact absorbing layer IL are omitted in the electronic device ED according to embodiment example 2. Figure 4 In addition, the components of the electronic device ED according to embodiment example 2 have thicknesses of about 150 µm, about 10 µm, about 30 µm, about 50 µm, about 30 µm, about 50 µm, and about 70 µm, respectively. Referring to Table 2, although the resin layer RL has a modulus of about 1.4 GPa in the electronic device ED according to embodiment example 2, the electronic device ED can be folded when the pattern portion PP has a modulus of about 10 MPa, about 100 MPa, or about 1 GPa.

[0134] However, when the pattern portion PP has a modulus of about 1.5 GPa, the bending strain occurring in the encapsulation layer of the display panel DP increases to about -1.06%. In addition, when the pattern portion PP has a modulus of about 2 GPa, buckling can occur.

[0135] As described above, in the case of embodiment example 2, when the modulus of the pattern portion PP is in the range of about 10 MPa or more and about 1 GPa or less, the reliability of the electronic device ED can be ensured.

[0136] In addition, according to the display module DM, since the resin layer RL having a high modulus is disposed under the display panel DP, the display panel DP can be prevented from sagging due to gravity.

[0137] Figure 5 is a plan view of a display panel DP according to an embodiment of the disclosure. Figure 6 is a cross-sectional view of a portion of a display panel DP according to an embodiment of the disclosure. Figure 6 shows a cross-section of the display panel DP corresponding to a portion of the light emitting area PXA and the non-light emitting area NPXA.

[0138] Referring to Figure 5 , the display panel DP can include a pixel PX, a gate driver circuit GDC, and a signal line SL.

[0139] The pixel PX can be arranged in the display area DP-DA. Figure 5A structure in which the pixels PX are arranged in the first direction DR1 and the second direction DR2 is shown as a representative example. However, the arrangement of the pixels PX should not be limited to or by this. As an example, the pixels PX can be arranged in the form of five tiles .

[0140] Each of the plurality of pixels PX can include a light emitting element and a pixel driving circuit connected to the light emitting element. In the present embodiment, the light emitting element can be an organic light emitting element.

[0141] The gate driving circuit GDC can be disposed in the non-display area DP-NDA of the display panel DP. The gate driving circuit GDC can sequentially output gate signals to the gate lines GL. The gate driving circuit GDC can be integrated in the display panel DP by a silicon gate oxide (OSG) driving circuit or amorphous silicon gate (ASG) driving circuit process.

[0142] The signal lines SL can be disposed in the display area DP-DA and the non-display area DP-NDA. The signal lines SL can include the gate lines GL, the data lines DL, the power supply lines PWL, and the control signal lines CSL.

[0143] Each of the plurality of gate lines GL can be connected to a corresponding pixel PX among the plurality of pixels PX, and each of the plurality of data lines DL can be connected to a corresponding pixel PX among the plurality of pixels PX. The power supply lines PWL can be connected to the pixels PX. The control signal lines CSL can provide control signals to the gate driving circuit GDC.

[0144] The gate lines GL can extend in the first direction DR1 and can be arranged in the second direction DR2. The data lines DL can extend in the second direction DR2 and can be arranged in the first direction DR1. The data lines DL can be insulated from the gate lines GL while crossing the gate lines GL.

[0145] The auxiliary signal lines PL-D can be arranged to overlap the non-display area NDA and can be connected to the data lines DL. The auxiliary signal lines PL-D connected to the data lines DL can be disposed on different layers from the data lines DL. Each of the plurality of data lines DL can be electrically connected to a corresponding auxiliary signal line among the plurality of auxiliary signal lines PL-D through a contact hole CH.

[0146] The contact hole CH can penetrate at least one insulating layer among a plurality of insulating layers disposed between the data line DL and the auxiliary signal line PL-D. Figure 5 Two contact holes CH are shown as a representative example, however, the present disclosure should not be limited to or by this. According to an embodiment, the contact hole CH can be omitted. The data line DL can be disposed on the same layer as the auxiliary signal line PL-D.

[0147] In this case, one of the plurality of data lines DL and one of the plurality of auxiliary signal lines PL-D connected to the one of the plurality of data lines can be defined as one signal line. The one of the plurality of data lines and the one of the plurality of auxiliary signal lines connected to each other can correspond to different portions of one signal line.

[0148] Each of the plurality of signal lines SL can include a line member SL-N and a signal pad SL-PD. In the present embodiment, the line member SL-N can be provided integrally with the signal pad SL-PD, but they are distinguished for convenience of explanation. That is, an end portion of each of the plurality of signal lines SL can be referred to as a signal pad SL-PD, however, the present disclosure should not be limited to or restricted by this. According to an embodiment, the signal pad SL-PD can be provided separately from the line member SL-N.

[0149] Figure 5 A structure in which the signal pads S1-PD, which are representative examples, are arranged in a row along the first direction DR1 is shown, however, the arrangement of the signal pads SL-PD should not be limited to or restricted by this. As an example, the signal pads SL-PD can be arranged in a plurality of rows.

[0150] Reference Figure 6 The display panel DP can include a first substrate 100 and a second substrate 200.

[0151] The first substrate 100 can provide a base surface on which components of the display panel DP are disposed. The first substrate 100 can also be referred to as a base substrate. In the present embodiment, the base substrate 100 can include polyimide (PI).

[0152] The second substrate 200 can be disposed on the first substrate 100. The second substrate 200 can include a circuit element layer DP-CL, a display element layer DP-OLED disposed on the circuit element layer DP-CL, and a sealing layer TFL disposed on the display element layer DP-OLED.

[0153] For convenience of explanation, Figure 6 Only one transistor TR is shown as a representative example of a pixel driving circuit, however, the present disclosure should not be limited to or restricted by this. According to an embodiment, the pixel PX can include a plurality of transistors.

[0154] In the present embodiment, the circuit element layer DP-CL can include the barrier layer BRL, the buffer layer BFL, the first insulating layer 10, the second insulating layer 20, the third insulating layer 30, the fourth insulating layer 40, and the fifth insulating layer 50, the transistor TR, the signal line SL, the first connection electrode CNE1, and the second connection electrode CNE2, however, the present disclosure should not be limited thereto or thereby. The barrier layer BRL or the buffer layer BFL can be omitted, one or more of the first insulating layer 10, the second insulating layer 20, the third insulating layer 30, the fourth insulating layer 40, and the fifth insulating layer 50 can be omitted, or the circuit element layer DP-CL can further include other insulating layers.

[0155] The barrier layer BRL can be provided on the base substrate 100. The barrier layer BRL can prevent foreign matter from entering from the outside. The barrier layer BRL can include a silicon oxide layer and a silicon nitride layer. Each of the silicon oxide layer and the silicon nitride layer can be provided as a plurality, and the silicon oxide layer can be stacked alternately with the silicon nitride layer.

[0156] The buffer layer BFL can be provided on the barrier layer BRL. The buffer layer BFL can improve adhesion between the semiconductor pattern and the base substrate 100 or between the conductive pattern and the base substrate 100. The buffer layer BFL can include a silicon oxide layer and a silicon nitride layer. The silicon oxide layer and the silicon nitride layer can be stacked alternately with each other.

[0157] The semiconductor pattern can be provided on the buffer layer BFL. The semiconductor pattern can include polysilicon, however, should not be limited thereto or thereby. According to an embodiment, the semiconductor pattern can include amorphous silicon or metal oxide.

[0158] The transistor TR can include a gate G connected to a gate line, an active portion A overlapping the gate G, a source S connected to a data line, and a drain D provided spaced apart from the source S. The source S, the active portion A, and the drain D of the transistor TR can be formed of the semiconductor pattern.

[0159] The first insulating layer 10 can be provided on the buffer layer BFL. The first insulating layer 10 can cover the semiconductor pattern. The first insulating layer 10 can overlap in common with the pixel PX. The gate G can be provided on the first insulating layer 10. The gate G can be a part of a metal pattern. The gate G can overlap the active portion A.

[0160] The second insulating layer 20 can be provided on the first insulating layer 10 and can cover the gate G. The second insulating layer 20 can overlap in common with the pixel PX. Although not shown in Figure 6 The upper electrode can be provided on the second insulating layer 20 to overlap the gate G, although not shown in FIG. 1. The first connection electrode CNE1 provided on the second insulating layer 20 can be connected to the signal line SL via a contact hole CNT-1 defined through the first insulating layer 10 and the second insulating layer 20.

[0161] The third insulating layer 30 can be disposed on the second insulating layer 20 to cover the upper electrode and the first connection electrode CNE1.

[0162] Each of the first to third insulating layers 10 to 30 can be an inorganic layer and / or an organic layer, and can have a single layer or a multi-layer structure.

[0163] The fourth insulating layer 40 can be disposed on the third insulating layer 30. The second connection electrode CNE2 can be disposed on the fourth insulating layer 40. The second connection electrode CNE2 can be connected to the first connection electrode CNE1 via a contact hole CNT-2 defined through the third insulating layer 30 and the fourth insulating layer 40.

[0164] The fifth insulating layer 50 can be disposed on the fourth insulating layer 40 and can cover the second connection electrode CNE2. The fifth insulating layer 50 can be an organic layer. The first electrode AE can be disposed on the fifth insulating layer 50. The first electrode AE can be connected to the second connection electrode CNE2 via a contact hole CNT-3 defined through the fifth insulating layer 50.

[0165] The display element layer DP-OLED can include a pixel definition layer PDL and a light emitting element OLED. A pixel opening OPN can be defined by the pixel definition layer PDL. At least a portion of the first electrode AE can be exposed through the pixel opening OPN of the pixel definition layer PDL. In the present embodiment, a light emitting area PXA can be defined to correspond to the portion of the first electrode AE exposed through the pixel opening OPN.

[0166] The hole control layer HCL can be commonly disposed to span the light emitting area PXA and the non-light emitting area NPXA. The hole control layer HCL can include a hole transport layer and can further include a hole injection layer.

[0167] The light emitting layer EML can be disposed on the hole control layer HCL. The light emitting layer EML can be disposed in an area corresponding to the pixel opening OPN. That is, the light emitting layer EML can be disposed in each of the plurality of pixels PX after being divided into a plurality of portions, however, the present disclosure should not be limited to or by this. According to an embodiment, the light emitting layer EML can be commonly formed in the pixels PX using an opening mask.

[0168] The electron control layer ECL can be disposed on the light emitting layer EML. The electron control layer ECL can include an electron transport layer and can further include an electron injection layer. The hole control layer HCL and the electron control layer ECL can be commonly formed in the pixels PX using an opening mask.

[0169] The second electrode CE can be disposed on the electronic control layer ECL. The second electrode CE can have an integral shape and can be commonly disposed throughout the pixel PX.

[0170] The encapsulation layer TFL can be disposed on the second electrode CE. The encapsulation layer TFL can include a plurality of thin layers. The encapsulation layer TFL can prevent moisture and oxygen from entering the display element layer DP-OLED.

[0171] Figure 7 is a cross-sectional view of a portion of the display module DM taken along the line I-I' of Figure 5 . Figure 8 is an enlarged view of the AA' area of Figure 7 . Figure 9 is a cross-sectional view of a portion of the display module taken along the line II-II' of Figure 5 .

[0172] Hereinafter, a connection path between the circuit board FPCB and the signal line SL will be described with reference to Figures 7-9 .

[0173] Each of the plurality of signal lines SL can include a line member SL-N and a signal pad SL-PD. One side of each of the plurality of signal lines SL can be connected to the pixel PX (see Figure 5 ), and the other side of each of the plurality of signal lines SL can be connected to the second line CL2. That is, the line member SL-N corresponding to the one side can be connected to the pixel PX (see Figure 5 ), and the signal pad SL-PD corresponding to the other side can be connected to the second line CL2. The signal line SL can be connected to the circuit board FPCB through the second line CL2 and the first line CL1.

[0174] With reference to Figure 7 and Figure 8 , the display module DM can include a pad area PA defined in the second non-folded area NFA2.

[0175] In the disclosure, the pad area PA can be defined as an area in which the signal pad SL-PD is disposed when viewed in a planar view.

[0176] The base substrate 100 can include an overlapping portion 100-1 and a protruding portion 100-2. However, in the disclosure, the overlapping portion 100-1 and the protruding portion 100-2 are merely distinguished for convenience of explanation, and the base substrate 100 can be provided as a single unit.

[0177] The protruding portion 100-2 can protrude outward by about 0.01 mm or more and about 1 mm or less with respect to an end RE of the resin layer RL adjacent to the first hole HH1. The overlapping portion 100-1 can extend inward with respect to the end RE and can overlap the resin layer RL.

[0178] The protruding portion 100-2 can be provided with a second hole HH2 defined through an upper surface and a rear surface of the protruding portion 100-2.

[0179] The second hole HH2 can overlap the first hole HH1 when viewed in a plane.

[0180] As shown in FIG. 1A, the first hole HH1 and the second hole HH2 can be openings having a circular shape when viewed in a plane, however, the shape of the first hole HH1 and the second hole HH2 should not be limited thereto or thereby. Figure 3 The second line CL2 can be disposed in the second hole HH2. Each of the plurality of second lines CL2 can include a second-first pad PD2-1 exposed without being covered by the rear surface of the protruding portion 100-2, a second-second pad PD2-2 exposed without being covered by the upper surface of the protruding portion 100-2, and a second connection portion TP disposed between the second-first pad PD2-1 and the second-second pad PD2-2. However, they are distinguished only for convenience of explanation, and each of the plurality of second lines CL2 can be provided as a single unit.

[0181] The second line CL2 can be in contact with the signal pad SL-PD. In detail, the second line CL2 can be in direct contact with the signal pad SL-PD. That is, when the second line CL2 is formed in the second hole HH2 and the signal line SL is formed on the second line CL2 and the base substrate 100 by a deposition process, the signal pad SL-PD can be directly formed on the second-second pad PD2-2.

[0182] Each of the plurality of first holes HH1 can be defined through an upper surface PU and a rear surface PB of the plate PT. The first line CL1 can be disposed in the first hole HH1.

[0183] Each of the plurality of first lines CL1 can include a first-first pad PD1-1 exposed without being covered by the rear surface PB of the plate PT, a first-second pad PD1-2 exposed without being covered by the upper surface PU of the plate PT, and a first connection portion TG disposed between the first-first pad PD1-1 and the first-second pad PD1-2. However, they are distinguished only for convenience of explanation, and each of the plurality of first lines CL1 can be provided as a single unit.

[0184]

[0185] ​The first holes HH1 and the first lines CL1 can be formed through a through glass via (TGV) process. As an example, a laser beam can be used to etch the plate PT to form openings, and a conductive material can be filled in the openings. In detail, the first holes HH1 that penetrate the upper surface PU and the back surface PB of the plate PT are formed using a laser beam, and a conductive material for the first lines CL1 can be filled in the first holes HH1.

[0186] Accordingly, the openings defined as the first holes HH1 can be accurately formed. When viewed in a cross-section, each of the plurality of first holes HH1 can have a width HW1 equal to or greater than about 10 pm and equal to or less than about 100 pm.

[0187] The circuit board FPCB can include a base film FP and a driving circuit DC. The circuit board FPCB can further include a base pad FP-PD disposed on the base film FP. The driving circuit DC can be connected to the base pad FP-PD via a conductive line DCL included in the base film FP.

[0188] The display module DM according to the present embodiment can further include a first conductive film CF1 disposed between the plate PT and the circuit board FPCB, and a second conductive film CF2 disposed between the base substrate 100 and the plate PT.

[0189] In the present embodiment, each of the first conductive film CF1 and the second conductive film CF2 can be an anisotropic conductive film (ACF). Each of the first conductive film CF1 and the second conductive film CF2 can include a conductive ball CB and an adhesive resin AR.

[0190] The second-first pad PD2-1 and the first-second pad PD1-2 can be pressed against each other with the second conductive film CF2 interposed therebetween, and thus, the second-first pad PD2-1 and the first-second pad PD1-2 can be connected to each other. The first-first pad PD1-1 and the base pad FP-PD can be pressed against each other with the first conductive film CF1 interposed therebetween, and thus, the first-first pad PD1-1 and the base pad FP-PD can be connected to each other.

[0191] Reference Figure 7 and Figure 8 The driving circuit DC can be connected to the corresponding pixel PX through the base film FP, the first line CL1, the second line CL2, and the signal line SL. Accordingly, although the circuit board FPCB is disposed on the back surface of the plate PT, the electrical signal generated by the driving circuit DC can be applied to the pixel PX (refer to Figure 5 ) or the transistor TR (refer toFigure 6 ).

[0192] As described above, when the circuit board FPCB is disposed on the rear surface of the display module DM, the non-display area DP-NDA (refer to Figure 1A ) of the electronic device ED (refer to Figure 3 ) can be reduced.

[0193] Referring to Figure 9 , the signal pads SL-PD can be connected to the corresponding second lines CL2, respectively, the second lines CL2 can be connected to the corresponding first lines CL1, respectively, and the first lines CL1 can be connected to the base film FP through the base pads FP-PD (refer to Figure 8 ).

[0194] The display module DM (refer to Figure 7 ) according to the present embodiment can further include an adhesive layer disposed between the plate PT and the circuit board FPCB (refer to Figure 7 ). The adhesive layer PSL (refer to Figure 7 ) can include a pressure sensitive adhesive material. The circuit board FPCB can be attached to the rear surface PB (refer to Figure 8 ) of the plate PT through the adhesive layer PSL.

[0195] In the present embodiment, as shown in Figure 4 , the plate PT can include a pattern portion PP, a first flat portion FP1, and a second flat portion FP2. The modulus of the pattern portion PP of the plate PT can be lower than the modulus of the flat portions FP1 and FP2 of the plate PT. This will be described in detail with reference to Figure 10 and Figure 11 .

[0196] Figure 10 is a cross-sectional view of a folded state of a display module DM according to an embodiment of the disclosure.

[0197] Figure 11 is a cross-sectional view of a pattern portion PP included in a display module according to an embodiment of the disclosure.

[0198] Referring to Figure 10 , the circuit board FPCB can not be bent even in the folded state. Accordingly, the circuit board FPCB can maintain its shape, and thus, it can be possible to prevent a crack from occurring. In addition, it can be possible to prevent the circuit board FPCB from being separated from the display panel DP.

[0199] Referring to Figure 11 , by making at least a portion of the upper surface PU or the rear surface PB of the pattern portion PP recessed, a groove pattern GP can be defined in the pattern portion PP.

[0200] The pattern portion PP can include a resin portion RP filled in the groove pattern GP. Accordingly, a modulus of the pattern portion PP can be lower than that of the flat portions FP1 and FP2. As an example, the pattern portion PP can have a modulus equal to or greater than about 10 MPa and equal to or less than about 1 GPa. In detail, the pattern portion PP can have a modulus equal to or greater than about 20 MPa and equal to or less than about 1 GPa. In the disclosure, a modulus of the pattern portion PP can be evaluated using a two-point bending (2PB) method. Accordingly, when the display panel DP is folded together with the plate PT, separation between the display panel DP and the circuit board FPCB can be prevented.

[0201] In the present embodiment, the groove pattern GP can include a first groove pattern GPa defined by recessing a portion of the upper surface PU of the pattern portion PP and a second groove pattern GPb defined by recessing a portion of the rear surface PB of the pattern portion PP.

[0202] When observed in a cross-section, the first groove pattern GPa can have a width that decreases as it extends from the upper surface PU of the pattern portion PP to the rear surface PB of the pattern portion PP. In addition, the second groove pattern GPb can have a width that decreases as it extends from the rear surface PB of the pattern portion PP to the upper surface PU of the pattern portion PP. In a cross-section, a side surface of the plate PT that defines the second groove pattern GPb can have a tapered shape that narrows in a direction from the rear surface PB toward the upper surface PU. In a cross-section, a side surface of the plate PT that defines the first groove pattern GPa can have a tapered shape that narrows in a direction from the upper surface PU toward the rear surface PB.

[0203] The resin portion RP can be filled in the groove pattern GP. The resin portion RP can include a second resin. The second resin can include a synthetic resin material. As an example, the second resin can include at least one of urethane-based resin, epoxy-based resin, polyester-based resin, polyether-based resin, acrylate-based resin, acrylonitrile-butadiene-styrene (ABS) resin, and rubber. In detail, the second resin can include at least one of polyethylene terephthalate (PET), polyimide (PI), polyamide (PAI), polyethylene naphthalate (PEN), and polycarbonate (PC).

[0204] The second resin can include a material having a refractive index substantially the same as that of the pattern portion PP. Accordingly, light traveling to the resin portion RP and the pattern portion PP can not be refracted at a boundary between the resin portion RP and the pattern portion PP. Accordingly, a user can not see the boundary between the resin portion RP and the pattern portion PP.

[0205] In a conventional foldable electronic device, when the modulus of an adhesive layer for attaching a display panel and a board is low, the circuit board is separated or cracks occur during folding, and when the modulus of the adhesive layer is high, a buckling phenomenon occurs between the display panel and the board.

[0206] Unlike a conventional rule foldable electronic device, the electronic device ED according to non-limiting embodiments of the present disclosure optimizes the material for the board PT, the position of the circuit board FPCB, and the modulus of the resin layer RL, thereby preventing cracks and / or a buckling phenomenon that are known to occur.

[0207] Figures 12-14 is a cross-sectional view of a pattern portion PP, PP-1, PP-2 included in a display module according to embodiments of the present disclosure.

[0208] In Figures 12-14 , the same / similar reference numerals refer to the same / similar elements as in Figure 11 , and thus a detailed description of the same elements will be omitted.

[0209] Referring to Figure 12 , the pattern portion PP-1 can include a groove pattern portion GP-1 defined as penetrating the upper surface PU and the rear surface PB of the pattern portion PP-1 completely. In the present embodiment, a plurality of groove pattern portions GP-1 can be provided, and the groove pattern portions GP-1 can be arranged apart from each other at a predetermined distance.

[0210] A resin portion RP-1 including a first resin can be disposed in each of the plurality of groove pattern portions GP-1.

[0211] Referring to Figure 13 , the pattern portion PP-2 can include a groove pattern portion GP-2 defined by making a portion of the rear surface PB concave upward toward the upper surface PU of the pattern portion PP-2.

[0212] In the present embodiment, the groove pattern portion GP-2 can be defined by a groove flat portion GF and first groove inclined portions GS-1 spaced apart from each other with the groove flat portion GF interposed therebetween, and the first groove inclined portions GS-1 are inclined toward the groove flat portion GF.

[0213] A resin portion RP-2 including a first resin can be disposed in the groove pattern portion GP-2.

[0214] Referring to Figure 14The pattern portion PP-3 can include a groove pattern portion GP-3 defined as penetrating the upper surface PU and the rear surface PB of the pattern portion PP-3 entirely. The side surface of the pattern portion PP-3 defining the groove pattern portion GP-3 can be inclined in a direction toward an opening formed through the upper surface PU. That is, when viewed in a planar surface, a pattern hole PH can be defined through the upper surface PU of the pattern portion PP-3, and the side surface of the pattern portion PP-3 defining the groove pattern portion GP-3 can be inclined in a direction toward the pattern hole PH.

[0215] The resin portion RP-3 including the first resin can be disposed in the groove pattern portion GP-3. When viewed in a cross-section, the resin portion RP-3 can have a trapezoidal shape with a lower side longer than an upper side.

[0216] While embodiments of the present disclosure have been described, it is understood that the present disclosure should not be limited to these embodiments but various changes and modifications can be made by one ordinary skilled in the art within the spirit and scope of the claimed present disclosure. Accordingly, the disclosed subject matter should not be limited to any single embodiment described herein, but rather the scope of the inventive concept should be according to the appended claims.

Claims

1. An electronic device, wherein, The electronic device includes: A display panel includes a folded region defined in the display panel and a first non-folded region and a second non-folded region defined in the display panel and spaced apart from each other, wherein the folded region is located between the first non-folded region and the second non-folded region, and the display panel includes pixels and a plurality of signal lines connected to the pixels. A plate, disposed below the display panel, includes a patterned portion overlapping the folded area, a first flat portion overlapping the first non-folded area, and a second flat portion overlapping the second non-folded area, and the plate is provided with a plurality of first holes defined through the upper and rear surfaces of the plate. Multiple first lines are disposed in the multiple first holes and connected to the multiple signal lines; and The circuit board is connected to the multiple signal lines via the multiple first lines and is disposed below the board.

2. The electronic device according to claim 1, wherein, The plate is non-conductive and comprises glass material.

3. The electronic device according to claim 1, wherein, The plate has a thickness of 70 micrometers or greater and 400 micrometers or less.

4. The electronic device according to claim 1, wherein, The display panel also includes: A substrate, comprising polyimide, and provided with a plurality of second holes defined through the upper and rear surfaces of the substrate and overlapping the first hole; and Multiple second lines are provided in the multiple second holes.

5. The electronic device according to claim 4, wherein, Each of the plurality of first lines further includes a first-first pad exposed not covered by the rear surface of the board and a first-second pad exposed not covered by the upper surface of the board, and each of the plurality of second lines further includes a second-first pad exposed not covered by the rear surface of the substrate and a second-second pad exposed not covered by the upper surface of the substrate.

6. The electronic device according to claim 4, wherein, The electronic device also includes: A first conductive film is disposed between the circuit board and the plate; and A second conductive film is disposed between the plate and the substrate.

7. The electronic device according to claim 6, wherein, One end of each of the multiple signal lines is connected to the pixel, the other end of each of the multiple signal lines is connected to the multiple second lines, and the multiple signal lines are connected to the circuit board via the multiple second lines and the multiple first lines.

8. The electronic device according to claim 1, wherein, When viewed in cross-section, each of the plurality of first holes has a width equal to or greater than 10 micrometers and equal to or less than 100 micrometers.

9. The electronic device according to claim 1, wherein, The electronic device further includes a resin layer disposed between the plate and the display panel, the resin layer comprising a first resin having a modulus equal to or greater than 1 MPa and equal to or less than 5 GPa.

10. The electronic device according to claim 9, wherein, The resin layer has a thickness of 5 micrometers or greater and 20 micrometers or less.

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