Parallel circulating current suppression method and device of fractional order inverter, electronic equipment and storage medium

Abstract

The application discloses a parallel circulating current suppression method and device of a fractional order inverter, electronic equipment and a storage medium, and comprises the following steps: establishing a mathematical model of a fractional order inverter comprising a fractional order inductor and a fractional order capacitor, constructing a voltage and current double control loop based on a fractional order controller based on the mathematical model, and tracking and controlling the output voltage and current of the parallel fractional order inverters, and suppressing the circulating current by power sharing of the parallel fractional order inverters through droop control and fractional order virtual impedance. On the one hand, the voltage and current double control loop based on the fractional order controller can track the output voltage of the inverter, improve the tracking effect of the output voltage, reduce the voltage difference between the inverters, and suppress the parallel circulating current. On the other hand, the droop control combined with the fractional order virtual impedance can improve the power distribution response speed of the fractional order inverter, improve the power distribution accuracy between the inverters, and improve the suppression effect of the parallel circulating current.

Description

Technical Field

[0001] This invention relates to the field of inverter control technology, and in particular to a method, apparatus, electronic device, and storage medium for suppressing parallel circulating current in a fractional-order inverter. Background Technology

[0002] Inverters play a crucial bridging role in energy storage power systems, enabling the conversion of direct current to alternating current. However, the power rating of a single inverter is limited, and in high-power applications, multiple inverters need to be connected in parallel to increase the system power.

[0003] When multiple inverters are connected in parallel, voltage differences are generated between them due to the differences in parameters, equivalent output impedance, and line impedance. Since the resistance on the line is very small, even a small voltage difference can form a large circulating current. The circulating current generates losses, reduces the system's operating efficiency, increases the heat generation of various components in the system, and shortens the lifespan of the components.

[0004] Currently, circulating current suppression in parallel inverters mainly includes fundamental current suppression and harmonic current suppression. Regardless of the method used, improving the power distribution accuracy between inverters in a parallel system is one of the core technologies for improving the circulating current suppression effect. In addition, both of the above methods are based on integer-order inverter models. However, actual inductor and capacitor components exhibit fractional-order characteristics and are not strictly integer-order. Therefore, the circulating current suppression effect based on integer-order inverter models is not good. Summary of the Invention

[0005] This invention provides a method, apparatus, electronic device, and storage medium for suppressing parallel circulating current in a fractional-order inverter, so as to fully utilize the fractional-order characteristics of the inverter to accurately track the output voltage and precisely allocate power, thereby improving the circulating current suppression effect in the parallel inverter.

[0006] In a first aspect, the present invention provides a method for suppressing parallel circulating current in a fractional-order inverter, comprising:

[0007] A mathematical model of a fractional inverter is established, which includes fractional inductors and fractional capacitors.

[0008] Based on the mathematical model, a voltage and current dual control loop based on a fractional-order controller is constructed, and the output voltage and current of the parallel fractional-order inverters are tracked and controlled.

[0009] By using droop control and fractional-order virtual impedance, the power of parallel fractional-order inverters is evenly distributed to suppress circulating current.

[0010] Secondly, the present invention provides a parallel circulating current suppression device for a fractional-order inverter, comprising:

[0011] The mathematical model building module is used to build a mathematical model of a fractional inverter, which includes fractional inductors and fractional capacitors.

[0012] The voltage control module is used to construct a voltage and current dual control loop based on the mathematical model and to track and control the output voltage and current of the parallel fractional inverters.

[0013] The power distribution module is used to distribute the power of parallel fractional inverters equally to suppress circulating current through droop control and fractional virtual impedance.

[0014] Thirdly, the present invention provides an electronic device, the electronic device comprising:

[0015] At least one processor; and

[0016] A memory communicatively connected to the at least one processor; wherein,

[0017] The memory stores a computer program that can be executed by the at least one processor, which enables the at least one processor to perform the parallel circulating current suppression method for a fractional-order inverter as described in the first aspect of the invention.

[0018] Fourthly, the present invention provides a computer-readable storage medium storing computer instructions that, when executed by a processor, implement the parallel circulating current suppression method for a fractional-order inverter as described in the first aspect of the present invention.

[0019] This invention first establishes a mathematical model of a fractional-order inverter, including fractional-order inductors and fractional-order capacitors. Then, based on this mathematical model, a voltage-current dual control loop based on a fractional-order controller is constructed. The output voltage and current of the parallel fractional-order inverters are tracked and controlled. Power is evenly distributed among the parallel fractional-order inverters using droop control and fractional-order virtual impedance to suppress circulating current. On one hand, the voltage-current dual control loop based on the fractional-order controller tracks the inverter's output voltage, improving the tracking effect and reducing the voltage difference between inverters to suppress parallel circulating current. On the other hand, combining droop control with fractional-order virtual impedance improves the power distribution response speed of the fractional-order inverters, increases the power distribution accuracy between inverters, and enhances the suppression effect of parallel circulating current.

[0020] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a flowchart of a parallel circulating current suppression method for a fractional-order inverter provided in Embodiment 1 of the present invention;

[0023] Figure 2 This is a schematic diagram of two fractional-order inverters connected in parallel in an embodiment of the present invention;

[0024] Figure 3 This is a flowchart of a parallel circulating current suppression method for a fractional-order inverter provided in Embodiment 2 of the present invention;

[0025] Figure 4 This is a schematic diagram of the mathematical model of the inverter in an embodiment of the present invention;

[0026] Figure 5 This is a schematic diagram of the mathematical model of the inverter with controller in an embodiment of the present invention;

[0027] Figure 6 This is a schematic diagram of the voltage and current dual control loop system in an embodiment of the present invention;

[0028] Figure 7 In this embodiment, K is determined. p1 Bode plot of the open-loop transfer function of the current control loop;

[0029] Figure 8 In this embodiment, K is determined. i1 Bode plot of the open-loop transfer function of the current control loop;

[0030] Figure 9 This is the Bode plot of the open-loop transfer function of the current control loop when λ1 is determined in this embodiment;

[0031] Figure 10 In this embodiment, K is determined. p2 Bode plot of the open-loop transfer function of the time-voltage control loop;

[0032] Figure 11 In this embodiment, K is determined. i2 Bode plot of the open-loop transfer function of the time-voltage control loop;

[0033] Figure 12 This is the Bode plot of the open-loop transfer function of the voltage control loop when λ2 is determined in this embodiment;

[0034] Figure 13This is a schematic diagram of the droop control in this embodiment;

[0035] Figure 14 This is a schematic diagram of a dual control loop with virtual impedance voltage and current in the d-axis of this embodiment;

[0036] Figure 15 This is the Bode plot of the system impedance of inverter 1 in this embodiment;

[0037] Figure 16 This is the Bode plot of the system impedance of inverter 2 in this embodiment;

[0038] Figure 17 This is the Bode plot of the system impedance after virtual impedance compensation in this embodiment;

[0039] Figure 18 This is a waveform diagram of the voltage and current of inverter 1 and inverter 2 before using virtual impedance in this embodiment;

[0040] Figure 19 This is a voltage and current waveform diagram of inverter 1 and inverter 2 after adopting virtual impedance in this embodiment;

[0041] Figure 20 This is a waveform diagram of the current and circulating current of the two inverters connected in parallel with virtual impedance in this embodiment.

[0042] Figure 21 This is a waveform diagram of the current and circulating current of the two inverters connected in parallel after adopting virtual impedance in this embodiment.

[0043] Figure 22 This is a waveform diagram of active and reactive power of the two inverters connected in parallel with virtual impedance in this embodiment.

[0044] Figure 23 This is a waveform diagram of the active and reactive power of two inverters connected in parallel after adopting virtual impedance in this embodiment.

[0045] Figure 24 This is a waveform diagram of the current and circulating current of two inverters connected in parallel under integer-order control.

[0046] Figure 25 It is a waveform diagram of active and reactive power of two inverters connected in parallel under integer order control;

[0047] Figure 26 This is a schematic diagram of the structure of a parallel circulating current suppression device for a fractional inverter provided in Embodiment 3 of the present invention;

[0048] Figure 27 This is a schematic diagram of the structure of the electronic device provided in Embodiment 4 of the present invention. Detailed Implementation

[0049] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0050] Example 1

[0051] Figure 1 This is a flowchart of a parallel circulating current suppression method for a fractional-order inverter according to Embodiment 1 of the present invention. This embodiment is applicable to suppressing circulating current in a parallel inverter system. The method can be executed by a parallel circulating current suppression device of the fractional-order inverter, which can be implemented in hardware and / or software and can be configured in an electronic device. Figure 1 As shown, the parallel circulating current suppression method for this fractional-order inverter includes:

[0052] S101. Establish a mathematical model of the fractional inverter, which includes fractional inductors and fractional capacitors.

[0053] This embodiment is applied to a system in which at least two inverters are connected in parallel to convert direct current to alternating current, such as... Figure 2 The diagram shows two inverters connected in parallel, outputting three-phase AC power to a microgrid. Each inverter includes electronic switches T1-T6, and the DC-side voltage at the input of each inverter is U. dc The DC side voltage U dc This can be the voltage output from an energy storage device or a photovoltaic device. To stabilize the DC-side voltage, a large capacitor C is usually connected in parallel on the DC side. The inverter's output voltage is u. La u Lb u Lc After passing through a fractional-order LC filter, the output is a three-phase sinusoidal voltage u. a u b u c Each phase filter inductor is a fractional-order inductor, denoted by L. α This indicates that the equivalent resistance value is R. f The current per phase after passing through the filter inductor is i La i Lb i Lc The filter capacitor connected to each phase is a fractional-order capacitor, using C. β This indicates that a star connection is used, and in practical applications, the inverter locations are randomly distributed. The line impedance of the inverter connected to the microgrid PCC cannot be ignored. The inductance and resistance values ​​in the line impedance of each phase of the inverter are L... land R l The three-phase current flowing through the line impedance is i oa i ob i oc .

[0054] A fractional inductor is an inductor with non-integer-order calculus characteristics. Its response is proportional to the non-integer derivative of the input signal. A fractional capacitor is a capacitor model based on fractional calculus theory. Its capacitance value has fractional-order power characteristics, which are significantly different from traditional integer-order capacitors in terms of frequency response and impedance characteristics. A fractional inverter is a new type of inverter that combines fractional calculus theory with power electronics technology. Its core lies in using fractional-order components (such as fractional inductors and capacitors) and fractional-order control algorithms to improve system performance.

[0055] The mathematical model of a fractional inverter can be based on fractional calculus theory, using non-integer order differential equations to describe its dynamic characteristics. Specifically, in this embodiment, it can first be based on Kirchhoff's laws... Figure 2 The circuit topology of a parallel inverter system including fractional-order inductors and fractional-order capacitors is analyzed to determine the state equations of the fractional-order inductors and capacitors in a single fractional-order inverter. Then, coordinate transformation and inverse transformation from the three-phase coordinate system to the rotating coordinate system are performed using Clark transformation matrix and Park transformation matrix to obtain expressions for the output voltage, filtered voltage, current flowing through the fractional-order inductor, and current flowing through the line impedance of the fractional-order inverter. These expressions are substituted into the state equations of the fractional-order inductors and capacitors to obtain the state equations of the fractional-order inverter in the rotating coordinate system. A mathematical model is then constructed based on the state equations of the fractional-order inverter, and the expression of this mathematical model uses at least the fractional-order inductors and capacitors as variables.

[0056] S102. Based on the mathematical model, a voltage and current dual control loop based on a fractional-order controller is constructed, and the output voltage and current of the parallel fractional-order inverters are tracked and controlled.

[0057] This embodiment employs a voltage and current dual control loop based on a fractional-order controller. This dual control loop is an advanced control method that combines fractional-order control theory with a dual closed-loop control strategy. The inner current loop uses fractional-order current loop control to track changes in the inverter's output current, quickly respond to harmonic disturbances, and improve filtering performance. The outer voltage loop uses fractional-order current loop control to regulate the stability of the DC-side voltage, ensuring that the output voltage remains constant during load changes or voltage fluctuations.

[0058] In this embodiment, a voltage and current dual control loop based on a fractional-order controller can be constructed based on the above mathematical model. Optionally, a current control loop using fractional-order current loop control can be constructed, with the open-loop transfer function of the current loop control having at least fractional-order inductance and equivalent impedance as variables. Similarly, a voltage control loop using fractional-order current loop control can be constructed, with the open-loop transfer function of the current loop control having at least fractional-order inductance and equivalent impedance as variables. After constructing the voltage and current dual control loop based on a fractional-order controller, the output voltage and current of the parallel fractional-order inverters can be tracked and controlled through the voltage and current dual control loop to ensure that the output voltages of the parallel fractional-order inverters are equal, thereby reducing voltage drop.

[0059] S103. By using droop control and fractional-order virtual impedance, the power of the parallel fractional-order inverters is evenly distributed to suppress circulating current.

[0060] Fractional-order virtual impedance is a novel control method combining fractional-order control theory and virtual impedance technology. It is primarily used to improve the stability and dynamic response performance of renewable energy grid-connected systems. Specifically, in this embodiment, the low-voltage microgrid's line impedance is relatively high. Traditional droop control requires strong coupling between active power P and phase angle difference δ, and strong coupling between reactive power and voltage amplitude, assuming the line is inductive. If the line impedance is high, the coupling condition cannot be met, and traditional droop control would inevitably fail to obtain a strongly coupled droop equation, rendering droop control unusable. Therefore, this embodiment introduces fractional-order virtual impedance to enable power decoupling in the inverter control, suppressing reactive power circulating current and allowing the inverter to distribute reactive power according to its capacity ratio.

[0061] After introducing the fractional virtual impedance, the reference voltage amplitude and reference angular velocity can be calculated by combining the detected output voltage and current of the inverter through droop control, and then input into the voltage and current dual control loop after introducing the fractional virtual impedance to generate a PWM modulation signal to control the fractional inverter and adjust the output power of the fractional inverter.

[0062] This invention first establishes a mathematical model of a fractional-order inverter, including fractional-order inductors and fractional-order capacitors. Then, based on this mathematical model, a voltage-current dual control loop based on a fractional-order controller is constructed. The output voltage and current of the parallel fractional-order inverters are tracked and controlled. Power is evenly distributed among the parallel fractional-order inverters using droop control and fractional-order virtual impedance to suppress circulating current. On one hand, the voltage-current dual control loop based on the fractional-order controller tracks the inverter's output voltage, improving the tracking effect and reducing the voltage difference between inverters to suppress parallel circulating current. On the other hand, combining droop control with fractional-order virtual impedance improves the power distribution response speed of the fractional-order inverters, increases the power distribution accuracy between inverters, and enhances the suppression effect of parallel circulating current.

[0063] Example 2

[0064] Figure 3 This is a flowchart of a parallel circulating current suppression method for a fractional-order inverter provided in Embodiment 2 of the present invention. This embodiment optimizes Embodiment 1 as described above. Figure 3 As shown, the parallel circulating current suppression method for this fractional-order inverter includes:

[0065] S301. Based on Kirchhoff's laws, the circuit topology of a parallel inverter system including fractional inductors and fractional capacitors is analyzed to determine the state equations of fractional inductors and fractional capacitors in a single fractional inverter.

[0066] Figure 2 The diagram shown is a schematic of the circuit topology of a parallel inverter system. Figure 2 The diagram shows two inverters connected in parallel, outputting three-phase AC power to a microgrid. Each inverter includes electronic switches T1-T6, and the DC-side voltage at the input of each inverter is U. dc The DC side voltage U dc This can be the voltage output from an energy storage device or a photovoltaic device. To stabilize the DC-side voltage, a large capacitor C is usually connected in parallel on the DC side. The inverter's output voltage is u. La u Lb u Lc After passing through a fractional-order LC filter, the output is a three-phase sinusoidal voltage u. a u b u c Each phase filter inductor is a fractional-order inductor, denoted by L. α This indicates that the equivalent resistance value is R. f The current per phase after passing through the filter inductor is i La i Lb i Lc The filter capacitor connected to each phase is a fractional-order capacitor, using C. βThis indicates that a star connection is used, and in practical applications, the inverter locations are randomly distributed. The line impedance of the inverter connected to the microgrid PCC cannot be ignored. The inductance and resistance values ​​in the line impedance of each phase of the inverter are L... l and R l The three-phase current flowing through the line impedance is i oa i ob i oc .

[0067] A fractional inductor is an inductor with non-integer calculus characteristics. Its response is proportional to the non-integer derivative of the input signal. A fractional capacitor is a capacitor model based on fractional calculus theory. Its capacitance value has fractional power characteristics and differs significantly from traditional integer capacitors in terms of frequency response and impedance characteristics.

[0068] In one embodiment, to construct models of fractional-order inductors and capacitors, a chain circuit composed of integer-order conventional inductors, capacitors, and resistors can be used to simulate fractional-order inductors and capacitors. Specifically, a fractional-order inductor can be equivalently represented by an RL chain circuit, and its impedance formula is as follows:

[0069] ;

[0070] L1 to L n R represents the inductance value of each inductor in the RL chain circuit. L1 -R Ln Let s be the resistance connected in series with the inductor, and s be the complex frequency.

[0071] A fractional capacitor can be equivalently represented by an RC chain circuit, and its impedance formula is as follows:

[0072] ;

[0073] C1 to C n R represents the capacitance value of each capacitor element in the RC chain circuit. C1 -R Cn Let s be the resistance connected in parallel with the capacitor, and s be the complex frequency.

[0074] Kirchhoff's laws are the fundamental laws governing voltage and current in circuits. They form the basis for analyzing and calculating complex circuits. Kirchhoff's (circuit) laws include Kirchhoff's Current Law (KCL) and Kirchhoff's Voltage Law (KVL). Kirchhoff's Current Law (KCL) states that in a circuit, the sum of all currents entering a node is equal to the sum of all currents leaving that node. Kirchhoff's Voltage Law (KVL) states that in a circuit, the algebraic sum of the potential differences (voltages) across all components along a closed loop is equal to zero.

[0075] Specifically, in this embodiment, Kirchhoff's Current Law (KCL) and Voltage Law (KVL) are used to... Figure 2 After analyzing the circuit topology shown, the state equations for the fractional-order inductor can be constructed as follows:

[0076] ;

[0077] The state equations for the fractional capacitor are constructed as follows:

[0078] ;

[0079] Among them, u La u Lb u Lc These are the three-phase voltages output by the inverter, u a u b u c These are the filtered three-phase voltages, i La i Lb i Lc Let i be the current flowing through the fractional-order inductor. oa i ob i oc These are the three-phase currents flowing through the line impedance, L α C represents the α-order filter inductance. β Represents the beta-order filter capacitor, R f The equivalent resistance of a fractional-order inductor.

[0080] S302. Based on the Clark transformation matrix and the Park transformation matrix, perform coordinate transformation and inverse transformation from the three-phase coordinate system to the rotating coordinate system to obtain the expressions for the output voltage of the fractional inverter, the filtered voltage, the current flowing through the fractional inductor, and the current flowing through the line impedance.

[0081] To facilitate the design of fractional-order controllers, this embodiment employs constant amplitude coordinate transformation. Based on the Clark transformation matrix and the Park transformation matrix, the coordinate transformation from the abc axis to the dq axis and its inverse transformation are obtained as follows:

[0082] ;

[0083] ;

[0084] Where, x a x b x c x is a phasor in a three-phase stationary coordinate system (abc coordinate system), representing the voltage or current of phases A, B, and C in a three-phase AC system. d x q T is a phasor in a two-phase rotating coordinate system (dq coordinate system), representing the voltage or current components along the d and q axes in the two-phase rotating coordinate system. 3s / 2r Let T be the coordinate transformation matrix from the abc axis to the dq axis. 2r / 3s ω is the inverse transformation matrix from the dq axis to the abc axis, ω is the angular velocity, and t is the time variable.

[0085] Therefore, the expressions for the inverter output voltage, the filtered voltage, the current flowing through the fractional-order inductor, and the current flowing through the line impedance can be obtained as follows:

[0086] ;

[0087] ;

[0088] ;

[0089] ;

[0090] u Ld u Lq u represents the d- and q-axis components of the inverter output voltage. d u q i represents the filtered output voltage components on the d and q axes of the inverter. Ld i Lq Let i represent the d- and q-axis components of the current flowing through the fractional-order inductor, respectively. od i oq ω and s are the components of the three-phase current flowing through the line impedance on the d and q axes, respectively, where ω is the angular velocity and s is the complex frequency.

[0091] S303. Substitute the expressions into the state equations of the fractional inductor and fractional capacitor to obtain the state equations of the fractional inverter in the rotating coordinate system.

[0092] Specifically, substituting the expressions for the inverter output voltage, filtered voltage, current flowing through the fractional-order inductor, and current flowing through the line impedance obtained from S302 above into the state equations of the fractional-order inductor and the fractional-order capacitor, the state equations of the fractional-order inverter in the rotating coordinate system are obtained as follows:

[0093] ;

[0094] ;

[0095] Among them, u La u Lb u Lc These are the three-phase voltages output by the inverter, u a u b u c These are the filtered three-phase voltages, i La i Lb i Lc Let i be the current flowing through the fractional-order inductor. oa i ob i oc These are the three-phase currents flowing through the line impedance, u Ld u Lq u represents the d- and q-axis components of the inverter output voltage. d u q i represents the filtered output voltage components on the d and q axes of the inverter. Ld i Lq Let i represent the d- and q-axis components of the current flowing through the fractional-order inductor, respectively. od i oq These are the components of the three-phase current flowing through the line impedance on the d and q axes, respectively. α C represents the α-order filter inductance. β Represents the beta-order filter capacitor, R f Let ω be the equivalent resistance of a fractional-order inductor, ω be the angular velocity, and s be the complex frequency.

[0096] S304. Construct a mathematical model based on the state equations of a fractional inverter.

[0097] After obtaining the state equations of the fractional inverter, a mathematical model can be constructed based on the state equations, such as... Figure 4 The diagram shown is a schematic of the mathematical model of a fractional inverter. Figure 4 As shown in the mathematical model, the d-axis and q-axis components of the inductor current and capacitor voltage are coupled. and Let be the equivalent transfer function for inductance and capacitance. and Here are the coupling term coefficients, and s is the complex frequency. Figure 4 The mathematical expression of the mathematical model shown is as follows:

[0098] ;

[0099] ;

[0100] ;

[0101] .

[0102] S305. Construct a current control loop using fractional-order current loop control.

[0103] Figure 5 This is a schematic diagram of the mathematical model of the inverter with controller in this embodiment, as shown below. Figure 5 As shown, a decoupling compensation amount, inductor current (i), is added to the feedback control loop of capacitor voltage and inductor current. Ld i Lq ) and capacitor voltage (u d u q The feedback control of all uses fractional-order PI. λ In the actual system, the sampling delay and SPWM modulation effect of the controller can be treated as a small inertial element 1 / (1+Ts) and an equivalent gain of K. pwm .

[0104] The reference voltage dq component (u) derived from the droop equation rd u rq As a reference value for current and voltage, i is obtained after capacitor voltage feedback control and decoupling compensation. Ld i Lq As a reference value for the inductor current, the modulated wave is obtained after inductor current feedback control and decoupling compensation. After SPWM modulation, the inverter output voltage (u) before filtering is obtained. Ld u Lq The filtered voltage (u) is obtained after further LC filtering. d u q ).

[0105] Let the line impedance of the inverter be Z. l The voltage of the PCC connected to the microgrid is u. o For each inverter, taking the d-axis as an example, the control block diagram including current control loop and voltage control loop is as follows: Figure 6 As shown, G1(s) is the transfer function of the current loop controller, G2(s) is the transfer function of the voltage loop controller, and T is the time coefficient of the inertial element. α For a fractional-order inductor, R f For the equivalent resistance, C β It is a fractional capacitor.

[0106] In this embodiment, the controlled object of the inverter under study is the filtered voltage u. d(Also the fractional capacitor terminal voltage), the current control loop can give the voltage control loop better anti-interference performance, therefore it is necessary to control the PI of the current loop. λ With proper parameter design, the current loop controller expression is as follows:

[0107] ;

[0108] Where λ1 is the order of the fractional-order current loop control, and K p1 K i1 These are the proportional and integral coefficients of the fractional-order current loop control, respectively. Figure 6 The voltage and current dual control loop system shown has the following open-loop transfer function for the current control loop:

[0109] ;

[0110] s is the complex frequency, T is the time coefficient of the inertial element, and K is the frequency. pwm For the equivalent gain, α is the order of the fractional inductance, and L is the value of L. α R represents the α-order filter inductance. f The equivalent resistance of a fractional-order inductor.

[0111] In practical applications, the appropriate order λ1 needs to be determined based on the crossover frequency and phase margin of the open-loop transfer function of the current control loop. The crossover frequency is the frequency corresponding to a gain of 0 dB (i.e., an amplitude of 1) on the Bode plot of the open-loop transfer function's amplitude-frequency response curve, denoted as ω. c This is the reference frequency point for calculating the phase margin. In this embodiment, the fractional-order current PI is plotted using the controlled variable method. λ1 The frequency response of the system's open-loop transfer function when the controller's proportional coefficient, integral coefficient, and order take different values ​​are as follows:

[0112] 1) Assume the switching frequency f = 5000Hz of the inverters T1-T6 under study, the time coefficient of the inertial element T = 0.0002s, and the order inductance L α and equivalent resistance R f We take 2mH and 0.02Ω respectively, and the order α of the inductance is taken as 0.8.

[0113] 2) Let K i1 =200 and λ1=0.8 remain constant, when K p1 Draw the Bode plots of the open-loop transfer function for values ​​of 1, 5, 10, and 20 respectively, as shown below. Figure 7 As shown, by Figure 7 It can be seen that when K is increased p1 When the value is selected, the intermediate frequency response is improved, but K p1 Taking a value that is too large will increase the crossover frequency, resulting in a worse phase margin. Therefore, K is chosen.p1 =10.

[0114] 3) Let K p1 =10 and λ1=0.8 remain constant, when K i1 Draw the Bode plots of the open-loop transfer function when the values ​​are 100, 150, 200, and 250 respectively, as shown below. Figure 8 As shown, by Figure 8 It can be seen that increasing K i1 It will increase low-frequency gain and reduce steady-state error, but K i1 Increasing it too much will cause the phase to drop rapidly, so K is ultimately chosen. i1 =200.

[0115] 4) Let K p1 =10 and K i1 With λ = 200 fixed, draw the Bode plot of the open-loop transfer function when λ1 takes values ​​of 0.6, 0.8, and 1.0, as shown below. Figure 9 As shown, by Figure 9 It can be seen that when λ1=1, i.e., an integer-order controller, the response speed is very fast, but there may be a high bandwidth, and the transition process may be unstable. Simultaneously, the phase drops rapidly, and the phase margin at the cross-frequency is small, easily leading to closed-loop oscillation. When λ1=0.8, the phase improvement in the mid-frequency range is significant, and the phase at the cross-frequency is larger than that of the integer-order controller, exhibiting stronger robustness. Furthermore, the phase drop slope in the high-frequency range is gentler. When λ1=0.6, the gain decreases the slowest across the entire frequency domain, the cross-frequency is smallest, and the response speed is slow. Therefore, considering all factors, λ1=0.8 is ultimately chosen.

[0116] S306. Construct a voltage control loop using fractional-order current loop control.

[0117] The expression for the voltage loop controller is as follows:

[0118] ;

[0119] λ2 is the order of the fractional-order current loop control, K p2 K i2 These are the proportional and integral coefficients of the fractional-order current loop control, respectively. Figure 6 The system control block diagram shown below has the following open-loop transfer function for the voltage control loop:

[0120] ;

[0121] β is the order of the fractional capacitance, C β This represents a beta-order filter capacitor.

[0122] Using the same controlled variable method, the proportional coefficient K of the current loop control can be obtained. p2 Integral coefficient Ki2 The frequency response of the open-loop transfer function when the fractional order λ² takes different values ​​is as follows:

[0123] 1) Let K i2 =200 and λ2=0.8 remain constant, when K p2 Draw the Bode plots of the open-loop transfer function for values ​​of 0.05, 0.1, 15, and 0.2 respectively, as shown below. Figure 10 As shown, by Figure 10 It can be seen that when K is increased p2 Increasing the value of K increases the crossover frequency, which can improve the system bandwidth, but it also leads to a worse phase margin, causing system oscillation and instability. Therefore, K is chosen as the optimal value. p2 =0.1.

[0124] 3) Let K p2 =0.1 and λ2=0.8 remain constant, when K i2 Draw the Bode plots of the open-loop transfer function when the values ​​are 100, 150, 200, and 250 respectively, as shown below. Figure 11 As shown, by Figure 11 It can be seen that increasing K i2 A slightly higher crossover frequency can effectively improve the system's ability to eliminate steady-state errors, but it also reduces the phase margin. Therefore, K is ultimately chosen. i2 =250.

[0125] 4) Let K p2 =0.1 and K i2 With λ = 250 fixed, draw the Bode plot of the open-loop transfer function when λ2 takes values ​​of 0.7, 0.8, 0.9, and 1.0, as shown below. Figure 12 As shown, by Figure 12 It can be seen that as λ2 decreases, the high-frequency attenuation slows down and the crossover frequency increases. However, if λ2 is too small, the phase will decrease prematurely, and the system is prone to oscillation. Therefore, to compromise between control strength and response speed, λ2 = 0.8 is finally chosen.

[0126] Ultimately, the order of the fractional-order inductor was chosen as α=0.8, the order of the fractional-order capacitor as β=0.9, and the proportional coefficient K of the fractional-order current loop control was... p1 =10, the integral coefficient K of the fractional-order current loop control i1 =200, proportional coefficient K of fractional-order current loop control p2 =0.1, the integral coefficient K of fractional-order current loop control i2 =250, the order of the fractional current loop control is λ2=0.8.

[0127] S307. Detect the output voltage and current of the fractional inverter, and calculate the active power and reactive power of the fractional inverter through Clark transformation.

[0128] S308. Based on active power, reactive power, preset rated active power, and preset rated reactive power, the reference angular velocity and reference voltage amplitude are determined through the droop equation.

[0129] In a parallel inverter system, the first issue to address is power sharing. Droop control is a simple and widely used method. Droop control simulates the droop characteristics of a synchronous generator to achieve power sharing in the parallel system. Figure 13 This is a schematic diagram of droop control. First, the three-phase voltage measurements ( Figure 2 u in La u Lb u Lc ) and three-phase current measurement values ​​( Figure 2 i in La i Lb i Lc The two signals are sent to the average power calculation module, where Clark transforms the measured three-phase voltage and current variables into two-phase quadrature variables, according to the formula... , The active power P and reactive power Q are calculated, where P0 and Q0 are the rated active and reactive power. The error between P and P0 in the upper channel is added to the rated angular frequency ω by a coefficient m (active power-frequency droop coefficient). n Active power-frequency regulation is achieved based on the set value. The error between the lower channel Q and Q0 is added to the rated voltage amplitude E through a coefficient n (reactive power-voltage droop coefficient). n The voltage amplitude is adjusted according to the set value to achieve reactive power-voltage regulation. The angular velocity ω above is integrated to obtain the phase angle δ, which is used to synthesize the phase part of the reference voltage. Finally, the synthesized reference voltage enters the dual-loop controller.

[0130] S309. Introduce virtual impedance in the voltage and current dual control loop.

[0131] Considering the high resistivity of lines in low-voltage microgrids, the strong coupling between active power P and phase angle difference δ, and the strong coupling between reactive power and voltage amplitude in traditional droop control requires the line to be inductive. If the line resistivity is high, the coupling condition cannot be met, and traditional droop control will inevitably fail to obtain the droop equation for strong coupling, rendering droop control unusable. Therefore, a virtual impedance needs to be introduced to enable the inverter control to satisfy power decoupling, suppress reactive power circulating current, and allow the inverter to distribute reactive power according to its capacity ratio.

[0132] Figure 14 This is a schematic diagram of a dual control loop with virtual impedance voltage and current in the d-axis. Figure 14 middle u o i o urd Z represents the inverter output voltage, output current, and reference voltage, respectively. v With Z l Let these represent the fractional virtual impedance and the line impedance, respectively, where the line impedance is... .

[0133] according to Figure 14 The expression for the output voltage is:

[0134] ;

[0135] and Let the reference voltage gain coefficient and the inverter output impedance be respectively, and their expressions be:

[0136] ;

[0137] ;

[0138] in,

[0139] ;

[0140] ;

[0141] After processing, the system impedance of the inverter can be obtained as follows:

[0142] ;

[0143] When using virtual impedance to change the system impedance, the following two requirements must be met:

[0144] (1) System impedance after adopting virtual impedance At fundamental frequency The inverter system impedance is approximated as inductive at the fundamental frequency and is made as resistive as possible at harmonic frequencies. This satisfies the power approximate decoupling requirement while effectively suppressing interharmonics and higher harmonics in the inverter output current. The impedance-to-inductance ratio condition for power approximate decoupling should be R / X < 0.83, where R and X represent the resistance and inductance of the inverter system impedance, respectively. That is, the phase angle of the system impedance at the fundamental frequency satisfies... .

[0145] (2) In order to suppress reactive circulating current between inverters and improve the reactive power distribution accuracy between inverters, it is necessary to reduce the system impedance of inverters 1 and 2. and At fundamental frequency The amplitude at the fundamental frequency is inversely proportional to the set capacity, meaning that the amplitude at the fundamental frequency is directly proportional to the droop coefficients n1 and n2 of the inverter.

[0146] To further improve the phase margin and impedance shape controllability of the system, a fractional-order virtual impedance is introduced:

[0147] ;

[0148] R v For virtual resistance, L v γ is the fractional-order virtual inductance coefficient, γ is the order of the fractional-order virtual impedance, s is the complex frequency, and ω is the finite frequency. c ω is the cutoff angular velocity, and ω0 is the reference angular velocity, where,

[0149] ;

[0150] ;

[0151] .

[0152] To simulate the situation where line impedances are unequal in actual operating conditions, we assume the line length from inverter 1 to microgrid PCC is 0.8 km. Based on the expression for unit line impedance of low-voltage microgrids above, the corresponding line impedance value can be estimated. Then, based on the output impedance expression, the Bode plot of the inverter's system impedance can be obtained as follows: Figure 15 As shown. Assuming the line length from inverter 2 to PCC is 1km, the corresponding line impedance value is... The system impedance Bode plot is as follows Figure 16 As shown, the phase of the impedance of both inverter systems at 50Hz is less than 50°, which no longer satisfies the condition for approximate power decoupling. Adding a virtual impedance should make the phase of the inverter system impedance at 50Hz greater than 50° in order to satisfy the condition for approximate power decoupling.

[0153] Assume the system impedance of the two inverters. and The equivalent impedances at 50Hz are as follows:

[0154] ;

[0155] ;

[0156] Further, the phases were determined to be respectively and The phase of the impedances of both inverter systems at the fundamental frequency is slightly less than 50°, which does not meet the given power approximation decoupling condition. In this case, when the two inverters operate in parallel, there will be a large reactive circulating current, and the reactive power cannot be evenly distributed. To ensure that the amplitude ratio of the inverter system impedances after virtual impedance compensation at the fundamental frequency is close to 1:1, the equivalent impedance after compensation needs to be... and The real and imaginary parts (corresponding to the resistive and reactive components) satisfy and ,Right now and The virtual impedance design process is as follows:

[0157] 1) Select smaller virtual resistors for inverters 1 and 2, respectively, R v1 =0.38 and R v2 =0.12, obviously the equivalent resistance after compensation is... .

[0158] 2) To ensure that the phase of the impedance of the two inverter system at the fundamental frequency is greater than 50°, the equivalent resistance and equivalent reactance must satisfy the following:

[0159] ;

[0160] ;

[0161] And it must be ensured that the equivalent reactance after compensation meets the requirements. ;

[0162] like:

[0163] ;

[0164] ;

[0165] Based on this, the theoretical equivalent reactance can be calculated as follows: .

[0166] 3) Based on the equivalent reactance value before compensation, the reactance (virtual reactance) that needs to be compensated can be obtained as follows:

[0167] and .

[0168] 4) For fractional virtual impedance Its reactance is equal to the imaginary part of its complex number, that is:

[0169] ;

[0170] in,

[0171] ;

[0172] ;

[0173] .

[0174] 5) Since the fundamental frequency is taken as 50Hz, the low-pass angle frequency is taken as... hour, and ,when When, given order Then there is

[0175] ;

[0176] Similarly, when When, it can be obtained .

[0177] The Bode plot of the system impedance after adding virtual impedance compensation is shown below. Figure 17 As shown, by Figure 17 As can be seen, after adding the designed fractional virtual impedance to the two inverters, the system impedance is the same and the phase angle meets the droop control adjustment. Therefore, the resistance value and virtual inductance value of the designed virtual impedance, as well as the fractional order, meet the design requirements.

[0178] S310: The reference angular velocity and reference voltage amplitude are input into the voltage and current dual control loop to generate a PWM modulation signal to control the fractional inverter, thereby adjusting the voltage and output power of the fractional inverter.

[0179] After designing the fractional-order virtual impedance, the reference angular velocity and reference voltage amplitude obtained from the droop control are used to generate a PWM modulation signal in the dual control loop of voltage and current to control the fractional-order inverter. Specifically, the electronic switches T1-T6 in the inverter are controlled to adjust the voltage and output power of the fractional-order inverter, so that the voltage of each inverter in the parallel system is consistent and the power is evenly distributed, thereby suppressing the parallel circulating current.

[0180] To verify the effectiveness of the circulating current suppression strategy proposed in this scheme, a microgrid simulation system consisting of two inverters was built on MATLAB / Simulink. The simulation parameters are shown in the table below:

[0181]

[0182] 1) Simulation comparison before and after virtual impedance connection

[0183] To verify the effectiveness of the fractional-order virtual impedance, a parallel control simulation was performed on two inverters with and without droop control. Before the virtual impedance was connected, the voltage and current waveforms of inverter 1 and inverter 2 are shown below. Figure 18 As shown, after connecting the virtual impedance, the voltage and current waveforms of inverter 1 and inverter 2 are as follows. Figure 19 As shown, by Figure 18 and Figure 19 The comparison shows that, Figure 18Before the virtual impedance was used, the output current of inverter 1 lagged behind the output voltage, while the output current of inverter 2 led the output voltage. This was because inverter 1 generated reactive power, while inverter 2 absorbed reactive power, meaning there was a reactive circulating current between the two inverters. Figure 19 After adopting virtual impedance, the output voltage and output current of the two inverters are basically in phase, effectively suppressing reactive circulating current.

[0184] Before introducing virtual impedance, the current and circulating current waveforms of the two inverters connected in parallel are shown in the figure below. Figure 20 As shown, after adding virtual impedance, the current and circulating current waveforms of the two inverters connected in parallel are as follows. Figure 21 As shown, Figure 20 As shown, there is a large circulating current between the two inverters. Inverters of the same capacity are connected in parallel. The output current i of phase a of inverter 1 is... a1 It can be decomposed into active current i p1 and current circulation i 12 . i.e. i a1 = i p1 + i 12 Similarly, the output current of inverter 2 is i a2 = i p2 -i 12 , because i p1 = i p2 Current circulation i 12 =(i a1 - i a2 After adopting virtual impedance, the current circulation between the two inverters is very small, and the output current amplitudes of the two inverters are close, that is, they generate the same active power.

[0185] Before adding virtual impedance, the active and reactive power waveforms of inverter 1 and inverter 2 are as follows: Figure 22 As shown in the figure, after adding virtual impedance, the active power and reactive power waveforms of inverter 1 and inverter 2 are as follows. Figure 23 As shown, by Figure 22 and Figure 23 The comparison shows that the virtual impedance significantly suppresses the reactive circulating current between inverters, while improving the power distribution response speed of the inverters, reducing power overshoot, and making the power evenly distributed, i.e., the fractional-order virtual impedance droop control is effective.

[0186] 2) Simulation comparison with integer-order control scheme

[0187] To illustrate the superiority of the fractional-order control scheme, a simulation comparison was conducted with an integer-order control scheme. With other simulation parameters unchanged, the fractional-order controller was replaced with an integer-order controller for Matlab / Simulink simulation. The resulting waveforms of the parallel current and circulating current of the two inverters under integer-order control are shown below. Figure 24 As shown, the active and reactive power waveforms of inverter 1 and inverter 2 under integer-order control are as follows. Figure 25 As shown, by Figure 24 , Figure 25 Observations show that under the integer-order control scheme, the active power regulation of the system is slow, and reactive power still generates circulating current. Therefore, compared with the integer-order control scheme, the fractional-order control scheme has faster and more effective active power regulation and better circulating current suppression effect.

[0188] Example 3

[0189] Figure 26 This is a schematic diagram of the parallel circulating current suppression device for a fractional-order inverter provided in Embodiment 3 of the present invention. Figure 26 As shown, the parallel circulating current suppression device of the fractional-order inverter includes:

[0190] Mathematical model building module 401 is used to build a mathematical model of a fractional inverter, the mathematical model including fractional inductors and fractional capacitors;

[0191] The voltage control module 402 is used to construct a voltage and current dual control loop based on the mathematical model and to track and control the output voltage and current of the parallel fractional inverters.

[0192] The power distribution module 403 is used to distribute the power of parallel fractional inverters equally to suppress circulating current through droop control and fractional virtual impedance.

[0193] Optionally, the mathematical model building module 401 is specifically used for:

[0194] Based on Kirchhoff's laws, a circuit topology analysis is performed on a parallel inverter system including fractional inductors and fractional capacitors to determine the state equations of the fractional inductors and fractional capacitors in a single fractional inverter.

[0195] Based on the Clark transformation matrix and the Park transformation matrix, coordinate transformation and inverse transformation from the three-phase coordinate system to the rotating coordinate system are performed to obtain the expressions for the output voltage of the fractional inverter, the filtered voltage, the current flowing through the fractional inductor, and the current flowing through the line impedance.

[0196] Substituting the expression into the state equations of the fractional inductor and fractional capacitor yields the state equation of the fractional inverter in the rotating coordinate system.

[0197] The mathematical model is constructed based on the state equations of the fractional inverter.

[0198] Optionally, the fractional-order inductor is equivalent to an RL chain circuit, and its impedance formula is as follows:

[0199] ;

[0200] L1 to L n R represents the inductance value of each inductor in the RL chain circuit. L1 -R Ln Let s be the resistance connected in series with the inductive element, and s be the complex frequency.

[0201] The fractional capacitor is equivalent to an RC chain circuit, and its impedance formula is as follows:

[0202] ;

[0203] C1 to C n R represents the capacitance value of each capacitor element in the RC chain circuit. C1 -R Cn Let s be the resistance connected in parallel with the capacitor element, and s be the complex frequency.

[0204] The state equation of the fractional-order inductor is as follows:

[0205] ;

[0206] The state equation of the fractional capacitor is as follows:

[0207] ;

[0208] The state equations of the fractional-order inverter in the rotating coordinate system are as follows:

[0209] ;

[0210] ;

[0211] The mathematical model is expressed as follows:

[0212] ;

[0213] ;

[0214] ;

[0215] ;

[0216] Among them, u La u Lb u Lc These are the three-phase voltages output by the inverter, u a u b u c These are the filtered three-phase voltages, i La iLb i Lc i represents the current flowing through the fractional-order inductor. oa i ob i oc These are the three-phase currents flowing through the line impedance, u Ld u Lq u represents the d- and q-axis components of the inverter output voltage. d u q i represents the filtered output voltage components on the d and q axes of the inverter. Ld i Lq Let i represent the components of the current flowing through the fractional-order inductor on the d and q axes, respectively. od i oq These are the components of the three-phase current flowing through the line impedance on the d and q axes, respectively. α C represents the α-order filter inductance. β Represents the beta-order filter capacitor, R f Let ω be the equivalent resistance of a fractional-order inductor, ω be the angular velocity, and s be the complex frequency.

[0217] Optionally, the voltage control module 402 is specifically used for:

[0218] A current control loop employing fractional-order current loop control is constructed, and the open-loop transfer function of the current control loop is as follows:

[0219] ;

[0220] s is the complex frequency, λ1 is the order of the fractional-order current loop control, and K p1 K i1 These are the proportional and integral coefficients of the fractional-order current loop control, respectively; T is the time coefficient of the inertial element; and K... pwm For the equivalent gain, α is the order of the fractional inductance, and L is the value of L. α R represents the α-order filter inductance. f The equivalent resistance of a fractional-order inductor;

[0221] A voltage control loop employing fractional-order current loop control is constructed, and the open-loop transfer function of the voltage control loop is as follows:

[0222] ;

[0223] λ2 is the order of the fractional-order current loop control, K p2 K i2 These are the proportional and integral coefficients of the fractional-order current loop control, R. f β is the equivalent resistance of a fractional-order inductor, β is the order of a fractional-order capacitance, and C is the capacitance. β This represents a beta-order filter capacitor.

[0224] Optionally, the order of the fractional-order inductor is chosen to be α=0.8, the order of the fractional-order capacitor is β=0.9, and the proportional coefficient K of the fractional-order current loop control is... p1 =10, the integral coefficient K of the fractional-order current loop control i1 =200, proportional coefficient K of fractional-order current loop control p2 =0.1, the integral coefficient K of fractional-order current loop control i2 =250, the order of the fractional current loop control is λ2=0.8.

[0225] Optionally, the power distribution module 403 is specifically used for:

[0226] Detect the output voltage and current of the fractional-order inverter;

[0227] The active and reactive power of the fractional inverter are calculated using the Clark transform.

[0228] Based on the active power, reactive power, preset rated active power, and preset rated reactive power, the reference angular velocity and reference voltage amplitude are determined by the droop equation.

[0229] A fractional-order virtual impedance is introduced into the voltage-current dual control loop;

[0230] The reference angular velocity and the reference voltage amplitude are input into the voltage and current dual control loop to generate a PWM modulation signal to control the fractional inverter and adjust the output power of the fractional inverter.

[0231] Optionally, the expression for the fractional-order virtual impedance is:

[0232] ;

[0233] ;

[0234] ;

[0235] ;

[0236] ;

[0237] ;

[0238] R v For virtual resistance, L v γ is the fractional-order virtual inductance coefficient, γ is the order of the fractional-order virtual impedance, s is the complex frequency, and ω is the finite frequency. c ω is the cutoff angular velocity, and ω0 is the reference angular velocity.

[0239] The parallel circulating current suppression device for fractional inverters provided in this embodiment of the invention can execute the parallel circulating current suppression method for fractional inverters provided in any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the method.

[0240] Example 4

[0241] Figure 27 A schematic diagram of an electronic device 40 that can be used to implement embodiments of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0242] like Figure 27 As shown, the electronic device 40 includes at least one processor 41 and a memory, such as a read-only memory (ROM) 42 or a random access memory (RAM) 43, communicatively connected to the at least one processor 41. The memory stores computer programs executable by the at least one processor. The processor 41 can perform various appropriate actions and processes based on the computer program stored in the ROM 42 or loaded from storage unit 48 into the RAM 43. The RAM 43 may also store various programs and data required for the operation of the electronic device 40. The processor 41, ROM 42, and RAM 43 are interconnected via a bus 44. An input / output (I / O) interface 45 is also connected to the bus 44.

[0243] Multiple components in electronic device 40 are connected to I / O interface 45, including: input unit 46, such as keyboard, mouse, etc.; output unit 47, such as various types of monitors, speakers, etc.; storage unit 48, such as disk, optical disk, etc.; and communication unit 49, such as network card, modem, wireless transceiver, etc. Communication unit 49 allows electronic device 40 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0244] Processor 41 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 41 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 41 performs the various methods and processes described above, such as the parallel circulating current suppression method for fractional-order inverters.

[0245] In some embodiments, the parallel circulating current suppression method for a fractional-order inverter can be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 48. In some embodiments, part or all of the computer program can be loaded and / or installed on electronic device 40 via ROM 42 and / or communication unit 49. When the computer program is loaded into RAM 43 and executed by processor 41, one or more steps of the parallel circulating current suppression method for a fractional-order inverter described above can be performed. Alternatively, in other embodiments, processor 41 can be configured to perform the parallel circulating current suppression method for a fractional-order inverter by any other suitable means (e.g., by means of firmware).

[0246] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations may include: implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0247] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0248] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0249] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0250] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0251] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0252] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0253] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for suppressing parallel circulating current in a fractional-order inverter, characterized in that, include: A mathematical model of a fractional inverter is established, which includes fractional inductors and fractional capacitors. Based on the mathematical model, a voltage and current dual control loop based on a fractional-order controller is constructed, and the output voltage and current of the parallel fractional-order inverters are tracked and controlled. By using droop control and fractional-order virtual impedance, the power of parallel fractional-order inverters is evenly distributed to suppress circulating current; Power is distributed across parallel fractional inverters to suppress circulating current through droop control and fractional-order virtual impedance, including: Detect the output voltage and current of the fractional-order inverter; The active and reactive power of the fractional inverter are calculated using the Clark transform. Based on the active power, reactive power, preset rated active power, and preset rated reactive power, the reference angular velocity and reference voltage amplitude are determined by the droop equation. A fractional-order virtual impedance is introduced into the voltage-current dual control loop; The reference angular velocity and the reference voltage amplitude are input into the voltage and current dual control loop to generate a PWM modulation signal to control the fractional inverter, thereby adjusting the output power of the fractional inverter. The expression for the fractional virtual impedance is: ； ； ； ； ； ； R v For virtual resistance, L v γ is the fractional-order virtual inductance coefficient, γ is the order of the fractional-order virtual impedance, s is the complex frequency, and ω is the finite frequency. c ω0 is the cutoff angular velocity, L is the reference angular velocity. α This represents an α-order filter inductor, where α is the order of the fractional-order inductor, and R... f The equivalent resistance of a fractional-order inductor, T is the time coefficient of the inertial element, and K is the inductance of the fractional-order inductor. p1 K i1 These are the proportional and integral coefficients of the fractional-order current loop control, respectively, and λ1 is the order of the fractional-order current loop control.

2. The method according to claim 1, characterized in that, The mathematical model for establishing a fractional inverter includes: Based on Kirchhoff's laws, a circuit topology analysis is performed on a parallel inverter system including fractional inductors and fractional capacitors to determine the state equations of the fractional inductors and fractional capacitors in a single fractional inverter. Based on the Clark transformation matrix and the Park transformation matrix, coordinate transformation and inverse transformation from the three-phase coordinate system to the rotating coordinate system are performed to obtain the expressions for the output voltage of the fractional inverter, the filtered voltage, the current flowing through the fractional inductor, and the current flowing through the line impedance. Substituting the expression into the state equations of the fractional inductor and fractional capacitor yields the state equation of the fractional inverter in the rotating coordinate system. The mathematical model is constructed based on the state equations of the fractional inverter.

3. The method according to claim 2, characterized in that, The fractional inductor is equivalent to an RL chain circuit, and its impedance formula is as follows: ； L1 to L n R represents the inductance value of each inductor in the RL chain circuit. L1 -R Ln Let s be the resistance connected in series with the inductive element, and s be the complex frequency. The fractional capacitor is equivalent to an RC chain circuit, and its impedance formula is as follows: ； C1 to C n R represents the capacitance value of each capacitor element in the RC chain circuit. C1 -R Cn Let s be the resistance connected in parallel with the capacitor element, and s be the complex frequency. The state equation of the fractional-order inductor is as follows: ； The state equation of the fractional capacitor is as follows: ； The state equations of the fractional-order inverter in the rotating coordinate system are as follows: ； ； The mathematical model is expressed as follows: ； ； ； ； Among them, u La u Lb u Lc These are the three-phase voltages output by the inverter, u a u b u c These are the filtered three-phase voltages, i La i Lb i Lc i represents the current flowing through the fractional-order inductor. oa i ob i oc These are the three-phase currents flowing through the line impedance, u Ld u Lq u represents the d- and q-axis components of the inverter output voltage. d u q i represents the filtered output voltage components on the d and q axes of the inverter. Ld i Lq Let i represent the components of the current flowing through the fractional-order inductor on the d and q axes, respectively. od i oq These are the components of the three-phase current flowing through the line impedance on the d and q axes, respectively. α C represents the α-order filter inductance. β R represents the beta-order filter capacitor. f Let ω be the equivalent resistance of a fractional-order inductor, ω be the angular velocity, and s be the complex frequency.

4. The method according to claim 1, characterized in that, The construction of a voltage-current dual control loop based on the mathematical model and a fractional-order controller includes: A fractional-order current control loop is constructed, and the open-loop transfer function of the current control loop is as follows: ； s is the complex frequency, λ1 is the order of the fractional-order current loop control, and K p1 K i1 These are the proportional and integral coefficients of the fractional-order current loop control, respectively; T is the time coefficient of the inertial element; and K... pwm For the equivalent gain, α is the order of the fractional inductance, and L is the value of L. α R represents the α-order filter inductance. f The equivalent resistance of a fractional-order inductor; A fractional-order voltage control loop is constructed, and the open-loop transfer function of the voltage control loop is as follows: ； λ2 is the order of the fractional-order voltage loop control, K p2 K i2 These are the proportional and integral coefficients of the fractional-order voltage loop control, R. f β is the equivalent resistance of the fractional-order inductor, β is the order of the fractional-order capacitance, and C is the capacitance. β This represents a beta-order filter capacitor.

5. The method according to claim 4, characterized in that, The order of the fractional-order inductor is chosen to be α=0.8, the order of the fractional-order capacitor is β=0.9, and the proportional coefficient K of the fractional-order current loop control is... p1 =10, the integral coefficient K of the fractional-order current loop control i1 =200, proportional coefficient K of fractional-order current loop control p2 =0.1, the integral coefficient K of the fractional-order current loop control i2 =250, the order of the fractional voltage loop control is λ2=0.

8.

6. A parallel circulating current suppression device for a fractional-order inverter, used to perform the parallel circulating current suppression method for a fractional-order inverter according to any one of claims 1-5, characterized in that, include: The mathematical model building module is used to build a mathematical model of a fractional inverter, which includes fractional inductors and fractional capacitors. The voltage control module is used to construct a voltage and current dual control loop based on the mathematical model and to track and control the output voltage and current of the parallel fractional inverters. The power distribution module is used to distribute the power of parallel fractional inverters equally to suppress circulating current through droop control and fractional virtual impedance.

7. An electronic device, characterized in that, The electronic device includes: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the parallel circulating current suppression method for the fractional-order inverter according to any one of claims 1-5.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed by a processor, implement the parallel circulating current suppression method for the fractional-order inverter as described in any one of claims 1-5.

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