Electrostatic protection device structure and preparation method thereof

Abstract

According to the electrostatic protection device structure and the preparation method thereof provided by the invention, in the device structure, the isolation buried layer is arranged between the drop-capacitance device structure and the substrate, so that the parasitic capacitance between the drop-capacitance device structure and the substrate can be reduced, the total capacitance of the electrostatic protection device structure is reduced, and further, the overall capacitance of the electrostatic protection device structure is reduced. And the interference on a high-speed signal is reduced, so that the signal integrity is ensured.

Description

Technical Field

[0001] This invention relates to the field of semiconductor devices, and more particularly to an electrostatic discharge (ESD) protection device structure and its fabrication method. Background Technology

[0002] As chip integration becomes increasingly sophisticated and linewidths shrink, chips become more sensitive, susceptible to electrostatic discharge (ESD) and surge damage. Therefore, ESD protection devices are an indispensable part of chip design. Furthermore, with rising demands for signal transmission speeds, the capacitance of ESD devices needs to be reduced to achieve better protection.

[0003] Therefore, providing a low-capacitance electrostatic discharge protection device structure has become a technical problem that the industry urgently needs to solve. Summary of the Invention

[0004] This invention provides a structure for an electrostatic discharge (ESD) protection device and a method for its fabrication, thereby reducing the capacitance of the ESD protection device structure.

[0005] According to a first aspect of the present invention, an electrostatic discharge (ESD) protection device structure is provided, comprising: A substrate, wherein the substrate is doped with type I conductive ions; An epitaxial layer doped with type II conductive ions is located on the substrate. The type I conductive ions and type II conductive ions have opposite conductivity types. The doping concentration of the substrate is greater than the doping concentration of the epitaxial layer. The epitaxial layer includes an adjacent first region and a second region. The first region is located on both sides of the second region. The bottom of the first region of the epitaxial layer has an isolation buried layer connected to the substrate. The paired container structures are located in the first region on both sides of the second region; A first doped region is doped with the first type of conductive ions, the first doped region is located on top of the second region of the epitaxial layer, and the doping concentration of the first doped region is greater than the doping concentration of the epitaxial layer.

[0006] Optionally, the de-capacitor device structure includes a device region and an isolation region, wherein the isolation region surrounds the device region from the periphery; The device region includes a second doped region and a third doped region spaced apart on top of the epitaxial layer within the device region. The second doped region is doped with the first type of conductive ions, and the third doped region is doped with the second type of conductive ions. The doping concentrations of the second doped region and the third doped region are both greater than the doping concentration of the epitaxial layer. The isolation zone includes an isolation sidewall, the bottom surface of which is in contact with the isolation buried layer, and the top surface of which is flush with the top surface of the substrate.

[0007] Optionally, the first type of conductive ion is one of N-type ion and P-type ion, and the second type of conductive ion is the other of P-type ion and N-type ion. The N-type ion is one of phosphorus ion, arsenic ion and antimony ion, and the N-type ion is one of boron ion, aluminum ion and gallium ion. The thickness of the isolation buried layer is greater than 1000 angstroms, the material of the isolation buried layer and the isolation sidewall are both silicon oxide, the resistivity of the substrate is 0.001 ohm·cm to 0.01 ohm·cm, and the thickness of the epitaxial layer is 2 micrometers to 10 micrometers.

[0008] Optionally, when the number of the drop capacitor device structures is one pair, the pair of drop capacitor device structures located on both sides of the second region are a first device structure and a second device structure, respectively. The second doped region in the first device structure and the third doped region in the second device structure are both adjacent to the second region. Furthermore, the electrostatic discharge protection device structure further includes: a metal interconnect structure located on the epitaxial layer, the metal interconnect structure including a first metal connection structure, a first lead-out structure and a second lead-out structure. The first metal connection structure electrically connects the first doped region, the second doped region in the first device structure, and the third doped region in the second device structure. The second doped region in the first device structure and the third doped region in the second device structure are both adjacent to the first doped region. One end of the first lead-out structure is electrically connected to the third doped region in the first device structure; One end of the second lead-out structure is electrically connected to the second doped region in the second device structure.

[0009] Optionally, when the number of the de-capacitating device structures is greater than one pair, the de-capacitating device structures located on both sides of the second region are respectively a first device structure group and a second device structure group. Both the first device structure group and the second device structure group include at least two de-capacitating device structures connected in series. Furthermore, the electrostatic discharge protection device structure further includes: a metal interconnect structure located on the epitaxial layer. The metal interconnect structure includes a first metal connection structure, a second metal connection structure, a third metal connection mechanism, a first lead-out structure, and a second lead-out structure. The first metal connection structure electrically connects the first doped region, the second doped region in the first device structure, and the third doped region in the second device structure; The second metal connection structure electrically connects the third doped region of each drop-capacitance device structure in the first device structure group to the second doped region of the next drop-capacitance device structure. The third metal connection structure electrically connects the second doped region of each decapacitated device structure in the second device structure group to the third doped region of the next decapacitated device structure. One end of the first lead-out structure is electrically connected to the third doped region of the last decapacitated device structure in the first device structure group, and the third doped region of the last decapacitated device structure in the first device structure group is the third doped region farthest from the first doped region. One end of the second lead-out structure is electrically connected to the second doped region of the last decapacitor structure in the second device structure, and the second doped region of the last decapacitor structure in the second device structure group is the second doped region farthest from the first doped region.

[0010] Optional, also includes: The first electrode is electrically connected to the other end of the first lead structure and the other end of the second lead structure; The second electrode is located on the back side of the substrate.

[0011] According to a second aspect of the present invention, a method for preparing an electrostatic discharge (ESD) protection device structure is provided, comprising: A substrate is provided, the substrate being doped with type I conductive ions; An epitaxial layer doped with a second type of conductive ion is formed on the substrate. The first type of conductive ion and the second type of conductive ion have opposite conductivity types. The doping concentration of the substrate is greater than the doping concentration of the epitaxial layer. The epitaxial layer includes an adjacent first region and a second region, with the first region located on both sides of the second region. An isolation buried layer is formed in a first region of the epitaxial layer, the isolation buried layer being connected to the substrate; A pair of drop-capacitor structures are formed in the epitaxial layer above the isolation buried layer. Each pair of drop-capacitor structures is located in a first region on both sides of the second region. Furthermore, a first doped region doped with the first type of conductive ions is formed on the top of the second region of the epitaxial layer. The doping concentration of the first doped region is greater than the doping concentration of the epitaxial layer.

[0012] Optionally, the method of forming an isolation buried layer in the first region of the epitaxial layer includes: A photoresist layer is spin-coated onto the epitaxial layer; The photoresist layer is exposed and developed using a photomask to form a patterned photoresist layer; Using the patterned photoresist layer as a mask, ion implantation is performed on the epitaxial layer to form an isolation buried layer in the first region of the epitaxial layer.

[0013] Optionally, the epitaxial layer is made of silicon, and the ions implanted into the epitaxial layer are oxygen ions, with a dose range of 10. 15 cm -2 ~10 18 cm -2 The ion implantation energy is greater than 200 keV, and the ion implantation angle range is 0° to 7°.

[0014] Optionally, the de-capacitance device structure includes a device region and an isolation region, the isolation region surrounding the device region from the periphery, and a pair of de-capacitance device structures are formed in an epitaxial layer above the buried isolation layer, and the method of forming a first doped region in a second region of the epitaxial layer includes: A pair of second doped regions are formed on the top of the device regions on both sides of the second region of the epitaxial layer, and a first doped region is formed on the top of the second region of the epitaxial layer. The second doped regions are doped with the first type of conductive ions, and the doping concentration of the second doped regions is greater than the doping concentration of the epitaxial layer. A pair of third doped regions are formed on the top of the device region on both sides of the second region of the epitaxial layer. The third doped regions are spaced apart from the second doped regions. The third doped regions are doped with second type conductive ions. The doping concentration of the third doped regions is greater than that of the epitaxial layer. An isolation sidewall is formed within the isolation region of the epitaxial layer, the bottom surface of the isolation sidewall being in contact with the isolation buried layer, and the top surface of the isolation sidewall being flush with the top surface of the substrate.

[0015] Compared with the prior art, the technical solution of the present invention has the following beneficial effects: In the electrostatic discharge protection structure provided by the technical solution of the present invention, by setting an isolation buried layer between the drop capacitor device structure and the substrate, the parasitic capacitance between the drop capacitor device structure and the substrate can be reduced, thereby reducing the overall capacitance of the electrostatic discharge protection device structure, and thus reducing its interference to high-speed signals to ensure signal integrity. Attached Figure Description

[0016] Figures 1-11 This is a cross-sectional structural schematic diagram of each step in the preparation method of the electrostatic protection device structure provided in the embodiments of the present invention; Figure 12 This is a circuit connection diagram of the electrostatic discharge protection device structure provided in the embodiment of the present invention.

[0017] Figure label: 1-Substrate; 2-Epipolar layer; 30 - Isolation layer; 31-Isolation sidewall; 32 - Third doped region; 33 - Second doped region; 4-First doped region; 51-First metal connection structure; 52-First lead-out structure; 53-Second lead-out structure; 501 - First conductive structure; 502 - Second conductive structure; 503 - Third conductive structure; 506 - Metallic bonding layer; 504 - First through-hole structure; 505 - Second through-hole structure; 54 - First isolation layer; 55 - Second isolation layer; 61 - First electrode; 62 - Second electrode; 7-Passivation layer; 310 - Isolation Groove; 8-Photoresist layer. Detailed Implementation

[0018] As described in the background section, with the increasing demand for signal transmission speed, the capacitance of electrostatic discharge (ESD) protection devices needs to be reduced in order to achieve better protection.

[0019] In view of this, the present invention creatively proposes an electrostatic discharge (ESD) protection device structure, comprising: a substrate doped with a first type of conductive ion; an epitaxial layer doped with a second type of conductive ion, the epitaxial layer being located on the substrate, wherein the first type of conductive ion and the second type of conductive ion have opposite conductivity types, the doping concentration of the substrate is greater than the doping concentration of the epitaxial layer, the epitaxial layer comprising an adjacent first region and a second region, the first region being located on both sides of the second region, the bottom of the first region of the epitaxial layer having an isolation buried layer, the isolation buried layer being connected to the substrate; a pair of de-capacitating device structures, respectively located in the first region on both sides of the second region; a first doped region doped with the first type of conductive ion, the first doped region being located on top of the second region of the epitaxial layer, the doping concentration of the first doped region being greater than the doping concentration of the epitaxial layer.

[0020] By setting an isolation buried layer between the drop capacitor device structure and the substrate, the parasitic capacitance between the drop capacitor device structure and the substrate can be reduced, thereby reducing the overall capacitance of the electrostatic discharge protection device structure and thus reducing its interference with high-speed signals to ensure signal integrity.

[0021] The embodiments of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. The terms "first," "second," "third," etc., in the specification, claims, and accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the present invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0022] Figures 1-11 This is a cross-sectional structural schematic diagram of each step in the preparation method of the electrostatic protection device structure provided in the embodiment of the present invention.

[0023] Please refer to Figure 1 A substrate 1 is provided, which is doped with type I conductive ions.

[0024] An epitaxial layer 2 doped with type II conductive ions is formed on a substrate 1. The conductivity types of the type I conductive ions and the type II conductive ions are opposite. The doping concentration of the substrate 1 is greater than the doping concentration of the epitaxial layer 2. The epitaxial layer 2 includes an adjacent first region and a second region, with the first region located on both sides of the second region.

[0025] Please refer to Figure 2 and Figure 3 An isolation buried layer 30 is formed in the first region of the epitaxial layer 2, and the isolation buried layer 30 is connected to the substrate 1.

[0026] In this embodiment, please refer to Figure 2 The method for forming an isolation buried layer 30 in the first region of the epitaxial layer 2 includes: spin-coating a photoresist layer 8 on the epitaxial layer 2; exposing and developing the photoresist layer 8 using a photomask to form a patterned photoresist layer 8; and using the patterned photoresist layer 8 as a mask to perform ion implantation on the epitaxial layer 2 to form an isolation buried layer 30 in the first region of the epitaxial layer 2.

[0027] Of course, in actual operation, after the isolation buried layer 30 is formed, the remaining patterned photoresist layer 8 is also removed.

[0028] Furthermore, it should be understood that the above example uses photoresist as the material of the patterned mask layer. In practical applications, the patterned mask layer can also be made of other materials and can be formed in other ways. This invention is not limited thereto.

[0029] In this embodiment, the ions implanted into epitaxial layer 2 are oxygen ions, and the dose range of the implanted oxygen ions is 10. 15 cm -2 ~10 18 cm -2 The ion implantation energy is greater than 200 keV, and the ion implantation angle range is 0°~7°.

[0030] Please refer to Figures 4-6 In the epitaxial layer 2 above the isolation buried layer 30, a pair of drop capacitor structures are formed, each pair of drop capacitor structures is located in the first region on both sides of the second region, and a first doped region 4 doped with a first type of conductive ions is formed on the top of the second region of the epitaxial layer 2, the doping concentration of the first doped region 4 is greater than the doping concentration of the epitaxial layer 2.

[0031] In this embodiment, the depressurization device structure includes a device area and an isolation area, with the isolation area surrounding the device area from the periphery.

[0032] The following combination Figures 4-6 The specific steps for forming the degraded device structure and the first doped region 4 are explained.

[0033] Please refer to Figure 4 A pair of second doped regions 33 are formed on the top of the device regions on both sides of the second region of the epitaxial layer 2, and a first doped region 4 is formed on the top of the second region of the epitaxial layer 2. The second doped regions 33 are doped with first type conductive ions, and the doping concentration of the second doped regions 33 is greater than that of the epitaxial layer 2.

[0034] Please continue to refer to this. Figure 4 A pair of third doped regions 32 are formed on the top of the device regions on both sides of the second region of the epitaxial layer 2. The third doped region 32 is spaced apart from the second doped region 33. The third doped region 32 is doped with type II conductive ions. The doping concentration of the third doped region 32 is greater than that of the epitaxial layer 2.

[0035] The method for forming the first doped region 4, the second doped region 33, and the third doped region 32 is the same as the method for forming the isolation buried layer 30, and therefore will not be described again here. Furthermore, the order in which the first doped region 4, the second doped region 33, and the third doped region 32 are formed is not necessarily fixed; in other embodiments, the third doped region may be formed first, followed by the first and second doped regions.

[0036] Please refer to Figure 5 and Figure 6 An isolation sidewall 31 is formed in the isolation area of ​​the epitaxial layer 2. The bottom surface of the isolation sidewall 31 is in contact with the isolation buried layer 30, and the top surface of the isolation sidewall 31 is flush with the top surface of the substrate 1.

[0037] The methods for forming the isolation sidewall 31 include: Please refer to... Figure 5 An isolation groove 310 is formed within the isolation region of the epitaxial layer 2, and the bottom of the isolation groove 310 exposes the isolation buried layer 30; please refer to Figure 6 An isolation layer is deposited in the isolation groove 310 and on the epitaxial layer 2 to form an isolation sidewall 31 in the isolation groove 310. The material of the isolation layer is silicon dioxide.

[0038] In this embodiment, after forming the decapsulation device structure and the first doped region 4, the fabrication method further includes: forming a metal interconnect structure on the epitaxial layer 2, the metal interconnect structure including a first metal connection structure 51, a first lead-out structure 52 and a second lead-out structure 53.

[0039] The first metal connection structure 51 is electrically connected to the first doped region 4, the second doped region 33 in the first device structure, and the third doped region 32 in the second device structure. The second doped region 33 and the third doped region 32 in the first device structure are both adjacent to the first doped region 4. One end of the first lead-out structure 52 is electrically connected to the third doped region 32 in the first device structure. One end of the second lead-out structure 53 is electrically connected to the third doped region 32 in the second device structure.

[0040] In this embodiment, when the number of drop-capacitor structures is one pair, the pair of drop-capacitor structures located on both sides of the second region are respectively the first device structures (please refer to...). Figure 10 The structure in the first region on the left) and the structure of the second device (please refer to...) Figure 10 The structure in the first region on the right side of the first device structure), the second doped region 33 in the first device structure and the third doped region 32 in the second device structure are both adjacent to the second region.

[0041] The following combination Figures 6-10 The specific steps for forming the metal interconnect structure are explained.

[0042] Please refer to Figure 6 A first isolation layer 54 is formed on the epitaxial layer 2.

[0043] The method for forming the first isolation layer 54 includes: chemically and mechanically polishing the isolation layer to form the first isolation layer 54, wherein the thickness of the first isolation layer 54 is less than the thickness of the isolation layer.

[0044] As an example, the thickness of the isolation layer may be 2 micrometers, and the thickness of the first isolation layer 54 may be 1.5 micrometers.

[0045] Please refer to Figure 7 A first conductive structure 501, a second conductive structure 502, and a third conductive structure 503 are formed that penetrate the first isolation layer 54. The first conductive structure 501 is electrically connected to the first doped region 4, the second conductive structure 502 is electrically connected to the second doped region 33, and the third conductive structure 503 is electrically connected to the third doped region 32.

[0046] Please refer to Figure 8 A metal interconnect layer 506 is formed on the first isolation layer 54. The metal interconnect layer 506 electrically connects the first doped region 4, the second doped region 33 in the first device structure, and the third doped region 32 in the second device structure.

[0047] The metal connection layer 506, the first conductive structure 501, the second conductive structure 502 corresponding to the second doped region 33 in the first device structure, and the third conductive structure 503 corresponding to the third doped region 32 in the second device structure constitute the first metal connection structure 51.

[0048] Please refer to Figure 9 A second isolation layer 55 is formed on the metal connection layer 506 and the first isolation layer 54.

[0049] Please refer to Figure 10 A first through-hole structure 504 and a second through-hole structure 505 are formed that penetrate the second isolation layer 55. The bottom end of the first through-hole structure 504 is electrically connected to the third through-hole structure corresponding to the third doped region 32 in the first device structure, and the bottom end of the second through-hole structure 505 is electrically connected to the third through-hole structure corresponding to the second doped region 33 in the second device structure.

[0050] The first through-hole structure 504 and the third conductive structure 503 corresponding to the third doped region 32 in the first device structure constitute the first lead-out structure 52, and the second through-hole structure 505 and the second conductive structure 502 corresponding to the second doped region 33 in the second device structure constitute the second lead-out structure 53.

[0051] In another embodiment, when the number of drop-capacitance device structures is greater than one pair, the drop-capacitance device structures located on both sides of the second region are a first device structure group and a second device structure group, respectively. Both the first device structure group and the second device structure group include at least two drop-capacitance device structures connected in series (not shown in the figure).

[0052] In another embodiment, after forming the drop-capacitor structure and the first doped region 4, the fabrication method further includes: forming a metal interconnect structure on the epitaxial layer 2. The metal interconnect structure includes a first metal connection structure 51, a second metal connection structure, a third metal connection mechanism, a first lead-out structure 52, and a second lead-out structure 53. The method for forming the metal interconnect structure is similar to that in this embodiment and will not be described again here.

[0053] Specifically, the first metal connection structure 51 electrically connects the first doped region 4, the second doped region 33 in the first device structure, and the third doped region 32 in the second device structure; the second metal connection structure electrically connects the third doped region 32 of each de-capacitated device structure in the first device structure group with the second doped region 33 of the next de-capacitated device structure; the third metal connection structure electrically connects the second doped region 33 of each de-capacitated device structure in the second device structure group with the third doped region 32 of the next de-capacitated device structure; one end of the first lead-out structure 52 is electrically connected to the third doped region 32 of the last de-capacitated device structure in the first device structure group, and the third doped region 32 of the last de-capacitated device structure in the first device structure group is the third doped region 32 farthest from the first doped region 4; one end of the second lead-out structure 53 is electrically connected to the second doped region 33 of the last de-capacitated device structure in the second device structure group, and the second doped region 33 of the last de-capacitated device structure in the second device structure group is the second doped region 33 farthest from the first doped region 4.

[0054] In this embodiment, please refer to Figure 11 After forming the metal interconnect structure, the fabrication method further includes: forming a first electrode 61 on the second isolation layer 55, the first electrode 61 being electrically connected to the top end of the first through-hole structure 504 and the top end of the second through-hole structure 505; forming a second electrode 62 on the back side of the substrate 1, the second electrode 62 being electrically connected to the substrate 1.

[0055] It should be noted that the order in which the first electrode and the second electrode are formed is arbitrary.

[0056] Before forming the second electrode 62 on the back side of the substrate 1, the method further includes: thinning the substrate 1 from the back side of the substrate 1.

[0057] As an example, the thickness of the thinned substrate 1 is 80 micrometers to 150 micrometers.

[0058] In this embodiment, please continue to refer to Figure 11 After forming the first electrode 61, the method further includes forming a passivation layer 7 on the edge region of the first electrode 61 and on the metal interconnect structure to protect the formed electrostatic discharge protection device structure.

[0059] This invention also provides an electrostatic discharge (ESD) protection device structure, which is fabricated using the above-described method. Please refer to [link / reference needed]. Figure 11 The electrostatic discharge protection device structure includes: a substrate 1, an epitaxial layer 2 doped with type II conductive ions, paired degrading device structures, and a first doped region 4 doped with type I conductive ions.

[0060] Substrate 1 is doped with type I conductive ions.

[0061] In this embodiment, the substrate 1 may be, for example, a silicon substrate 1, and the resistivity of the substrate 1 is in the range of 0.001 ohm·cm to 0.01 ohm·cm.

[0062] The epitaxial layer 2 is located on the substrate 1. The first type of conductive ions and the second type of conductive ions have opposite conductivity types. The doping concentration of the substrate 1 is greater than that of the epitaxial layer 2. The epitaxial layer 2 includes an adjacent first region and a second region. The first region is located on both sides of the second region. The bottom of the first region of the epitaxial layer 2 has an isolation buried layer 30, which is connected to the substrate 1.

[0063] In this embodiment, the material of the epitaxial layer 2 is polycrystalline silicon, and the thickness of the epitaxial layer 2 is 2 micrometers to 10 micrometers.

[0064] In this embodiment, the first type of conductive ion is one of N-type ions and P-type ions, the second type of conductive ion is the other of P-type ions and N-type ions, the N-type ion is one of phosphorus ions, arsenic ions and antimony ions, and the N-type ion is one of boron ions, aluminum ions and gallium ions.

[0065] The paired container structures are located in the first region on both sides of the second region.

[0066] Among them, the drop container structure in the first region located on both sides of the second region is symmetrical.

[0067] In this embodiment, the depressurization device structure includes a device area and an isolation area, with the isolation area surrounding the device area from the periphery.

[0068] Specifically, the device region includes a second doped region 33 and a third doped region 32 spaced apart on top of the epitaxial layer 2 within the device region. The second doped region 33 is doped with type I conductive ions, and the third doped region 32 is doped with type II conductive ions. The doping concentrations of both the second doped region 33 and the third doped region 32 are greater than the doping concentration of the epitaxial layer 2. The isolation region includes an isolation sidewall 31. The bottom surface of the isolation sidewall 31 is in contact with the isolation buried layer 30, and the top surface of the isolation sidewall 31 is flush with the top surface of the substrate 1.

[0069] In this embodiment, the thickness of the buried isolation layer 30 is greater than 1000 angstroms, and both the buried isolation layer 30 and the isolation sidewall 31 are made of silicon oxide. The thickness of the epitaxial layer 2 is 2 micrometers to 10 micrometers. If the thickness of the buried isolation layer 30 is small (less than 1000 angstroms), the substrate 1 and the drop capacitor structure are not completely isolated, making the drop capacitor structure prone to damage.

[0070] In this embodiment, when the number of drop capacitor device structures is one pair, the pair of drop capacitor device structures located on both sides of the second region are a first device structure and a second device structure, respectively. The second doped region 33 in the first device structure and the third doped region 32 in the second device structure are both adjacent to the second region. Furthermore, the electrostatic discharge protection device structure also includes a metal interconnect structure located on the epitaxial layer 2. The metal interconnect structure includes a first metal connection structure 51, a first lead-out structure 52, and a second lead-out structure 53.

[0071] The first metal connection structure 51 is electrically connected to the first doped region 4, the second doped region 33 in the first device structure, and the third doped region 32 in the second device structure. The second doped region 33 and the third doped region 32 in the first device structure are both adjacent to the first doped region 4. One end of the first lead-out structure 52 is electrically connected to the third doped region 32 in the first device structure. One end of the second lead-out structure 53 is electrically connected to the second doped region 33 in the second device structure.

[0072] In another embodiment, when the number of drop capacitor device structures is greater than one pair, the drop capacitor device structures located on both sides of the second region are a first device structure group and a second device structure group, respectively. The first device structure group and the second device structure group each include at least two drop capacitor device structures connected in series. Furthermore, the electrostatic discharge protection device structure also includes: a metal interconnect structure located on the epitaxial layer 2. The metal interconnect structure includes a first metal connection structure 51, a second metal connection structure, a third metal connection mechanism, a first lead-out structure 52, and a second lead-out structure 53.

[0073] Specifically, the first metal connection structure 51 electrically connects the first doped region 4, the second doped region 33 in the first device structure, and the third doped region 32 in the second device structure; the second metal connection structure electrically connects the third doped region 32 of each de-capacitated device structure in the first device structure group with the second doped region 33 of the next de-capacitated device structure; the third metal connection structure electrically connects the second doped region 33 of each de-capacitated device structure in the second device structure group with the third doped region 32 of the next de-capacitated device structure; one end of the first lead-out structure 52 is electrically connected to the third doped region 32 of the last de-capacitated device structure in the first device structure group, and the third doped region 32 of the last de-capacitated device structure in the first device structure group is the third doped region 32 farthest from the first doped region 4; one end of the second lead-out structure 53 is electrically connected to the second doped region 33 of the last de-capacitated device structure in the second device structure group, and the second doped region 33 of the last de-capacitated device structure in the second device structure group is the second doped region 33 farthest from the first doped region 4.

[0074] According to the principle of capacitor series connection, the more capacitors connected in series, the smaller the total capacitance. Therefore, setting a capacitor-dropping structure can reduce the capacitance of the electrostatic discharge (ESD) protection device. Furthermore, the more capacitor-dropping structures there are, the smaller the capacitance of the ESD protection device becomes.

[0075] The first doped region 4 is located at the top of the second region of the epitaxial layer 2, and the doping concentration of the first doped region 4 is greater than that of the epitaxial layer 2.

[0076] In this embodiment, the electrostatic discharge protection device structure further includes a first electrode 61 and a second electrode 62. The first electrode 61 is electrically connected to the other end of the first lead-out structure 52 and the other end of the second lead-out structure 53; the second electrode 62 is located on the back side of the substrate 1.

[0077] Please refer to Figure 11 and Figure 12 , Figure 12 and Figure 11 Their positions correspond to each other. Figure 11 The second doped region 33, the third doped region 32, and the epitaxial layer 2 within the corresponding isolation sidewall 31 constitute a diode structure. Figure 11 The substrate 1, the epitaxial layer 2 in the second region, and the first doped region 4 constitute the initial ESD device. Figure 12 The two diodes on the left and right sides of the middle are respectively with Figure 11 The diode structure located in the first region on the left and right sides of the second region corresponds to the diode structure in the second region. Figure 12 Device E in the middle is Figure 11 The initial ESD device in Figure 12 The connection end S1 in the middle is Figure 11 The outward connection end of the first electrode 61 in the middle, Figure 12The connection end S2 in the middle is Figure 11 The outward connection terminal of the second electrode 62 in the middle. Please refer to... Figure 12 The electrostatic discharge protection device structure can quickly conduct electricity in two directions. In one direction, the current path is S1-D1-E-S2, and in the other direction, the current path is S2-E-D2-S1.

[0078] In this embodiment, the electrostatic discharge protection device structure further includes a passivation layer 7, which is located on the edge region of the first electrode 61 and on the metal interconnect structure, and is used to protect the electrostatic discharge protection device structure below.

[0079] In summary, by providing an isolation buried layer 30 between the drop capacitor device structure and the substrate 1, the parasitic capacitance between the drop capacitor device structure and the substrate 1 can be reduced, thereby reducing the overall capacitance of the electrostatic discharge protection device structure and thus reducing its interference with high-speed signals to ensure signal integrity.

[0080] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A structure for an electrostatic discharge protection device, characterized in that, include: A substrate, wherein the substrate is doped with type I conductive ions; An epitaxial layer doped with type II conductive ions is located on the substrate. The type I conductive ions and type II conductive ions have opposite conductivity types. The doping concentration of the substrate is greater than the doping concentration of the epitaxial layer. The epitaxial layer includes an adjacent first region and a second region. The first region is located on both sides of the second region. The bottom of the first region of the epitaxial layer has an isolation buried layer connected to the substrate. The paired container structures are located in the first region on both sides of the second region; A first doped region is doped with the first type of conductive ions, the first doped region is located on top of the second region of the epitaxial layer, and the doping concentration of the first doped region is greater than the doping concentration of the epitaxial layer.

2. The electrostatic discharge protection device structure according to claim 1, characterized in that, The de-capacitor component structure includes a device region and an isolation region, wherein the isolation region surrounds the device region from the periphery. The device region includes a second doped region and a third doped region spaced apart on top of the epitaxial layer within the device region. The second doped region is doped with the first type of conductive ions, and the third doped region is doped with the second type of conductive ions. The doping concentrations of the second doped region and the third doped region are both greater than the doping concentration of the epitaxial layer. The isolation zone includes an isolation sidewall, the bottom surface of which is in contact with the isolation buried layer, and the top surface of which is flush with the top surface of the substrate.

3. The electrostatic discharge protection device structure according to claim 2, characterized in that, The first type of conductive ion is one of N-type ions and P-type ions, and the second type of conductive ion is the other of P-type ions and N-type ions. The N-type ion is one of phosphorus ions, arsenic ions and antimony ions, and the N-type ion is one of boron ions, aluminum ions and gallium ions. The thickness of the isolation buried layer is greater than 1000 angstroms, the material of the isolation buried layer and the isolation sidewall are both silicon oxide, the resistivity of the substrate is 0.001 ohm·cm to 0.01 ohm·cm, and the thickness of the epitaxial layer is 2 micrometers to 10 micrometers.

4. The electrostatic discharge protection device structure according to claim 2, characterized in that, When the number of the drop capacitor device structures is one pair, the pair of drop capacitor device structures located on both sides of the second region are a first device structure and a second device structure, respectively. The second doped region in the first device structure and the third doped region in the second device structure are both adjacent to the second region. Furthermore, the electrostatic discharge protection device structure also includes: a metal interconnect structure located on the epitaxial layer, the metal interconnect structure including a first metal connection structure, a first lead-out structure and a second lead-out structure. The first metal connection structure electrically connects the first doped region, the second doped region in the first device structure, and the third doped region in the second device structure. The second doped region in the first device structure and the third doped region in the second device structure are both adjacent to the first doped region. One end of the first lead-out structure is electrically connected to the third doped region in the first device structure; One end of the second lead-out structure is electrically connected to the second doped region in the second device structure.

5. The electrostatic discharge protection device structure according to claim 2, characterized in that, When the number of the de-capacitating device structures is greater than one pair, the de-capacitating device structures located on both sides of the second region are respectively a first device structure group and a second device structure group. Both the first device structure group and the second device structure group include at least two de-capacitating device structures connected in series. Furthermore, the electrostatic discharge protection device structure also includes: a metal interconnect structure located on the epitaxial layer. The metal interconnect structure includes a first metal connection structure, a second metal connection structure, a third metal connection mechanism, a first lead-out structure, and a second lead-out structure. The first metal connection structure electrically connects the first doped region, the second doped region in the first device structure, and the third doped region in the second device structure; The second metal connection structure electrically connects the third doped region of each drop-capacitance device structure in the first device structure group to the second doped region of the next drop-capacitance device structure. The third metal connection structure electrically connects the second doped region of each decapacitated device structure in the second device structure group to the third doped region of the next decapacitated device structure. One end of the first lead-out structure is electrically connected to the third doped region of the last decapacitated device structure in the first device structure group, and the third doped region of the last decapacitated device structure in the first device structure group is the third doped region farthest from the first doped region. One end of the second lead-out structure is electrically connected to the second doped region of the last decapacitor structure in the second device structure, and the second doped region of the last decapacitor structure in the second device structure group is the second doped region farthest from the first doped region.

6. The electrostatic discharge protection device structure according to claim 4 or 5, characterized in that, Also includes: The first electrode is electrically connected to the other end of the first lead structure and the other end of the second lead structure; The second electrode is located on the back side of the substrate.

7. A method for preparing an electrostatic discharge protection device structure, characterized in that, include: A substrate is provided, the substrate being doped with type I conductive ions; An epitaxial layer doped with a second type of conductive ion is formed on the substrate. The first type of conductive ion and the second type of conductive ion have opposite conductivity types. The doping concentration of the substrate is greater than the doping concentration of the epitaxial layer. The epitaxial layer includes an adjacent first region and a second region, with the first region located on both sides of the second region. An isolation buried layer is formed in a first region of the epitaxial layer, the isolation buried layer being connected to the substrate; A pair of drop-capacitor structures are formed in the epitaxial layer above the isolation buried layer. Each pair of drop-capacitor structures is located in a first region on both sides of the second region. Furthermore, a first doped region doped with the first type of conductive ions is formed on the top of the second region of the epitaxial layer. The doping concentration of the first doped region is greater than the doping concentration of the epitaxial layer.

8. The method for preparing the electrostatic discharge protection device structure according to claim 7, characterized in that, The method for forming an isolation buried layer in the first region of the epitaxial layer includes: A photoresist layer is spin-coated onto the epitaxial layer; The photoresist layer is exposed and developed using a photomask to form a patterned photoresist layer; Using the patterned photoresist layer as a mask, ion implantation is performed on the epitaxial layer to form an isolation buried layer in the first region of the epitaxial layer.

9. The method for preparing the electrostatic discharge protection device structure according to claim 8, characterized in that, The epitaxial layer is made of silicon, and the ions implanted into the epitaxial layer are oxygen ions, with a dose range of 10. 15 cm -2 ~10 18 cm -2 The ion implantation energy is greater than 200 keV, and the ion implantation angle range is 0° to 7°.

10. The method for preparing the electrostatic discharge protection device structure according to claim 7, characterized in that, The drop-capacitance device structure includes a device region and an isolation region, the isolation region surrounding the device region from the periphery, and a pair of drop-capacitance device structures are formed in an epitaxial layer above the isolation buried layer. The method of forming a first doped region in a second region of the epitaxial layer includes: A pair of second doped regions are formed on the top of the device regions on both sides of the second region of the epitaxial layer, and a first doped region is formed on the top of the second region of the epitaxial layer. The second doped regions are doped with the first type of conductive ions, and the doping concentration of the second doped regions is greater than the doping concentration of the epitaxial layer. A pair of third doped regions are formed on the top of the device region on both sides of the second region of the epitaxial layer. The third doped regions are spaced apart from the second doped regions. The third doped regions are doped with second type conductive ions. The doping concentration of the third doped regions is greater than that of the epitaxial layer. An isolation sidewall is formed within the isolation region of the epitaxial layer, the bottom surface of the isolation sidewall being in contact with the isolation buried layer, and the top surface of the isolation sidewall being flush with the top surface of the substrate.

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