LCL filter circuit suitable for inverter

Abstract

The invention discloses an LCL filter circuit suitable for an inverter, and relates to the technical field of grid-connected inversion control, the LCL filter circuit comprises a double-LCL filter branch circuit (1) and a DC bus capacitor bank (2), the double-LCL filter branch circuit (1) comprises a first filter capacitor C1 and a second filter capacitor C2 which are connected in series, the direct-current bus capacitor bank (2) comprises a third electrolytic capacitor C3 and a fourth electrolytic capacitor C4 which are connected in series; the first compensation capacitor CMg is used for reducing high-frequency common-mode noise, and one end of the first compensation capacitor CMg is connected between the first filter capacitor C1 and the second filter capacitor C2 and is connected between the third electrolytic capacitor C3 and the fourth electrolytic capacitor C4. The invention is used for solving high-frequency harmonic waves and common-mode voltage caused by power electronic devices.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of grid-connected inverter control, and more particularly, to an LCL filter circuit suitable for an inverter. BACKGROUND

[0002] PWM rectifiers are suitable for motor drive applications due to their energy feedback capability. Compared with diode bridge rectifiers, PWM rectifiers can effectively suppress low-order harmonics, but the high-frequency switching process of PWM rectifiers injects high-frequency electrical noise into the power grid. Specifically, the high-speed switching action of an insulated gate bipolar transistor (IGBT) causes high dv / dt, which excites the parasitic capacitance in the circuit, resulting in a narrow pulse peak current flowing to the ground, which contains rich high-frequency components, and further causes problems such as shaft voltage, bearing current, electromagnetic interference (EMI), and electromagnetic compatibility.

[0003] In PWM rectifiers, the above problems are further exacerbated due to the presence of a high common-mode voltage on the load. The combined electrical noise generated by the PWM rectifier and the inverter appears at the motor load terminals, resulting in an increase in common-mode current, especially when the motor is connected to the inverter through a long cable.

[0004] To meet the relevant electromagnetic interference standards, the EMI noise generated by the power converter must be limited within the specified range. Various solutions have been proposed to address this challenge. The invention CN202210510715.6 provides a flexible high-frequency oscillation suppression method for a high-voltage direct current transmission system using a C-type filter, which can effectively suppress high-frequency oscillation and has good oscillation suppression effect in a wide frequency range, avoiding the problem of poor oscillation effect in a wide frequency range of existing methods. However, it does not consider the operation of the transformer in non-ideal conditions such as the presence of dead zones. The invention CN202511074030.1 specifically designs a filter equivalent circuit design simulation system suitable for energy storage converters. Through the setting of the algorithm, the harmonic suppression ability, efficiency, and long-term operation reliability of the filter are significantly improved. However, the algorithm design is too complex, does not mention the essence of the generation of high-order harmonics of the converter, and lacks examples to verify its effectiveness. SUMMARY To overcome the above-mentioned defects of the prior art, embodiments of the present application provide an LCL filter circuit suitable for an inverter, which improves a conventional single-phase grid-connected inverter with a symmetric LCL filter to filter out high-frequency harmonics and common-mode voltages caused by power electronic devices.

[0005] To achieve the above-mentioned purposes, the present application provides the following technical solutions: The application discloses an LCL filter circuit suitable for an inverter, which comprises a double-LCL filter branch (1) and a DC bus capacitor group (2), the double-LCL filter branch (1) comprises a first filter capacitor C1 and a second filter capacitor C2 connected in series, the DC bus capacitor group (2) comprises a third electrolytic capacitor C3 and a fourth electrolytic capacitor C4 connected in series, and the LCL filter circuit further comprises a first compensation capacitor C Mg for reducing high-frequency common-mode noise, one end of the first compensation capacitor is connected between the first filter capacitor C1 and the second filter capacitor C2, and the first compensation capacitor is also connected between the third electrolytic capacitor C3 and the fourth electrolytic capacitor C4.

[0006] In a preferred embodiment, the first compensation capacitor C Mg has a capacitance value calculated according to the following formula:

[0007] wherein, is the voltage of the compensation capacitor, is an equivalent voltage, is the capacitance value of two parasitic capacitances.

[0008] In a preferred embodiment, the LCL filter structure is controlled by using a bipolar pulse width modulation method to reduce the high-frequency part in the common-mode voltage.

[0009] In a preferred embodiment, the double-LCL filter branch (1) comprises a first filter branch and a second filter branch which have the same structure, the first filter branch comprises an inductor L1, an inductor L2 and a capacitor C1, the inductor L1 and the inductor L2 are connected in series, one end of the capacitor C1 is connected between the inductor L1 and the inductor L2, and the other end of the capacitor C1 is grounded. In a preferred embodiment, the first compensation capacitor C Mg has a larger capacitance value than the parasitic capacitance in the inverter, and is used for reducing the high-frequency common-mode voltage.

[0010] In a preferred embodiment, a node connected between the first filter capacitor C1 and the second filter capacitor C2 is O, a node connected between the third electrolytic capacitor C3 and the fourth electrolytic capacitor C4 is M, the node O and the node M form a drainage path, and the first compensation capacitor C Mg is connected with the drainage path OM to form a low-impedance common-mode noise suppression loop, and is used for reducing the common-mode current.

[0011] The application has the following technical effects and advantages: This invention proposes an LCL filter circuit suitable for inverters. Starting from the analysis of common-mode voltage and current, an improved LCL filter topology is further obtained, which can overcome the influence of non-ideal factors such as inconsistent dead time of bridge arms and switching timing mismatch in single-phase inverters. Experimental results show that this invention can effectively filter out high-frequency harmonics and common-mode voltage caused by power electronic devices. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of a traditional single-phase grid-connected inverter with a symmetrical LCL filter.

[0013] Figure 2 This diagram illustrates the switching states of a single-phase H-bridge inverter using different PWM methods.

[0014] Figure 3 This is a schematic diagram of the common-mode equivalent circuit.

[0015] Figure 4 This is a schematic diagram of the equivalent circuit of the filter's grid-side CM.

[0016] Figure 5 This is a schematic diagram of the oscilloscope operation status of the power converter's grid voltage and grid current.

[0017] Figure 6 This is a schematic diagram of the CM voltage operation status in a single-phase inverter.

[0018] Figure 7 This is a schematic diagram comparing EMI noise levels.

[0019] Figure 8 A schematic diagram comparing the EMI noise levels of different filter configurations and bipolar PWM.

[0020] Figure 9 This is a schematic diagram of CM voltages with varying dead times.

[0021] Figure 10 This diagram illustrates the EMI noise levels when the no-load time is unequal. Detailed Implementation

[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0023] Example 1, as Figure 1 As shown, the present invention provides an LCL filter circuit suitable for inverters, comprising: The LCL filter circuit suitable for the inverter mainly comprises a DC bus capacitor group 1, a double LCL filter branch 2 and a common-mode noise cooperative suppression network. The DC bus capacitor group 1 is composed of two series-connected capacitors C3 and C4, and the point defined as a DC side midpoint O. The double LCL filter branch 2 is composed of two completely identical LCL filter branches, which are connected in parallel between the positive DC bus and the negative DC bus. Firstly, taking one branch as an example: the branch is composed of a first filter inductor L1, a second filter inductor L2 and a filter capacitor C1. The current flows through the path: from the inverter bridge arm output point, sequentially through the first filter inductor L1 and the second filter inductor L2, and finally flows to the AC side such as a power grid. One end of the first filter capacitor C1 is connected to the node between the first filter inductor L1 and the second filter inductor L2, and the other end is grounded. Secondly, the other branch is composed in the same way and is connected in parallel with the first branch. The midpoint of the two filter capacitors in the double LCL filter branch 1 is defined as M, The DC bus group serves as a power supply structure and is composed of the first and second DC bus capacitors connected in parallel between the positive and negative DC buses. The two capacitors not only provide a stable DC voltage for the inverter bridge, but also can absorb and suppress the high-frequency pulsating current from the DC side. The series connection point of the two capacitors forms the midpoint O of the DC side, which provides a physical basis and potential reference point for the subsequent common-mode noise dissipation. The double LCL filter branch filters the output of the inverter, including two symmetric branches connected between the output points A and B of the inverter bridge and the phase and neutral lines of the power grid. The inverter-side inductor in each branch mainly functions to suppress the high-frequency current ripple caused by the PWM switching frequency and limit the current change rate. The filter capacitor provides a low-impedance bypass path for these high-frequency harmonic currents, allowing them to circulate locally without being injected into the power grid. Meanwhile, it sets the resonant frequency of the filter together with the inductor. The final grid-side inductor further attenuates the residual high-frequency noise after the filter capacitor and decouples the inverter output from the grid impedance, ensuring that the current harmonics meet the grid connection requirements. The LCL filter circuit suitable for the inverter further comprises a first compensation capacitor C Mg for reducing high-frequency common-mode noise. One end of the first compensation capacitor is connected between the first filter capacitor C1 and the second filter capacitor C2, and simultaneously connected between the third electrolytic capacitor C3 and the fourth electrolytic capacitor C4.

[0024] Based on common-mode voltage analysis, the embodiment establishes a grid-side common-mode equivalent circuit as shown in the filter, which is used to analyze the influence of the selected PWM technology. The DC bus common-mode voltage of the traditional single-phase inverter is defined as Figure 1 , and its expression can be derived as: , In the case of ignoring the parasitic capacitance C p1 ​With C p2 And without considering special connections, it can be simplified to: , This formula shows that the common-mode voltage depends on the DC bus voltage, switching state, and grid voltage. Its high dv / dt will excite parasitic capacitance, resulting in current injection to ground. Analysis of the impact of PWM strategies through common-mode equivalent circuits reveals that in the unipolar PWM method, The value jumps between 1, 0, and -1, such as Figure 2 As shown in (a), the common-mode voltage exhibits the characteristics of pulses superimposed on a sine wave; however, in the bipolar PWM method, this term is always zero, as... Figure 2 As shown in (b), this eliminates the dv / dt caused by switching, resulting in a common-mode voltage containing only a sinusoidal waveform with an amplitude half that of the AC voltage. Therefore, the present invention preferably employs a bipolar PWM strategy, although its switching losses are higher, it provides a basis for simplifying the EMI filter. Inverter switching transistors such as IGBTs and MOSFETs generate rapidly changing voltages during high-frequency switching, which are themselves powerful sources of high-frequency common-mode noise. This noise can couple into the dual LCL filter branch 1 through parasitic capacitance and other pathways. When the high-frequency common-mode noise propagates to C... Mg When the M point is connected, the high-frequency common-mode noise has two parallel paths: Path A: Continuing forward, this path may flow into the power grid or affect other parts, and this path has a high impedance; Path B: Through capacitor C Mg Upon reaching the ground, due to the high frequency of the noise, C Mg The capacitive reactance is very small; high-frequency common-mode noise always tends to choose the path of least impedance, therefore, most of the high-frequency common-mode noise current will be absorbed by C. Mg This "low-impedance highway" is channeled to the ground without interfering with the power grid or other sensitive parts; Compensation capacitor C Mg The design of its model is as follows Figure 4 As shown, where a is the low-frequency approximation and b is the high-frequency approximation, the capacitance value is approximately in the tens of nanofarads range. At low frequencies, it is in an open-circuit state and does not affect the fundamental frequency operation; at high frequencies, it interacts with the parasitic capacitance C. p1 C p2 A voltage divider network is formed, and the voltage relationships are as follows: , By making C Mg The capacitance value should be greater than C. p1 With C p2 It can significantly reduce V MgThe high-frequency voltage attenuation rate is 95%, ensuring that all subsystems connected to the DC bus can experience the attenuation of the high-frequency common-mode voltage. To prevent high-frequency resonance, an RC branch is used with C... Mg Parallel connection is used to achieve damping. It should be noted that unipolar PWM is due to v con A non-zero pulse would induce a high-intensity circulating current and trigger resonance in this topology, therefore it is not suitable. Experimental verification shows that the improved LCL filter topology can effectively overcome the effects of non-ideal factors such as inconsistent dead time of bridge arms and mismatch of switching timing in single-phase inverters. Compared with the baseline conditions, it can achieve a significant reduction of 40 dB in noise level and effectively filter out high-frequency harmonics and common-mode voltage caused by power electronic devices.

[0025] The midpoint M of the first and second filter capacitors is directly electrically connected to the midpoint O of the DC bus via a wire, which is used to construct an internal common-mode noise venting path OM, thereby effectively suppressing common-mode noise. This connection is as follows: Figure 1 The middle part is indicated by a dotted line. Based on the derivation of the common-mode voltage: , Its common-mode equivalent circuit is as follows Figure 3 As shown, under ideal bipolar PWM, v con =0, meaning there is no high dv / dt. However, in practice, factors such as dead-time mismatch, inductor parameter differences, and circuit delays can result in a limited dv / dt. con and voltage glitches, by Figure 1 The dashed line in the middle connects point O and point M, creating an internal venting path for the common-mode current caused by common-mode voltage spikes generated by these non-ideal factors. This path confines the common-mode current to the filter and prevents it from polluting the power grid.

[0026] Example 2: To verify the effectiveness of the proposed structure, an experimental platform was built connecting a 5kW single-phase active rectifier to a three-phase motor drive. In this IGBT-based converter, the switching frequency of the active rectifier is 10kHz when using bipolar PWM and 5kHz when using unipolar PWM. The switching frequency of the motor-side inverter is set to 10kHz. The system reference value is set as: apparent power reference P base =5kVA, voltage reference V base =240V, frequency reference f base =50Hz. Based on these reference values, the values ​​of the reference capacitance and reference inductance can be derived: , The experimental platform uses a three-phase induction motor with a rated voltage of 415V, a power of 5kW, and a frequency of 50Hz, connected to an inverter. The motor is driven using a V / F control strategy, absorbing system power losses only from the power grid. The active rectifier employs a dual-loop control strategy, combining outer-loop voltage control and inner-loop current control. Grid-connected operation verification of the converter was conducted at a 3kW power level, and the results are as follows: Figure 5 As shown: F1 is voltage, F2 is current. The grid current and voltage are in phase, indicating that the system is operating at unity power factor. The current waveform has almost no high-frequency switching ripple, confirming the effectiveness of the LCL filter. However, a finite number of low-order harmonics can be observed in the grid current. This phenomenon originates from the low-order harmonics contained in the grid voltage itself (the existence of the 5th, 7th, and 11th harmonics can be verified by observing the flat-top waveform of the grid voltage). Comparative tests of the two PWM methods show that: Figure 6 (a) The common-mode voltage (DC bus midpoint to ground voltage) of unipolar PWM exhibits the characteristics of a 5kHz high-frequency pulse superimposed on a 50Hz sine wave, with pulse dv / dt reaching as high as 1kV / μs (depending on IGBT characteristics). This switching transient excites parasitic capacitance and generates spike currents to ground; while Figure 6 (b) The common-mode voltage of bipolar PWM is only a sine wave with an amplitude equal to half of the grid voltage. The comparison results show that bipolar PWM can significantly suppress high-frequency common-mode voltage components. In unipolar PWM, the effective switching frequency is twice the actual switching frequency; while in bipolar PWM, the current ripple frequency is the same as the actual switching frequency. Therefore, unipolar PWM can halve the effective value of the ripple current in inductor L1. To generate the same level of ripple current in inductor L1 as unipolar PWM, the bridge arm switching frequency needs to be increased to twice that of the unipolar scheme. The experimental platform underwent testing with various configurations, among which the following four operating conditions were deemed most valuable for research: Condition a: No common-mode filter + unipolar PWM; Condition b: No common-mode filter + bipolar PWM; Condition c: With OM connection + bipolar PWM; Condition d: With OM connection + C Mg Capacitor + Bipolar PWM; Under 70% load conditions, tests were conducted on unipolar PWM, bipolar PWM, and bipolar PWM with / without the filter circuit proposed in this invention. To evaluate the electromagnetic interference suppression effect of the LCL filter, conducted noise emission tests were conducted by connecting it to a single-phase line impedance stabilization network (LISN). The LISN not only blocked grid noise interference but also provided a 50Ω matching interface for the receiver. A high-frequency oscilloscope (Lecroy 6050, 500MHz, 5GSa / s) was used as the receiver. The acquired data was then subjected to a fast Fourier transform to obtain... Figure 7 The spectrum comparison of the 10MHz band shown is as follows: Figure 7 (a) Display the EMI noise spectrum for operating condition a (unipolar PWM, Fsw=5kHz). Figure 7 (b) shows the results for operating condition b (bipolar PWM, Fsw=10kHz). It can be seen that by simply using bipolar PWM with double the switching frequency, the noise peak at 0.2MHz can be reduced by about 20dB. However, this advantage will change due to the influence of non-ideal switching factors. Figure 8 (F1) uses OM connection, (F2) uses OM connection and capacitor C Mg A comparison between operating conditions c and d in the above shows that: operating condition d (with OM connection and C) Mg The capacitor (with the lowest EMI noise level) not only eliminates the noise peak at 0.2MHz, but also reduces it by about 10 dB at 3.4MHz. Comparing operating conditions a and d, it can be found that under operating condition d, the noise peak at 0.2MHz is reduced by about 40 dB, the peak at 0.9MHz is completely eliminated, and the peak near 3MHz is also reduced by about 5 dB. To verify the proposed common-mode filter's ability to withstand non-ideal operating conditions, a bridge arm dead-time asymmetry test was specifically designed. Ideally, both arms of the active rectifier use a 3μs dead time. Now, by shortening the dead time of one arm by 1μs, the dead-time mismatch and propagation delay difference in the actual circuit are simulated. The test results are as follows: Figure 9 (a) without CM filter, (b) with CM filter) as shown: Figure 9 Image (a) shows the common-mode voltage waveform of the proposed scheme, with an amplitude reaching V. dc The high-frequency pulse of / 2 is still superimposed on the sine wave, and this pulse will inject a high peak current into the ground wire; while Figure 9 The waveform shown in Figure (b) after applying the common-mode filter proposed in this invention demonstrates that even with dead-time mismatch, the common-mode voltage can still maintain a pure sinusoidal characteristic. Figure 10 ((a) without CM filter, (b) with CM filter) shows a comparison of EMI noise levels when an asymmetric dead time is introduced into the system. Figure 10 (a) and Figure 10(b) It can be observed that after using the filter proposed in this invention, the current injected to ground is significantly reduced, and the EMI noise level is reduced by about 20 dB at 200 kHz and by about 10 dB at 900 kHz. Comparing case d with case a, it can be seen that in case d, the grid-side CM current is reduced by more than 4 times, and the motor-side current is reduced by about 21 times. However, the grid-side CM current in case d is slightly higher than that in case B. As long as the difference is small and the values ​​are within acceptable standard limits, this is not a problem. Among all cases, the motor-side grounding leakage current is minimized when using the filter configuration proposed in this invention. It can be observed that with this filter configuration, such as... Figure 1 As shown, the system is not sensitive to dead time mismatch, and the ground leakage current on the grid side and the motor side remains almost the same under non-ideal conditions.

[0027] The above formulas are all dimensionless calculations. The formulas are derived from software simulations based on a large amount of collected data to obtain the most recent real-world results. The preset parameters in the formulas are set by those skilled in the art according to the actual situation.

[0028] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, in the form of a computer program product.

[0029] Those skilled in the art will recognize that the modules and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0030] In addition, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module.

[0031] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0032] In conclusion, the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An LCL filter circuit suitable for inverters, comprising a dual LCL filter branch (1) and a DC bus capacitor bank (2), wherein the dual LCL filter branch (1) comprises a first filter capacitor C1 and a second filter capacitor C2 connected in series, and the DC bus capacitor bank (2) comprises a third electrolytic capacitor C3 and a fourth electrolytic capacitor C4 connected in series, characterized in that: It also includes a first compensation capacitor C for reducing high-frequency common-mode noise. Mg One end of the first compensation capacitor is connected between the first filter capacitor C1 and the second filter capacitor C2, and is also connected between the third electrolytic capacitor C3 and the fourth electrolytic capacitor C4.

2. The LCL filter circuit for inverters according to claim 1, characterized in that, The first compensation capacitor C Mg The formula for calculating capacitance is as follows: in, To compensate for the voltage across the capacitor, Equivalent voltage These are the values ​​of the two parasitic capacitances.

3. The LCL filter circuit for inverters according to claim 1, characterized in that, The LCL filter structure is controlled by a bipolar pulse width modulation method to reduce the high-frequency component of the common-mode voltage.

4. The LCL filter circuit for inverters according to claim 1, characterized in that, The dual LCL filter branch (1) includes a first filter branch and a second filter branch with the same structure. The first filter branch includes an inductor L1, an inductor L2 and a capacitor C1. The inductor L1 and the inductor L2 are connected in series. One end of the capacitor C1 is connected between the inductor L1 and the inductor L2, and the other end is grounded.

5. The LCL filter circuit for inverters according to claim 1, characterized in that, The first compensation capacitor C Mg It has a larger capacitance value than the parasitic capacitance in the inverter, which is used to reduce high-frequency common-mode voltage.

6. The LCL filter circuit for inverters according to claim 1, characterized in that, The node connecting the first filter capacitor C1 and the second filter capacitor C2 is O, and the node connecting the third electrolytic capacitor C3 and the fourth electrolytic capacitor C4 is M. Nodes O and M form a conduction path. The first compensation capacitor C... Mg It is connected to the OM shunt path to form a low-impedance common-mode noise suppression loop, which is used to reduce common-mode current.

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